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1.1 root 1: /* nexus.h 6.1 83/08/01 */
2:
3: /*
4: * Information about nexus's.
5: *
6: * Each machine has an address of backplane slots (nexi).
7: * Each nexus is some type of adapter, whose code is the low
8: * byte of the first word of the adapter address space.
9: * At boot time the system looks through the array of available
10: * slots and finds the interconnects for the machine.
11: */
12: #if VAX780
13: #define NNEX780 16
14: #define NEX780 ((struct nexus *)0x20000000)
15: #endif
16: #if VAX750
17: #define NNEX750 16
18: #define NEX750 ((struct nexus *)0xf20000)
19: #endif
20: #if VAX730
21: #define NNEX730 16
22: #define NEX730 ((struct nexus *)0xf20000)
23: #endif
24: #define NEXSIZE 0x2000
25:
26: #define MAXNNEXUS 16
27:
28: #ifndef LOCORE
29: struct nexus {
30: union nexcsr {
31: long nex_csr;
32: u_char nex_type;
33: } nexcsr;
34: long nex_pad[NEXSIZE / sizeof (long) - 1];
35: };
36: #ifdef KERNEL
37: struct nexus nexus[MAXNNEXUS];
38: #endif
39: #endif
40:
41: /*
42: * Bits in high word of nexus's.
43: */
44: #define SBI_PARFLT (1<<31) /* sbi parity fault */
45: #define SBI_WSQFLT (1<<30) /* write sequence fault */
46: #define SBI_URDFLT (1<<29) /* unexpected read data fault */
47: #define SBI_ISQFLT (1<<28) /* interlock sequence fault */
48: #define SBI_MXTFLT (1<<27) /* multiple transmitter fault */
49: #define SBI_XMTFLT (1<<26) /* transmit fault */
50:
51: #define NEX_CFGFLT (0xfc000000)
52:
53: #ifndef LOCORE
54: #if VAX780
55: #define NEXFLT_BITS \
56: "\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT"
57: #endif
58: #endif
59:
60: #define NEX_APD (1<<23) /* adaptor power down */
61: #define NEX_APU (1<<22) /* adaptor power up */
62:
63: #define MBA_OT (1<<21) /* overtemperature */
64:
65: #define UBA_UBINIT (1<<18) /* unibus init */
66: #define UBA_UBPDN (1<<17) /* unibus power down */
67: #define UBA_UBIC (1<<16) /* unibus initialization complete */
68:
69: /*
70: * Types for nex_type.
71: */
72: #define NEX_ANY 0 /* pseudo for handling 11/750 */
73: #define NEX_MEM4 0x08 /* 4K chips, non-interleaved mem */
74: #define NEX_MEM4I 0x09 /* 4K chips, interleaved mem */
75: #define NEX_MEM16 0x10 /* 16K chips, non-interleaved mem */
76: #define NEX_MEM16I 0x11 /* 16K chips, interleaved mem */
77: #define NEX_MBA 0x20 /* Massbus adaptor */
78: #define NEX_UBA0 0x28 /* Unibus adaptor */
79: #define NEX_UBA1 0x29 /* 4 flavours for 4 addr spaces */
80: #define NEX_UBA2 0x2a
81: #define NEX_UBA3 0x2b
82: #define NEX_DR32 0x30 /* DR32 user i'face to SBI */
83: #define NEX_CI 0x38 /* CI adaptor */
84: #define NEX_MPM0 0x40 /* Multi-port mem */
85: #define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */
86: #define NEX_MPM2 0x42
87: #define NEX_MPM3 0x43
88: #define NEX_MEM64L 0x68 /* 64K chips, non-interleaved, lower */
89: #define NEX_MEM64LI 0x69 /* 64K chips, ext-interleaved, lower */
90: #define NEX_MEM64U 0x6a /* 64K chips, non-interleaved, upper */
91: #define NEX_MEM64UI 0x6b /* 64K chips, ext-interleaved, upper */
92: #define NEX_MEM64I 0x6c /* 64K chips, interleaved */
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