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Annotation of 42BSD/sys/vaxif/if_pclreg.h, revision 1.1.1.1

1.1       root        1: /*     if_pclreg.h     6.1     83/07/29        */
                      2: 
                      3: /*
                      4:  * DEC CSS PCL-11B Parallel Communications Interface
                      5:  */
                      6: 
                      7: struct pcldevice  {
                      8:        u_short pcl_tcr;        /* Transmitter Command Register */
                      9:        u_short pcl_tsr;        /* Transmitter Status Register */
                     10:        u_short pcl_tsdb;       /* Transmitter Source Data Buffer */
                     11:        short   pcl_tsbc;       /* Transmitter Source Byte Count */
                     12:        u_short pcl_tsba;       /* Transmitter Source Bus Address */
                     13:        u_short pcl_tmmr;       /* Transmitter Master/Maint Regs */
                     14:        u_short pcl_tscrc;      /* Transmitter Source CRC */
                     15:        u_short pcl_spare;
                     16:        u_short pcl_rcr;        /* Receiver Command Register */
                     17:        u_short pcl_rsr;        /* Receiver Status Register */
                     18:        u_short pcl_rddb;       /* Receiver Destination Data Buffer */
                     19:        short   pcl_rdbc;       /* Receiver Destination Byte Count */
                     20:        u_short pcl_rdba;       /* Receiver Destination Bus Address */
                     21:        u_short pcl_rdcrc;      /* Receiver Destination CRC */
                     22: };
                     23: 
                     24: /* Transmitter Command and Status Bits */
                     25: #define PCL_STTXM      (1<<0)          /* Start transmission */
                     26: #define PCL_TXINIT     (1<<1)          /* Transmitter Initialize */
                     27: #define PCL_IE         (1<<6)          /* Interrupt Enable */
                     28: #define PCL_SNDWD      (1<<13)         /* Send word */
                     29: #define PCL_TXNPR      (1<<14)         /* Transmitter NPR */
                     30: #define PCL_RIB                (1<<15)         /* Retry if busy */
                     31: 
                     32: #define PCL_RESPA      (3<<0)          /* Response A bits (tsr & rsr) */
                     33: #define PCL_RESPB      (3<<2)          /* Response B bits (tsr & rsr) */
                     34: #define PCL_MSTDWN     (1<<11)         /* Master down */
                     35: #define PCL_ERR                (1<<15)         /* Error summary */
                     36: 
                     37: #define PCL_MASTER     (1<<8)          /* Set MASTER status */
                     38: #define PCL_AUTOADDR   (1<<12)         /* Auto time slicing */
                     39: 
                     40: /* Receiver Command and Status Bits */
                     41: #define PCL_RCVDAT     (1<<0)          /* Receive data */
                     42: #define PCL_RCINIT     (1<<1)          /* Receiver Initialize */
                     43: #define PCL_RCVWD      (1<<13)         /* Receive word */
                     44: #define PCL_RCNPR      (1<<14)         /* Receive NRP */
                     45: #define PCL_REJ                (1<<15)         /* Reject transmission */
                     46: 
                     47: #define PCL_BCOFL      (1<<9)          /* Byte Counter Overflow */
                     48: 
                     49: #define PCL_TERRBITS   "\20\20ERR\17NXL\16MEM_OFL\15TXM_ERR\14MST_DWN\13TIM_OUT\12OVERRUN\11DTI_RDY\10SUC_TXF\07BUSY\06SOREJ\05TBS_BUSY"
                     50: #define PCL_TCSRBITS   "\20\20RIB\17TX_NPR\16SND_WD\10RD_SILO\07IE\04DTO_RDY\03INH_ADI\02TX_INIT\01START_TXM"
                     51: 
                     52: #define PCL_RERRBITS   "\20\20ERR\17NXL\16MEM_OFL\15TXM_ERR\14PARITY\13TIM_OUT\12BC_OFL\11DTO_RDY\10SUC_TXF\07BUSY\06REJ_COMP\05CHN_OPN"
                     53: #define PCL_RCSRBITS   "\20\20REJ\17RC_NPR\16RCV_WD\10LD_SILO\07IE\04DTI_RDY\03INH_ADI\02RC_INIT\01RCV_DAT"

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