|
|
1.1 root 1: /* udareg.h 6.1 83/07/29 */
2:
3: /*
4: * UDA-50 registers and structures
5: */
6:
7: struct udadevice {
8: short udaip; /* initialization and polling */
9: short udasa; /* status and address */
10: };
11:
12: #define UDA_ERR 0100000 /* error bit */
13: #define UDA_STEP4 0040000 /* step 4 has started */
14: #define UDA_STEP3 0020000 /* step 3 has started */
15: #define UDA_STEP2 0010000 /* step 2 has started */
16: #define UDA_STEP1 0004000 /* step 1 has started */
17: #define UDA_NV 0002000 /* no host settable interrupt vector */
18: #define UDA_QB 0001000 /* controller supports Q22 bus */
19: #define UDA_DI 0000400 /* controller implements diagnostics */
20: #define UDA_IE 0000200 /* interrupt enable */
21: #define UDA_PI 0000001 /* host requests adapter purge interrupts */
22: #define UDA_GO 0000001 /* start operation, after init */
23:
24:
25: /*
26: * UDA Communications Area
27: */
28:
29: struct udaca {
30: short ca_xxx1; /* unused */
31: char ca_xxx2; /* unused */
32: char ca_bdp; /* BDP to purge */
33: short ca_cmdint; /* command queue transition interrupt flag */
34: short ca_rspint; /* response queue transition interrupt flag */
35: long ca_rspdsc[NRSP];/* response descriptors */
36: long ca_cmddsc[NCMD];/* command descriptors */
37: };
38:
39: #define ca_ringbase ca_rspdsc[0]
40:
41: #define UDA_OWN 0x80000000 /* UDA owns this descriptor */
42: #define UDA_INT 0x40000000 /* allow interrupt on ring transition */
43:
44: /*
45: * MSCP packet info
46: */
47: struct mscp_header {
48: short uda_msglen; /* length of MSCP packet */
49: char uda_credits; /* low 4 bits: credits, high 4 bits: msgtype */
50: char uda_vcid; /* virtual circuit id */
51: };
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.