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1.1 root 1: /*
2: * Copyright (c) 1982, 1986 Regents of the University of California.
3: * All rights reserved. The Berkeley software License Agreement
4: * specifies the terms and conditions for redistribution.
5: *
6: * @(#)ubareg.h 7.1 (Berkeley) 6/5/86
7: */
8:
9: /*
10: * VAX UNIBUS adapter registers
11: */
12:
13: /*
14: * size of unibus address space in pages
15: */
16: #define UBAPAGES 512
17:
18: /*
19: * Number of UNIBUS map registers. We can't use the last 8k of UNIBUS
20: * address space for i/o transfers since it is used by the devices,
21: * hence have slightly less than 256K of UNIBUS address space.
22: */
23: #define NUBMREG 496
24:
25: #ifndef LOCORE
26: /*
27: * UBA hardware registers
28: */
29: struct uba_regs
30: {
31: int uba_cnfgr; /* configuration register */
32: int uba_cr; /* control register */
33: int uba_sr; /* status register */
34: int uba_dcr; /* diagnostic control register */
35: int uba_fmer; /* failed map entry register */
36: int uba_fubar; /* failed UNIBUS address register */
37: int pad1[2];
38: int uba_brsvr[4];
39: int uba_brrvr[4]; /* receive vector registers */
40: int uba_dpr[16]; /* buffered data path register */
41: int pad2[480];
42: struct pte uba_map[NUBMREG]; /* unibus map register */
43: int pad3[16]; /* no maps for device address space */
44: };
45: #endif
46:
47: #if defined(VAX780) || defined(VAX8600)
48: /* uba_cnfgr */
49: #define UBACNFGR_UBINIT 0x00040000 /* unibus init asserted */
50: #define UBACNFGR_UBPDN 0x00020000 /* unibus power down */
51: #define UBACNFGR_UBIC 0x00010000 /* unibus init complete */
52:
53: #define UBACNFGR_BITS \
54: "\40\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT\30ADPDN\27ADPUP\23UBINIT\22UBPDN\21UBIC"
55:
56: /* uba_cr */
57: #define UBACR_MRD16 0x40000000 /* map reg disable bit 4 */
58: #define UBACR_MRD8 0x20000000 /* map reg disable bit 3 */
59: #define UBACR_MRD4 0x10000000 /* map reg disable bit 2 */
60: #define UBACR_MRD2 0x08000000 /* map reg disable bit 1 */
61: #define UBACR_MRD1 0x04000000 /* map reg disable bit 0 */
62: #define UBACR_IFS 0x00000040 /* interrupt field switch */
63: #define UBACR_BRIE 0x00000020 /* BR interrupt enable */
64: #define UBACR_USEFIE 0x00000010 /* UNIBUS to SBI error field IE */
65: #define UBACR_SUEFIE 0x00000008 /* SBI to UNIBUS error field IE */
66: #define UBACR_CNFIE 0x00000004 /* configuration IE */
67: #define UBACR_UPF 0x00000002 /* UNIBUS power fail */
68: #define UBACR_ADINIT 0x00000001 /* adapter init */
69:
70: /* uba_sr */
71: #define UBASR_BR7FULL 0x08000000 /* BR7 receive vector reg full */
72: #define UBASR_BR6FULL 0x04000000 /* BR6 receive vector reg full */
73: #define UBASR_BR5FULL 0x02000000 /* BR5 receive vector reg full */
74: #define UBASR_BR4FULL 0x01000000 /* BR4 receive vector reg full */
75: #define UBASR_RDTO 0x00000400 /* UNIBUS to SBI read data timeout */
76: #define UBASR_RDS 0x00000200 /* read data substitute */
77: #define UBASR_CRD 0x00000100 /* corrected read data */
78: #define UBASR_CXTER 0x00000080 /* command transmit error */
79: #define UBASR_CXTMO 0x00000040 /* command transmit timeout */
80: #define UBASR_DPPE 0x00000020 /* data path parity error */
81: #define UBASR_IVMR 0x00000010 /* invalid map register */
82: #define UBASR_MRPF 0x00000008 /* map register parity failure */
83: #define UBASR_LEB 0x00000004 /* lost error */
84: #define UBASR_UBSTO 0x00000002 /* UNIBUS select timeout */
85: #define UBASR_UBSSYNTO 0x00000001 /* UNIBUS slave sync timeout */
86:
87: #define UBASR_BITS \
88: "\20\13RDTO\12RDS\11CRD\10CXTER\7CXTMO\6DPPE\5IVMR\4MRPF\3LEB\2UBSTO\1UBSSYNTO"
89:
90: /* uba_brrvr[] */
91: #define UBABRRVR_AIRI 0x80000000 /* adapter interrupt request */
92: #define UBABRRVR_DIV 0x0000ffff /* device interrupt vector field */
93: #endif
94:
95: /* uba_dpr */
96: #if defined(VAX780) || defined(VAX8600)
97: #define UBADPR_BNE 0x80000000 /* buffer not empty - purge */
98: #define UBADPR_BTE 0x40000000 /* buffer transfer error */
99: #define UBADPR_DPF 0x20000000 /* DP function (RO) */
100: #define UBADPR_BS 0x007f0000 /* buffer state field */
101: #define UBADPR_BUBA 0x0000ffff /* buffered UNIBUS address */
102: #define UBA_PURGE780(uba, bdp) \
103: ((uba)->uba_dpr[bdp] |= UBADPR_BNE)
104: #else
105: #define UBA_PURGE780(uba, bdp)
106: #endif
107: #if VAX750
108: #define UBADPR_ERROR 0x80000000 /* error occurred */
109: #define UBADPR_NXM 0x40000000 /* nxm from memory */
110: #define UBADPR_UCE 0x20000000 /* uncorrectable error */
111: #define UBADPR_PURGE 0x00000001 /* purge bdp */
112: /* the DELAY is for a hardware problem */
113: #define UBA_PURGE750(uba, bdp) { \
114: ((uba)->uba_dpr[bdp] |= (UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE)); \
115: DELAY(8); \
116: }
117: #else
118: #define UBA_PURGE750(uba, bdp)
119: #endif
120:
121: /*
122: * Macros for fast buffered data path purging in time-critical routines.
123: *
124: * Too bad C pre-processor doesn't have the power of LISP in macro
125: * expansion...
126: */
127:
128: #if defined(VAX8600) || defined(VAX780) || defined(VAX750)
129: #define UBAPURGE(uba, bdp) { \
130: switch (cpu) { \
131: case VAX_8600: case VAX_780: UBA_PURGE780((uba), (bdp)); break; \
132: case VAX_750: UBA_PURGE750((uba), (bdp)); break; \
133: } \
134: }
135: #endif
136: #if !defined(VAX8600) && !defined(VAX780) && !defined(VAX750)
137: #define UBAPURGE(uba, bdp)
138: #endif
139:
140:
141:
142: /* uba_mr[] */
143: #define UBAMR_MRV 0x80000000 /* map register valid */
144: #define UBAMR_BO 0x02000000 /* byte offset bit */
145: #define UBAMR_DPDB 0x01e00000 /* data path designator field */
146: #define UBAMR_SBIPFN 0x000fffff /* SBI page address field */
147:
148: #define UBAMR_DPSHIFT 21 /* shift to data path designator */
149:
150: /*
151: * Number of unibus buffered data paths and possible uba's per cpu type.
152: */
153: #define NBDP8600 15
154: #define NBDP780 15
155: #define NBDP750 3
156: #define NBDP730 0
157: #define NBDP630 0
158: #define MAXNBDP 15
159:
160: /*
161: * Symbolic BUS addresses for UBAs.
162: */
163:
164: #if VAX630
165: #define UMEM630 ((u_short *)(0x1ffc2000))
166: #endif
167:
168: #if VAX730
169: #define UMEM730 ((u_short *)(0xfc0000))
170: #endif
171:
172: #if VAX750
173: #define UMEM750(i) ((u_short *)(0xfc0000-(i)*0x40000))
174: #endif
175:
176: #if VAX780
177: #define UMEM780(i) ((u_short *)(0x20100000+(i)*0x40000))
178: #endif
179:
180: #if VAX8600
181: #define UMEMA8600(i) ((u_short *)(0x20100000+(i)*0x40000))
182: #define UMEMB8600(i) ((u_short *)(0x22100000+(i)*0x40000))
183: #endif
184:
185: /*
186: * Macro to offset a UNIBUS device address, often expressed as
187: * something like 0172520 by forcing it into the last 8K of UNIBUS memory
188: * space.
189: */
190: #define ubdevreg(addr) (0760000|((addr)&017777))
191:
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