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Annotation of 43BSDReno/sys/hp300/clockreg.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * Copyright (c) 1988 University of Utah.
                      3:  * Copyright (c) 1982, 1990 The Regents of the University of California.
                      4:  * All rights reserved.
                      5:  *
                      6:  * This code is derived from software contributed to Berkeley by
                      7:  * the Systems Programming Group of the University of Utah Computer
                      8:  * Science Department.
                      9:  *
                     10:  * Redistribution is only permitted until one year after the first shipment
                     11:  * of 4.4BSD by the Regents.  Otherwise, redistribution and use in source and
                     12:  * binary forms are permitted provided that: (1) source distributions retain
                     13:  * this entire copyright notice and comment, and (2) distributions including
                     14:  * binaries display the following acknowledgement:  This product includes
                     15:  * software developed by the University of California, Berkeley and its
                     16:  * contributors'' in the documentation or other materials provided with the
                     17:  * distribution and in all advertising materials mentioning features or use
                     18:  * of this software.  Neither the name of the University nor the names of
                     19:  * its contributors may be used to endorse or promote products derived from
                     20:  * this software without specific prior written permission.
                     21:  * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
                     22:  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
                     23:  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
                     24:  *
                     25:  * from: Utah $Hdr: clockreg.h 1.13 89/11/30$
                     26:  *
                     27:  *     @(#)clockreg.h  7.1 (Berkeley) 5/8/90
                     28:  */
                     29: 
                     30: /*
                     31:  * HP300 "real time clock" (MC6840) registers
                     32:  */
                     33: 
                     34: struct clkreg {
                     35:        u_char  clk_dummy1;
                     36:        u_char  clk_cr3;
                     37: #define        clk_cr1 clk_cr3
                     38:        u_char  clk_dummy2;
                     39:        u_char  clk_cr2;
                     40: #define        clk_sr  clk_cr2
                     41:        u_char  clk_dummy3;
                     42:        u_char  clk_msb1;
                     43:        u_char  clk_dummy4;
                     44:        u_char  clk_lsb1;
                     45:        u_char  clk_dummy5;
                     46:        u_char  clk_msb2;
                     47:        u_char  clk_dummy6;
                     48:        u_char  clk_lsb2;
                     49:        u_char  clk_dummy7;
                     50:        u_char  clk_msb3;
                     51:        u_char  clk_dummy8;
                     52:        u_char  clk_lsb3;
                     53: };
                     54: 
                     55: #define CLKCR1         IOP(0x5F8001)
                     56: #define CLKCR2         IOP(0x5F8003)
                     57: #define CLKCR3         CLKCR1
                     58: #define        CLKSR           CLKCR2
                     59: #define        CLKMSB1         IOP(0x5F8005)
                     60: #define        CLKMSB2         IOP(0x5F8009)
                     61: #define        CLKMSB3         IOP(0x5F800D)
                     62: 
                     63: /* output of counter 3 clocks counter 2 */
                     64: 
                     65: #define        CLK_OENAB       0x80    /* output enable */
                     66: #define        CLK_IENAB       0x40    /* interrupt enable */
                     67: #define        CLK_8BIT        0x04    /* 8 bit mode */
                     68: #define        CLK_RESET       0x01    /* chip reset (CR1 only) */
                     69: #define        CLK_CR1         0x01    /* select CR1 (CR2 only) */
                     70: #define        CLK_CR3         0x00    /* select CR3 (CR2 only) */
                     71: #define CLK_INT1       0x01    /* interrupt flag for timer 1 (SR only) */
                     72: #define CLK_INT2       0x02    /* interrupt flag for timer 2 (SR only) */
                     73: #define CLK_INT3       0x04    /* interrupt flag for timer 3 (SR only) */
                     74: #define        CLK_INTR        0x80    /* composite interrupt flag (SR only) */
                     75: 
                     76: #define CLK_RESOLUTION 4       /* 4 usec resolution (250Khz) */
                     77: #define        CLK_INTERVAL    2500    /* 10msec interval at 250KHz */
                     78: /* #define CLK_INTERVAL        5000    /* 20msec interval at 250Khz */
                     79: 
                     80: #ifndef PRF_INTERVAL
                     81: #define PRF_INTERVAL    CLK_INTERVAL
                     82: #endif
                     83: 
                     84: /*
                     85:  * HP300 battery-backed clock
                     86:  */
                     87: 
                     88: struct bbc_tm {
                     89:        int     tm_sec;
                     90:        int     tm_min;
                     91:        int     tm_hour;
                     92:        int     tm_mday;
                     93:        int     tm_mon;
                     94:        int     tm_year;
                     95: };
                     96: 
                     97: #define FEBRUARY       2
                     98: #define        STARTOFTIME     1970
                     99: #define SECDAY         86400L
                    100: #define SECYR          (SECDAY * 365)
                    101: 
                    102: #define BBC_SET_REG    0xe0
                    103: #define BBC_WRITE_REG  0xc2
                    104: #define BBC_READ_REG   0xc3
                    105: #define NUM_BBC_REGS   12
                    106: 
                    107: #define        leapyear(year)          ((year) % 4 == 0)
                    108: #define        range_test(n, l, h)     if ((n) < (l) || (n) > (h)) return(0)
                    109: #define        days_in_year(a)         (leapyear(a) ? 366 : 365)
                    110: #define        days_in_month(a)        (month_days[(a) - 1])
                    111: #define        bbc_to_decimal(a,b)     (bbc_registers[a] * 10 + bbc_registers[b])
                    112: #define        decimal_to_bbc(a,b,n)   { \
                    113:        bbc_registers[a] = (n) % 10; \
                    114:        bbc_registers[b] = (n) / 10; \
                    115: }

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