Annotation of 43BSDReno/sys/hpdev/dcmreg.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * Copyright (c) 1988 University of Utah.
                      3:  * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
                      4:  * All rights reserved.
                      5:  *
                      6:  * This code is derived from software contributed to Berkeley by
                      7:  * the Systems Programming Group of the University of Utah Computer
                      8:  * Science Department.
                      9:  *
                     10:  * Redistribution is only permitted until one year after the first shipment
                     11:  * of 4.4BSD by the Regents.  Otherwise, redistribution and use in source and
                     12:  * binary forms are permitted provided that: (1) source distributions retain
                     13:  * this entire copyright notice and comment, and (2) distributions including
                     14:  * binaries display the following acknowledgement:  This product includes
                     15:  * software developed by the University of California, Berkeley and its
                     16:  * contributors'' in the documentation or other materials provided with the
                     17:  * distribution and in all advertising materials mentioning features or use
                     18:  * of this software.  Neither the name of the University nor the names of
                     19:  * its contributors may be used to endorse or promote products derived from
                     20:  * this software without specific prior written permission.
                     21:  * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
                     22:  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
                     23:  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
                     24:  *
                     25:  * from: Utah $Hdr: dcmreg.h 1.3 89/08/23$
                     26:  *
                     27:  *     @(#)dcmreg.h    7.3 (Berkeley) 6/22/90
                     28:  */
                     29: 
                     30: struct dcmdevice {        /* host address, only odd bytes addressed */
                     31:        u_char  dcm_pad0;
                     32:        volatile u_char dcm_rsid;       /* Reset / ID                   0001 */
                     33:        u_char  dcm_pad1;
                     34:        volatile u_char dcm_ic;         /* Interrupt control register   0003 */
                     35:        u_char  dcm_pad2;
                     36:        volatile u_char dcm_sem;        /* Semaphore register           0005 */
                     37:        u_char  dcm_pad3[0x7ffa];       /* Unaddressable        0006-7fff */
                     38:        u_char  dcm_pad4;
                     39:        volatile u_char dcm_iir;        /* Interrupt ident register     8001 */
                     40:        u_char  dcm_pad5;
                     41:        volatile u_char dcm_cr;         /* Command register             8003 */
                     42:        u_char  dcm_pad6[0x3fc];        /* Card scratch         8004-83ff */
                     43:        struct  dcmrfifo {
                     44:                u_char  ptr_pad1;
                     45:                volatile u_char data_char;
                     46:                u_char  ptr_pad2;
                     47:                volatile u_char data_stat;
                     48:        } dcm_rfifos[4][0x80];          /* Receive queues               8400 */
                     49:        struct  {
                     50:                u_char  ptr_pad1;
                     51:                volatile u_char data_data;
                     52:        } dcm_bmap[0x100];              /* Bitmap table                 8c00 */
                     53:        struct  {
                     54:                u_char  ptr_pad;
                     55:                volatile u_char ptr;
                     56:        } dcm_rhead[4];                 /* Fifo head - receive          8e00 */
                     57:        struct  {
                     58:                u_char  ptr_pad;
                     59:                volatile u_char  ptr;
                     60:        } dcm_rtail[4];                 /* Fifo tail - receive          8e08 */
                     61:        struct  {
                     62:                u_char  ptr_pad;
                     63:                volatile u_char ptr;
                     64:        } dcm_thead[4];                 /* Fifo head - transmit         8e10 */
                     65:        struct  {
                     66:                u_char  ptr_pad;
                     67:                volatile u_char ptr;
                     68:        } dcm_ttail[4];                 /* Fifo tail - transmit         8e18 */
                     69:        struct  {
                     70:                u_char  pad1;
                     71:                volatile u_char dcm_conf;
                     72:                u_char  pad2;
                     73:                volatile u_char dcm_baud;
                     74:        } dcm_data[4];                  /* Configuration registers      8e20 */
                     75:        u_char  dcm_pad7;
                     76:        volatile u_char  dcm_mdmin;     /* Modem in                     8e31 */
                     77:        u_char  dcm_pad8;
                     78:        volatile u_char  dcm_mdmout;    /* Modem out                    8e33 */
                     79:        u_char  dcm_pad9;
                     80:        volatile u_char  dcm_mdmmsk;    /* Modem mask                   8e35 */
                     81:        struct  {
                     82:                u_char pad1;
                     83:                volatile u_char dcm_data;
                     84:        } dcm_cmdtab[4];                /* Command tables               8e36 */
                     85:        struct  {
                     86:                u_char pad1;
                     87:                volatile u_char dcm_data;
                     88:        } dcm_icrtab[4];                /* Interrupt data               8e3e */
                     89:        u_char  dcm_pad10;
                     90:        volatile u_char  dcm_stcon;     /* Self test condition          8e47 */
                     91:        u_char  dcm_pad11[0x98];        /* Undef SR regs        8e48-8edf */
                     92:        struct  dcmtfifo {
                     93:            u_char  ptr_pad1;
                     94:            volatile u_char  data_char;
                     95:        } dcm_tfifos[4][0x10];          /* Transmit queues              8ee0 */
                     96: };
                     97: 
                     98: /*
                     99:  * Overlay structure for port specific queue "registers".
                    100:  * Starts at offset 0x8E00+(port*2).
                    101:  */
                    102: struct dcmpreg {
                    103:        u_char          pad0;           /* +00 */
                    104:        volatile u_char r_head;         /* +01 */
                    105:        u_char          pad1[7];        /* +02 */
                    106:        volatile u_char r_tail;         /* +09 */
                    107:        u_char          pad2[7];        /* +0A */
                    108:        volatile u_char t_head;         /* +11 */
                    109:        u_char          pad3[7];        /* +12 */
                    110:        volatile u_char t_tail;         /* +19 */
                    111: };
                    112: #define        dcm_preg(d, p)  ((struct dcmpreg *)((u_int)(d)+0x8e00+(p)*2))
                    113: 
                    114: /* interface reset/id */
                    115: #define DCMCON          0x80   /* REMOTE/LOCAL switch, read */
                    116: #define        DCMID           0x5     /* hardwired card id, read */
                    117: #define        DCMRS           0x80    /* software reset, write */
                    118: 
                    119: /* interrupt control */
                    120: #define        DCMIPL(x)       ((((x) >> 4) & 3) + 3)  /* interupt level, read */
                    121: #define        IC_IR           0x40    /* interupt request, read */
                    122: #define        IC_IE           0x80    /* interupt enable, write */
                    123: #define        IC_ID           0x00    /* interupt disable, write */
                    124: 
                    125: 
                    126: /* Semaphore control */
                    127: #define        SEM_BSY         0x80    /* read */
                    128: #define SEM_CLR         0xFF   /* write */
                    129: #define SEM_LOCK(dcm)  while ((dcm)->dcm_sem & SEM_BSY)
                    130: #define SEM_UNLOCK(dcm)        (dcm)->dcm_sem = SEM_CLR
                    131: 
                    132: /* command register */
                    133: #define        CR_PORT0        0x1
                    134: #define        CR_PORT1        0x2
                    135: #define        CR_PORT2        0x4
                    136: #define        CR_PORT3        0x8
                    137: #define        CR_MODM         0x10    /* change modem output lines */
                    138: #define        CR_TIMER        0x20    /* 16ms interrupt timer toggle */
                    139: #define        CR_SELFT        0x40    /* run self test */
                    140: #define CR_MASK                0x7f
                    141: 
                    142: /* interrupt ident register */
                    143: #define        IIR_PORT0       0x1
                    144: #define        IIR_PORT1       0x2
                    145: #define        IIR_PORT2       0x4
                    146: #define        IIR_PORT3       0x8
                    147: #define        IIR_SELFT       0x10    /* self test completed */
                    148: #define        IIR_MODM        0x20    /* change in modem input lines */
                    149: #define        IIR_TIMEO       0x40    /* Time out */
                    150: #define IIR_MASK       0x7f
                    151: 
                    152: /* self test cond reg */
                    153: #define ST_OK           0xe0
                    154: 
                    155: /* Line configuration register */
                    156: #define        LC_PNO          0x00
                    157: #define        LC_PODD         0x01
                    158: #define        LC_PEVEN        0x02
                    159: #define        LC_PMSK         0x03
                    160: 
                    161: #define        LC_1STOP        0x00
                    162: #define        LC_1HSTOP       0x04
                    163: #define        LC_2STOP        0x08
                    164: #define        LC_STOPMSK      0x0b
                    165: 
                    166: #define        LC_8BITS        0x30
                    167: #define        LC_7BITS        0x20
                    168: #define        LC_6BITS        0x10
                    169: #define        LC_5BITS        0x00
                    170: #define        LC_BITMSK       0x30
                    171: 
                    172: /* baud reg */
                    173: #define BR_0           0x00
                    174: #define BR_50          0x01
                    175: #define BR_75          0x02
                    176: #define BR_110         0x03
                    177: #define BR_134         0x04
                    178: #define BR_150         0x05
                    179: #define BR_300         0x06
                    180: #define BR_600         0x07
                    181: #define BR_900         0x08
                    182: #define BR_1200                0x09
                    183: #define BR_1800                0x0a
                    184: #define BR_2400                0x0b
                    185: #define BR_3600                0x0c
                    186: #define BR_4800                0x0d
                    187: #define BR_7200                0x0e
                    188: #define BR_9600                0x0f
                    189: #define BR_19200       0x10
                    190: #define BR_38400       0x11
                    191: 
                    192: /* modem input register */
                    193: #define        MI_CTS          0x08
                    194: #define        MI_DM           0x04
                    195: #define        MI_CD           0x02
                    196: #define        MI_RI           0x01
                    197: 
                    198: /* modem output register */
                    199: #define        MO_SR           0x04
                    200: #define        MO_DTR          0x02
                    201: #define        MO_RTS          0x01
                    202: #define        MO_ON           ((MO_DTR) | (MO_RTS))
                    203: #define        MO_OFF          0x00
                    204: 
                    205: /* cmd-tab values, write */
                    206: #define CT_CON         0x1     /* configuration change */
                    207: #define CT_TX          0x2     /* transmit buffer not empty */
                    208: #define CT_BRK         0x4     /* toggle BREAK */
                    209: 
                    210: /* icr-tab values, read */
                    211: #define IT_TX          0x1     /* transmit buffer empty */
                    212: #define IT_SPEC                0x2     /* special character received */
                    213: 
                    214: /* data errors */
                    215: #define RD_OVF         0x08
                    216: #define RD_BD          0x10
                    217: #define RD_PE          0x20
                    218: #define RD_OE          0x40
                    219: #define RD_FE          0x80
                    220: #define RD_MASK                0xf8
                    221: 
                    222: /* Transmit/Receive masks */
                    223: #define TX_MASK                0x0f
                    224: #define RX_MASK                0xff
                    225: 
                    226: /*
                    227:  * WARNING: Serial console is assumed to be the lowest select-code card
                    228:  * and that card must be logical unit 0 in the kernel.  Also, CONUNIT must
                    229:  * be 1, the port affected by the REMOTE/LOCAL switch.
                    230:  */
                    231: #define CONUNIT        (1)

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