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Annotation of 43BSDReno/sys/hpdev/dmareg.h, revision 1.1

1.1     ! root        1: /*
        !             2:  * Copyright (c) 1982, 1990 The Regents of the University of California.
        !             3:  * All rights reserved.
        !             4:  *
        !             5:  * Redistribution is only permitted until one year after the first shipment
        !             6:  * of 4.4BSD by the Regents.  Otherwise, redistribution and use in source and
        !             7:  * binary forms are permitted provided that: (1) source distributions retain
        !             8:  * this entire copyright notice and comment, and (2) distributions including
        !             9:  * binaries display the following acknowledgement:  This product includes
        !            10:  * software developed by the University of California, Berkeley and its
        !            11:  * contributors'' in the documentation or other materials provided with the
        !            12:  * distribution and in all advertising materials mentioning features or use
        !            13:  * of this software.  Neither the name of the University nor the names of
        !            14:  * its contributors may be used to endorse or promote products derived from
        !            15:  * this software without specific prior written permission.
        !            16:  * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
        !            17:  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
        !            18:  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
        !            19:  *
        !            20:  *     @(#)dmareg.h    7.1 (Berkeley) 5/8/90
        !            21:  */
        !            22: 
        !            23: /*
        !            24:  * Hardware layout for the 98620[ABC]:
        !            25:  *     98620A (old 320s?):     byte/word DMA in up to 64K chunks
        !            26:  *     98620B (320s only):     98620A with programmable IPL
        !            27:  *     98620C (all others):    byte/word/longword DMA in up to 4Gb chunks
        !            28:  */
        !            29: #define v_char         volatile char
        !            30: #define        v_int           volatile int
        !            31: #define vu_char                volatile u_char
        !            32: #define vu_short       volatile u_short
        !            33: #define vu_int         volatile u_int
        !            34: 
        !            35: struct dmaBdevice {
        !            36:        v_char          *dmaB_addr;
        !            37:        vu_short        dmaB_count;
        !            38:        vu_short        dmaB_cmd;
        !            39: #define        dmaB_stat       dmaB_cmd
        !            40: };
        !            41: 
        !            42: struct dmadevice {
        !            43:        v_char          *dma_addr;
        !            44:        vu_int          dma_count;
        !            45:        vu_short        dma_cmd;
        !            46:        vu_short        dma_stat;
        !            47: };
        !            48: 
        !            49: struct dmareg {
        !            50:        struct dmaBdevice dma_Bchan0;
        !            51:        struct dmaBdevice dma_Bchan1;
        !            52: /* the rest are 98620C specific */
        !            53:        v_char            dma_id[4];
        !            54:        vu_char           dma_cr;
        !            55:        char              dma_pad1[0xEB];
        !            56:        struct dmadevice  dma_chan0;
        !            57:        char              dma_pad2[0xF4];
        !            58:        struct dmadevice  dma_chan1;
        !            59: };
        !            60: 
        !            61: #define        NDMA            2
        !            62: 
        !            63: /* intr level must be >= level of any device using dma.  i.e., splbio */
        !            64: #define        DMAINTLVL       5
        !            65: 
        !            66: /* addresses */
        !            67: #define        DMA_BASE        IOV(0x500000)
        !            68: 
        !            69: /* command bits */
        !            70: #define        DMA_ENAB        0x0001
        !            71: #define        DMA_WORD        0x0002
        !            72: #define        DMA_WRT         0x0004
        !            73: #define        DMA_PRI         0x0008
        !            74: #define        DMA_IPL(x)      (((x) - 3) << 4)
        !            75: #define DMA_LWORD      0x0100
        !            76: #define DMA_START      0x8000
        !            77: 
        !            78: /* status bits */
        !            79: #define        DMA_ARMED       0x01
        !            80: #define        DMA_INTR        0x02
        !            81: #define DMA_ACC                0x04
        !            82: #define DMA_HALT       0x08
        !            83: #define DMA_BERR       0x10
        !            84: #define DMA_ALIGN      0x20
        !            85: #define DMA_WRAP       0x40
        !            86: 
        !            87: #ifdef KERNEL
        !            88: /*
        !            89:  * Macros to attempt to hide the HW differences between the 98620B DMA
        !            90:  * board and the 1TQ4-0401 DMA chip (68020C "board").  The latter
        !            91:  * includes emulation registers for the former but you need to access
        !            92:  * the "native-mode" registers directly in order to do 32-bit DMA.
        !            93:  *
        !            94:  * DMA_CLEAR:  Clear interrupt on DMA board.  We just use the
        !            95:  *             emulation registers on the 98620C as that is easiest.
        !            96:  * DMA_STAT:   Read status register.  Again, we always read the
        !            97:  *             emulation register.  Someday we might want to
        !            98:  *             look at the 98620C status to get the extended bits.
        !            99:  * DMA_ARM:    Load address, count and kick-off DMA.
        !           100:  */
        !           101: #define        DMA_CLEAR(dc)   { v_int dmaclr = (int)dc->sc_Bhwaddr->dmaB_addr; }
        !           102: #define        DMA_STAT(dc)    dc->sc_Bhwaddr->dmaB_stat
        !           103: 
        !           104: #if defined(HP320)
        !           105: #define        DMA_ARM(dc, ix) \
        !           106:        if (dc->sc_type == DMA_B) { \
        !           107:                register struct dmaBdevice *dma = dc->sc_Bhwaddr; \
        !           108:                dma->dmaB_addr = dc->sc_addr[ix]; \
        !           109:                dma->dmaB_count = dc->sc_count[ix] - 1; \
        !           110:                dma->dmaB_cmd = dc->sc_cmd; \
        !           111:        } else { \
        !           112:                register struct dmadevice *dma = dc->sc_hwaddr; \
        !           113:                dma->dma_addr = dc->sc_addr[ix]; \
        !           114:                dma->dma_count = dc->sc_count[ix] - 1; \
        !           115:                dma->dma_cmd = dc->sc_cmd; \
        !           116:        }
        !           117: #else
        !           118: #define        DMA_ARM(dc, ix) \
        !           119:        { \
        !           120:                register struct dmadevice *dma = dc->sc_hwaddr; \
        !           121:                dma->dma_addr = dc->sc_addr[ix]; \
        !           122:                dma->dma_count = dc->sc_count[ix] - 1; \
        !           123:                dma->dma_cmd = dc->sc_cmd; \
        !           124:        }
        !           125: #endif
        !           126: #endif

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