Annotation of 43BSDReno/sys/hpdev/if_lereg.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * Copyright (c) 1982, 1990 The Regents of the University of California.
                      3:  * All rights reserved.
                      4:  *
                      5:  * Redistribution is only permitted until one year after the first shipment
                      6:  * of 4.4BSD by the Regents.  Otherwise, redistribution and use in source and
                      7:  * binary forms are permitted provided that: (1) source distributions retain
                      8:  * this entire copyright notice and comment, and (2) distributions including
                      9:  * binaries display the following acknowledgement:  This product includes
                     10:  * software developed by the University of California, Berkeley and its
                     11:  * contributors'' in the documentation or other materials provided with the
                     12:  * distribution and in all advertising materials mentioning features or use
                     13:  * of this software.  Neither the name of the University nor the names of
                     14:  * its contributors may be used to endorse or promote products derived from
                     15:  * this software without specific prior written permission.
                     16:  * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
                     17:  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
                     18:  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
                     19:  *
                     20:  *     @(#)if_lereg.h  7.1 (Berkeley) 5/8/90
                     21:  */
                     22: 
                     23: #define        LEID            21
                     24: 
                     25: #define        LEMTU           1518
                     26: #define        LEMINSIZE       60      /* should be 64 if mode DTCR is set */
                     27: #define        LERBUF          8
                     28: #define        LERBUFLOG2      3
                     29: #define        LE_RLEN         (LERBUFLOG2 << 13)
                     30: #define        LETBUF          1
                     31: #define        LETBUFLOG2      0
                     32: #define        LE_TLEN         (LETBUFLOG2 << 13)
                     33: 
                     34: #define vu_char                volatile u_char
                     35: 
                     36: /*
                     37:  * LANCE registers.
                     38:  */
                     39: struct lereg0 {
                     40:        u_char  ler0_pad0;
                     41:        vu_char ler0_id;        /* ID */
                     42:        u_char  ler0_pad1;
                     43:        vu_char ler0_status;    /* interrupt enable/status */
                     44: };
                     45: 
                     46: struct lereg1 {
                     47:        u_short ler1_rdp;       /* data port */
                     48:        u_short ler1_rap;       /* register select port */
                     49: };
                     50: 
                     51: /*
                     52:  * Overlayed on 16K dual-port RAM.
                     53:  * Current size is 13,758 bytes with 8 x 1518 receive buffers and
                     54:  * 1 x 1518 transmit buffer.
                     55:  */
                     56: struct lereg2 {
                     57:        /* init block */
                     58:        u_short ler2_mode;              /* +0x0000 */
                     59:        u_char  ler2_padr[6];           /* +0x0002 */
                     60:        u_long  ler2_ladrf0;            /* +0x0008 */
                     61:        u_long  ler2_ladrf1;            /* +0x000C */
                     62:        u_short ler2_rdra;              /* +0x0010 */
                     63:        u_short ler2_rlen;              /* +0x0012 */
                     64:        u_short ler2_tdra;              /* +0x0014 */
                     65:        u_short ler2_tlen;              /* +0x0016 */
                     66:        /* receive message descriptors */
                     67:        struct  lermd {                 /* +0x0018 */
                     68:                u_short rmd0;
                     69:                u_short rmd1;
                     70:                short   rmd2;
                     71:                u_short rmd3;
                     72:        } ler2_rmd[LERBUF];
                     73:        /* transmit message descriptors */
                     74:        struct  letmd {                 /* +0x0058 */
                     75:                u_short tmd0;
                     76:                u_short tmd1;
                     77:                short   tmd2;
                     78:                u_short tmd3;
                     79:        } ler2_tmd[LETBUF];
                     80:        char    ler2_rbuf[LERBUF][LEMTU]; /* +0x0060 */
                     81:        char    ler2_tbuf[LETBUF][LEMTU]; /* +0x2FD0 */
                     82: };
                     83: 
                     84: /*
                     85:  * Control and status bits -- lereg0
                     86:  */
                     87: #define        LE_IE           0x80            /* interrupt enable */
                     88: #define        LE_IR           0x40            /* interrupt requested */
                     89: #define        LE_LOCK         0x08            /* lock status register */
                     90: #define        LE_ACK          0x04            /* ack of lock */
                     91: #define        LE_JAB          0x02            /* loss of tx clock (???) */
                     92: #define LE_IPL(x)      ((((x) >> 4) & 0x3) + 3)
                     93: 
                     94: /*
                     95:  * Control and status bits -- lereg1
                     96:  */
                     97: #define        LE_CSR0         0
                     98: #define        LE_CSR1         1
                     99: #define        LE_CSR2         2
                    100: #define        LE_CSR3         3
                    101: 
                    102: #define        LE_SERR         0x8000
                    103: #define        LE_BABL         0x4000
                    104: #define        LE_CERR         0x2000
                    105: #define        LE_MISS         0x1000
                    106: #define        LE_MERR         0x0800
                    107: #define        LE_RINT         0x0400
                    108: #define        LE_TINT         0x0200
                    109: #define        LE_IDON         0x0100
                    110: #define        LE_INTR         0x0080
                    111: #define        LE_INEA         0x0040
                    112: #define        LE_RXON         0x0020
                    113: #define        LE_TXON         0x0010
                    114: #define        LE_TDMD         0x0008
                    115: #define        LE_STOP         0x0004
                    116: #define        LE_STRT         0x0002
                    117: #define        LE_INIT         0x0001
                    118: 
                    119: #define        LE_BSWP         0x4
                    120: #define        LE_MODE         0x0
                    121: 
                    122: /*
                    123:  * Control and status bits -- lereg2
                    124:  */
                    125: #define        LE_OWN          0x8000
                    126: #define        LE_ERR          0x4000
                    127: #define        LE_STP          0x0200
                    128: #define        LE_ENP          0x0100
                    129: 
                    130: #define        LE_FRAM         0x2000
                    131: #define        LE_OFLO         0x1000
                    132: #define        LE_CRC          0x0800
                    133: #define        LE_RBUFF        0x0400
                    134: #define        LE_MORE         0x1000
                    135: #define        LE_ONE          0x0800
                    136: #define        LE_DEF          0x0400
                    137: #define        LE_TBUFF        0x8000
                    138: #define        LE_UFLO         0x4000
                    139: #define        LE_LCOL         0x1000
                    140: #define        LE_LCAR         0x0800
                    141: #define        LE_RTRY         0x0400

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