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1.1 root 1: /*
2: * @(#)psl.h 7.1 (Berkeley) 5/21/88
3: */
4:
5: /*
6: * TAHOE processor status longword.
7: */
8: #define PSL_C 0x00000001 /* carry bit */
9: #define PSL_V 0x00000002 /* overflow bit */
10: #define PSL_Z 0x00000004 /* zero bit */
11: #define PSL_N 0x00000008 /* negative bit */
12: #define PSL_ALLCC 0x0000000f /* all cc bits - unlikely */
13: #define PSL_T 0x00000010 /* trace enable bit */
14: #define PSL_IV 0x00000020 /* integer overflow enable bit */
15: #define PSL_FU 0x00000040 /* float underflow enable */
16: #define PSL_DBL 0x00000080 /* f.p. prescision indicator */
17: #define PSL_SFE 0x00000100 /* system-forced-exception */
18: #define PSL_IPL 0x001f0000 /* interrupt priority level */
19: #define PSL_PRVMOD 0x00000000 /* previous mode (kernel mode) */
20: #define PSL_CURMOD 0x01000000 /* current mode (all on is user) */
21: #define PSL_IS 0x04000000 /* interrupt stack */
22: #define PSL_TP 0x40000000 /* trace pending */
23:
24: #define PSL_MBZ 0xbae0fe00 /* must be zero bits */
25:
26: #define PSL_USERSET (PSL_CURMOD)
27: #define PSL_USERCLR (PSL_IS|PSL_IPL|PSL_MBZ|PSL_SFE|PSL_DBL|PSL_FU)
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