Annotation of 43BSDReno/sys/tahoevba/vdreg.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * Copyright (c) 1988 Regents of the University of California.
                      3:  * All rights reserved.
                      4:  *
                      5:  * This code is derived from software contributed to Berkeley by
                      6:  * Computer Consoles Inc.
                      7:  *
                      8:  * Redistribution is only permitted until one year after the first shipment
                      9:  * of 4.4BSD by the Regents.  Otherwise, redistribution and use in source and
                     10:  * binary forms are permitted provided that: (1) source distributions retain
                     11:  * this entire copyright notice and comment, and (2) distributions including
                     12:  * binaries display the following acknowledgement:  This product includes
                     13:  * software developed by the University of California, Berkeley and its
                     14:  * contributors'' in the documentation or other materials provided with the
                     15:  * distribution and in all advertising materials mentioning features or use
                     16:  * of this software.  Neither the name of the University nor the names of
                     17:  * its contributors may be used to endorse or promote products derived from
                     18:  * this software without specific prior written permission.
                     19:  * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
                     20:  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
                     21:  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
                     22:  *
                     23:  *     @(#)vdreg.h     7.7 (Berkeley) 6/28/90
                     24:  */
                     25: 
                     26: /*
                     27:  * Versabus VDDC/SMDE disk controller definitions.
                     28:  */
                     29: #define        VDDC_SECSIZE    512     /* sector size for VDDC */
                     30: #define        VD_MAXSECSIZE   1024    /* max sector size for SMD/E */
                     31: 
                     32: /*
                     33:  * Controller communications block.
                     34:  */
                     35: struct vddevice {
                     36:        u_long  vdcdr;          /* controller device register */
                     37:        u_long  vdreset;        /* controller reset register */
                     38:        u_long  vdcsr;          /* control-status register */
                     39:        long    vdrstclr;       /* reset clear register */
                     40:        u_short vdstatus[16];   /* per-drive status register */
                     41:        u_short vdicf_status;   /* status change interupt control format */
                     42:        u_short vdicf_done;     /* interrupt complete control format */
                     43:        u_short vdicf_error;    /* interrupt error control format */
                     44:        u_short vdicf_success;  /* interrupt success control format */
                     45:        u_short vdtcf_mdcb;     /* mdcb transfer control format */
                     46:        u_short vdtcf_dcb;      /* dcb transfer control format */
                     47:        u_short vdtcf_trail;    /* trail transfer control format */
                     48:        u_short vdtcf_data;     /* data transfer control format */
                     49:        u_long  vdccf;          /* controller configuration flags */
                     50:        u_long  vdsecsize;      /* sector size */
                     51:        u_short vdfill0;
                     52:        u_char  vdcylskew;      /* cylinder to cylinder skew factor */
                     53:        u_char  vdtrackskew;    /* track to track skew factor */
                     54:        u_long  vdfill1;
                     55:        u_long  vddfr;          /* diagnostic flag register */
                     56:        u_long  vddda;          /* diagnostic dump address */
                     57: };
                     58: 
                     59: /* controller types */
                     60: #define        VDTYPE_VDDC     1       /* old vddc controller (smd only) */
                     61: #define        VDTYPE_SMDE     2       /* new smde controller (smd-e) */
                     62: 
                     63: /*
                     64:  * Controller status definitions.
                     65:  */
                     66: #define        CS_SCS  0xf             /* status change source (drive number) */
                     67: #define        CS_ELC  0x10            /* error on last command */
                     68: #define        CS_ICC  0x60            /* interupt cause code */
                     69: #define   ICC_NOI  0x00                /* no interupt */
                     70: #define   ICC_DUN  0x20                /* no interupt */
                     71: #define   ICC_ERR  0x40                /* no interupt */
                     72: #define   ICC_SUC  0x60                /* no interupt */
                     73: #define        CS_GO   0x80            /* go bit (controller busy) */
                     74: #define        CS_BE   0x100           /* buss error */
                     75: #define        CS_BOK  0x4000          /* board ok */
                     76: #define        CS_SFL  0x8000          /* system fail */
                     77: #define        CS_LEC  0xff000000      /* last error code */
                     78: 
                     79: /*
                     80:  * Drive status definitions.
                     81:  */
                     82: #define        STA_UR  0x1             /* unit ready */
                     83: #define        STA_OC  0x2             /* on cylinder */
                     84: #define        STA_SE  0x4             /* seek error */
                     85: #define        STA_DF  0x8             /* drive fault */
                     86: #define        STA_WP  0x10            /* write protected */
                     87: #define        STA_US  0x20            /* unit selected */
                     88: #define        STA_TYPE        0x300   /* drive type: */
                     89: #define        STA_SMD         0x000           /* SMD */
                     90: #define        STA_ESDI        0x100           /* ESDI */
                     91: 
                     92: /*
                     93:  * Interupt Control Field definitions.
                     94:  */
                     95: #define        ICF_IPL 0x7             /* interupt priority level */
                     96: #define        ICF_IEN 0x8             /* interupt enable */
                     97: #define        ICF_IV  0xff00          /* interupt vector */
                     98: 
                     99: /*
                    100:  * Transfer Control Format definitions.
                    101:  */
                    102: #define        TCF_AM  0xff            /* Address Modifier */
                    103: #define          AM_SNPDA   0x01       /* Standard Non-Privileged Data Access */
                    104: #define          AM_SASA    0x81       /* Standard Ascending Sequential Access */
                    105: #define          AM_ENPDA   0xf1       /* Extended Non-Privileged Data Access */
                    106: #define          AM_EASA    0xe1       /* Extended Ascending Sequential Access */
                    107: #define        TCF_BTE 0x800           /* Block Transfer Enable */
                    108: 
                    109: /*
                    110:  * Controller Configuration Flags.
                    111:  */
                    112: #define        CCF_STS 0x1             /* sectors per track selectable */
                    113: #define        CCF_EAV 0x2             /* enable auto vector */
                    114: #define        CCF_ERR 0x4             /* enable reset register */
                    115: #define CCF_RFE 0x8            /* recovery flag enable */
                    116: #define        CCF_XMD 0x60            /* xmd transfer mode (bus size) */
                    117: #define          XMD_8BIT  0x20        /*   do only 8 bit transfers */
                    118: #define          XMD_16BIT 0x40        /*   do only 16 bit transfers */
                    119: #define          XMD_32BIT 0x60        /*   do only 32 bit transfers */
                    120: #define        CCF_DIU 0x80            /* disable initial update of DCB @cmd start */
                    121: #define        CCF_BSZ 0x300           /* burst size */
                    122: #define          BSZ_16WRD 0x000       /*   16 word transfer burst */
                    123: #define          BSZ_12WRD 0x100       /*   12 word transfer burst */
                    124: #define          BSZ_8WRD  0x200       /*   8 word transfer burst */
                    125: #define          BSZ_4WRD  0x300       /*   4 word transfer burst */
                    126: #define CCF_SEN        0x400           /* cylinder/track skew enable (for format) */
                    127: #define        CCF_ENP 0x1000          /* enable parity */
                    128: #define        CCF_EPE 0x2000          /* enable parity errors */
                    129: #define        CCF_EDE 0x10000         /* error detection enable */
                    130: #define        CCF_ECE 0x20000         /* error correction enable */
                    131: 
                    132: /*
                    133:  * Diagnostic register definitions.
                    134:  */
                    135: #define        DIA_DC  0x7f            /* dump count mask */
                    136: #define        DIA_DWR 0x80            /* dump write/read flag */
                    137: #define        DIA_ARE 0x100           /* auto rebuild enable */
                    138: #define        DIA_CEN 0x200           /* call enable flag */
                    139: #define        DIA_KEY 0xAA550000      /* reset enable key */
                    140: 
                    141: /*
                    142:  * Hardware interface flags, in dcb.devselect and d_devflags
                    143:  */
                    144: #define VD_ESDI        0x10            /* drive is on ESDI interface */
                    145: #define        d_devflags      d_drivedata[0]          /* in disk label */
                    146: 
                    147: /*
                    148:  * Error recovery flags.
                    149:  */
                    150: #define        VDRF_RTZ        0x0001  /* return to zero */
                    151: #define        VDRF_OCF        0x0002  /* on cylinder false */
                    152: #define        VDRF_OSP        0x0004  /* offset plus */
                    153: #define        VDRF_OSM        0x0008  /* offset minus */
                    154: #define        VDRF_DSE        0x0080  /* data strobe early */
                    155: #define        VDRF_DSL        0x0100  /* data strobe late */
                    156: 
                    157: #define        VDRF_NONE       0
                    158: #define        VDRF_NORMAL     (VDRF_RTZ|VDRF_OCF|VDRF_OSP|VDRF_OSM|VDRF_DSE|VDRF_DSL)
                    159: 
                    160: /*
                    161:  * Perform a reset on the controller.
                    162:  */
                    163: #define        VDRESET(a,t) { \
                    164:        if ((t) == VDTYPE_SMDE) { \
                    165:                ((struct vddevice *)(a))->vddfr = DIA_KEY|DIA_CEN; \
                    166:                ((struct vddevice *)(a))->vdcdr = (u_long)0xffffffff; \
                    167:                DELAY(5000000); \
                    168:        } else { \
                    169:                ((struct vddevice *)(a))->vdreset = 0; \
                    170:                DELAY(1500000); \
                    171:        } \
                    172: }
                    173: 
                    174: /*
                    175:  * Abort a controller operation.
                    176:  */
                    177: #define        VDABORT(a,t) { \
                    178:        if ((t) == VDTYPE_VDDC) { \
                    179:                movow((a), (VDOP_ABORT&0xffff0000)>>16) ; \
                    180:                movow((int)(a)+2, VDOP_ABORT&0xffff); \
                    181:        } else \
                    182:                ((struct vddevice *)(a))->vdcdr = (u_long)VDOP_ABORT; \
                    183:        DELAY(1000000); \
                    184: }
                    185: 
                    186: /*
                    187:  * Start a command.
                    188:  */
                    189: #define VDGO(a,mdcb,t) {\
                    190:        if ((t) == VDTYPE_VDDC) { \
                    191:                movow((a), ((int)(mdcb)&0xffff0000)>>16) ; \
                    192:                movow((int)((a))+2, (int)(mdcb)&0xffff); \
                    193:        } else \
                    194:                ((struct vddevice *)(a))->vdcdr = (mdcb); \
                    195: }
                    196: 
                    197: /*
                    198:  * MDCB layout.
                    199:  */
                    200: struct mdcb {
                    201:        struct  dcb *mdcb_head;         /* first dcb in list */
                    202:        struct  dcb *mdcb_busy;         /* dcb being processed */
                    203:        struct  dcb *mdcb_intr;         /* dcb causing interrupt */
                    204:        long    mdcb_status;            /* status of dcb in mdcb_busy */
                    205: };
                    206: 
                    207: /*
                    208:  * DCB definitions.
                    209:  */
                    210: 
                    211: /*
                    212:  * A disk address.
                    213:  */
                    214: typedef struct {
                    215:        u_char  track;                  /* all 8 bits */
                    216:        u_char  sector;                 /* all 8  bits */
                    217:        u_short cylinder;               /* low order 12 bits */
                    218: } dskadr;
                    219: 
                    220: /*
                    221:  * DCB trailer formats.
                    222:  */
                    223: /* read/write trailer */
                    224: struct trrw {
                    225:        u_long  memadr;         /* memory address */
                    226:        u_long  wcount;         /* 16 bit word count */
                    227:        dskadr  disk;           /* disk address */
                    228: };
                    229: 
                    230: /* scatter/gather trailer */
                    231: #define        VDMAXPAGES      (MAXPHYS / NBPG)
                    232: struct trsg {
                    233:        struct  trrw start_addr;
                    234:        struct addr_chain {
                    235:                u_long  nxt_addr;
                    236:                u_long  nxt_len;
                    237:        } addr_chain[VDMAXPAGES + 1];
                    238: };
                    239: 
                    240: /* seek trailer format */
                    241: struct trseek {
                    242:        dskadr  skaddr;
                    243: };
                    244: 
                    245: /* format trailer */
                    246: struct trfmt {
                    247:        char    *addr;          /* data buffer to be filled on sector*/
                    248:        long    nsectors;       /* # of sectors to be formatted */
                    249:        dskadr  disk;           /* disk physical address info */
                    250:        dskadr  hdr;            /* header address info */
                    251: };
                    252: 
                    253: /* reset/configure trailer */
                    254: struct treset {
                    255:        long    ncyl;           /* # cylinders */
                    256:        long    nsurfaces;      /* # surfaces */
                    257:        long    nsectors;       /* # sectors */
                    258:        long    slip_sec;       /* # of slip sectors */
                    259:        long    recovery;       /* recovery flags */
                    260: };
                    261: 
                    262: /* ident trailer */
                    263: struct trid {
                    264:        long    name;
                    265:        long    rev;
                    266:        long    date;
                    267: };
                    268: 
                    269: /*
                    270:  * DCB layout.
                    271:  */
                    272: struct dcb {
                    273:        struct  dcb *nxtdcb;    /* next dcb */
                    274:        short   intflg;         /* interrupt settings and flags */
                    275:        short   opcode;         /* DCB command code etc... */
                    276:        long    operrsta;       /* error & status info */
                    277:        short   fill;           /* not used */
                    278:        char    devselect;      /* drive selection */
                    279:        char    trailcnt;       /* trailer Word Count */
                    280:        long    err_memadr;     /* error memory address */
                    281:        u_char  err_code;       /* error codes for SMD/E */
                    282:        char    fill2;          /* not used */
                    283:        short   err_wcount;     /* error word count */
                    284:        char    err_trk;        /* error track/sector */
                    285:        char    err_sec;        /* error track/sector */
                    286:        short   err_cyl;        /* error cylinder adr */
                    287:        union {
                    288:                struct  trid idtrail;   /* ident command trailer */
                    289:                struct  trseek sktrail; /* seek command trailer */
                    290:                struct  trsg sgtrail;   /* scatter/gather trailer */
                    291:                struct  trrw rwtrail;   /* read/write trailer */
                    292:                struct  trfmt fmtrail;  /* format trailer */
                    293:                struct  treset rstrail; /* reset/configure trailer */
                    294:        } trail;
                    295: };
                    296: 
                    297: /*
                    298:  * smaller DCB with seek trailer only (no scatter-gather).
                    299:  */
                    300: struct skdcb {
                    301:        struct  dcb *nxtdcb;    /* next dcb */
                    302:        short   intflg;         /* interrupt settings and flags */
                    303:        short   opcode;         /* DCB command code etc... */
                    304:        long    operrsta;       /* error & status info */
                    305:        short   fill;           /* not used */
                    306:        char    devselect;      /* drive selection */
                    307:        char    trailcnt;       /* trailer Word Count */
                    308:        long    err_memadr;     /* error memory address */
                    309:        u_char  err_code;       /* error codes for SMD/E */
                    310:        char    fill2;          /* not used */
                    311:        short   err_wcount;     /* error word count */
                    312:        char    err_trk;        /* error track/sector */
                    313:        char    err_sec;        /* error track/sector */
                    314:        short   err_cyl;        /* error cylinder adr */
                    315:        union {
                    316:                struct  trseek sktrail; /* seek command trailer */
                    317:        } trail;
                    318: };
                    319: 
                    320: /*
                    321:  * DCB command codes.
                    322:  */
                    323: #define        VDOP_RD         0x80            /* read data */
                    324: #define        VDOP_FTR        0xc0            /* full track read */
                    325: #define        VDOP_RAS        0x90            /* read and scatter */
                    326: #define        VDOP_RDRAW      0x600           /* read unformatted disk sector */
                    327: #define        VDOP_CMP        0xa0            /* compare */
                    328: #define        VDOP_FTC        0xe0            /* full track compare */
                    329: #define        VDOP_RHDE       0x180           /* read header, data & ecc */
                    330: #define        VDOP_WD         0x00            /* write data */
                    331: #define        VDOP_FTW        0x40            /* full track write */
                    332: #define        VDOP_WTC        0x20            /* write then compare */
                    333: #define        VDOP_FTWTC      0x60            /* full track write then compare */
                    334: #define        VDOP_GAW        0x10            /* gather and write */
                    335: #define        VDOP_WDE        0x100           /* write data & ecc */
                    336: #define        VDOP_FSECT      0x900           /* format sector */
                    337: #define        VDOP_GWC        0x30            /* gather write & compare */
                    338: #define        VDOP_START      0x800           /* start drives */
                    339: #define        VDOP_RELEASE    0xa00           /* stop drives */
                    340: #define        VDOP_SEEK       0xb00           /* seek */
                    341: #define        VDOP_INIT       0xc00           /* initialize controller */
                    342: #define        VDOP_DIAG       0xd00           /* diagnose (self-test) controller */
                    343: #define        VDOP_CONFIG     0xe00           /* reset & configure drive */
                    344: #define        VDOP_STATUS     0xf00           /* get drive status */
                    345: #define        VDOP_IDENT      0x700           /* identify controller */
                    346: #define        VDOP_PROBE      0x500           /* probe drives and update status */
                    347: 
                    348: #define        VDOP_ABORT      0x80000000      /* abort current command */
                    349: 
                    350: /*
                    351:  * DCB status definitions.
                    352:  */
                    353: #define        DCBS_HCRC       0x00000001      /* header crc error */
                    354: #define        DCBS_HCE        0x00000002      /* header compare error */
                    355: #define        DCBS_WPT        0x00000004      /* drive write protected */
                    356: #define        DCBS_CHE        0x00000008      /* controller hardware error */
                    357: #define        DCBS_SKI        0x00000010      /* seek incomplete */
                    358: #define        DCBS_UDE        0x00000020      /* uncorrectable data error */
                    359: #define        DCBS_OCYL       0x00000040      /* off cylinder */
                    360: #define        DCBS_NRDY       0x00000080      /* drive not ready */
                    361: #define        DCBS_ATA        0x00000100      /* alternate track accessed */
                    362: #define        DCBS_SKS        0x00000200      /* seek started */
                    363: #define        DCBS_IVA        0x00000400      /* invalid disk address error */
                    364: #define        DCBS_NEM        0x00000800      /* non-existant memory error */
                    365: #define        DCBS_DPE        0x00001000      /* memory data parity error */
                    366: #define        DCBS_DCE        0x00002000      /* data compare error */
                    367: #define        DCBS_DDI        0x00004000      /* ddi ready */
                    368: #define        DCBS_OAB        0x00008000      /* operation aborted */
                    369: #define        DCBS_DSE        0x00010000      /* data strobe early */
                    370: #define        DCBS_DSL        0x00020000      /* data strobe late */
                    371: #define        DCBS_TOP        0x00040000      /* track offset plus */
                    372: #define        DCBS_TOM        0x00080000      /* track offset minus */
                    373: #define        DCBS_CCD        0x00100000      /* controller corrected data */
                    374: #define        DCBS_HARD       0x00200000      /* hard error */
                    375: #define        DCBS_SOFT       0x00400000      /* soft error (retry succesful) */
                    376: #define        DCBS_ERR        0x00800000      /* composite error */
                    377: #define DCBS_IVC       0x01000000      /* invalid command error */
                    378: /* bits 24-27 unused */
                    379: #define        DCBS_BSY        0x10000000      /* controller busy */
                    380: #define        DCBS_ICC        0x60000000      /* interrupt cause code */
                    381: #define        DCBS_INT        0x80000000      /* interrupt generated for this dcb */
                    382: 
                    383: #define        VDERRBITS       "\20\1HCRC\2HCE\3WPT\4CHE\5DSKI\6UDE\7OCYL\10NRDY\
                    384: \11ATA\12SKS\13IVA\14NEM\15DPE\16DCE\17DDI\20OAB\21DSE\22DSL\23TOP\24TOM\
                    385: \25CCD\26HARD\27SOFT\30ERR\31IVC\35ABORTED\36FAIL\37COMPLETE\40STARTED"
                    386: 
                    387: /* drive related errors */
                    388: #define        VDERR_DRIVE     (DCBS_SKI|DCBS_OCYL|DCBS_NRDY|DCBS_IVA)
                    389: /* controller related errors */
                    390: #define        VDERR_CTLR      (DCBS_CHE|DCBS_OAB|DCBS_IVC|DCBS_NEM)
                    391: /* potentially recoverable errors */
                    392: #define        VDERR_RETRY \
                    393:     (VDERR_DRIVE|VDERR_CTLR|DCBS_DCE|DCBS_DPE|DCBS_HCRC|DCBS_HCE)
                    394: /* uncorrected data errors */
                    395: #define        VDERR_HARD      (VDERR_RETRY|DCBS_WPT|DCBS_UDE)
                    396: 
                    397: /*
                    398:  * DCB status codes.
                    399:  */
                    400: #define        DCBS_ABORT      0x10000000      /* dcb aborted */
                    401: #define        DCBS_FAIL       0x20000000      /* dcb unsuccesfully completed */
                    402: #define        DCBS_DONE       0x40000000      /* dcb complete */
                    403: #define        DCBS_START      0x80000000      /* dcb started */
                    404: 
                    405: /*
                    406:  * DCB interrupt control.
                    407:  */
                    408: #define        DCBINT_NONE     0x0             /* don't interrupt */
                    409: #define        DCBINT_ERR      0x2             /* interrupt on error */
                    410: #define        DCBINT_SUC      0x1             /* interrupt on success */
                    411: #define        DCBINT_DONE     (DCBINT_ERR|DCBINT_SUC)
                    412: #define        DCBINT_PBA      0x4             /* proceed before acknowledge */
                    413: 
                    414: /*
                    415:  * Sector formats.
                    416:  */
                    417: typedef union {
                    418:        struct {
                    419:                dskadr  hdr_addr;
                    420:                short   smd_crc;
                    421:        } smd;
                    422:        struct {
                    423:                dskadr  physical;
                    424:                dskadr  logical;
                    425:                long    smd_e_crc;
                    426:        } smd_e;
                    427: } fmt_hdr;
                    428: 
                    429: /* Sector Header bit assignments */
                    430: #define        VDMF    0x8000          /* Manufacturer Fault 1=good sector */
                    431: #define        VDUF    0x4000          /* User Fault 1=good sector */
                    432: #define        VDALT   0x2000          /* Alternate Sector 1=alternate */
                    433: #define        VDWPT   0x1000          /* Write Protect 1=Read Only Sector */
                    434: 
                    435: /* input register assignments for DIOCWFORMAT ioctl */
                    436: #define        dk_op           df_reg[0]       /* opcode */
                    437: #define        dk_althdr       df_reg[1]       /* alt. sect. dskadr, in an int! */
                    438: #define        dk_fmtflags     df_reg[2]       /* header format flags */
                    439: 
                    440: /* output register assignments for DIOCWFORMAT ioctl */
                    441: #define        dk_operrsta     df_reg[0]       /* dcb operrsta */
                    442: #define        dk_ecodecnt     df_reg[1]       /* smd-e ecode and error word count */
                    443: #define        dk_ecode(ecodecnt)      ((u_long)(ecodecnt) >> 2)
                    444: #define        dk_errcnt(ecodecnt)     (((ecodecnt) & 0xffff) << 1)
                    445: #define        dk_erraddr      df_reg[2]       /* error dskadr, in an int! */

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