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Annotation of 43BSDReno/sys/vax/ka820.h, revision 1.1

1.1     ! root        1: /*
        !             2:  * Copyright (c) 1988 Regents of the University of California.
        !             3:  * All rights reserved.
        !             4:  *
        !             5:  * This code is derived from software contributed to Berkeley by
        !             6:  * Chris Torek.
        !             7:  *
        !             8:  * Redistribution is only permitted until one year after the first shipment
        !             9:  * of 4.4BSD by the Regents.  Otherwise, redistribution and use in source and
        !            10:  * binary forms are permitted provided that: (1) source distributions retain
        !            11:  * this entire copyright notice and comment, and (2) distributions including
        !            12:  * binaries display the following acknowledgement:  This product includes
        !            13:  * software developed by the University of California, Berkeley and its
        !            14:  * contributors'' in the documentation or other materials provided with the
        !            15:  * distribution and in all advertising materials mentioning features or use
        !            16:  * of this software.  Neither the name of the University nor the names of
        !            17:  * its contributors may be used to endorse or promote products derived from
        !            18:  * this software without specific prior written permission.
        !            19:  * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
        !            20:  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
        !            21:  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
        !            22:  *
        !            23:  *     @(#)ka820.h     7.3 (Berkeley) 6/28/90
        !            24:  */
        !            25: 
        !            26: /*
        !            27:  * Definitions specific to the ka820 cpu.
        !            28:  */
        !            29: 
        !            30: #if VAX8200
        !            31: 
        !            32: /*
        !            33:  * Device addresses.
        !            34:  */
        !            35: #define        KA820_PORTADDR          0x20088000      /* port controller */
        !            36: #define        KA820_BRAMADDR          0x20090000      /* boot ram */
        !            37: #define        KA820_EEPROMADDR        0x20098000      /* eeprom */
        !            38: #define        KA820_RX50ADDR          0x200b0000      /* rcx50 */
        !            39: #define        KA820_CLOCKADDR         0x200b8000      /* watch chip */
        !            40: 
        !            41: /*
        !            42:  * Sizes.  The port controller, RCX50, and watch chip are all one page.
        !            43:  */
        !            44: #define        KA820_BRPAGES           16              /* 8K */
        !            45: #define        KA820_EEPAGES           64              /* 32K */
        !            46: 
        !            47: /* port controller CSR bit values */
        !            48: #define        KA820PORT_RSTHALT       0x80000000      /* restart halt */
        !            49: #define        KA820PORT_LCONS         0x40000000      /* logical console */
        !            50: #define        KA820PORT_LCONSEN       0x20000000      /* logical console enable */
        !            51: #define        KA820PORT_BIRESET       0x10000000      /* BI reset */
        !            52: #define        KA820PORT_BISTF         0x08000000      /* ??? */
        !            53: #define        KA820PORT_ENBAPT        0x04000000      /* ??? */
        !            54: #define        KA820PORT_STPASS        0x02000000      /* self test pass */
        !            55: #define        KA820PORT_RUN           0x01000000      /* run */
        !            56: #define        KA820PORT_WWPE          0x00800000      /* ??? parity even? */
        !            57: #define        KA820PORT_EVLCK         0x00400000      /* event lock */
        !            58: #define        KA820PORT_WMEM          0x00200000      /* write mem */
        !            59: #define        KA820PORT_EV4           0x00100000      /* event 4 */
        !            60: #define        KA820PORT_EV3           0x00080000      /* event 3 */
        !            61: #define        KA820PORT_EV2           0x00040000      /* event 2 */
        !            62: #define        KA820PORT_EV1           0x00020000      /* event 1 */
        !            63: #define        KA820PORT_EV0           0x00010000      /* event 0 */
        !            64: #define        KA820PORT_WWPO          0x00008000      /* ??? parity odd? */
        !            65: #define        KA820PORT_PERH          0x00004000      /* parity error H */
        !            66: #define        KA820PORT_ENBPIPE       0x00002000      /* enable? pipe */
        !            67: #define        KA820PORT_TIMEOUT       0x00001000      /* timeout */
        !            68: #define        KA820PORT_RSVD          0x00000800      /* reserved */
        !            69: #define        KA820PORT_CONSEN        0x00000400      /* console interrupt enable */
        !            70: #define        KA820PORT_CONSCLR       0x00000200      /* clear console interrupt */
        !            71: #define        KA820PORT_CONSINTR      0x00000100      /* console interrupt req */
        !            72: #define        KA820PORT_RXIE          0x00000080      /* RX50 interrupt enable */
        !            73: #define        KA820PORT_RXCLR         0x00000040      /* clear RX50 interrupt */
        !            74: #define        KA820PORT_RXIRQ         0x00000020      /* RX50 interrupt request */
        !            75: #define        KA820PORT_IPCLR         0x00000010      /* clear IP interrupt */
        !            76: #define        KA820PORT_IPINTR        0x00000008      /* IP interrupt request */
        !            77: #define        KA820PORT_CRDEN         0x00000004      /* enable CRD interrupts */
        !            78: #define        KA820PORT_CRDCLR        0x00000002      /* clear CRD interrupt */
        !            79: #define        KA820PORT_CRDINTR       0x00000001      /* CRD interrupt request */
        !            80: 
        !            81: /* what the heck */
        !            82: #define        KA820PORT_BITS \
        !            83: "\20\40RSTHALT\37LCONS\36LCONSEN\35BIRESET\34BISTF\33ENBAPT\32STPASS\31RUN\
        !            84: \30WWPE\27EVLCK\26WMEM\25EV4\24EV3\23EV2\22EV1\21EV\20WWPO\17PERH\16ENBPIPE\
        !            85: \15TIMEOUT\13CONSEN\12CONSCLR\11CONSINTR\10RXIE\7RXCLR\6RXIRQ\5IPCLR\4IPINTR\
        !            86: \3CRDEN\2CLRCLR\1CRDINTR"
        !            87: 
        !            88: /* clock CSR bit values, per csr */
        !            89: #define        KA820CLK_0_BUSY         0x01            /* busy (time changing) */
        !            90: #define        KA820CLK_1_GO           0x0c            /* run */
        !            91: #define        KA820CLK_1_SET          0x0d            /* set the time */
        !            92: #define        KA820CLK_3_VALID        0x01            /* clock is valid */
        !            93: 
        !            94: #ifndef LOCORE
        !            95: struct ka820port {
        !            96:        u_long  csr;
        !            97:        /* that seems to be all.... */
        !            98: };
        !            99: 
        !           100: struct ka820clock {
        !           101:        u_char  sec;
        !           102:        u_char  pad0;
        !           103:        u_char  secalrm;
        !           104:        u_char  pad1;
        !           105:        u_char  min;
        !           106:        u_char  pad2;
        !           107:        u_char  minalrm;
        !           108:        u_char  pad3;
        !           109:        u_char  hr;
        !           110:        u_char  pad4;
        !           111:        u_char  hralrm;
        !           112:        u_char  pad5;
        !           113:        u_char  dayofwk;
        !           114:        u_char  pad6;
        !           115:        u_char  day;
        !           116:        u_char  pad7;
        !           117:        u_char  mon;
        !           118:        u_char  pad8;
        !           119:        u_char  yr;
        !           120:        u_char  pad9;
        !           121:        u_short csr0;
        !           122:        u_short csr1;
        !           123:        u_short csr2;
        !           124:        u_short csr3;
        !           125: };
        !           126: #endif
        !           127: #endif

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