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Annotation of 43BSDReno/sys/vaxbi/bireg.h, revision 1.1

1.1     ! root        1: /*
        !             2:  * Copyright (c) 1988 Regents of the University of California.
        !             3:  * All rights reserved.
        !             4:  *
        !             5:  * This code is derived from software contributed to Berkeley by
        !             6:  * Chris Torek.
        !             7:  *
        !             8:  * Redistribution is only permitted until one year after the first shipment
        !             9:  * of 4.4BSD by the Regents.  Otherwise, redistribution and use in source and
        !            10:  * binary forms are permitted provided that: (1) source distributions retain
        !            11:  * this entire copyright notice and comment, and (2) distributions including
        !            12:  * binaries display the following acknowledgement:  This product includes
        !            13:  * software developed by the University of California, Berkeley and its
        !            14:  * contributors'' in the documentation or other materials provided with the
        !            15:  * distribution and in all advertising materials mentioning features or use
        !            16:  * of this software.  Neither the name of the University nor the names of
        !            17:  * its contributors may be used to endorse or promote products derived from
        !            18:  * this software without specific prior written permission.
        !            19:  * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
        !            20:  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
        !            21:  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
        !            22:  *
        !            23:  *     @(#)bireg.h     7.3 (Berkeley) 6/28/90
        !            24:  */
        !            25: 
        !            26: /*
        !            27:  * VAXBI node definitions.
        !            28:  */
        !            29: 
        !            30: /*
        !            31:  * BI node addresses
        !            32:  */
        !            33: #define        BI_BASE(bi)     ((struct bi_node *) (0x20000000 + (bi)*0x2000000))
        !            34: #define        NNODEBI         16              /* 16 nodes per BI */
        !            35: /*     `local space'   0x20800000      /* ??? */
        !            36: 
        !            37: #ifndef LOCORE
        !            38: /*
        !            39:  * BI nodes all start with BI interface registers (those on the BIIC chip).
        !            40:  * These are followed with interface-specific registers.
        !            41:  *
        !            42:  * NB: This structure does NOT include the four GPRs (not anymore!)
        !            43:  */
        !            44: struct biiregs {
        !            45:        u_short bi_dtype;       /* device type */
        !            46:        u_short bi_revs;        /* revisions */
        !            47:        u_long  bi_csr;         /* control and status register */
        !            48:        u_long  bi_ber;         /* bus error register */
        !            49:        u_long  bi_eintrcsr;    /* error interrupt control register */
        !            50:        u_long  bi_intrdes;     /* interrupt destination register */
        !            51:                                /* the rest are not required for all nodes */
        !            52:        u_long  bi_ipintrmsk;   /* IP interrupt mask register */
        !            53:        u_long  bi_fipsdes;     /* Force-Bit IPINTR/STOP destination reg */
        !            54:        u_long  bi_ipintrsrc;   /* IPINTR source register */
        !            55:        u_long  bi_sadr;        /* starting address register */
        !            56:        u_long  bi_eadr;        /* ending address register */
        !            57:        u_long  bi_bcicsr;      /* BCI control and status register */
        !            58:        u_long  bi_wstat;       /* write status register */
        !            59:        u_long  bi_fipscmd;     /* Force-Bit IPINTR/STOP command reg */
        !            60:        u_long  bi_xxx1[3];     /* unused */
        !            61:        u_long  bi_uintrcsr;    /* user interface interrupt control reg */
        !            62:        u_long  bi_xxx2[43];    /* unused */
        !            63: /* although these are on the BIIC, their interpretation varies */
        !            64: /*     u_long  bi_gpr[4];      /* general purpose registers */
        !            65: };
        !            66: 
        !            67: /*
        !            68:  * A generic BI node.
        !            69:  */
        !            70: struct bi_node {
        !            71:        struct  biiregs biic;   /* interface */
        !            72:        u_long  bi_xxx[1988];   /* pad to 8K */
        !            73: };
        !            74: 
        !            75: /*
        !            76:  * A cpu node.
        !            77:  */
        !            78: struct bi_cpu {
        !            79:        struct  biiregs biic;   /* interface chip */
        !            80:        u_long  bi_gpr[4];      /* gprs (unused) */
        !            81:        u_long  bi_sosr;        /* slave only status register */
        !            82:        u_long  bi_xxx[63];     /* pad */
        !            83:        u_long  bi_rxcd;        /* receive console data register */
        !            84: };
        !            85: #endif LOCORE
        !            86: 
        !            87: /* device types */
        !            88: #define        BIDT_MS820      0x0001  /* MS820 memory board */
        !            89: #define        BIDT_DWBUA      0x0102  /* DWBUA Unibus adapter */
        !            90: #define        BIDT_KLESI      0x0103  /* KLESI-B adapter */
        !            91: #define        BIDT_KA820      0x0105  /* KA820 cpu */
        !            92: #define        BIDT_DB88       0x0106  /* DB88 adapter */
        !            93: #define        BIDT_DMB32      0x0109  /* DMB32 adapter */
        !            94: #define        BIDT_KDB50      0x010e  /* KDB50 disk controller */
        !            95: #define        BIDT_DEBNK      0x410e  /* BI Ethernet (Lance) + TK50 */
        !            96: #define        BIDT_DEBNA      0x410f  /* BI Ethernet (Lance) adapter */
        !            97: 
        !            98: #ifdef notdef          /* CPU (KA820) bits in bi_revs */
        !            99: #define        BI_CPUREV(x)    (((x) >> 11))           /* CPU revision code */
        !           100: #define        BI_UPATCHREV(x) (((x) >> 1) & 0x3ff)    /* microcode patch rev */
        !           101: #define        BI_SPATCHREV(x) (((x) & 1)              /* secondary patch rev */
        !           102: #endif
        !           103: 
        !           104: /* bits in bi_csr */
        !           105: #define        BICSR_IREV(x)   ((u_char)((x) >> 24))   /* VAXBI interface rev */
        !           106: #define        BICSR_TYPE(x)   ((u_char)((x) >> 16))   /* BIIC type */
        !           107: #define        BICSR_HES       0x8000          /* hard error summary */
        !           108: #define        BICSR_SES       0x4000          /* soft error summary */
        !           109: #define        BICSR_INIT      0x2000          /* initialise node */
        !           110: #define        BICSR_BROKE     0x1000          /* broke */
        !           111: #define        BICSR_STS       0x0800          /* self test status */
        !           112: #define        BICSR_NRST      0x0400          /* node reset */
        !           113: #define        BICSR_UWP       0x0100          /* unlock write pending */
        !           114: #define        BICSR_HEIE      0x0080          /* hard error interrupt enable */
        !           115: #define        BICSR_SEIE      0x0040          /* soft error interrupt enable */
        !           116: #define        BICSR_ARB_MASK  0x0030          /* mask to get arbitration codes */
        !           117: #define        BICSR_ARB_NONE  0x0030          /* no arbitration */
        !           118: #define        BICSR_ARB_LOG   0x0020          /* low priority */
        !           119: #define        BICSR_ARB_HIGH  0x0010          /* high priority */
        !           120: #define        BICSR_ARB_RR    0x0000          /* round robin */
        !           121: #define        BICSR_NODEMASK  0x000f          /* node ID */
        !           122: 
        !           123: #define        BICSR_BITS \
        !           124: "\20\20HES\17SES\16INIT\15BROKE\14STS\13NRST\11UWP\10HEIE\7SEIE"
        !           125: 
        !           126: /* bits in bi_ber */
        !           127: #define        BIBER_MBZ       0x8000fff0
        !           128: #define        BIBER_NMR       0x40000000      /* no ack to multi-responder command */
        !           129: #define        BIBER_MTCE      0x20000000      /* master transmit check error */
        !           130: #define        BIBER_CTE       0x10000000      /* control transmit error */
        !           131: #define        BIBER_MPE       0x08000000      /* master parity error */
        !           132: #define        BIBER_ISE       0x04000000      /* interlock sequence error */
        !           133: #define        BIBER_TDF       0x02000000      /* transmitter during fault */
        !           134: #define        BIBER_IVE       0x01000000      /* ident vector error */
        !           135: #define        BIBER_CPE       0x00800000      /* command parity error */
        !           136: #define        BIBER_SPE       0x00400000      /* slave parity error */
        !           137: #define        BIBER_RDS       0x00200000      /* read data substitute */
        !           138: #define        BIBER_RTO       0x00100000      /* retry timeout */
        !           139: #define        BIBER_STO       0x00080000      /* stall timeout */
        !           140: #define        BIBER_BTO       0x00040000      /* bus timeout */
        !           141: #define        BIBER_NEX       0x00020000      /* nonexistent address */
        !           142: #define        BIBER_ICE       0x00010000      /* illegal confirmation error */
        !           143: #define        BIBER_UPEN      0x00000008      /* user parity enable */
        !           144: #define        BIBER_IPE       0x00000004      /* ID parity error */
        !           145: #define        BIBER_CRD       0x00000002      /* corrected read data */
        !           146: #define        BIBER_NPE       0x00000001      /* null bus parity error */
        !           147: #define        BIBER_HARD      0x4fff0000
        !           148: 
        !           149: #define        BIBER_BITS \
        !           150: "\20\37NMR\36MTCE\35CTE\34MPE\33ISE\32TDF\31IVE\30CPE\
        !           151: \27SPE\26RDS\25RTO\24STO\23BTO\22NEX\21ICE\4UPEN\3IPE\2CRD\1NPE"
        !           152: 
        !           153: /* bits in bi_eintrcsr */
        !           154: #define        BIEIC_INTRAB    0x01000000      /* interrupt abort */
        !           155: #define        BIEIC_INTRC     0x00800000      /* interrupt complete */
        !           156: #define        BIEIC_INTRSENT  0x00200000      /* interrupt command sent */
        !           157: #define        BIEIC_INTRFORCE 0x00100000      /* interrupt force */
        !           158: #define        BIEIC_LEVELMASK 0x000f0000      /* mask for interrupt levels */
        !           159: #define        BIEIC_IPL17     0x00080000      /* ipl 0x17 */
        !           160: #define        BIEIC_IPL16     0x00040000      /* ipl 0x16 */
        !           161: #define        BIEIC_IPL15     0x00020000      /* ipl 0x15 */
        !           162: #define        BIEIC_IPL14     0x00010000      /* ipl 0x14 */
        !           163: #define        BIEIC_VECMASK   0x00003ffc      /* vector mask for error intr */
        !           164: 
        !           165: /* bits in bi_intrdes */
        !           166: #define        BIDEST_MASK     0x0000ffff      /* one bit per node to be intr'ed */
        !           167: 
        !           168: /* bits in bi_ipintrmsk */
        !           169: #define        BIIPINTR_MASK   0xffff0000      /* one per node to allow to ipintr */
        !           170: 
        !           171: /* bits in bi_fipsdes */
        !           172: #define        BIFIPSD_MASK    0x0000ffff
        !           173: 
        !           174: /* bits in bi_ipintrsrc */
        !           175: #define        BIIPSRC_MASK    0xffff0000
        !           176: 
        !           177: /* sadr and eadr are simple addresses */
        !           178: 
        !           179: /* bits in bi_bcicsr */
        !           180: #define        BCI_BURSTEN     0x00020000      /* burst mode enable */
        !           181: #define        BCI_IPSTOP_FRC  0x00010000      /* ipintr/stop force */
        !           182: #define        BCI_MCASTEN     0x00008000      /* multicast space enable */
        !           183: #define        BCI_BCASTEN     0x00004000      /* broadcast enable */
        !           184: #define        BCI_STOPEN      0x00002000      /* stop enable */
        !           185: #define        BCI_RSRVDEN     0x00001000      /* reserved enable */
        !           186: #define        BCI_IDENTEN     0x00000800      /* ident enable */
        !           187: #define        BCI_INVALEN     0x00000400      /* inval enable */
        !           188: #define        BCI_WINVEN      0x00000200      /* write invalidate enable */
        !           189: #define        BCI_UINTEN      0x00000100      /* user interface csr space enable */
        !           190: #define        BCI_BIICEN      0x00000080      /* BIIC csr space enable */
        !           191: #define        BCI_INTEN       0x00000040      /* interrupt enable */
        !           192: #define        BCI_IPINTEN     0x00000020      /* ipintr enable */
        !           193: #define        BCI_PIPEEN      0x00000010      /* pipeline NXT enable */
        !           194: #define        BCI_RTOEVEN     0x00000008      /* read timeout EV enable */
        !           195: 
        !           196: #define        BCI_BITS \
        !           197: "\20\22BURSTEN\21IPSTOP_FRC\20MCASTEN\
        !           198: \17BCASTEN\16STOPEN\15RSRVDEN\14IDENTEN\13INVALEN\12WINVEN\11UINTEN\
        !           199: \10BIICEN\7INTEN\6IPINTEN\5PIPEEN\4RTOEVEN"
        !           200: 
        !           201: /* bits in bi_wstat */
        !           202: #define        BIW_GPR3        0x80000000      /* gpr 3 was written */
        !           203: #define        BIW_GPR2        0x40000000      /* gpr 2 was written */
        !           204: #define        BIW_GPR1        0x20000000      /* gpr 1 was written */
        !           205: #define        BIW_GPR0        0x10000000      /* gpr 0 was written */
        !           206: 
        !           207: /* bits in force-bit ipintr/stop command register 8/
        !           208: #define        BIFIPSC_CMDMASK 0x0000f000      /* command */
        !           209: #define        BIFIPSC_MIDEN   0x00000800      /* master ID enable */
        !           210: 
        !           211: /* bits in bi_uintcsr */
        !           212: #define        BIUI_INTAB      0xf0000000      /* interrupt abort level */
        !           213: #define        BIUI_INTC       0x0f000000      /* interrupt complete bits */
        !           214: #define        BIUI_SENT       0x00f00000      /* interrupt sent bits */
        !           215: #define        BIUI_FORCE      0x000f0000      /* force interrupt level */
        !           216: #define        BIUI_EVECEN     0x00008000      /* external vector enable */
        !           217: #define        BIUI_VEC        0x00003ffc      /* interrupt vector */
        !           218: 
        !           219: /* tell if a bi device is a slave (hence has SOSR) */
        !           220: #define        BIDT_ISSLAVE(x) (((x) & 0x7f00) == 0)
        !           221: 
        !           222: /* bits in bi_sosr */
        !           223: #define        BISOSR_MEMSIZE  0x1ffc0000      /* memory size */
        !           224: #define        BISOSR_BROKE    0x00001000      /* broke */
        !           225: 
        !           226: /* bits in bi_rxcd */
        !           227: #define        BIRXCD_BUSY2    0x80000000      /* busy 2 */
        !           228: #define        BIRXCD_NODE2    0x0f000000      /* node id 2 */
        !           229: #define        BIRXCD_CHAR2    0x00ff0000      /* character 2 */
        !           230: #define        BIRXCD_BUSY1    0x00008000      /* busy 1 */
        !           231: #define        BIRXCD_NODE1    0x00000f00      /* node id 1 */
        !           232: #define        BIRXCD_CHAR1    0x000000ff      /* character 1 */

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