Return to if_ecreg.h CVS log

Up to [CSRG BSD Unix] / 43BSDReno / sys / vaxif

Annotation of 43BSDReno/sys/vaxif/if_ecreg.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * Copyright (c) 1982, 1986 Regents of the University of California.
                      3:  * All rights reserved.
                      4:  *
                      5:  * Redistribution is only permitted until one year after the first shipment
                      6:  * of 4.4BSD by the Regents.  Otherwise, redistribution and use in source and
                      7:  * binary forms are permitted provided that: (1) source distributions retain
                      8:  * this entire copyright notice and comment, and (2) distributions including
                      9:  * binaries display the following acknowledgement:  This product includes
                     10:  * software developed by the University of California, Berkeley and its
                     11:  * contributors'' in the documentation or other materials provided with the
                     12:  * distribution and in all advertising materials mentioning features or use
                     13:  * of this software.  Neither the name of the University nor the names of
                     14:  * its contributors may be used to endorse or promote products derived from
                     15:  * this software without specific prior written permission.
                     16:  * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
                     17:  * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
                     18:  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
                     19:  *
                     20:  *     @(#)if_ecreg.h  7.4 (Berkeley) 6/28/90
                     21:  */
                     22: 
                     23: /*
                     24:  * 3Com Ethernet controller registers.
                     25:  */
                     26: struct ecdevice {
                     27:        short   ec_rcr;         /* Receive Control Register */
                     28:        short   ec_xcr;         /* Transmit Control Register */
                     29: };
                     30: 
                     31: /*
                     32:  * Control and status bits -- rcr
                     33:  */
                     34: #define        EC_SPIE         0x8000          /* set parity interrupt enable */
                     35: #define        EC_ASTEP        0x4000          /* increment address counter */
                     36: #define        EC_AROM         0x2000          /* 1: Use address ROM, 0: use RAM */
                     37: #define        EC_PE           0x2000          /* Parity error */
                     38: #define        EC_AWCLK        0x1000          /* address write clock bit */
                     39: #define        EC_PIE          0x1000          /* Parity interrupt enable (read) */
                     40: #define        EC_ADATA        0x0f00          /* address/filtering */
                     41: #define        EC_RDONE        0x0080          /* receive done */
                     42: #define        EC_MDISAB       0x0080          /* memory disable */
                     43: #define        EC_RINTEN       0x0040          /* receive interrupt enable */
                     44: #define        EC_RCLR         0x0020          /* clear RDONE bit */
                     45: #define        EC_RWBN         0x0010          /* submit buffer for receive */
                     46: #define        EC_RBN          0x000f          /* buffer number */
                     47: 
                     48: #define        EC_RBITS        "\10\16PE\15PIE\10RDONE\7RINTEN"
                     49: 
                     50: /*
                     51:  * Control and status bits -- xcr
                     52:  */
                     53: #define        EC_JAM          0x8000          /* collision dectected */
                     54: #define        EC_JINTEN       0x4000          /* collision interrupt enable */
                     55: #define        EC_JCLR         0x2000          /* clear collision detect */
                     56: #define        EC_UECLR        0x0100          /* reset controller */
                     57: #define        EC_XDONE        0x0080          /* transmit done */
                     58: #define        EC_XINTEN       0x0040          /* transmit interrupt enable */
                     59: #define        EC_XCLR         0x0020          /* clear XDONE bit */
                     60: #define        EC_XWBN         0x0010          /* submit buffer for transmit */
                     61: #define        EC_XBN          0x000f          /* buffer number */
                     62: 
                     63: #define        EC_XBITS        "\10\20JAM\17JINTEN\10XDONE\7XINTEN"
                     64: 
                     65: /*
                     66:  * Useful combinations
                     67:  */
                     68: #define        EC_READ         (0x600|EC_RINTEN|EC_RWBN)
                     69: #define        EC_MULTI        (0x700|EC_RINTEN|EC_RWBN)
                     70: #define EC_PROMISC     (0x000|EC_RINTEN|EC_RWBN)
                     71: #define        EC_WRITE        (EC_JINTEN|EC_XINTEN|EC_XWBN)
                     72: #define        EC_CLEAR        (EC_JINTEN|EC_XINTEN|EC_JCLR)
                     73: 
                     74: /*
                     75:  * Buffer number definitions
                     76:  */
                     77: #define        ECTBF           0               /* Buffer for transmit */
                     78: #define        ECRLBF          1               /* First buffer for receive */
                     79: #define        ECRHBF          15              /* Last buffer for receive */
                     80: 
                     81: #define        ECRDOFF         528             /* Packet offset in read buffer */

This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.