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1.1 root 1: /*
2: * Copyright (c) 1982, 1986 Regents of the University of California.
3: * All rights reserved.
4: *
5: * This code is derived from software contributed to Berkeley by
6: * Excelan Inc.
7: *
8: * Redistribution is only permitted until one year after the first shipment
9: * of 4.4BSD by the Regents. Otherwise, redistribution and use in source and
10: * binary forms are permitted provided that: (1) source distributions retain
11: * this entire copyright notice and comment, and (2) distributions including
12: * binaries display the following acknowledgement: This product includes
13: * software developed by the University of California, Berkeley and its
14: * contributors'' in the documentation or other materials provided with the
15: * distribution and in all advertising materials mentioning features or use
16: * of this software. Neither the name of the University nor the names of
17: * its contributors may be used to endorse or promote products derived from
18: * this software without specific prior written permission.
19: * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
20: * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
21: * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
22: *
23: * @(#)if_exreg.h 7.3 (Berkeley) 6/28/90
24: */
25:
26: struct exdevice {
27: char xd_porta; /* write on porta resets EXOS */
28: char xd_pad_a;
29: char xd_portb; /* write on portb interrupts EXOS */
30: /* read on portb returns status bits */
31: char xd_pad_b;
32: };
33:
34: /* EXOS I/O PORT A write definitions */
35: #define EX_RESET 0 /* value doesn't really matter... */
36:
37: /* EXOS I/O PORT B write definitions */
38: #define EX_NTRUPT 0
39:
40: /* EXOS I/O PORT B read definitions */
41: #define EX_TESTOK 1 /* set when self-diagnostics passed */
42: #define EX_UNREADY (1<<3) /* set until EXOS ready to read from B */
43:
44: /* message buffer status field definitions */
45: #define MH_OWNER 1 /* mask for status bit for owner */
46: #define MH_HOST 0 /* if 0, the host owns the buffer */
47: #define MH_EXOS 1 /* if 1, the EXOS owns the buffer */
48:
49: /* EXOS Link Level request codes */
50: #define LLTRANSMIT 0xC /* send a packet */
51: #define LLRTRANSMIT 0xE /* send a packet, and self-receive */
52: #define LLRECEIVE 0xD /* receive a packet */
53: #define LLNET_MODE 0x8 /* read/write mode control objects */
54: #define LLNET_ADDRS 0x9 /* read/write receive address slots */
55: #define LLNET_RECV 0xA /* read/alter receive slot enable bit */
56: #define LLNET_STSTCS 0xB /* read/reset network statistics objects */
57:
58: /* Link Level return codes common to all requests */
59: #define LL_OK 0 /* successful completion */
60: #define LLX_MODE 0xA1 /* EXOS not in link level mode (impossible) */
61:
62: /* LLTRANSMIT unique return codes */
63: #define LLXM_1RTRY 0x1 /* successful xmission, 1 retry */
64: #define LLXM_RTRYS 0x2 /* successful xmission, more than 1 retry */
65: #define LLXM_NSQE 0x8 /* successful xmission, no SQE TEST signal */
66: #define LLXM_CLSN 0x10 /* xmission failed, excess retries */
67: #define LLXM_NCS 0x20 /* xmission failed, no carrier sense */
68: #define LLXM_LNGTH 0x40 /* xmission failed, bad packet length */
69: #define XMIT_BITS "\7\7LENGTH\6CARRIER\5XCLSNS\4SQETST"
70: #define LLXM_ERROR (LLXM_NSQE|LLXM_CLSN|LLXM_NCS|LLXM_LNGTH)
71:
72: /* LLRECEIVE unique return codes */
73: #define LLRC_TRUNC 0x4 /* pkt received, but truncated to fit buffer */
74: #define LLRC_ALIGN 0x10 /* pkt received, but with alignment error */
75: #define LLRC_CRC 0x20 /* pkt received, but with CRC error */
76: #define LLRC_BUFLEN 0x40 /* no pkt received, buffer less than 64 bytes */
77: /* this should never happen here */
78: #define RECV_BITS "\7\7BUFLEN\6CRC\5ALIGN\3TRUNC"
79:
80: /* LLNET_ADDRS unique return codes */
81: #define LLNA_BADSLOT 0xD1 /* slot doesn't exist or can't be accessed */
82: #define LLNA_BADADDR 0xD3 /* invalid address for designated slot */
83:
84: /* LLNET_RECV unique return codes */
85: #define LLNR_BADSLOT 0xD1 /* slot doesn't exist or can't be accessed */
86: #define LLNR_BADADDR 0xD2 /* designated slot was empty */
87:
88: /* address slot object indices */
89: #define NULLSLOT 0 /* the null slot */
90: #define MINMCSLOT 1 /* minimum multicast slot index */
91: #define MAXMCSLOT 8 /* default maximum multicast slot index */
92: #define PHYSSLOT 253 /* physical slot index */
93: #define UNVRSSLOT 254 /* universal slot index */
94: #define BROADSLOT 255 /* broadcast slot index */
95:
96: /* request mask bit definitions */
97: #define WRITE_OBJ 1 /* write the object */
98: #define READ_OBJ 2 /* read the object */
99: #define ENABLE_RCV 4 /* enable reception on designated slot */
100:
101: /* NET_MODE options mask bit definitions */
102: #define OPT_ALIGN 0x10 /* receive packets with alignment errors */
103: #define OPT_CRC 0x20 /* receive packets with CRC errors */
104: #define OPT_DSABLE 0x80 /* disconnect controller hardware */
105:
106: /* NET_MODE mode field value definitions */
107: #define MODE_OFF 0 /* stop transmission and reception */
108: #define MODE_PERF 1 /* perfect multicast address filtering */
109: #define MODE_HW 2 /* hardware-only multicast address filtering */
110: #define MODE_PROM 3 /* promiscuous reception */
111:
112: #define NFRAGMENTS 1 /* number fragments that the EXOS will scatter/gather */
113: #define EXMAXRBUF 1520 /* per EXOS 101 manual 5.3.7 (maybe 1518 would do) */
114:
115: /*
116: * N.B. Structures below are carefully constructed so that
117: * they correspond to the message formats that NX firmware
118: * defines. None of them should contain any compiler-instigated
119: * padding. Be especially careful about VAX C longword alignment!
120: */
121:
122: struct stat_array {
123: u_long sa_fsent; /* frames sent without errors */
124: u_long sa_xsclsn; /* frames aborted excess collisions */
125: u_long sa_nsqe; /* frames subject to heartbeat failure */
126: u_long sa_undef; /* undefined (TDR on EXOS 101) */
127: u_long sa_frcvd; /* frames received no errors */
128: u_long sa_align; /* frames received alignment error */
129: u_long sa_crc; /* frames received crc error */
130: u_long sa_flost; /* frames lost */
131: };
132:
133: struct buf_blk { /* packet/buffer block descriptor */
134: u_short bb_len; /* length of block, in bytes */
135: u_short bb_addr[2]; /* address of block */
136: /*
137: * Array above is really a single u_long field.
138: * We kludge its definition to defeat word-alignment.
139: * Access would look like:
140: * longaddr = *(u_long *)bp->.mb_er.er_blks[0].bb_addr;
141: */
142: };
143:
144: struct net_mode { /* read/write mode control objects */
145: /*12*/ u_char nm_rqst; /* request code */
146: /*13*/ u_char nm_rply; /* reply code */
147: /*14*/ u_char nm_mask; /* bit-wise switches for read, write */
148: /*15*/ u_char nm_optn; /* acceptable packet reception errors */
149: /*16*/ u_char nm_mode; /* EXOS filtering mode */
150: /*17*/
151: };
152:
153: struct net_addrs { /* read/write receive address slots */
154: /*12*/ u_char na_rqst; /* request code */
155: /*13*/ u_char na_rply; /* reply code */
156: /*14*/ u_char na_mask; /* bit-wise switches for read, write */
157: /*15*/ u_char na_slot; /* index of address slot */
158: /*16*/ u_char na_addrs[6]; /* address read and/or written */
159: /*22*/
160: };
161:
162: struct net_recv { /* read/alter receive slot enable bit */
163: /*12*/ u_char nr_rqst; /* request code */
164: /*13*/ u_char nr_rply; /* reply code */
165: /*14*/ u_char nr_mask; /* bit-wise switches for read, write */
166: /*15*/ u_char nr_slot; /* index of address slot */
167: /*16*/
168: };
169:
170: struct net_ststcs { /* read/reset network statistics objects */
171: /*12*/ u_char ns_rqst; /* request code */
172: /*13*/ u_char ns_rply; /* reply code */
173: /*14*/ u_char ns_mask; /* bit-wise switches for read, write */
174: /*15*/ u_char ns_rsrv; /* reserved for EXOS */
175: /*16*/ u_short ns_nobj; /* number of objects to work on */
176: /*18*/ u_short ns_xobj; /* index of first object to work on */
177: /*20*/ u_long ns_bufp; /* pointer to statistics buffer */
178: /*24*/
179: };
180:
181: struct enet_xmit { /* send a packet on the Ethernet */
182: /*12*/ u_char et_rqst; /* request code */
183: /*13*/ u_char et_rply; /* reply code */
184: /*14*/ u_char et_slot; /* address slot matching dest address */
185: /*15*/ u_char et_nblock; /* number of blocks composing packet */
186: /*16*/ struct buf_blk et_blks[NFRAGMENTS]; /* array of block descriptors */
187: /*22-64*/
188: };
189:
190: struct enet_recv { /* receive a packet on the Ethernet */
191: /*12*/ u_char er_rqst; /* request code */
192: /*13*/ u_char er_rply; /* reply code */
193: /*14*/ u_char er_slot; /* address slot matching dest address */
194: /*15*/ u_char er_nblock; /* number of blocks composing buffer */
195: /*16*/ struct buf_blk er_blks[NFRAGMENTS]; /* array of block descriptors */
196: /*22-64*/
197: };
198:
199: /* we send requests and receive replys with the EXOS using this structure */
200: struct ex_msg {
201: /*00*/ u_short mb_link; /* address of next message buffer */
202: /*02*/ u_char mb_rsrv; /* reserved for use by EXOS */
203: /*03*/ u_char mb_status; /* used bit-wise for message protocol */
204: /*04*/ u_short mb_length; /* length, in bytes, of the rest */
205: /*06*/ short mb_1rsrv; /* reserved for used by EXOS */
206: /*08*/ long mb_mid; /* available to user */
207: /*12*/ union mb_all {
208: struct net_mode mb_net_mode;
209: struct net_addrs mb_net_addrs;
210: struct net_recv mb_net_recv;
211: struct net_ststcs mb_net_ststcs;
212: struct enet_xmit mb_enet_xmit;
213: struct enet_recv mb_enet_recv;
214: } mb_all;
215: /* following field is used only by host, not read by board */
216: struct ex_msg *mb_next; /* host's pointer to next message */
217: };
218: #define mb_nm mb_all.mb_net_mode
219: #define mb_na mb_all.mb_net_addrs
220: #define mb_nr mb_all.mb_net_recv
221: #define mb_ns mb_all.mb_net_ststcs
222: #define mb_et mb_all.mb_enet_xmit
223: #define mb_er mb_all.mb_enet_recv
224: #define mb_rqst mb_nm.nm_rqst
225: #define mb_rply mb_nm.nm_rply
226: #define MBDATALEN (sizeof(union mb_all)+6)
227:
228: struct confmsg {
229: /*00*/ u_short cm_1rsrv; /* reserved, must be 1 */
230: /*02*/ char cm_vc[4]; /* returns ASCII version code */
231: /*06*/ u_char cm_cc; /* returns config completion code */
232: /*07*/ u_char cm_opmode; /* specifies operation mode */
233: /*08*/ u_short cm_dfo; /* specifies host data format option */
234: /*10*/ u_char cm_dcn1; /* reserved, must be 1 */
235: /*11*/ u_char cm_2rsrv[2]; /* reserved, must be 0 */
236: /*13*/ u_char cm_ham; /* specifies host address mode */
237: /*14*/ u_char cm_3rsrv; /* reserved, must be 0 */
238: /*15*/ u_char cm_mapsiz; /* reserved, must be 0 */
239: /*16*/ u_char cm_byteptrn[4]; /* host data format option test pattern */
240: /*20*/ u_short cm_wordptrn[2];
241: /*24*/ u_long cm_lwordptrn;
242: /*28*/ u_char cm_rsrvd[20];
243: /*48*/ u_long cm_mba; /* use 0xFFFFFFFF in link level mode */
244: /*52*/ u_char cm_nproc; /* use 0xFF in link level mode */
245: /*53*/ u_char cm_nmbox; /* use 0xFF in link level mode */
246: /*54*/ u_char cm_nmcast; /* use 0xFF in link level mode */
247: /*55*/ u_char cm_nhost; /* use 1 in link level mode */
248:
249: /* the next five parameters define the request message queue */
250: /*56*/ u_long cm_h2xba; /* base address of message queue */
251: /*60*/ u_short cm_h2xhdr; /* address offset of msg Q header */
252: /*62*/ u_char cm_h2xtyp; /* interrupt type */
253: /*63*/ u_char cm_h2xval; /* interrupt value (not used) */
254: /*64*/ u_short cm_h2xaddr; /* interrupt vector */
255: /*66*/ u_short cm_h2xpad; /* pad out unused portion of vector */
256:
257: /* the next five parameters define the reply message queue */
258: /*68*/ u_long cm_x2hba; /* base address of message queue */
259: /*72*/ u_short cm_x2hhdr; /* address offset of msg Q header */
260: /*74*/ u_char cm_x2htyp; /* interrupt type */
261: /*75*/ u_char cm_x2hval; /* interrupt value (not used) */
262: /*76*/ u_short cm_x2haddr; /* interrupt vector */
263: /*78*/ u_short cm_x2hpad; /* pad out unused portion of vector */
264: /*80*/
265: };
266:
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