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1.1 ! root 1: /* ! 2: * Copyright (c) 1988 Regents of the University of California. ! 3: * All rights reserved. ! 4: * ! 5: * This code is derived from software contributed to Berkeley by ! 6: * Tektronix Inc. ! 7: * ! 8: * Redistribution is only permitted until one year after the first shipment ! 9: * of 4.4BSD by the Regents. Otherwise, redistribution and use in source and ! 10: * binary forms are permitted provided that: (1) source distributions retain ! 11: * this entire copyright notice and comment, and (2) distributions including ! 12: * binaries display the following acknowledgement: This product includes ! 13: * software developed by the University of California, Berkeley and its ! 14: * contributors'' in the documentation or other materials provided with the ! 15: * distribution and in all advertising materials mentioning features or use ! 16: * of this software. Neither the name of the University nor the names of ! 17: * its contributors may be used to endorse or promote products derived from ! 18: * this software without specific prior written permission. ! 19: * THIS SOFTWARE IS PROVIDED AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED ! 20: * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF ! 21: * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. ! 22: * ! 23: * @(#)if_hyreg.h 7.3 (Berkeley) 6/28/90 ! 24: */ ! 25: ! 26: /* ! 27: * Modifications from Berkeley 4.2 BSD ! 28: * Copyright (c) 1983, Tektronix Inc. ! 29: * All Rights Reserved ! 30: */ ! 31: ! 32: /* ! 33: * Network Systems Corporation Hyperchannel interface ! 34: * ! 35: * supports A410 adapter interfaced via a DEC DR-11B, NSC PI-13 or PI-14 ! 36: * (PI-14 is a PI-13 with different line drivers, software is ! 37: * identical to a PI-13) ! 38: * ! 39: * Written by Steve Glaser, Tektronix Inc., July 1982 ! 40: * ! 41: * NOTE: ! 42: * ! 43: * DR11B code has not been fully checked out with 4.1a. ! 44: * The first adapters at Tek came with DR11Bs, and the code once worked, ! 45: * but those have been upgraded to PI-13s. ! 46: */ ! 47: ! 48: /* ! 49: * The HYPERchannel driver sends and receives messages formatted: ! 50: * ! 51: * +---------------------------------------+ --- ! 52: * | | /|\ ! 53: * | HYPERchannel adapter header (hy_hdr) | | ! 54: * | | | ! 55: * +---------------------------------------+ | ! 56: * | | | ! 57: * | Internet Protocol header (ip) | message proper ! 58: * | | (64 bytes max) ! 59: * +---------------------------------------+ | ! 60: * | | | ! 61: * | TCP header + user data | | ! 62: * | (if it all fits here) | | ! 63: * | | \|/ ! 64: * +---------------------------------------+ --- ! 65: * ! 66: * +---------------------------------------+ --- ! 67: * | | /|\ ! 68: * | | | ! 69: * | TCP header + user data | associated data ! 70: * | | | ! 71: * | | \|/ ! 72: * +---------------------------------------+ --- ! 73: * ! 74: * If all of the datagram will fit in the message proper (including ! 75: * the TCP header and user data) the entire datagram is passed in ! 76: * the message proper and the associated data feature of the HYPERchannel ! 77: * is not used. ! 78: * ! 79: * The mapping from internet addresses to HYPERchannel addresses is: ! 80: * ! 81: * 0 7 8 15 16 31 ! 82: * +---------+---------+-----------------------+ ! 83: * | network | special | HYPERchannel address | ! 84: * +---------+---------+-----------------------+ ! 85: * ! 86: * |<------------ internet address ----------->| ! 87: * ! 88: * The hyperchannel address is decoded as follows: ! 89: * ! 90: * 0 7 8 13 14 15 ! 91: * +-------------------+----------------+------+ ! 92: * | adapter number | zero | port | ! 93: * +-------------------+----------------+------+ ! 94: * ! 95: * The low 2 bits are port number (interpreted by hyperchannel hardware). ! 96: * ! 97: * The encoding of special bits is: ! 98: * ! 99: * 00 normal packet ! 100: * ! 101: * 01 loop this packet back to the sender at the ! 102: * specified adapter (ip header source/destination addresses ! 103: * swapped before sending, command bits added to tell the ! 104: * remote HYPERchannel adapter debug & performance studies] ! 105: * this code acts like 02 (below) if the ip destination (before ! 106: * any swapping) and the destination address don't match (e.g. ! 107: * this packet is being routed through a gateway) ! 108: * ! 109: * 02 loop this packet back to the sender at the ! 110: * specified adapter, but go through the specified adapter's ! 111: * IP. This is for testing IP's store and forward mechanism. ! 112: * ! 113: * other undefined, currently treated as normal packet ! 114: * ! 115: */ ! 116: #define MPSIZE 64 /* "Message Proper" size */ ! 117: #define MAXRETRY 4 ! 118: ! 119: /* ! 120: * Device registers ! 121: */ ! 122: struct hydevice { ! 123: short hyd_wcr; /* word count (negated) */ ! 124: u_short hyd_bar; /* bus address bits 15-0 */ ! 125: u_short hyd_csr; /* control and status */ ! 126: u_short hyd_dbuf; /* data buffer */ ! 127: }; ! 128: ! 129: /* ! 130: * CSR bit layout ! 131: */ ! 132: #define S_ERROR 0100000 /* error */ ! 133: #define S_NEX 0040000 /* non-existent memory error */ ! 134: #define S_ATTN 0020000 /* attn (always zero) */ ! 135: #ifdef PI13 ! 136: #define S_STKINTR 0010000 /* stacked interrupt */ ! 137: #else ! 138: #define S_MAINT 0010000 /* maintenance (not used) */ ! 139: #endif ! 140: #define S_A 0004000 /* device status A (recieve data available) */ ! 141: #define S_B 0002000 /* device status B (normal termination) */ ! 142: #define S_C 0001000 /* device status C (abnormal termination) */ ! 143: #ifdef PI13 ! 144: #define S_POWEROFF 0000400 /* power off indicator */ ! 145: #else ! 146: #define S_CYCLE 0000400 /* cycle (not used) */ ! 147: #endif ! 148: #define S_READY 0000200 /* ready */ ! 149: #define S_IE 0000100 /* interrupt enable */ ! 150: #define S_XBA 0000060 /* bus address bit bits 17 and 16 */ ! 151: #define S_CLRINT 0000014 /* clear stacked interrupt */ ! 152: #define S_IATTN 0000010 /* interrupt on attention only */ ! 153: #define S_WC 0000004 /* interrupt on word count == 0 only */ ! 154: #define S_IATTNWC 0000000 /* interrupt on word count == 0 and attention */ ! 155: #define S_BURST 0000002 /* burst mode DMA (not used) */ ! 156: #define S_GO 0000001 /* go */ ! 157: ! 158: #define XBASHIFT 12 ! 159: ! 160: #define HY_CSR_BITS "\20\ ! 161: \20ERROR\17NEX\16ATTN\15STKINTR\14RECV_DATA\13NORMAL\12ABNORMAL\11POWER\ ! 162: \10READY\07IENABLE\06XBA17\05XBA16\04IATTN\03IWC\02BURST\01GO" ! 163: ! 164: /* ! 165: * PI13 status conditions ! 166: */ ! 167: #define HYS_RECVDATA(x) (((x)->hyd_csr & S_A) != 0) /* get adapter data */ ! 168: #define HYS_NORMAL(x) (((x)->hyd_csr & S_B) != 0) /* done normally */ ! 169: #define HYS_ABNORMAL(x) (((x)->hyd_csr & S_C) != 0) /* done abnormally */ ! 170: #define HYS_ERROR(x) (((x)->hyd_csr & S_ERROR) != 0) /* error condition */ ! 171: #define HYS_DONE(x) (((x)->hyd_csr & (S_ERROR|S_B|S_C)) != 0) ! 172: ! 173: /* ! 174: * Function Codes for the Hyperchannel Adapter ! 175: * The codes are offset so they can be "or"ed into ! 176: * the reg data buffer ! 177: */ ! 178: #define HYF_XMITMSG 0x04 /* transmit message */ ! 179: #define HYF_XMITDATA 0x08 /* transmit associated data */ ! 180: #define HYF_XMITLSTDATA 0x0C /* transmit last associated data */ ! 181: #define HYF_XMITLOCMSG 0x10 /* transmit local message */ ! 182: #define HYF_INPUTMSG 0x24 /* input message proper */ ! 183: #define HYF_INPUTDATA 0x28 /* input assiciated data */ ! 184: #define HYF_STATUS 0x40 /* request status */ ! 185: #define HYF_DUMPREGS 0x50 /* dump extention registers */ ! 186: #define HYF_MARKP0 0x60 /* mark down port 0 */ ! 187: #define HYF_MARKP1 0x64 /* mark down port 1 */ ! 188: #define HYF_MARKP2 0x68 /* mark down port 2 */ ! 189: #define HYF_MARKP3 0x6C /* mark down port 3 */ ! 190: #define HYF_MP0RR 0x70 /* mark down port 0 and reroute messages */ ! 191: #define HYF_MP1RR 0x74 /* mark down port 1 and reroute messages */ ! 192: #define HYF_MP2RR 0x78 /* mark down port 2 and reroute messages */ ! 193: #define HYF_MP3RR 0x7C /* mark down port 3 and reroute messages */ ! 194: #define HYF_RSTATS 0xA0 /* read statistics */ ! 195: #define HYF_RCSTATS 0xA4 /* read and clear statistics */ ! 196: #define HYF_SETTEST 0xC0 /* enable test operations *set test mode) */ ! 197: #define HYF_SADDR_LEN 0xC4 /* test mode: set address and length */ ! 198: #define HYF_WBUFF 0xC8 /* test mode: write buffer */ ! 199: #define HYF_RBUFF 0xCC /* test mode: read buffer */ ! 200: #define HYF_CLRADAPTER 0xE0 /* clear adapter */ ! 201: #define HYF_END_OP 0xE4 /* end operation */ ! 202: #define HYF_CLRWFMSG 0xE6 /* clear wait for mwssage */ ! 203: #define HYF_WAITFORMSG 0xE8 /* wait for message */
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