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Annotation of 43BSDReno/sys/vaxuba/utreg.h, revision 1.1

1.1     ! root        1: /*
        !             2:  * Copyright (c) 1982, 1986 Regents of the University of California.
        !             3:  * All rights reserved.  The Berkeley software License Agreement
        !             4:  * specifies the terms and conditions for redistribution.
        !             5:  *
        !             6:  *     @(#)utreg.h     7.2 (Berkeley) 5/26/88
        !             7:  */
        !             8: 
        !             9: /*
        !            10:  * System Industries Model 9700 Tape Drive
        !            11:  *   emulates TU45 on the UNIBUS
        !            12:  */
        !            13: 
        !            14: struct utdevice {
        !            15:        u_short utcs1;          /* control status register 1 */
        !            16:        short   utwc;           /* word count register */
        !            17:        u_short utba;           /* low 16-bits of bus address */
        !            18:        short   utfc;           /* frame counter */
        !            19:        u_short utcs2;          /* control status register 2 */
        !            20:        u_short utds;           /* drive status register */
        !            21:        u_short uter;           /* error register */
        !            22:        u_short utas;           /* attention status register */
        !            23:        u_short utcc;           /* NRZI CRC character for validation */
        !            24:        u_short utdb;           /* data buffer reg (not emulated) */
        !            25:        u_short utmr;           /* maintenance reg (not emulated) */
        !            26:        u_short utdt;           /* drive type register (not emulated) */
        !            27:        u_short utsn;           /* serial number reg (not emulated) */
        !            28:        u_short uttc;           /* tape control register */
        !            29:        u_short utbae;          /* buffer address extension register */
        !            30:        u_short utcs3;          /* control and status register 3 */
        !            31: };
        !            32: 
        !            33: /*
        !            34:  * utcs1 --
        !            35:  *   cmds, interrupt enable, extended address bits, and status
        !            36:  */
        !            37: #define        UT_GO           0x0001          /* go bit */
        !            38: /* function codes reside in bits 5-1 */
        !            39: #define        UT_NOP          0x0000          /* no operation */
        !            40: #define        UT_REWOFFL      0x0002          /* rewind offline */
        !            41: #define        UT_LOOP         0x0004          /* loop read/write */
        !            42: #define        UT_REW          0x0006          /* rewind */
        !            43: #define        UT_CLEAR        0x0008          /* drive clear */
        !            44: #define        UT_SENSE        0x000a          /* drive sense */
        !            45: #define        UT_PRESET       0x0010          /* read in preset */
        !            46: #define        UT_DIAGN        0x0012          /* diagnostic mode set */
        !            47: #define        UT_ERASE        0x0014          /* erase */
        !            48: #define        UT_WEOF         0x0016          /* write tape mark */
        !            49: #define        UT_SFORW        0x0018          /* forward space block */
        !            50: #define        UT_SREV         0x001a          /* reverse space block */
        !            51: #define        UT_SFORWF       0x001c          /* forward space file */
        !            52: #define        UT_SREVF        0x001e          /* reverse space file */
        !            53: #define        UT_WCHFORW      0x0028          /* write check forward */
        !            54: #define        UT_WCHREV       0x002e          /* write check reverse */
        !            55: #define        UT_WCOM         0x0030          /* write forward */
        !            56: #define        UT_RCOM         0x0038          /* read forward */
        !            57: #define        UT_RREV         0x003e          /* read reverse */
        !            58: /* the remainder are control and status bits */
        !            59: #define        UT_IE           0x0040          /* interrupt-enable */
        !            60: #define        UT_RDY          0x0080          /* controller ready */
        !            61: #define        UT_EADDR        0x0300          /* extended address bits */
        !            62: /* bit 10 unused */
        !            63: #define        UT_DVA          0x0800          /* drive available */
        !            64: /* bit 12 unused */
        !            65: /* bit 13 - massbus control parity error not emulated */
        !            66: #define        UT_TRE          0x4000          /* transfer error */
        !            67: #define        UT_SC           0x8000          /* special condition */
        !            68: 
        !            69: #define        UT_BITS \
        !            70: "\10\20SC\17TRE\14DVA\10RDY\7IE\1GO"
        !            71: 
        !            72: /*
        !            73:  * utcs2 --
        !            74:  *   controller clear, error flags, and unit select
        !            75:  */
        !            76: /* bits 0-2 are unit select */
        !            77: #define        UTCS2_BAI       0x0008          /* UNIBUS address increment inhibit */
        !            78: #define        UTCS2_PAT       0x0010          /* parity test */
        !            79: #define        UTCS2_CLR       0x0020          /* controller clear */
        !            80: #define        UTCS2_IR        0x0040          /* input ready (not emulated) */
        !            81: #define        UTCS2_OR        0x0080          /* output ready (not emulated) */
        !            82: #define        UTCS2_RPE       0x0100          /* rom parity error */
        !            83: #define        UTCS2_MXF       0x0200          /* missed transfer */
        !            84: #define        UTCS2_NEM       0x0400          /* non existant memory */
        !            85: #define        UTCS2_PGE       0x0800          /* program error */
        !            86: #define        UTCS2_NED       0x1000          /* non existent drive */
        !            87: #define        UTCS2_PE        0x2000          /* parity error */
        !            88: #define        UTCS2_WCE       0x4000          /* write check error */
        !            89: #define        UTCS2_DLT       0x8000          /* data late */
        !            90: 
        !            91: #define        UTCS2_BITS \
        !            92: "\10\20DLT\17WCE\16PE\15NED\14NEM\13PGE\12MXF\11RPE\10OR\7IR\6CLR\5PAT\4BAI"
        !            93: 
        !            94: /*
        !            95:  * utds --
        !            96:  *   beginning of tape, end of tape, error summary bit, plus lots more
        !            97:  */
        !            98: #define        UTDS_SLA        0x0001          /* slave attention */
        !            99: #define        UTDS_BOT        0x0002          /* beginning of tape */
        !           100: #define        UTDS_TM         0x0004          /* tape mark */
        !           101: #define        UTDS_IDB        0x0008          /* identification burst */
        !           102: #define        UTDS_SDWN       0x0010          /* slowing down */
        !           103: #define        UTDS_PES        0x0020          /* phase encode status */
        !           104: #define        UTDS_SSC        0x0040          /* slave status change */
        !           105: #define        UTDS_DRY        0x0080          /* drive ready */
        !           106: #define        UTDS_DPR        0x0100          /* drive present (always 1) */
        !           107: #define        UTDS_GCR        0x0200          /* GCR status */
        !           108: #define        UTDS_EOT        0x0400          /* end of tape */
        !           109: #define        UTDS_WRL        0x0800          /* write lock */
        !           110: #define        UTDS_MOL        0x1000          /* medium on line */
        !           111: #define        UTDS_PIP        0x2000          /* positioning in progress */
        !           112: #define        UTDS_ERR        0x4000          /* composite error */
        !           113: #define        UTDS_ATA        0x8000          /* attention active */
        !           114: 
        !           115: #define        UTDS_BITS \
        !           116: "\10\20ATA\17ERR\16PIP\15MOL\14WRL\13EOT\12GCR\11DPR\10DRY\7SSC\6PES\5SDWN\4IDB\3TM\2BOT\1SLA"
        !           117: 
        !           118: /*
        !           119:  * uter --
        !           120:  *   detailed breakdown of error summary bit from cs2
        !           121:  */
        !           122: #define        UTER_ILF        0x0001          /* illegal function */
        !           123: #define        UTER_ILR        0x0002          /* illegal register (always 0) */
        !           124: #define        UTER_RMR        0x0004          /* register modification refused */
        !           125: #define        UTER_RPE        0x0008          /* read data parity error */
        !           126: #define        UTER_FMT        0x0010          /* format error */
        !           127: #define        UTER_DPAR       0x0020          /* data bus parity error */
        !           128: #define        UTER_INC        0x0040          /* incorrectable data */
        !           129: #define        UTER_PEF        0x0080          /* PE format error */
        !           130: #define        UTER_NSG        0x0100          /* non standard gap */
        !           131: #define        UTER_FCE        0x0200          /* frame count error */
        !           132: #define        UTER_CS         0x0400          /* correctable skew */
        !           133: #define        UTER_NEF        0x0800          /* non executable function */
        !           134: #define        UTER_DTE        0x1000          /* drive timing error */
        !           135: #define        UTER_OPI        0x2000          /* operation incomplete */
        !           136: #define        UTER_UNS        0x4000          /* unsafe */
        !           137: #define        UTER_COR        0x8000          /* correctible data error */
        !           138: 
        !           139: /*
        !           140:  * These errors we consider "hard"; UTER_OPI and UTER_RPE
        !           141:  * are considered "soft", at least for the moment.
        !           142:  */
        !           143: #define        UTER_HARD       (UTER_UNS|UTER_NEF|UTER_DPAR|UTER_FMT|UTER_RMR|\
        !           144:                         UTER_ILR|UTER_ILF)
        !           145: 
        !           146: #define        UTER_BITS \
        !           147: "\10\20COR\17UNS\16OPI\15DTE\14NEF\13CS\12FCE\11NSG\10PEF\7INC\6DPAR\5FMT\4RPE\3RMR\2ILR\1ILF"
        !           148: 
        !           149: /*
        !           150:  * uttc --
        !           151:  *   tape format and density
        !           152:  */
        !           153: /* bits 0-2 are slave select */
        !           154: #define        UTTC_EVPAR      0x0008          /* even parity */
        !           155: #define        UTTC_FMT        0x00f0          /* format select (see below) */
        !           156: #define        UTTC_DEN        0x0700          /* density select (see below) */
        !           157: /* bit 11 not used */
        !           158: #define        UTTC_EAODTE     0x1000          /* (not emulated) */
        !           159: #define        UTTC_TCW        0x2000          /* tape control write */
        !           160: #define        UTTC_FCS        0x4000          /* frame count status */
        !           161: #define        UTTC_ACCL       0x8000          /* acceleration */
        !           162: 
        !           163: /* the bits to stuff in UTTC_DEN */
        !           164: #define        UT_NRZI         0x0000          /* 800 bpi code */
        !           165: #define        UT_PE           0x0400          /* 1600 bpi code */
        !           166: #define        UT_GCR          0x0500          /* 6250 bpi code */
        !           167: 
        !           168: /* tape formats - only PDP-11 standard is supported */
        !           169: #define        PDP11FMT        0x00c0          /* PDP-11 standard */
        !           170: 
        !           171: #define        b_repcnt  b_bcount
        !           172: #define        b_command b_resid
        !           173: #define        b_state   b_active  

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