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1.1 root 1: /*
2: * Include file for HCX Disk Controller (HDC).
3: *
4: * %W% (Berkeley) %G%
5: */
6:
7: #define HDC_READ 0
8: #define HDC_WRITE 1
9: #define HID_HDC 0x01 /* hvme_id for HDC */
10: #define HDC_MID HID_HDC /* module id code for hdc's */
11: #define HDC_MAXBUS 2 /* max# buses */
12: #define HDC_DEFBUS 1 /* we only handle bus #1 */
13: #define HDC_MAXCTLR 21 /* max# hdc controllers per bus */
14: #define HDC_MAXDRIVE 4 /* max# drives per hdc controller */
15: #define HDC_UNIT(x) (minor(x)>>3) /* the hdc unit number (0-31) */
16: #define HDC_PART(x) (minor(x)&0x07) /* the hdc partition number (0-7) */
17: #define HDC_SPB 2 /* sectors per block for hdc's */
18: #define HDC_REMOVABLE 80 /* lowest model# for removable disks */
19: #define HDC_PHIO_SIZE 256 /* lword size of physical io buffer */
20: #define HDC_VDATA_SIZE 16 /* vendor data size (long words) */
21: #define HDC_MAXCHAIN 33 /* maximum number of data chains */
22: #define HDC_MAXBC 64*1024 /* maximum byte count per data chain */
23: #define HDC_MAXMCBS 32 /* max# mcb's the hdc can handle */
24: #define HDC_MAXFLAWS 8000 /* max number of flaws per hdc disk */
25: /* io to an hdc register */
26: #define HDC_REGISTER(x) (hc->registers->x)
27: /* number of blocks per dump record */
28: #define HDC_DUMPSIZE (HDC_MAXBC/DEV_BSIZE*HDC_MAXCHAIN)
29:
30: /*
31: * The following buf structure defines are used by the hdc handler. These
32: * are required since the handler initiates strategy calls; these calls
33: * require more function codes than just read/write, and they like to
34: * directly specify the cyl/head/sector. Note that b_upte and B_NOT1K are
35: * never used by the handler.
36: */
37: #define B_LOCALIO B_NOT1K
38: #define b_hdccommand b_upte[0]
39: #define b_cyl b_upte[1]
40: #define b_head b_upte[2]
41: #define b_sector b_upte[3]
42:
43: /*
44: * These are the 4 hdc i/o register addresses.
45: *
46: * Writing to "master_mcb_reg" tells the hdc controller where the master
47: * mcb is and initiates hdc operation. The hdc then reads the master mcb
48: * and all new mcb's in the active mcb queue.
49: *
50: * Writing to "module_id_reg" causes the hdc to return the hdc's module id
51: * word in the location specified by the address written into the register.
52: */
53: typedef struct {
54: u_long master_mcb_reg, /* set the master mcb address */
55: module_id_reg, /* returns hdc's module id (hdc_mid) */
56: soft_reset_reg, /* a write here shuts down the hdc */
57: hard_reset_reg; /* send a system reset to the hdc */
58: } hdc_regs_type;
59:
60: /*
61: * Definition for the module id returned by the hdc when "module_id_reg"
62: * is written to. The format is defined by the hdc microcode.
63: */
64: typedef struct {
65: u_char module_id, /* module id; hdc's return HDC_MID */
66: reserved,
67: code_rev, /* micro-code rev#; FF= not loaded */
68: fit; /* FIT test result; FF= no error */
69: } hdc_mid_type;
70:
71: /*
72: * This structure defines the mcb's. A portion of this structure is
73: * used only by the software. The other portion is set up by software
74: * and sent to the hdc firmware to perform an operation; the order
75: * of this part of the mcb is determined by the controller firmware.
76: *
77: * "forw_mcb" and "back_mcb" form a doubly-linked list of mcb's.
78: *
79: * "context" is the software context word. The hdc firmware copies the
80: * the contents of this word to the master mcb whenever the mcb has been
81: * completed. Currently the virtual address of the mcb is saved here.
82: *
83: * "forw_phaddr" forms a linked list of mcbs. The addresses are physical
84: * since they are used by the hdc firmware.
85: *
86: * Bits in device control word #1 define the hdc command and
87: * control the operation of the hdc.
88: *
89: * Bits in device control word #2 define the disk sector address
90: * for the operation defined in dcw1.
91: */
92: typedef struct {
93: long lwc, /* long word count & data chain bit */
94: ta; /* transfer address */
95: } data_chain_type;
96:
97: #define LWC_DATA_CHAIN 0x80000000 /* mask for data chain bit in lwc */
98:
99: typedef struct {
100: struct mcb_struct /* this part used only by software */
101: *forw_mcb, /* pointer to next mcb in chain */
102: *back_mcb; /* pointer to previous mcb in chain */
103: struct buf *buf_ptr; /* ptr to buf structure for this mcb */
104: long mcb_phaddr; /* phaddr of hw's part of this mcb */
105:
106: /* this part is sent to the hdc hw */
107: u_long forw_phaddr; /* phys address of next mcb */
108: u_int priority : 8, /* device control word #1 */
109: interrupt : 1, /* " */
110: drive : 7, /* " */
111: command : 16, /* " (see HCMD_) */
112: cyl : 13, /* device control word #2 */
113: head : 9, /* " */
114: sector : 10; /* " */
115: u_long reserved[2],
116: context; /* software context word */
117: /* data chain and lword count */
118: data_chain_type chain[HDC_MAXCHAIN];
119: } mcb_type;
120:
121: /* defines for the "command"s */
122: #define HCMD_STATUS 0x40 /* command: read drive status */
123: #define HCMD_READ 0x60 /* command: read data */
124: #define HCMD_VENDOR 0x6a /* command: read vendor data */
125: #define HCMD_VERIFY 0x6d /* command: verify a track */
126: #define HCMD_WRITE 0x70 /* command: write data */
127: #define HCMD_FORMAT 0x7e /* command: format a track */
128: #define HCMD_CERTIFY 0x7f /* command: certify a track */
129: #define HCMD_WCS 0xd0 /* command: write control store */
130:
131: /*
132: * This structure defines the master mcb - one per hdc controller.
133: * The order of this structure is determined by the controller firmware.
134: * "R" and "W" indicate read-only and write-only.
135: *
136: * Bits in the module control long word, "mcl", control the invocation of
137: * operations on the hdc.
138: *
139: * The hdc operates in queued mode or immediate mode. In queued mode, it
140: * grabs new mcb's, prioritizes them, and adds them to its queue; it knows
141: * if we've added any mcb's by checking forw_phaddr to see if any are
142: * linked off of there.
143: *
144: * Bits in the master mcb's status word, "mcs", indicate the status
145: * of the last-processed mcb. The MCS_ definitions define these bits.
146: * This word is set to zero when the mcb queue is passed to the hdc
147: * controller; the hdc controller then sets bits in this word.
148: * We cannot modify the mcb queue until the hdc has completed an mcb
149: * (the hdc sets the MCS_Q_DONE bit).
150: *
151: * The "context" word is copied from the context word of the completed
152: * mcb. It is currently the virtual pointer to the completed mcb.
153: */
154: typedef struct {
155: u_long mcl, /* W module control lword (MCL_) */
156: interrupt, /* W interrupt acknowledge word */
157: forw_phaddr, /* W physical address of first mcb */
158: reserve1, reserve2,
159: mcs, /* R status for last completed mcb */
160: cmcb_phaddr, /* W physical addr of completed mcb */
161: context, /* R software context word */
162: #define HDC_XSTAT_SIZE 128 /* size of extended status (lwords) */
163: xstatus[HDC_XSTAT_SIZE];/* R xstatus of last mcb */
164: } master_mcb_type;
165:
166: /* definition of master mcb "mcl" */
167: #define MCL_QUEUED 0x00000010 /* start queued execution of mcb's */
168: #define MCL_IMMEDIATE 0x00000001 /* start immediate xqt of an mcb */
169:
170: /* definition of master mcb "mcs" */
171: #define MCS_DONE 0x00000080 /* an mcb is done; status is valid */
172: #define MCS_FATALERROR 0x00000002 /* a fatal error occurred */
173: #define MCS_SOFTERROR 0x00000001 /* a recoverable error occurred */
174:
175: /*
176: * This structure defines the information returned by the hdc controller for
177: * a "read drive status" (HCMD_STATUS) command. The format of this structure
178: * is determined by the hdc firmware. r[1-11] are reserved for future use.
179: */
180: typedef struct {
181: u_long drs, /* drive status (see DRS_ below) */
182: r1, r2, r3;
183: u_short max_cyl, /* max logical cylinder address */
184: max_head, /* max logical head address */
185: r4,
186: max_sector, /* max logical sector address */
187: def_cyl, /* definition track cylinder address */
188: def_cyl_count, /* definition track cylinder count */
189: diag_cyl, /* diagnostic track cylinder address */
190: diag_cyl_count, /* diagnostic track cylinder count */
191: max_phys_cyl, /* max physical cylinder address */
192: max_phys_head, /* max physical head address */
193: r5,
194: max_phys_sector, /* max physical sector address */
195: r6,
196: id, /* drive id (drive model) */
197: r7,
198: bytes_per_sec, /* bytes/sector -vendorflaw conversn */
199: r8,
200: rpm; /* disk revolutions per minute */
201: u_long r9, r10, r11;
202: } drive_stat_type;
203:
204: /* defines for drive_stat drs word */
205: #define DRS_FAULT 0x00000080 /* drive is reporting a fault */
206: #define DRS_RESERVED 0x00000040 /* drive is reserved by other port */
207: #define DRS_WRITE_PROT 0x00000020 /* drive is write protected */
208: #define DRS_ON_CYLINDER 0x00000002 /* drive heads are not moving now */
209: #define DRS_ONLINE 0x00000001 /* drive is available for operation */
210:
211: #ifdef COMPAT_42
212: #define GB_ID "geometry"
213: #define GB_ID_LEN sizeof(GB_ID)-1
214: #define GB_MAXPART 8
215: #define GB_VERSION 1
216:
217: #define HDC_DEFPART GB_MAXPART-1 /* partition# of def and diag cyls */
218: #define BPS 512 /* bytes per sector */
219:
220: /*
221: * Geometry Block:
222: *
223: * The geometry block defines partition offsets and information about the
224: * flaw maps on the flaw map track. It resides on the first sector of the
225: * flaw map track. This structure is also used by vddc disk controllers.
226: * In this case, the block resides at sector 0 of the disk.
227: *
228: * The geometry_sector structure defines the sector containing the geometry
229: * block. This sector is checksumed independent of the geometry information.
230: * The fields in these structured which should never be moved are the id and
231: * version fields in the geometry_block structure and the checksum field in
232: * the geometry_sector structure. This will provide for easy extensions in
233: * the future.
234: */
235:
236: #define DRIVE_TYPE flaw_offset /* For VDDC Geometry Blocks Only */
237:
238: /* partition Definition structure */
239: typedef struct {
240: long start, /* starting 1K block number for partition */
241: length; /* partition size in 1K blocks */
242: } par_tab;
243:
244: typedef struct {
245: char id[GB_ID_LEN]; /* identifies the geometry block */
246: long version, /* geometry block version number */
247: flaw_offset, /* flaw map byte offset in partition7 */
248: flaw_size, /* harris flaw map size in bytes */
249: flaw_checksum, /* sum of bytes in harris flaw map */
250: unused[3]; /* --- available for use */
251: par_tab partition[GB_MAXPART]; /* partition definitions */
252: } geometry_block;
253:
254: typedef struct {
255: geometry_block geometry_block; /* disk geometry */
256: char filler[BPS - sizeof(geometry_block) - sizeof(long)];
257: long checksum; /* sector checksum */
258: } geometry_sector;
259:
260: /*
261: * GB_CHECKSUM:
262: *
263: * This macro computes the checksum for the geometry sector and returns the
264: * value. Input to this macro is a pointer to the geometry_sector.
265: */
266: #define GB_CHECKSUM(_gs_ptr, _checksum) { \
267: register u_char *_ptr; \
268: register u_long _i, _xsum; \
269: _xsum = 0; \
270: _ptr = (u_char *)(_gs_ptr); \
271: for (_i = 0; _i < (sizeof(geometry_sector) - sizeof(long)); _i++) \
272: _xsum += * _ptr++; \
273: _checksum = _xsum; \
274: }
275: #endif /* COMPAT_42 */
276:
277: /* hdc controller structure */
278: typedef struct {
279: int ctlr; /* controller number (0-15) */
280: hdc_regs_type *registers; /* base address of hdc io registers */
281: #ifdef HDC_STANDALONE
282: hdc_mid_type mid; /* the module id is read to here */
283: master_mcb_type master_mcb; /* the master mcb for this hdc */
284: mcb_type mcb; /* mcb for this hdc */
285: #else
286: mcb_type *forw_active, /* doubly linked list of */
287: *back_active, /* .. active mcb's */
288: *forw_free, /* doubly linked list of */
289: *back_free, /* .. free mcb's */
290: *forw_wait, /* doubly linked list of */
291: *back_wait; /* .. waiting mcb's */
292: hdc_mid_type mid; /* the module id is read to here */
293: long master_phaddr; /* physical address of master mcb */
294: master_mcb_type master_mcb; /* the master mcb for this hdc */
295: mcb_type mcbs[HDC_MAXMCBS];/* pool of mcb's for this hdc */
296: #endif
297: } hdc_ctlr_type;
298:
299: /*
300: * hdc unit table. It contains information specific to each hdc drive.
301: * Some information is obtained from the profile prom and geometry block.
302: */
303: typedef struct {
304: #ifdef COMPAT_42
305: par_tab partition[GB_MAXPART]; /* partition definitions */
306: #endif
307: struct disklabel dklabel; /* pack label */
308: int ctlr, /* the controller number (0-15) */
309: slave, /* the slave number (0-4) */
310: unit, /* the unit number (0-31) */
311: id, /* identifies the disk model */
312: spc, /* sectors per cylinder */
313: cylinders, /* number of logical cylinders */
314: heads, /* number of logical heads */
315: sectors, /* number of logical sectors/track */
316: phys_cylinders, /* number of physical cylinders */
317: phys_heads, /* number of physical heads */
318: phys_sectors, /* number of physical sectors/track */
319: def_cyl, /* logical cylinder of drive def */
320: def_cyl_count, /* number of logical def cylinders */
321: diag_cyl, /* logical cylinder of diag area */
322: diag_cyl_count, /* number of logical diag cylinders */
323: rpm, /* disk rpm */
324: bytes_per_sec, /* bytes/sector -vendorflaw conversn */
325: format; /* TRUE= format program is using dsk */
326: #ifndef HDC_STANDALONE
327: mcb_type phio_mcb; /* mcb for handler physical io */
328: struct buf phio_buf; /* buf for handler physical io */
329: #endif
330: /* data for physical io */
331: u_long phio_data[HDC_PHIO_SIZE];
332: #ifndef HDC_STANDALONE
333: struct buf raw_buf; /* buf structure for raw i/o */
334: #endif
335: } hdc_unit_type;
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