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1.1 root 1: /*
2: * Copyright (c) 1982, 1986 Regents of the University of California.
3: * All rights reserved. The Berkeley software License Agreement
4: * specifies the terms and conditions for redistribution.
5: *
6: * @(#)scb.s 7.4 (Berkeley) 5/14/88
7: */
8:
9: #include "uba.h"
10:
11: /*
12: * System control block
13: */
14: .set INTSTK,1 # handle this interrupt on the interrupt stack
15: .set HALT,3 # halt if this interrupt occurs
16:
17: _scb: .globl _scb
18:
19: #define KS(a) .long _X/**/a
20: #define IS(a) .long _X/**/a+INTSTK
21: #define STOP(a) .long _X/**/a+HALT
22:
23: #define STRAY(x) .long _scbstray+2*(x)+INTSTK
24: #define STRAY3(n) STRAY(n);STRAY(n+4);STRAY(n+8)
25: #define STRAY4(n) STRAY3(n);STRAY(n+12)
26: #define STRAY15(n) STRAY4(n);STRAY4(n+16);STRAY4(n+32);STRAY3(n+48)
27: #define STRAY16(n) STRAY15(n);STRAY(n+60)
28: #define NEX0(n) IS(nex0zvec);STRAY15(n+4)
29: #define NEX1(n) IS(nex1zvec);STRAY15(n+4)
30:
31: /* 000 */ IS(passiverel); IS(machcheck); IS(kspnotval); STOP(powfail);
32: /* 010 */ KS(privinflt); KS(xfcflt); KS(resopflt); KS(resadflt);
33: /* 020 */ KS(protflt); KS(transflt); KS(tracep); KS(bptflt);
34: /* 030 */ KS(compatflt); KS(arithtrap); STRAY(0x38); STRAY(0x3c);
35: /* 040 */ KS(syscall); KS(chme); KS(chms); KS(chmu);
36: /* 050 */ IS(sbisilo); IS(cmrd); IS(sbi0alert); IS(sbi0fault);
37: /* 060 */ IS(wtime); IS(sbi0fail); STRAY(0x68); STRAY(0x6c);
38: /* 070 */ STRAY(0x70); STRAY(0x74); STRAY(0x78); STRAY(0x7c);
39: /* 080 */ STRAY(0x80); STRAY(0x84); KS(astflt); STRAY(0x8c);
40: /* 090 */ STRAY(0x90); STRAY(0x94); STRAY(0x98); STRAY(0x9c);
41: /* 0a0 */ IS(softclock); STRAY(0xa4); STRAY(0xa8); STRAY(0xac);
42: /* 0b0 */ IS(netintr); STRAY(0xb4); STRAY(0xb8); IS(kdbintr);
43: /* 0c0 */ IS(hardclock); STRAY(0xc4); KS(emulate); KS(emulateFPD);
44: /* 0d0 */ STRAY(0xd0); STRAY(0xd4); STRAY(0xd8); STRAY(0xdc);
45: /* 0e0 */ STRAY(0xe0); STRAY(0xe4); STRAY(0xe8); STRAY(0xec);
46: /* 0f0 */ IS(consdin); IS(consdout); IS(cnrint); IS(cnxint);
47: /* 100 */ NEX0(0x100); /* ipl 0x14, nexus 0-15 */
48: /* 140 */ NEX0(0x140); /* ipl 0x15, nexus 0-15 */
49: /* 180 */ NEX0(0x180); /* ipl 0x16, nexus 0-15 */
50: /* 1c0 */ NEX0(0x1c0); /* ipl 0x17, nexus 0-15 */
51:
52: /*
53: * 750 hardware reads through UNIvec (scb + 512 bytes) to find Unibus
54: * interrupt vectors. 780s use this space as a jump table (lookup
55: * code in locore.s makes 780s work like 750s). Additional pages
56: * of interrupt vectors for additional UBAs follow immediately.
57: *
58: * 8600s may use the next page as a second SCB, for which purpose we init
59: * it here. Everything else will simply replace these with Unibus vectors.
60: * An additional page is provided for UBA jump tables if the second
61: * scb might be present. Other CPUs with additional scbs should expand
62: * this area as needed.
63: */
64: .globl _UNIvec
65: .globl _eUNIvec
66: _UNIvec:
67: #if VAX8600
68: /* 200 */ STRAY16(0x200); /* unused (?) */
69: /* 240 */ STRAY16(0x240); /* sbi1fail etc. set at boot time */
70: /* 280 */ STRAY16(0x280); /* unused (?) */
71: /* 2c0 */ STRAY16(0x2c0); /* unused (?) */
72: /* 300 */ NEX1(0x300); /* ipl 0x14, nexus 0-15, sbia 1 */
73: /* 340 */ NEX1(0x340); /* ipl 0x15, nexus 0-15, sbia 1 */
74: /* 380 */ NEX1(0x380); /* ipl 0x16, nexus 0-15, sbia 1 */
75: /* 3c0 */ NEX1(0x3c0); /* ipl 0x17, nexus 0-15, sbia 1 */
76:
77: #endif
78: #if NUBA > 0
79: .space 512*NUBA # 750 first/second unibus intr vector
80: # UBA jump tables on 780's
81: #endif
82: _eUNIvec:
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