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1.1 ! root 1: /* ! 2: * Copyright (c) 1988 Regents of the University of California. ! 3: * All rights reserved. ! 4: * ! 5: * This code is derived from software contributed to Berkeley by ! 6: * Chris Torek. ! 7: * ! 8: * Redistribution and use in source and binary forms are permitted ! 9: * provided that the above copyright notice and this paragraph are ! 10: * duplicated in all such forms and that any documentation, ! 11: * advertising materials, and other materials related to such ! 12: * distribution and use acknowledge that the software was developed ! 13: * by the University of California, Berkeley. The name of the ! 14: * University may not be used to endorse or promote products derived ! 15: * from this software without specific prior written permission. ! 16: * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR ! 17: * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED ! 18: * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. ! 19: * ! 20: * @(#)bireg.h 7.2 (Berkeley) 7/9/88 ! 21: */ ! 22: ! 23: /* ! 24: * VAXBI node definitions. ! 25: */ ! 26: ! 27: /* ! 28: * BI node addresses ! 29: */ ! 30: #define BI_BASE(bi) ((struct bi_node *) (0x20000000 + (bi)*0x2000000)) ! 31: #define NNODEBI 16 /* 16 nodes per BI */ ! 32: /* `local space' 0x20800000 /* ??? */ ! 33: ! 34: #ifndef LOCORE ! 35: /* ! 36: * BI nodes all start with BI interface registers (those on the BIIC chip). ! 37: * These are followed with interface-specific registers. ! 38: * ! 39: * NB: This structure does NOT include the four GPRs (not anymore!) ! 40: */ ! 41: struct biiregs { ! 42: u_short bi_dtype; /* device type */ ! 43: u_short bi_revs; /* revisions */ ! 44: u_long bi_csr; /* control and status register */ ! 45: u_long bi_ber; /* bus error register */ ! 46: u_long bi_eintrcsr; /* error interrupt control register */ ! 47: u_long bi_intrdes; /* interrupt destination register */ ! 48: /* the rest are not required for all nodes */ ! 49: u_long bi_ipintrmsk; /* IP interrupt mask register */ ! 50: u_long bi_fipsdes; /* Force-Bit IPINTR/STOP destination reg */ ! 51: u_long bi_ipintrsrc; /* IPINTR source register */ ! 52: u_long bi_sadr; /* starting address register */ ! 53: u_long bi_eadr; /* ending address register */ ! 54: u_long bi_bcicsr; /* BCI control and status register */ ! 55: u_long bi_wstat; /* write status register */ ! 56: u_long bi_fipscmd; /* Force-Bit IPINTR/STOP command reg */ ! 57: u_long bi_xxx1[3]; /* unused */ ! 58: u_long bi_uintrcsr; /* user interface interrupt control reg */ ! 59: u_long bi_xxx2[43]; /* unused */ ! 60: /* although these are on the BIIC, their interpretation varies */ ! 61: /* u_long bi_gpr[4]; /* general purpose registers */ ! 62: }; ! 63: ! 64: /* ! 65: * A generic BI node. ! 66: */ ! 67: struct bi_node { ! 68: struct biiregs biic; /* interface */ ! 69: u_long bi_xxx[1988]; /* pad to 8K */ ! 70: }; ! 71: ! 72: /* ! 73: * A cpu node. ! 74: */ ! 75: struct bi_cpu { ! 76: struct biiregs biic; /* interface chip */ ! 77: u_long bi_gpr[4]; /* gprs (unused) */ ! 78: u_long bi_sosr; /* slave only status register */ ! 79: u_long bi_xxx[63]; /* pad */ ! 80: u_long bi_rxcd; /* receive console data register */ ! 81: }; ! 82: #endif LOCORE ! 83: ! 84: /* device types */ ! 85: #define BIDT_MS820 0x0001 /* MS820 memory board */ ! 86: #define BIDT_DWBUA 0x0102 /* DWBUA Unibus adapter */ ! 87: #define BIDT_KLESI 0x0103 /* KLESI-B adapter */ ! 88: #define BIDT_KA820 0x0105 /* KA820 cpu */ ! 89: #define BIDT_DB88 0x0106 /* DB88 adapter */ ! 90: #define BIDT_DMB32 0x0109 /* DMB32 adapter */ ! 91: #define BIDT_KDB50 0x010e /* KDB50 disk controller */ ! 92: #define BIDT_DEBNK 0x410e /* BI Ethernet (Lance) + TK50 */ ! 93: #define BIDT_DEBNA 0x410f /* BI Ethernet (Lance) adapter */ ! 94: ! 95: #ifdef notdef /* CPU (KA820) bits in bi_revs */ ! 96: #define BI_CPUREV(x) (((x) >> 11)) /* CPU revision code */ ! 97: #define BI_UPATCHREV(x) (((x) >> 1) & 0x3ff) /* microcode patch rev */ ! 98: #define BI_SPATCHREV(x) (((x) & 1) /* secondary patch rev */ ! 99: #endif ! 100: ! 101: /* bits in bi_csr */ ! 102: #define BICSR_IREV(x) ((u_char)((x) >> 24)) /* VAXBI interface rev */ ! 103: #define BICSR_TYPE(x) ((u_char)((x) >> 16)) /* BIIC type */ ! 104: #define BICSR_HES 0x8000 /* hard error summary */ ! 105: #define BICSR_SES 0x4000 /* soft error summary */ ! 106: #define BICSR_INIT 0x2000 /* initialise node */ ! 107: #define BICSR_BROKE 0x1000 /* broke */ ! 108: #define BICSR_STS 0x0800 /* self test status */ ! 109: #define BICSR_NRST 0x0400 /* node reset */ ! 110: #define BICSR_UWP 0x0100 /* unlock write pending */ ! 111: #define BICSR_HEIE 0x0080 /* hard error interrupt enable */ ! 112: #define BICSR_SEIE 0x0040 /* soft error interrupt enable */ ! 113: #define BICSR_ARB_MASK 0x0030 /* mask to get arbitration codes */ ! 114: #define BICSR_ARB_NONE 0x0030 /* no arbitration */ ! 115: #define BICSR_ARB_LOG 0x0020 /* low priority */ ! 116: #define BICSR_ARB_HIGH 0x0010 /* high priority */ ! 117: #define BICSR_ARB_RR 0x0000 /* round robin */ ! 118: #define BICSR_NODEMASK 0x000f /* node ID */ ! 119: ! 120: #define BICSR_BITS \ ! 121: "\20\20HES\17SES\16INIT\15BROKE\14STS\13NRST\11UWP\10HEIE\7SEIE" ! 122: ! 123: /* bits in bi_ber */ ! 124: #define BIBER_MBZ 0x8000fff0 ! 125: #define BIBER_NMR 0x40000000 /* no ack to multi-responder command */ ! 126: #define BIBER_MTCE 0x20000000 /* master transmit check error */ ! 127: #define BIBER_CTE 0x10000000 /* control transmit error */ ! 128: #define BIBER_MPE 0x08000000 /* master parity error */ ! 129: #define BIBER_ISE 0x04000000 /* interlock sequence error */ ! 130: #define BIBER_TDF 0x02000000 /* transmitter during fault */ ! 131: #define BIBER_IVE 0x01000000 /* ident vector error */ ! 132: #define BIBER_CPE 0x00800000 /* command parity error */ ! 133: #define BIBER_SPE 0x00400000 /* slave parity error */ ! 134: #define BIBER_RDS 0x00200000 /* read data substitute */ ! 135: #define BIBER_RTO 0x00100000 /* retry timeout */ ! 136: #define BIBER_STO 0x00080000 /* stall timeout */ ! 137: #define BIBER_BTO 0x00040000 /* bus timeout */ ! 138: #define BIBER_NEX 0x00020000 /* nonexistent address */ ! 139: #define BIBER_ICE 0x00010000 /* illegal confirmation error */ ! 140: #define BIBER_UPEN 0x00000008 /* user parity enable */ ! 141: #define BIBER_IPE 0x00000004 /* ID parity error */ ! 142: #define BIBER_CRD 0x00000002 /* corrected read data */ ! 143: #define BIBER_NPE 0x00000001 /* null bus parity error */ ! 144: #define BIBER_HARD 0x4fff0000 ! 145: ! 146: #define BIBER_BITS \ ! 147: "\20\37NMR\36MTCE\35CTE\34MPE\33ISE\32TDF\31IVE\30CPE\ ! 148: \27SPE\26RDS\25RTO\24STO\23BTO\22NEX\21ICE\4UPEN\3IPE\2CRD\1NPE" ! 149: ! 150: /* bits in bi_eintrcsr */ ! 151: #define BIEIC_INTRAB 0x01000000 /* interrupt abort */ ! 152: #define BIEIC_INTRC 0x00800000 /* interrupt complete */ ! 153: #define BIEIC_INTRSENT 0x00200000 /* interrupt command sent */ ! 154: #define BIEIC_INTRFORCE 0x00100000 /* interrupt force */ ! 155: #define BIEIC_LEVELMASK 0x000f0000 /* mask for interrupt levels */ ! 156: #define BIEIC_IPL17 0x00080000 /* ipl 0x17 */ ! 157: #define BIEIC_IPL16 0x00040000 /* ipl 0x16 */ ! 158: #define BIEIC_IPL15 0x00020000 /* ipl 0x15 */ ! 159: #define BIEIC_IPL14 0x00010000 /* ipl 0x14 */ ! 160: #define BIEIC_VECMASK 0x00003ffc /* vector mask for error intr */ ! 161: ! 162: /* bits in bi_intrdes */ ! 163: #define BIDEST_MASK 0x0000ffff /* one bit per node to be intr'ed */ ! 164: ! 165: /* bits in bi_ipintrmsk */ ! 166: #define BIIPINTR_MASK 0xffff0000 /* one per node to allow to ipintr */ ! 167: ! 168: /* bits in bi_fipsdes */ ! 169: #define BIFIPSD_MASK 0x0000ffff ! 170: ! 171: /* bits in bi_ipintrsrc */ ! 172: #define BIIPSRC_MASK 0xffff0000 ! 173: ! 174: /* sadr and eadr are simple addresses */ ! 175: ! 176: /* bits in bi_bcicsr */ ! 177: #define BCI_BURSTEN 0x00020000 /* burst mode enable */ ! 178: #define BCI_IPSTOP_FRC 0x00010000 /* ipintr/stop force */ ! 179: #define BCI_MCASTEN 0x00008000 /* multicast space enable */ ! 180: #define BCI_BCASTEN 0x00004000 /* broadcast enable */ ! 181: #define BCI_STOPEN 0x00002000 /* stop enable */ ! 182: #define BCI_RSRVDEN 0x00001000 /* reserved enable */ ! 183: #define BCI_IDENTEN 0x00000800 /* ident enable */ ! 184: #define BCI_INVALEN 0x00000400 /* inval enable */ ! 185: #define BCI_WINVEN 0x00000200 /* write invalidate enable */ ! 186: #define BCI_UINTEN 0x00000100 /* user interface csr space enable */ ! 187: #define BCI_BIICEN 0x00000080 /* BIIC csr space enable */ ! 188: #define BCI_INTEN 0x00000040 /* interrupt enable */ ! 189: #define BCI_IPINTEN 0x00000020 /* ipintr enable */ ! 190: #define BCI_PIPEEN 0x00000010 /* pipeline NXT enable */ ! 191: #define BCI_RTOEVEN 0x00000008 /* read timeout EV enable */ ! 192: ! 193: #define BCI_BITS \ ! 194: "\20\22BURSTEN\21IPSTOP_FRC\20MCASTEN\ ! 195: \17BCASTEN\16STOPEN\15RSRVDEN\14IDENTEN\13INVALEN\12WINVEN\11UINTEN\ ! 196: \10BIICEN\7INTEN\6IPINTEN\5PIPEEN\4RTOEVEN" ! 197: ! 198: /* bits in bi_wstat */ ! 199: #define BIW_GPR3 0x80000000 /* gpr 3 was written */ ! 200: #define BIW_GPR2 0x40000000 /* gpr 2 was written */ ! 201: #define BIW_GPR1 0x20000000 /* gpr 1 was written */ ! 202: #define BIW_GPR0 0x10000000 /* gpr 0 was written */ ! 203: ! 204: /* bits in force-bit ipintr/stop command register 8/ ! 205: #define BIFIPSC_CMDMASK 0x0000f000 /* command */ ! 206: #define BIFIPSC_MIDEN 0x00000800 /* master ID enable */ ! 207: ! 208: /* bits in bi_uintcsr */ ! 209: #define BIUI_INTAB 0xf0000000 /* interrupt abort level */ ! 210: #define BIUI_INTC 0x0f000000 /* interrupt complete bits */ ! 211: #define BIUI_SENT 0x00f00000 /* interrupt sent bits */ ! 212: #define BIUI_FORCE 0x000f0000 /* force interrupt level */ ! 213: #define BIUI_EVECEN 0x00008000 /* external vector enable */ ! 214: #define BIUI_VEC 0x00003ffc /* interrupt vector */ ! 215: ! 216: /* tell if a bi device is a slave (hence has SOSR) */ ! 217: #define BIDT_ISSLAVE(x) (((x) & 0x7f00) == 0) ! 218: ! 219: /* bits in bi_sosr */ ! 220: #define BISOSR_MEMSIZE 0x1ffc0000 /* memory size */ ! 221: #define BISOSR_BROKE 0x00001000 /* broke */ ! 222: ! 223: /* bits in bi_rxcd */ ! 224: #define BIRXCD_BUSY2 0x80000000 /* busy 2 */ ! 225: #define BIRXCD_NODE2 0x0f000000 /* node id 2 */ ! 226: #define BIRXCD_CHAR2 0x00ff0000 /* character 2 */ ! 227: #define BIRXCD_BUSY1 0x00008000 /* busy 1 */ ! 228: #define BIRXCD_NODE1 0x00000f00 /* node id 1 */ ! 229: #define BIRXCD_CHAR1 0x000000ff /* character 1 */
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