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Annotation of 43BSDTahoe/sys/vaxbi/nireg.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * Copyright (c) 1988 Regents of the University of California.
                      3:  * All rights reserved.
                      4:  *
                      5:  * This code is derived from software contributed to Berkeley by
                      6:  * Chris Torek.
                      7:  *
                      8:  * Redistribution and use in source and binary forms are permitted
                      9:  * provided that the above copyright notice and this paragraph are
                     10:  * duplicated in all such forms and that any documentation,
                     11:  * advertising materials, and other materials related to such
                     12:  * distribution and use acknowledge that the software was developed
                     13:  * by the University of California, Berkeley.  The name of the
                     14:  * University may not be used to endorse or promote products derived
                     15:  * from this software without specific prior written permission.
                     16:  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
                     17:  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
                     18:  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
                     19:  *
                     20:  *     @(#)nireg.h     7.2 (Berkeley) 7/9/88
                     21:  */
                     22: 
                     23: /*
                     24:  * Registers for the DEBNA and DEBNK Ethernet interfaces
                     25:  * (DEC calls these Network Interfaces, hence nireg.h)
                     26:  */
                     27: 
                     28: /*
                     29:  * this seems to be intended to be more general, but I have no details,
                     30:  * so it goes here for now
                     31:  *
                     32:  * BI Vax Port (BVP) stuff first:
                     33:  */
                     34: struct bvpregs {
                     35:        u_long  p_pcr;          /* port control register */
                     36:        u_long  p_psr;          /* port status register */
                     37:        u_long  p_per;          /* port error register */
                     38:        u_long  p_pdr;          /* port data register */
                     39: };
                     40: 
                     41: /*
                     42:  * BI node space registers
                     43:  */
                     44: struct ni_regs {
                     45:        struct  biiregs ni_bi;  /* BIIC registers, except GPRs */
                     46:        struct  bvpregs ni_tkp; /* tk50 port control via BIIC GPRs */
                     47:        u_long  ni_xxx[64];     /* unused */
                     48:        u_long  ni_rxcd;        /* receive console data */
                     49:        struct  bvpregs ni_nip; /* NI port control via BCI3 GPRs */
                     50:        u_long  ni_pudr;        /* power-up diagnostic register */
                     51: };
                     52: 
                     53: /* bits in ni_pudr */
                     54: #define        PUDR_TAPE       0x40000000      /* tk50 & assoc logic ok */
                     55: #define        PUDR_PATCH      0x20000000      /* patch logic ok */
                     56: #define        PUDR_VRAM       0x10000000      /* DEBNx onboard RAM ok */
                     57: #define        PUDR_VROM1      0x08000000      /* uVax ROM 1 ok */ /* ? */
                     58: #define        PUDR_VROM2      0x04000000      /* uVax ROM 2 ok */
                     59: #define        PUDR_VROM3      0x02000000      /* uVax ROM 3 ok */
                     60: #define        PUDR_VROM4      0x01000000      /* uVax ROM 4 ok */
                     61: #define        PUDR_UVAX       0x00800000      /* uVax passes self test */
                     62: #define        PUDR_BI         0x00400000      /* BIIC and BCI3 chips ok */
                     63: #define        PUDR_TMR        0x00200000      /* interval timer ok */
                     64: #define        PUDR_IRQ        0x00100000      /* no IRQ lines stuck */
                     65: #define        PUDR_NI         0x00080000      /* Ethernet ctlr ok */
                     66: #define        PUDR_TK50       0x00040000      /* tk50 present */
                     67: #define        PUDR_PRES       0x00001000      /* tk50 present (again?!) */
                     68: #define        PUDR_UVINT      0x00000800      /* uVax-to-80186 intr logic ok */
                     69: #define        PUDR_BUSHD      0x00000400      /* no bus hold errors */
                     70: #define        PUDR_II32       0x00000200      /* II32 transceivers ok */
                     71: #define        PUDR_MPSC       0x00000100      /* MPSC logic ok */
                     72: #define        PUDR_GAP        0x00000080      /* gap-detect logic ok */
                     73: #define        PUDR_MISC       0x00000040      /* misc. registers ok */
                     74: #define        PUDR_UNEXP      0x00000020      /* unexpected interrupt trapped */
                     75: #define        PUDR_80186      0x00000010      /* 80186 ok */
                     76: #define        PUDR_PATCH      0x00000008      /* patch logic ok (again) */
                     77: #define        PUDR_8RAM       0x00000004      /* 80186 RAM ok */
                     78: #define        PUDR_8ROM2      0x00000002      /* 80186 ROM1 ok */
                     79: #define        PUDR_8ROM1      0x00000001      /* 80186 ROM2 ok */

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