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1.1 root 1: /*
2: * Copyright (c) 1982, 1986 Regents of the University of California.
3: * All rights reserved. The Berkeley software License Agreement
4: * specifies the terms and conditions for redistribution.
5: *
6: * @(#)if_dmc.h 7.3 (Berkeley) 5/26/88
7: */
8:
9: /*
10: * DMC-11 Interface
11: */
12:
13: struct dmcdevice {
14: char bsel0;
15: char bsel1;
16: char bsel2;
17: char bsel3;
18: short sel4;
19: short sel6;
20: };
21:
22: /*
23: * dmc software packet encapsulation. This allows the dmc
24: * link to be multiplexed among several protocols.
25: * The first eight bytes of the dmc header are garbage,
26: * since on a vax the uba has been known to mung these
27: * bytes. The next two bytes encapsulate packet type.
28: */
29: struct dmc_header {
30: char dmc_buf[8]; /* space for uba on vax */
31: short dmc_type; /* encapsulate packet type */
32: };
33:
34: /* packet types */
35: #define DMC_IPTYPE 1
36: #define DMC_TRAILER 2
37: #define DMC_NTRAILER 16
38:
39: /*
40: * DMCMTU includes space for data (1024) +
41: * protocol header (256) + trailer descriptor (4).
42: * The software link encapsulation header (dmc_header)
43: * is handled separately.
44: #define DMCMTU 1284
45: */
46: #define DMCMTU 1500
47:
48: #define RDYSCAN 16 /* loop delay for RDYI after RQI */
49:
50: /* defines for bsel0 */
51: #define DMC_BACCI 0
52: #define DMC_CNTLI 1
53: #define DMC_PERR 2
54: #define DMC_BASEI 3
55: #define DMC_WRITE 0 /* transmit block */
56: #define DMC_READ 4 /* read block */
57: #define DMC_RQI 0040 /* port request bit */
58: #define DMC_IEI 0100 /* enable input interrupts */
59: #define DMC_RDYI 0200 /* port ready */
60: #define DMC0BITS "\10\10RDI\7IEI\6RQI"
61:
62: /* defines for bsel1 */
63: #define DMC_MCLR 0100 /* DMC11 Master Clear */
64: #define DMC_RUN 0200 /* clock running */
65: #define DMC1BITS "\10\10RUN\7MCLR"
66:
67: /* defines for bsel2 */
68: #define DMC_BACCO 0
69: #define DMC_CNTLO 1
70: #define DMC_OUX 0 /* transmit block */
71: #define DMC_OUR 4 /* read block */
72: #define DMC_IEO 0100 /* enable output interrupts */
73: #define DMC_RDYO 0200 /* port available */
74: #define DMC2BITS "\10\10RDO\7IEO"
75:
76: /* defines for CNTLI mode */
77: #define DMC_HDPLX 02000 /* half duplex DDCMP operation */
78: #define DMC_SEC 04000 /* half duplex secondary station */
79: #define DMC_MAINT 00400 /* enter maintenance mode */
80:
81: /* defines for BACCI/O and BASEI mode */
82: #define DMC_XMEM 0140000 /* xmem bit position */
83: #define DMC_CCOUNT 0037777 /* character count mask */
84: #define DMC_RESUME 0002000 /* resume (BASEI only) */
85:
86: /* defines for CNTLO */
87: #define DMC_CNTMASK 01777
88:
89: #define DMC_DATACK 01
90: #define DMC_TIMEOUT 02
91: #define DMC_NOBUFS 04
92: #define DMC_MAINTREC 010
93: #define DMC_LOSTDATA 020
94: #define DMC_DISCONN 0100
95: #define DMC_START 0200
96: #define DMC_NEXMEM 0400
97: #define DMC_ERROR 01000
98:
99: #define DMC_FATAL (DMC_ERROR|DMC_NEXMEM|DMC_START|DMC_LOSTDATA|DMC_MAINTREC)
100: #define CNTLO_BITS \
101: "\10\12ERROR\11NEXMEM\10START\7DISC\5LSTDATA\4MAINT\3NOBUF\2TIMEO\1DATACK"
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