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1.1 root 1: /*
2: * Copyright (c) 1982, 1986, 1988 Regents of the University of California.
3: * All rights reserved. The Berkeley software License Agreement
4: * specifies the terms and conditions for redistribution.
5: *
6: * @(#)autoconf.c 7.11 (Berkeley) 7/10/88
7: */
8:
9: #include "param.h"
10: #include "reboot.h"
11:
12: #include "../vax/cpu.h"
13: #include "../vax/nexus.h"
14: #include "../vax/pte.h"
15: #include "../vax/mtpr.h"
16: #include "../vaxuba/ubareg.h"
17: #include "../vaxmba/mbareg.h"
18:
19: #include "savax.h"
20:
21: #ifdef VAX8200
22: #include "../vaxbi/bireg.h"
23: #endif
24:
25: #if VAX8600 || VAX8200 || VAX780
26: /*
27: * These are used on CPU's that do configuration.
28: */
29: struct uba_regs *ubaddrspace[MAXNUBA];
30: caddr_t uioaddrspace[MAXNUBA];
31: struct mba_regs *mbaddrspace[MAXNMBA];
32: #endif
33:
34: #if VAX750
35: #define UTR(i) ((struct uba_regs *)(NEX750+(i)))
36: #define UMA(i) ((caddr_t)UMEM750(i)+UBAIOADDR)
37: #define MTR(i) ((struct mba_regs *)(NEX750+(i)))
38:
39: struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) };
40: caddr_t uioaddr750[] = { UMA(0), UMA(1) };
41: struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) };
42:
43: #undef UTR
44: #undef UMA
45: #undef MTR
46: #endif
47:
48: #if VAX730
49: #define UTR(i) ((struct uba_regs *)(NEX730+(i)))
50: #define UMA ((caddr_t)UMEM730+UBAIOADDR)
51:
52: struct uba_regs *ubaddr730[] = { UTR(3) };
53: caddr_t uioaddr730[] = { UMA };
54:
55: #undef UTR
56: #undef UMA
57: #endif
58:
59: #if VAX630
60: /*
61: * The map registers start at 20088000 on the ka630, so
62: * subtract a 2k offset to make things work.
63: *
64: * This could stand serious cleanup.
65: */
66: struct uba_regs *ubaddr630[] =
67: { (struct uba_regs *)((caddr_t)QBAMAP630 - 0x800) };
68: caddr_t uioaddr630[] = { (caddr_t)QIOPAGE630 };
69:
70: int (*v_getc)(), (*v_putc)();
71:
72: #ifndef SMALL
73: /*
74: * Virtual console configuration tables.
75: */
76: extern qv_init(),qd_init();
77:
78: int (*vcons_init[])() = {
79: qd_init,
80: qv_init,
81: 0
82: };
83: #endif
84: #endif
85:
86: #ifndef SMALL
87: extern int boothowto;
88: int debug = 0;
89: #endif
90: int cpuspeed = 1;
91:
92: configure()
93: {
94: union cpusid cpusid;
95: register int i;
96:
97: #ifndef SMALL
98: if (boothowto & RB_KDB) /* XXX */
99: debug = 1;
100: #endif
101: cpusid.cpusid = mfpr(SID);
102: cpu = cpusid.cpuany.cp_type;
103: switch (cpu) {
104:
105: #if VAX8600
106: case VAX_8600:
107: #ifndef SMALL
108: if (debug)
109: printf("cpu: 8600\nsbia 0:\n");
110: #endif
111: cpuspeed = 6;
112: probenexi(NEXA8600, (caddr_t)UMEMA8600(0)+UBAIOADDR, 0);
113: probenexi(NEXB8600, (caddr_t)UMEMB8600(0)+UBAIOADDR, 1);
114: break;
115: #endif
116:
117: #if VAX780
118: case VAX_780:
119: #ifndef SMALL
120: if (debug)
121: printf("cpu: 780\n");
122: #endif
123: cpuspeed = 2;
124: probenexi(NEX780, (caddr_t)UMEM780(0)+UBAIOADDR, 0);
125: break;
126: #endif
127:
128: #if VAX8200
129: case VAX_8200: {
130: register struct bi_node *bi;
131:
132: cpuspeed = 2;
133: for (i = 0, bi = BI_BASE(0); i < NNODEBI; i++, bi++) {
134: if (badaddr((caddr_t)bi, sizeof (long)))
135: continue;
136: #ifdef notdef
137: /* clear bus errors */
138: bi->biic.bi_ber = ~(BIBER_MBZ|BIBER_NMR|BIBER_UPEN);
139: #endif
140: #ifndef SMALL
141: if (debug)
142: printf("node%d: ", i);
143: #endif
144: switch (bi->biic.bi_dtype) {
145:
146: case BIDT_DWBUA:
147: if (nuba >= MAXNUBA) /* sorry */
148: break;
149: #ifndef SMALL
150: if (debug)
151: printf("uba%d\n", nuba);
152: #endif
153: ubaddrspace[nuba] = (struct uba_regs *)bi;
154: uioaddrspace[nuba] = (caddr_t)UMEM8200(i) +
155: UBAIOADDR;
156: ((struct dwbua_regs *)bi)->bua_csr |=
157: BUACSR_UPI;
158: nuba++;
159: break;
160:
161: case BIDT_KDB50:
162: if (nkdb < MAXNKDB) {
163: kdbaddr[nkdb++] = (caddr_t)bi;
164: #ifndef SMALL
165: if (debug)
166: printf("kdb%d\n", nkdb);
167: #endif
168: }
169: break;
170: #ifndef SMALL
171: default:
172: if (debug)
173: printf("unknown type %x\n",
174: bi->biic.bi_dtype);
175: break;
176: #endif
177: }
178: }
179: ubaddr = ubaddrspace;
180: uioaddr = uioaddrspace;
181: }
182: break;
183: #endif
184:
185: #if VAX750
186: case VAX_750:
187: #ifndef SMALL
188: if (debug)
189: printf("cpu: 750 -- assuming standard config\n");
190: #endif
191: mbaddr = mbaddr750;
192: ubaddr = ubaddr750;
193: uioaddr = uioaddr750;
194: nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]);
195: nuba = 2;
196: break;
197: #endif
198:
199: #if VAX730
200: case VAX_730:
201: #ifndef SMALL
202: if (debug)
203: printf("cpu: 730 -- assuming standard config\n");
204: #endif
205: ubaddr = ubaddr730;
206: uioaddr = uioaddr730;
207: nuba = 1;
208: break;
209: #endif
210:
211: #if VAX630
212: case VAX_630:
213: #ifndef SMALL
214: if (debug)
215: printf("cpu: uVAX II\n");
216: #endif
217: ubaddr = ubaddr630;
218: uioaddr = uioaddr630;
219: nuba = 1;
220: break;
221: #endif
222: }
223:
224: /*
225: * Forward into the past...
226: */
227: /*
228: for (i = 0; i < nmba; i++)
229: if (!badaddr(mbaddr[i], sizeof(long)))
230: mbaddr[i]->mba_cr = MBCR_INIT;
231: */
232:
233: switch (cpu) {
234:
235: #if VAX750 || VAX730
236: case VAX_750:
237: case VAX_730:
238: mtpr(IUR, 0);
239: break;
240: #endif
241:
242: #if VAX630
243: case VAX_630:
244: mtpr(IUR, 0);
245: *((char *)QIOPAGE630 + QIPCR) = Q_LMEAE;
246: #if !defined(SMALL)
247: /*
248: * configure the console
249: */
250: for(i = 0; vcons_init[i] && !(*vcons_init[i])(); i++)
251: ;
252: #endif
253: break;
254: #endif /* VAX630 */
255: }
256:
257: /* give unibus devices a chance to recover... */
258: if (nuba > 0)
259: DELAY(500000);
260: }
261:
262: #if VAX8600 || VAX780
263: probenexi(nxp, umembase, sbia)
264: register struct nexus *nxp;
265: caddr_t umembase;
266: int sbia;
267: {
268: register int i;
269: union nexcsr nexcsr;
270: int first = 1;
271:
272: for (i = 0; i < 16; i++, nxp++) {
273: if (badaddr(nxp, sizeof(long)))
274: continue;
275: nexcsr = nxp->nexcsr;
276: if (nexcsr.nex_csr & NEX_APD)
277: continue;
278: #ifndef SMALL
279: if (debug) {
280: if (first && sbia != 0)
281: printf("sbia %d:\n", sbia);
282: printf("tr%d: ", i);
283: first = 0;
284: }
285: #endif
286: switch (nexcsr.nex_type) {
287: default:
288: #ifndef SMALL
289: if (debug)
290: printf("nexid %2x\n", nexcsr.nex_type);
291: #endif
292: break;
293:
294: case NEX_MEM4:
295: case NEX_MEM4I:
296: case NEX_MEM16:
297: case NEX_MEM16I:
298: case NEX_MEM64L:
299: case NEX_MEM64LI:
300: case NEX_MEM64U:
301: case NEX_MEM64UI:
302: case NEX_MEM64I:
303: #ifndef SMALL
304: if (debug)
305: printf("mem\n");
306: #endif
307: break;
308:
309: case NEX_CI:
310: #ifndef SMALL
311: if (debug)
312: printf("ci\n");
313: #endif
314: break;
315:
316: case NEX_DR32:
317: #ifndef SMALL
318: if (debug)
319: printf("dr32\n");
320: #endif
321: break;
322:
323: case NEX_MPM0:
324: case NEX_MPM1:
325: case NEX_MPM2:
326: case NEX_MPM3:
327: #ifndef SMALL
328: if (debug)
329: printf("mpm\n");
330: #endif
331: break;
332:
333: case NEX_MBA:
334: if (nmba >= MAXNMBA) {
335: #ifndef SMALL
336: if (debug)
337: printf("unsupported mba\n");
338: #endif
339: break;
340: }
341: #ifndef SMALL
342: if (debug)
343: printf("mba%d\n", nmba);
344: #endif
345: mbaddrspace[nmba] = (struct mba_regs *)nxp;
346: nmba++;
347: break;
348:
349: case NEX_UBA0:
350: case NEX_UBA1:
351: case NEX_UBA2:
352: case NEX_UBA3:
353: if (nuba >= MAXNUBA) {
354: #ifndef SMALL
355: if (debug)
356: printf("unsupported uba\n");
357: #endif
358: break;
359: }
360: #ifndef SMALL
361: if (debug)
362: printf("uba%d umem%d", nuba,
363: nexcsr.nex_type&3);
364: #endif
365: ubaddrspace[nuba] = (struct uba_regs *)nxp;
366: uioaddrspace[nuba] = umembase +
367: (nexcsr.nex_csr & 3) * (512*NBPG);
368: #ifndef SMALL
369: if (debug)
370: printf(" (%x)\n", uioaddrspace[nuba]);
371: #endif
372: nuba++;
373: ((struct uba_regs *)nxp)->uba_cr = UBACR_ADINIT;
374: break;
375: }
376: }
377: mbaddr = mbaddrspace;
378: ubaddr = ubaddrspace;
379: uioaddr = uioaddrspace;
380: #undef UTR
381: #undef UMA
382: #undef MTR
383: }
384: #endif /* VAX780 || VAX8600 */
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