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1.1 root 1: /* Copyright (c) 1992, 1993 NeXT Computer, Inc. All rights reserved.
2: *
3: * ATIModes.h - Definitions for the ATi display driver.
4: *
5: * HISTORY
6: * 07 Oct 92 Joe Pasqua
7: * Created.
8: * 01 June 93 Mike Paquette
9: * Added support for multiple DACs and CRT setups
10: * 7 July 1993 Derek B Clegg
11: * Cleaned up for external release.
12: */
13: #ifndef ATIMODES_H__
14: #define ATIMODES_H__
15:
16: #import <driverkit/displayDefs.h>
17:
18: /* Important port definitions. */
19: #define MISC_OPTIONS 0x36EE
20: #define SUBSYS_STATUS 0x42e8
21: #define DISP_CNTL 0x22E8 /* Display Control. */
22: #define CRT_LINE_PITCH 0x26EE
23: #define DAC_MASK 0x02EA /* DAC Mask. */
24: #define DAC_DATA 0x02ED
25: #define DAC_R_INDEX 0x02EB
26: #define DAC_W_INDEX 0x02EC
27:
28: #define ADVFUNC_CNTL 0x4AE8
29: #define EXT_GE_CONFIG 0x7AEE
30: #define OUTPUT_CLK_SEL DAC_MASK
31: #define MUX_CNTL DAC_R_INDEX
32: #define INPUT_CLK_SEL DAC_DATA
33: #define MISC_CNTL 0x7EEE
34: #define R_MISC_CNTL 0x92EE
35: #define LOCAL_CNTL 0x32EE
36:
37: #define GE_OFFSET_HI 0x72EE
38: #define GE_OFFSET_LO 0x6EEE
39:
40: #define CRT_OFFSET_HI 0x2EEE
41: #define CRT_OFFSET_LO 0x2AEE
42:
43: #define CONFIG_STATUS_1 0x12EE
44: #define CONFIG_STATUS_2 0x16EE
45: #define CRT_PITCH 0x26EE
46: #define GE_PITCH 0x76EE
47:
48: #define MEM_BNDRY 0x42EE
49: #define MEM_CFG 0x5EEE
50:
51: #define HORZ_OVERSCAN 0x62EE
52:
53: /* CRT Timing ports for Mach32 chip. */
54: #define H_TOTAL 0x02e8
55: #define H_DISP 0x06e8
56: #define H_SYNC_START 0x0ae8
57: #define H_SYNC_WIDTH 0x0ee8
58: #define V_TOTAL 0x12e8
59: #define V_DISP 0x16e8
60: #define V_SYNC_START 0x1ae8
61: #define V_SYNC_WID 0x1ee8
62: #define CLOCK_SELECT 0x4aee
63:
64: #define HORIZONTAL_OVERSCAN 0x62ee
65: #define VERTICAL_OVERSCAN 0x66ee
66: #define OVERSCAN_COLOR_BLUE 0x02ef
67: #define OVERSCAN_COLOR_GREEN 0x06ee
68: #define OVERSCAN_COLOR_RED 0x06ef
69:
70: #define SHADOW_SET 0x5aee
71: #define SHADOW_CNTL 0x46ee
72: #define ROM_SCRATCH_PAD_0 0x52ee
73: #define ROM_SCRATCH_PAD_1 0x56ee
74:
75: #define MACH32_STEP6_ID_REG 0xFAEE
76: #define MACH32_STEP6_ID_VALUE 0x227F
77:
78: /* Identifying the memory aperature size */
79: #define MEM_APERATURE_4GB_RANGE 0x20 /* Bit in CONFIG_STATUS_2+1 */
80:
81:
82: /* Corsair specific stuff. */
83:
84: #define INTEL_COMPANY_ID 0x25D4
85: #define CORSAIR_ID 0x30A0
86: #define INTEL_CORSAIR_ID ((INTEL_COMPANY_ID << 16)|CORSAIR_ID)
87: #define INTEL_CORSAIR_FB_ADDR 0x7a000000
88: #define INTEL_CORSAIR_FB_SIZE 0x00200000
89:
90: /* EISA Specific stuff */
91:
92: #define ATI_EISA_ID 0x06894400 /* !ATI4400 EISA */
93:
94: /* Interesting information found on the card. */
95:
96: #define ATI_LOCALBUS_BIOS_SIGNON_MSG_ADDR 0xc0085
97:
98: #define ATI_BIOS_BASEADDR 0xc0000 /* VGA BIOS base addr. */
99: #define ATI_BIOS_SIZE 0x1000 /* VGA BIOS size. */
100:
101: #define ATI_LOCALBUS_BIOS_SIGNON_MSG "LOCAL BUS ATI ULTRA PRO"
102: #define ATI_LOCALBUS_BIOS_SIGNON_MSG_LEN \
103: ((sizeof ATI_LOCALBUS_BIOS_SIGNON_MSG) - 1)
104:
105: #define ATI_LOCALBUS_VRAM_ADDRESS 0x7E00000 /* 126 Mb. */
106:
107: #define ATI_NOVA_PBUS_EISA_ID 0x25D430B0 /* Intel PCI, ATI chips */
108: #define ATI_NOVA_FB_ADDR 0xB2000000
109: #define ATI_NOVA_CORSAIR_FB_SIZE 0x00200000
110:
111: typedef enum {
112: ATICorsair = 0,
113: ATILocalBusCard,
114: ATI_EISA_Card,
115: ATI_ISA_Card,
116: ATI_NovaCard
117: } ATIFlavor;
118:
119: typedef enum {
120: ATI_DAC_68830 = 0,
121: ATI_DAC_ATT20C491 = 1,
122: ATI_DAC_68875 = 2,
123: ATI_DAC_Bt476 = 3,
124: ATI_DAC_Bt481 = 4
125: } ATI_DAC;
126:
127: /* Table driven setup for DAC and pixel pipeline */
128:
129: typedef struct {
130: unsigned int out_clk;
131: unsigned int in_clk;
132: unsigned int mux;
133: unsigned int GE_config;
134: unsigned int mask;
135: unsigned int delay_timing;
136: unsigned int mode;
137: IOBitsPerPixel bits;
138: } ATI_DACSetup;
139:
140: extern const ATI_DACSetup ATI_DAC_Setup_15BPP;
141: extern const ATI_DACSetup ATI_DAC_Setup_8BPP;
142:
143: /* Table driven setup for the CRTC hardware. This controls the display
144: * layout and sync waveforms. (Just like the NeXT TMC chip...)
145: * All values are derived from the Mach32 chipset data sheets. See
146: * Appendix D, CRT Parameters, for details.
147: * Horizontal times are in multiples of 8 pixels.
148: * Vertical times are in multiples of 1/2 scanline.
149: */
150: typedef struct {
151: unsigned int xres;
152: unsigned int yres;
153: unsigned int h_total;
154: unsigned int h_disp;
155: unsigned int h_sync_start;
156: unsigned int h_sync_wid;
157: unsigned int v_total;
158: unsigned int v_disp;
159: unsigned int v_sync_start;
160: unsigned int v_sync_wid;
161: unsigned int disp_cntl;
162: unsigned int clock_select;
163: unsigned int mux_flag;
164: } ATI_CRTCSetup;
165:
166: extern const IODisplayInfo ATIMode[];
167: extern const int ATIModeCount;
168: extern const IODisplayInfo ATISlowDACMode[];
169: extern const int ATISlowDACModeCount;
170:
171: #define ATI_DEFAULT_2MEG_MODE 4
172: #define ATI_DEFAULT_1MEG_MODE 1
173: #define ATI_DEFAULT_SlowDAC_MODE 0
174:
175: #endif /* ATIMODES_H__ */
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