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Sample Programs from NeXSTEP 3.3

/* Copyright (c) 1992, 1993 NeXT Computer, Inc.  All rights reserved. 
 *
 * ATIModes.h - Definitions for the ATi display driver.
 *
 * HISTORY
 * 07 Oct 92	Joe Pasqua
 *      Created. 
 * 01 June 93	Mike Paquette
 *	Added support for multiple DACs and CRT setups
 *  7 July 1993	Derek B Clegg
 *	Cleaned up for external release.
 */
#ifndef ATIMODES_H__
#define ATIMODES_H__

#import <driverkit/displayDefs.h>

/* Important port definitions. */
#define	MISC_OPTIONS	0x36EE
#define	SUBSYS_STATUS	0x42e8
#define DISP_CNTL	0x22E8		/* Display Control. */
#define	CRT_LINE_PITCH	0x26EE
#define DAC_MASK	0x02EA		/* DAC Mask. */
#define DAC_DATA	0x02ED
#define DAC_R_INDEX	0x02EB
#define DAC_W_INDEX	0x02EC

#define	ADVFUNC_CNTL	0x4AE8
#define	EXT_GE_CONFIG	0x7AEE
#define	OUTPUT_CLK_SEL	DAC_MASK
#define	MUX_CNTL	DAC_R_INDEX
#define	INPUT_CLK_SEL	DAC_DATA
#define	MISC_CNTL	0x7EEE
#define	R_MISC_CNTL	0x92EE
#define LOCAL_CNTL	0x32EE

#define	GE_OFFSET_HI	0x72EE
#define	GE_OFFSET_LO	0x6EEE

#define	CRT_OFFSET_HI	0x2EEE
#define	CRT_OFFSET_LO	0x2AEE

#define	CONFIG_STATUS_1	0x12EE
#define	CONFIG_STATUS_2	0x16EE
#define	CRT_PITCH	0x26EE
#define	GE_PITCH	0x76EE

#define	MEM_BNDRY	0x42EE
#define	MEM_CFG		0x5EEE

#define	HORZ_OVERSCAN	0x62EE

/* CRT Timing ports for Mach32 chip. */
#define H_TOTAL		0x02e8
#define H_DISP		0x06e8
#define H_SYNC_START	0x0ae8
#define H_SYNC_WIDTH	0x0ee8
#define V_TOTAL		0x12e8
#define V_DISP		0x16e8
#define V_SYNC_START	0x1ae8
#define V_SYNC_WID	0x1ee8
#define CLOCK_SELECT	0x4aee
	
#define HORIZONTAL_OVERSCAN	0x62ee
#define VERTICAL_OVERSCAN	0x66ee
#define OVERSCAN_COLOR_BLUE	0x02ef
#define OVERSCAN_COLOR_GREEN	0x06ee
#define OVERSCAN_COLOR_RED	0x06ef

#define SHADOW_SET		0x5aee
#define SHADOW_CNTL		0x46ee
#define ROM_SCRATCH_PAD_0	0x52ee
#define ROM_SCRATCH_PAD_1	0x56ee

#define MACH32_STEP6_ID_REG	0xFAEE
#define MACH32_STEP6_ID_VALUE	0x227F

/* Identifying the memory aperature size */
#define MEM_APERATURE_4GB_RANGE	0x20	/* Bit in CONFIG_STATUS_2+1 */


/* Corsair specific stuff. */

#define INTEL_COMPANY_ID	0x25D4
#define CORSAIR_ID		0x30A0
#define INTEL_CORSAIR_ID	((INTEL_COMPANY_ID << 16)|CORSAIR_ID)
#define INTEL_CORSAIR_FB_ADDR	0x7a000000
#define INTEL_CORSAIR_FB_SIZE	0x00200000

/* EISA Specific stuff */

#define ATI_EISA_ID		0x06894400	/* !ATI4400 EISA */

/* Interesting information found on the card. */

#define ATI_LOCALBUS_BIOS_SIGNON_MSG_ADDR	0xc0085

#define ATI_BIOS_BASEADDR	0xc0000		/* VGA BIOS base addr. */
#define ATI_BIOS_SIZE		0x1000	 	/* VGA BIOS size. */

#define ATI_LOCALBUS_BIOS_SIGNON_MSG		"LOCAL BUS ATI ULTRA PRO"
#define ATI_LOCALBUS_BIOS_SIGNON_MSG_LEN \
	((sizeof ATI_LOCALBUS_BIOS_SIGNON_MSG) - 1)

#define ATI_LOCALBUS_VRAM_ADDRESS	0x7E00000   /* 126 Mb. */

#define ATI_NOVA_PBUS_EISA_ID		0x25D430B0  /* Intel PCI, ATI chips */
#define	ATI_NOVA_FB_ADDR		0xB2000000
#define	ATI_NOVA_CORSAIR_FB_SIZE	0x00200000

typedef enum {
    ATICorsair = 0,
    ATILocalBusCard,
    ATI_EISA_Card,
    ATI_ISA_Card,
    ATI_NovaCard
} ATIFlavor;

typedef enum {
    ATI_DAC_68830 = 0,
    ATI_DAC_ATT20C491 = 1,
    ATI_DAC_68875 = 2,
    ATI_DAC_Bt476 = 3,
    ATI_DAC_Bt481 = 4
} ATI_DAC;

/* Table driven setup for DAC and pixel pipeline */

typedef struct {
    unsigned int out_clk;
    unsigned int in_clk;
    unsigned int mux;
    unsigned int GE_config;
    unsigned int mask;
    unsigned int delay_timing;
    unsigned int mode;
    IOBitsPerPixel bits;
} ATI_DACSetup;

extern const ATI_DACSetup ATI_DAC_Setup_15BPP;
extern const ATI_DACSetup ATI_DAC_Setup_8BPP;

/* Table driven setup for the CRTC hardware.  This controls the display
 * layout and sync waveforms.  (Just like the NeXT TMC chip...)
 * All values are derived from the Mach32 chipset data sheets.  See
 * Appendix D, CRT Parameters, for details.
 * Horizontal times are in multiples of 8 pixels.
 * Vertical times are in multiples of 1/2 scanline.
 */
typedef struct {
    unsigned int xres;
    unsigned int yres;
    unsigned int h_total;
    unsigned int h_disp;
    unsigned int h_sync_start;
    unsigned int h_sync_wid;
    unsigned int v_total;
    unsigned int v_disp;
    unsigned int v_sync_start;
    unsigned int v_sync_wid;
    unsigned int disp_cntl;
    unsigned int clock_select;
    unsigned int mux_flag;
} ATI_CRTCSetup;

extern const IODisplayInfo ATIMode[];
extern const int ATIModeCount;
extern const IODisplayInfo ATISlowDACMode[];
extern const int ATISlowDACModeCount;

#define ATI_DEFAULT_2MEG_MODE		4
#define ATI_DEFAULT_1MEG_MODE		1
#define ATI_DEFAULT_SlowDAC_MODE	0

#endif	/* ATIMODES_H__ */

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