![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to SMC16IOInline.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [NeXTSTEP 3.3 examples] / Examples / DriverKit / SMC16 / SMC16_reloc.tproj|
Return to SMC16IOInline.h CVS log | Up to [NeXTSTEP 3.3 examples] / Examples / DriverKit / SMC16 / SMC16_reloc.tproj |
1.1 root 1: /*
2: * Copyright (c) 1993 NeXT Computer, Inc.
3: *
4: * Low level IO inline expansions for
5: * SMC EtherCard Plus Elite16 Adapter.
6: *
7: * HISTORY
8: *
9: * 26 Jan 1993
10: * Created.
11: */
12:
13: #import <driverkit/i386/ioPorts.h>
14:
15: #import "SMC16Hdw.h"
16:
17: #import "wd83C584.h"
18: #import "wd83C690.h"
19:
20: /*
21: * We use a union of all relevant registers so that we can declare
22: * variables of a single type, yet access and return variables of
23: * these multiple types easily. Typically, we use the last 2 elements
24: * in our inb() calls.
25: */
26: typedef union {
27: bic_msr_t msr;
28: bic_icr_t icr;
29: bic_iar_t iar;
30: bic_bio_t bio;
31: bic_ear_t ear;
32: bic_irr_t irr;
33: bic_laar_t laar;
34: nic_cmd_reg_t cmd_reg;
35: nic_enh_reg_t enh_reg;
36: nic_istat_reg_t istat_reg;
37: nic_imask_reg_t imask_reg;
38: nic_tstat_reg_t tstat_reg;
39: nic_rcon_reg_t rcon_reg;
40: nic_tcon_reg_t tcon_reg;
41: nic_dcon_reg_t dcon_reg;
42: unsigned char data;
43: SMC16_off_t offset;
44: }_reg_conv_t;
45:
46: /*
47: * Access to 83C584 registers.
48: */
49:
50: static __inline__
51: bic_msr_t
52: get_msr(
53: IOEISAPortAddress base
54: )
55: {
56: _reg_conv_t _conv;
57:
58: _conv.data = inb(base + SMC16_BIC_OFF + BIC_MSR_OFF);
59:
60: return (_conv.msr);
61: }
62:
63: static __inline__
64: void
65: put_msr(
66: bic_msr_t reg,
67: IOEISAPortAddress base
68: )
69: {
70: _reg_conv_t _conv;
71:
72: _conv.msr = reg;
73:
74: outb(base + SMC16_BIC_OFF + BIC_MSR_OFF, _conv.data);
75: }
76:
77: static __inline__
78: bic_icr_t
79: get_icr(
80: IOEISAPortAddress base
81: )
82: {
83: _reg_conv_t _conv;
84:
85: _conv.data = inb(base + SMC16_BIC_OFF + BIC_ICR_OFF);
86:
87: return (_conv.icr);
88: }
89:
90: static __inline__
91: void
92: put_icr(
93: bic_icr_t reg,
94: IOEISAPortAddress base
95: )
96: {
97: _reg_conv_t _conv;
98:
99: _conv.icr = reg;
100:
101: outb(base + SMC16_BIC_OFF + BIC_ICR_OFF, _conv.data);
102: }
103:
104: static __inline__
105: bic_irr_t
106: get_irr(
107: IOEISAPortAddress base
108: )
109: {
110: _reg_conv_t _conv;
111:
112: _conv.data = inb(base + SMC16_BIC_OFF + BIC_IRR_OFF);
113:
114: return (_conv.irr);
115: }
116:
117: static __inline__
118: void
119: put_irr(
120: bic_irr_t reg,
121: IOEISAPortAddress base
122: )
123: {
124: _reg_conv_t _conv;
125:
126: _conv.irr = reg;
127:
128: outb(base + SMC16_BIC_OFF + BIC_IRR_OFF, _conv.data);
129: }
130:
131: static __inline__
132: bic_laar_t
133: get_laar(
134: IOEISAPortAddress base
135: )
136: {
137: _reg_conv_t _conv;
138:
139: _conv.data = inb(base + SMC16_BIC_OFF + BIC_LAAR_OFF);
140:
141: return (_conv.laar);
142: }
143:
144: static __inline__
145: void
146: put_laar(
147: bic_laar_t reg,
148: IOEISAPortAddress base
149: )
150: {
151: _reg_conv_t _conv;
152:
153: _conv.laar = reg;
154:
155: outb(base + SMC16_BIC_OFF + BIC_LAAR_OFF, _conv.data);
156: }
157:
158: static __inline__
159: bic_bio_t
160: get_bio(
161: IOEISAPortAddress base
162: )
163: {
164: _reg_conv_t _conv;
165: bic_icr_t icr = get_icr(base);
166:
167: icr.ora = BIC_ACCESS_BIO;
168: put_icr(icr,base);
169: _conv.data = inb(base + SMC16_BIC_OFF + BIC_BIO_OFF);
170:
171: return (_conv.bio);
172: }
173:
174: static __inline__
175: void
176: put_bio(
177: bic_bio_t reg,
178: IOEISAPortAddress base
179: )
180: {
181: _reg_conv_t _conv;
182: bic_icr_t icr = get_icr(base);
183:
184: icr.ora = BIC_ACCESS_BIO;
185: put_icr(icr,base);
186: _conv.bio = reg;
187:
188: outb(base + SMC16_BIC_OFF + BIC_BIO_OFF, _conv.data);
189: }
190:
191: static __inline__
192: bic_ear_t
193: get_ear(
194: IOEISAPortAddress base
195: )
196: {
197: _reg_conv_t _conv;
198: bic_icr_t icr = get_icr(base);
199:
200: icr.ora = BIC_ACCESS_EAR;
201: put_icr(icr,base);
202:
203: _conv.data = inb(base + SMC16_BIC_OFF + BIC_EAR_OFF);
204:
205: return (_conv.ear);
206: }
207:
208: static __inline__
209: unsigned char
210: get_bid(
211: IOEISAPortAddress base
212: )
213: {
214: return (inb(base + SMC16_BIC_OFF + BIC_ID_OFF));
215: }
216:
217: /*
218: * Access to 83C690 registers.
219: */
220:
221: /*
222: * Select a different register
223: * page, and return the old one.
224: */
225:
226: #define REG_PAGE0 0
227: #define REG_PAGE1 1
228: #define REG_PAGE2 2
229: #define REG_PAGE3 3
230:
231: static __inline__
232: int
233: sel_reg_page(
234: int page,
235: IOEISAPortAddress base
236: )
237: {
238: _reg_conv_t _conv;
239: int oldpage;
240:
241: _conv.data = inb(base + SMC16_NIC_OFF + NIC_CMD_REG_OFF);
242: oldpage = _conv.cmd_reg.psel;
243:
244: _conv.cmd_reg.psel = page;
245: outb(base + SMC16_NIC_OFF + NIC_CMD_REG_OFF, _conv.data);
246:
247: return (oldpage);
248: }
249:
250: /*
251: * Get/Put 83C690 register values,
252: * assuming that the correct register
253: * page has already been selected.
254: */
255:
256: static __inline__
257: nic_cmd_reg_t
258: get_cmd_reg(
259: IOEISAPortAddress base
260: )
261: {
262: _reg_conv_t _conv;
263:
264: _conv.data = inb(base + SMC16_NIC_OFF + NIC_CMD_REG_OFF);
265:
266: return (_conv.cmd_reg);
267: }
268:
269: static __inline__
270: void
271: put_cmd_reg(
272: nic_cmd_reg_t reg,
273: IOEISAPortAddress base
274: )
275: {
276: _reg_conv_t _conv;
277:
278: _conv.cmd_reg = reg;
279:
280: outb(base + SMC16_NIC_OFF + NIC_CMD_REG_OFF, _conv.data);
281: }
282:
283: static __inline__
284: nic_istat_reg_t
285: get_istat_reg(
286: IOEISAPortAddress base
287: )
288: {
289: _reg_conv_t _conv;
290:
291: _conv.data = inb(base + SMC16_NIC_OFF + NIC_ISTAT_REG_OFF);
292:
293: return (_conv.istat_reg);
294: }
295:
296: static __inline__
297: void
298: put_istat_reg(
299: nic_istat_reg_t reg,
300: IOEISAPortAddress base
301: )
302: {
303: _reg_conv_t _conv;
304:
305: _conv.istat_reg = reg;
306:
307: outb(base + SMC16_NIC_OFF + NIC_ISTAT_REG_OFF, _conv.data);
308: }
309:
310: static __inline__
311: nic_imask_reg_t
312: get_imask_reg(
313: IOEISAPortAddress base
314: )
315: {
316: _reg_conv_t _conv;
317:
318: _conv.data = inb(base + SMC16_NIC_OFF + NIC_IMASK_REG_OFF);
319:
320: return (_conv.imask_reg);
321: }
322:
323: static __inline__
324: void
325: put_imask_reg(
326: nic_imask_reg_t reg,
327: IOEISAPortAddress base
328: )
329: {
330: _reg_conv_t _conv;
331:
332: _conv.imask_reg = reg;
333:
334: outb(base + SMC16_NIC_OFF + NIC_IMASK_REG_OFF, _conv.data);
335: }
336:
337: static __inline__
338: nic_dcon_reg_t
339: get_dcon_reg(
340: IOEISAPortAddress base
341: )
342: {
343: _reg_conv_t _conv;
344:
345: _conv.data = inb(base + SMC16_NIC_OFF + NIC_DCON_REG_OFF);
346:
347: return (_conv.dcon_reg);
348: }
349:
350: static __inline__
351: void
352: put_dcon_reg(
353: nic_dcon_reg_t reg,
354: IOEISAPortAddress base
355: )
356: {
357: _reg_conv_t _conv;
358:
359: _conv.dcon_reg = reg;
360:
361: outb(base + SMC16_NIC_OFF + NIC_DCON_REG_OFF, _conv.data);
362: }
363:
364: static __inline__
365: void
366: put_enh_reg(
367: nic_enh_reg_t reg,
368: IOEISAPortAddress base
369: )
370: {
371: _reg_conv_t _conv;
372:
373: _conv.enh_reg = reg;
374:
375: outb(base + SMC16_NIC_OFF + NIC_ENH_REG_OFF, _conv.data);
376: }
377:
378: static __inline__
379: nic_rcon_reg_t
380: get_rcon_reg(
381: IOEISAPortAddress base
382: )
383: {
384: _reg_conv_t _conv;
385:
386: _conv.data = inb(base + SMC16_NIC_OFF + NIC_RCON_REG_OFF);
387:
388: return (_conv.rcon_reg);
389: }
390:
391: static __inline__
392: void
393: put_rcon_reg(
394: nic_rcon_reg_t reg,
395: IOEISAPortAddress base
396: )
397: {
398: _reg_conv_t _conv;
399:
400: _conv.rcon_reg = reg;
401:
402: outb(base + SMC16_NIC_OFF + NIC_RCON_REG_OFF, _conv.data);
403: }
404:
405: static __inline__
406: nic_tcon_reg_t
407: get_tcon_reg(
408: IOEISAPortAddress base
409: )
410: {
411: _reg_conv_t _conv;
412:
413: _conv.data = inb(base + SMC16_NIC_OFF + NIC_TCON_REG_OFF);
414:
415: return (_conv.tcon_reg);
416: }
417:
418: static __inline__
419: void
420: put_tcon_reg(
421: nic_tcon_reg_t reg,
422: IOEISAPortAddress base
423: )
424: {
425: _reg_conv_t _conv;
426:
427: _conv.tcon_reg = reg;
428:
429: outb(base + SMC16_NIC_OFF + NIC_TCON_REG_OFF, _conv.data);
430: }
431:
432: static __inline__
433: void
434: put_tstart_reg(
435: SMC16_off_t reg,
436: IOEISAPortAddress base
437: )
438: {
439: outb(base + SMC16_NIC_OFF + NIC_TSTART_REG_OFF, reg);
440: }
441:
442: static __inline__
443: void
444: put_tcnt_reg(
445: unsigned short reg,
446: IOEISAPortAddress base
447: )
448: {
449: union {
450: struct {
451: unsigned char tcntl :8;
452: unsigned char tcnth :8;
453: } l_h;
454: unsigned short tcnt;
455: } _conv;
456:
457: _conv.tcnt = reg;
458:
459: outb(base + SMC16_NIC_OFF + NIC_TCNTL_REG_OFF, _conv.l_h.tcntl);
460: outb(base + SMC16_NIC_OFF + NIC_TCNTH_REG_OFF, _conv.l_h.tcnth);
461: }
462:
463: static __inline__
464: nic_tstat_reg_t
465: get_tstat_reg(
466: IOEISAPortAddress base
467: )
468: {
469: _reg_conv_t _conv;
470:
471: _conv.data = inb(base + SMC16_NIC_OFF + NIC_TSTAT_REG_OFF);
472:
473: return (_conv.tstat_reg);
474: }
475:
476: static __inline__
477: void
478: put_rstart_reg(
479: SMC16_off_t reg,
480: IOEISAPortAddress base
481: )
482: {
483: outb(base + SMC16_NIC_OFF + NIC_RSTART_REG_OFF, reg);
484: }
485:
486: static __inline__
487: void
488: put_rstop_reg(
489: SMC16_off_t reg,
490: IOEISAPortAddress base
491: )
492: {
493: outb(base + SMC16_NIC_OFF + NIC_RSTOP_REG_OFF, reg);
494: }
495:
496: static __inline__
497: SMC16_off_t
498: get_block_reg(
499: IOEISAPortAddress base
500: )
501: {
502: _reg_conv_t _conv;
503: int oldPage = sel_reg_page(NIC_BLOCK_REG_R_PG,base);
504:
505: _conv.offset = (inb(base + SMC16_NIC_OFF + NIC_BLOCK_REG_OFF));
506: sel_reg_page(oldPage,base);
507: return _conv.offset;
508: }
509:
510: static __inline__
511: void
512: put_block_reg(
513: SMC16_off_t reg,
514: IOEISAPortAddress base
515: )
516: {
517: int oldPage = sel_reg_page(NIC_BLOCK_REG_W_PG,base);
518: outb(base + SMC16_NIC_OFF + NIC_BLOCK_REG_OFF, reg);
519: sel_reg_page(oldPage,base);
520: }
521:
522: static __inline__
523: SMC16_off_t
524: get_bound_reg(
525: IOEISAPortAddress base
526: )
527: {
528: return (inb(base + SMC16_NIC_OFF + NIC_BOUND_REG_OFF));
529: }
530:
531: static __inline__
532: void
533: put_bound_reg(
534: SMC16_off_t reg,
535: IOEISAPortAddress base
536: )
537: {
538: outb(base + SMC16_NIC_OFF + NIC_BOUND_REG_OFF, reg);
539: }
540:
541: static __inline__
542: SMC16_off_t
543: get_curr_reg(
544: IOEISAPortAddress base
545: )
546: {
547: return (inb(base + SMC16_NIC_OFF + NIC_CURR_REG_OFF));
548: }
549:
550: static __inline__
551: void
552: put_curr_reg(
553: SMC16_off_t reg,
554: IOEISAPortAddress base
555: )
556: {
557: outb(base + SMC16_NIC_OFF + NIC_CURR_REG_OFF, reg);
558: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.