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Annotation of GNUtools/cc/combine.c, revision 1.1

1.1     ! root        1: /* Optimize by combining instructions for GNU compiler.
        !             2:    Copyright (C) 1987, 1988, 1992, 1993 Free Software Foundation, Inc.
        !             3: 
        !             4: This file is part of GNU CC.
        !             5: 
        !             6: GNU CC is free software; you can redistribute it and/or modify
        !             7: it under the terms of the GNU General Public License as published by
        !             8: the Free Software Foundation; either version 2, or (at your option)
        !             9: any later version.
        !            10: 
        !            11: GNU CC is distributed in the hope that it will be useful,
        !            12: but WITHOUT ANY WARRANTY; without even the implied warranty of
        !            13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
        !            14: GNU General Public License for more details.
        !            15: 
        !            16: You should have received a copy of the GNU General Public License
        !            17: along with GNU CC; see the file COPYING.  If not, write to
        !            18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
        !            19: 
        !            20: 
        !            21: /* This module is essentially the "combiner" phase of the U. of Arizona
        !            22:    Portable Optimizer, but redone to work on our list-structured
        !            23:    representation for RTL instead of their string representation.
        !            24: 
        !            25:    The LOG_LINKS of each insn identify the most recent assignment
        !            26:    to each REG used in the insn.  It is a list of previous insns,
        !            27:    each of which contains a SET for a REG that is used in this insn
        !            28:    and not used or set in between.  LOG_LINKs never cross basic blocks.
        !            29:    They were set up by the preceding pass (lifetime analysis).
        !            30: 
        !            31:    We try to combine each pair of insns joined by a logical link.
        !            32:    We also try to combine triples of insns A, B and C when
        !            33:    C has a link back to B and B has a link back to A.
        !            34: 
        !            35:    LOG_LINKS does not have links for use of the CC0.  They don't
        !            36:    need to, because the insn that sets the CC0 is always immediately
        !            37:    before the insn that tests it.  So we always regard a branch
        !            38:    insn as having a logical link to the preceding insn.  The same is true
        !            39:    for an insn explicitly using CC0.
        !            40: 
        !            41:    We check (with use_crosses_set_p) to avoid combining in such a way
        !            42:    as to move a computation to a place where its value would be different.
        !            43: 
        !            44:    Combination is done by mathematically substituting the previous
        !            45:    insn(s) values for the regs they set into the expressions in
        !            46:    the later insns that refer to these regs.  If the result is a valid insn
        !            47:    for our target machine, according to the machine description,
        !            48:    we install it, delete the earlier insns, and update the data flow
        !            49:    information (LOG_LINKS and REG_NOTES) for what we did.
        !            50: 
        !            51:    There are a few exceptions where the dataflow information created by
        !            52:    flow.c aren't completely updated:
        !            53: 
        !            54:    - reg_live_length is not updated
        !            55:    - reg_n_refs is not adjusted in the rare case when a register is
        !            56:      no longer required in a computation
        !            57:    - there are extremely rare cases (see distribute_regnotes) when a
        !            58:      REG_DEAD note is lost
        !            59:    - a LOG_LINKS entry that refers to an insn with multiple SETs may be
        !            60:      removed because there is no way to know which register it was 
        !            61:      linking
        !            62: 
        !            63:    To simplify substitution, we combine only when the earlier insn(s)
        !            64:    consist of only a single assignment.  To simplify updating afterward,
        !            65:    we never combine when a subroutine call appears in the middle.
        !            66: 
        !            67:    Since we do not represent assignments to CC0 explicitly except when that
        !            68:    is all an insn does, there is no LOG_LINKS entry in an insn that uses
        !            69:    the condition code for the insn that set the condition code.
        !            70:    Fortunately, these two insns must be consecutive.
        !            71:    Therefore, every JUMP_INSN is taken to have an implicit logical link
        !            72:    to the preceding insn.  This is not quite right, since non-jumps can
        !            73:    also use the condition code; but in practice such insns would not
        !            74:    combine anyway.  */
        !            75: 
        !            76: #include "config.h"
        !            77: #include "gvarargs.h"
        !            78: 
        !            79: /* Must precede rtl.h for FFS.  */
        !            80: #include <stdio.h>
        !            81: 
        !            82: #include "rtl.h"
        !            83: #include "flags.h"
        !            84: #include "regs.h"
        !            85: #include "hard-reg-set.h"
        !            86: #include "expr.h"
        !            87: #include "basic-block.h"
        !            88: #include "insn-config.h"
        !            89: #include "insn-flags.h"
        !            90: #include "insn-codes.h"
        !            91: #include "insn-attr.h"
        !            92: #include "recog.h"
        !            93: #include "real.h"
        !            94: 
        !            95: /* It is not safe to use ordinary gen_lowpart in combine.
        !            96:    Use gen_lowpart_for_combine instead.  See comments there.  */
        !            97: #define gen_lowpart dont_use_gen_lowpart_you_dummy
        !            98: 
        !            99: /* Number of attempts to combine instructions in this function.  */
        !           100: 
        !           101: static int combine_attempts;
        !           102: 
        !           103: /* Number of attempts that got as far as substitution in this function.  */
        !           104: 
        !           105: static int combine_merges;
        !           106: 
        !           107: /* Number of instructions combined with added SETs in this function.  */
        !           108: 
        !           109: static int combine_extras;
        !           110: 
        !           111: /* Number of instructions combined in this function.  */
        !           112: 
        !           113: static int combine_successes;
        !           114: 
        !           115: /* Totals over entire compilation.  */
        !           116: 
        !           117: static int total_attempts, total_merges, total_extras, total_successes;
        !           118: 
        !           119: /* Vector mapping INSN_UIDs to cuids.
        !           120:    The cuids are like uids but increase monotonically always.
        !           121:    Combine always uses cuids so that it can compare them.
        !           122:    But actually renumbering the uids, which we used to do,
        !           123:    proves to be a bad idea because it makes it hard to compare
        !           124:    the dumps produced by earlier passes with those from later passes.  */
        !           125: 
        !           126: static int *uid_cuid;
        !           127: 
        !           128: /* Get the cuid of an insn.  */
        !           129: 
        !           130: #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
        !           131: 
        !           132: /* Maximum register number, which is the size of the tables below.  */
        !           133: 
        !           134: static int combine_max_regno;
        !           135: 
        !           136: /* Record last point of death of (hard or pseudo) register n.  */
        !           137: 
        !           138: static rtx *reg_last_death;
        !           139: 
        !           140: /* Record last point of modification of (hard or pseudo) register n.  */
        !           141: 
        !           142: static rtx *reg_last_set;
        !           143: 
        !           144: /* Record the cuid of the last insn that invalidated memory
        !           145:    (anything that writes memory, and subroutine calls, but not pushes).  */
        !           146: 
        !           147: static int mem_last_set;
        !           148: 
        !           149: /* Record the cuid of the last CALL_INSN
        !           150:    so we can tell whether a potential combination crosses any calls.  */
        !           151: 
        !           152: static int last_call_cuid;
        !           153: 
        !           154: /* When `subst' is called, this is the insn that is being modified
        !           155:    (by combining in a previous insn).  The PATTERN of this insn
        !           156:    is still the old pattern partially modified and it should not be
        !           157:    looked at, but this may be used to examine the successors of the insn
        !           158:    to judge whether a simplification is valid.  */
        !           159: 
        !           160: static rtx subst_insn;
        !           161: 
        !           162: /* If nonzero, this is the insn that should be presumed to be
        !           163:    immediately in front of `subst_insn'.  */
        !           164: 
        !           165: static rtx subst_prev_insn;
        !           166: 
        !           167: /* This is the lowest CUID that `subst' is currently dealing with.
        !           168:    get_last_value will not return a value if the register was set at or
        !           169:    after this CUID.  If not for this mechanism, we could get confused if
        !           170:    I2 or I1 in try_combine were an insn that used the old value of a register
        !           171:    to obtain a new value.  In that case, we might erroneously get the
        !           172:    new value of the register when we wanted the old one.  */
        !           173: 
        !           174: static int subst_low_cuid;
        !           175: 
        !           176: /* This is the value of undobuf.num_undo when we started processing this 
        !           177:    substitution.  This will prevent gen_rtx_combine from re-used a piece
        !           178:    from the previous expression.  Doing so can produce circular rtl
        !           179:    structures.  */
        !           180: 
        !           181: static int previous_num_undos;
        !           182: 
        !           183: /* Basic block number of the block in which we are performing combines.  */
        !           184: static int this_basic_block;
        !           185: 
        !           186: /* The next group of arrays allows the recording of the last value assigned
        !           187:    to (hard or pseudo) register n.  We use this information to see if a
        !           188:    operation being processed is redundant given a prior operation performed
        !           189:    on the register.  For example, an `and' with a constant is redundant if
        !           190:    all the zero bits are already known to be turned off.
        !           191: 
        !           192:    We use an approach similar to that used by cse, but change it in the
        !           193:    following ways:
        !           194: 
        !           195:    (1) We do not want to reinitialize at each label.
        !           196:    (2) It is useful, but not critical, to know the actual value assigned
        !           197:        to a register.  Often just its form is helpful.
        !           198: 
        !           199:    Therefore, we maintain the following arrays:
        !           200: 
        !           201:    reg_last_set_value          the last value assigned
        !           202:    reg_last_set_label          records the value of label_tick when the
        !           203:                                register was assigned
        !           204:    reg_last_set_table_tick     records the value of label_tick when a
        !           205:                                value using the register is assigned
        !           206:    reg_last_set_invalid                set to non-zero when it is not valid
        !           207:                                to use the value of this register in some
        !           208:                                register's value
        !           209: 
        !           210:    To understand the usage of these tables, it is important to understand
        !           211:    the distinction between the value in reg_last_set_value being valid
        !           212:    and the register being validly contained in some other expression in the
        !           213:    table.
        !           214: 
        !           215:    Entry I in reg_last_set_value is valid if it is non-zero, and either
        !           216:    reg_n_sets[i] is 1 or reg_last_set_label[i] == label_tick.
        !           217: 
        !           218:    Register I may validly appear in any expression returned for the value
        !           219:    of another register if reg_n_sets[i] is 1.  It may also appear in the
        !           220:    value for register J if reg_last_set_label[i] < reg_last_set_label[j] or
        !           221:    reg_last_set_invalid[j] is zero.
        !           222: 
        !           223:    If an expression is found in the table containing a register which may
        !           224:    not validly appear in an expression, the register is replaced by
        !           225:    something that won't match, (clobber (const_int 0)).
        !           226: 
        !           227:    reg_last_set_invalid[i] is set non-zero when register I is being assigned
        !           228:    to and reg_last_set_table_tick[i] == label_tick.  */
        !           229: 
        !           230: /* Record last value assigned to (hard or pseudo) register n. */
        !           231: 
        !           232: static rtx *reg_last_set_value;
        !           233: 
        !           234: /* Record the value of label_tick when the value for register n is placed in
        !           235:    reg_last_set_value[n].  */
        !           236: 
        !           237: static int *reg_last_set_label;
        !           238: 
        !           239: /* Record the value of label_tick when an expression involving register n
        !           240:    is placed in reg_last_set_value. */
        !           241: 
        !           242: static int *reg_last_set_table_tick;
        !           243: 
        !           244: /* Set non-zero if references to register n in expressions should not be
        !           245:    used.  */
        !           246: 
        !           247: static char *reg_last_set_invalid;
        !           248: 
        !           249: /* Incremented for each label. */
        !           250: 
        !           251: static int label_tick;
        !           252: 
        !           253: /* Some registers that are set more than once and used in more than one
        !           254:    basic block are nevertheless always set in similar ways.  For example,
        !           255:    a QImode register may be loaded from memory in two places on a machine
        !           256:    where byte loads zero extend.
        !           257: 
        !           258:    We record in the following array what we know about the nonzero
        !           259:    bits of a register, specifically which bits are known to be zero.
        !           260: 
        !           261:    If an entry is zero, it means that we don't know anything special.  */
        !           262: 
        !           263: static unsigned HOST_WIDE_INT *reg_nonzero_bits;
        !           264: 
        !           265: /* Mode used to compute significance in reg_nonzero_bits.  It is the largest
        !           266:    integer mode that can fit in HOST_BITS_PER_WIDE_INT.  */
        !           267: 
        !           268: static enum machine_mode nonzero_bits_mode;
        !           269: 
        !           270: /* Nonzero if we know that a register has some leading bits that are always
        !           271:    equal to the sign bit.  */
        !           272: 
        !           273: static char *reg_sign_bit_copies;
        !           274: 
        !           275: /* Nonzero when reg_nonzero_bits and reg_sign_bit_copies can be safely used.
        !           276:    It is zero while computing them and after combine has completed.  This
        !           277:    former test prevents propagating values based on previously set values,
        !           278:    which can be incorrect if a variable is modified in a loop.  */
        !           279: 
        !           280: static int nonzero_sign_valid;
        !           281: 
        !           282: /* These arrays are maintained in parallel with reg_last_set_value
        !           283:    and are used to store the mode in which the register was last set,
        !           284:    the bits that were known to be zero when it was last set, and the
        !           285:    number of sign bits copies it was known to have when it was last set.  */
        !           286: 
        !           287: static enum machine_mode *reg_last_set_mode;
        !           288: static unsigned HOST_WIDE_INT *reg_last_set_nonzero_bits;
        !           289: static char *reg_last_set_sign_bit_copies;
        !           290: 
        !           291: /* Record one modification to rtl structure
        !           292:    to be undone by storing old_contents into *where.
        !           293:    is_int is 1 if the contents are an int.  */
        !           294: 
        !           295: struct undo
        !           296: {
        !           297:   int is_int;
        !           298:   union {rtx r; int i;} old_contents;
        !           299:   union {rtx *r; int *i;} where;
        !           300: };
        !           301: 
        !           302: /* Record a bunch of changes to be undone, up to MAX_UNDO of them.
        !           303:    num_undo says how many are currently recorded.
        !           304: 
        !           305:    storage is nonzero if we must undo the allocation of new storage.
        !           306:    The value of storage is what to pass to obfree.
        !           307: 
        !           308:    other_insn is nonzero if we have modified some other insn in the process
        !           309:    of working on subst_insn.  It must be verified too.  */
        !           310: 
        !           311: #define MAX_UNDO 50
        !           312: 
        !           313: struct undobuf
        !           314: {
        !           315:   int num_undo;
        !           316:   char *storage;
        !           317:   struct undo undo[MAX_UNDO];
        !           318:   rtx other_insn;
        !           319: };
        !           320: 
        !           321: static struct undobuf undobuf;
        !           322: 
        !           323: /* Substitute NEWVAL, an rtx expression, into INTO, a place in some
        !           324:    insn.  The substitution can be undone by undo_all.  If INTO is already
        !           325:    set to NEWVAL, do not record this change.  Because computing NEWVAL might
        !           326:    also call SUBST, we have to compute it before we put anything into
        !           327:    the undo table.  */
        !           328: 
        !           329: #define SUBST(INTO, NEWVAL)  \
        !           330:  do { rtx _new = (NEWVAL);                                             \
        !           331:       if (undobuf.num_undo < MAX_UNDO)                                 \
        !           332:        {                                                               \
        !           333:          undobuf.undo[undobuf.num_undo].is_int = 0;                    \
        !           334:          undobuf.undo[undobuf.num_undo].where.r = &INTO;               \
        !           335:          undobuf.undo[undobuf.num_undo].old_contents.r = INTO; \
        !           336:          INTO = _new;                                                  \
        !           337:          if (undobuf.undo[undobuf.num_undo].old_contents.r != INTO)    \
        !           338:            undobuf.num_undo++;                                         \
        !           339:        }                                                               \
        !           340:     } while (0)
        !           341: 
        !           342: /* Similar to SUBST, but NEWVAL is an int.  INTO will normally be an XINT
        !           343:    expression.
        !           344:    Note that substitution for the value of a CONST_INT is not safe.  */
        !           345: 
        !           346: #define SUBST_INT(INTO, NEWVAL)  \
        !           347:  do { if (undobuf.num_undo < MAX_UNDO)                                 \
        !           348: {                                                                      \
        !           349:          undobuf.undo[undobuf.num_undo].is_int = 1;                    \
        !           350:          undobuf.undo[undobuf.num_undo].where.i = (int *) &INTO;       \
        !           351:          undobuf.undo[undobuf.num_undo].old_contents.i = INTO;         \
        !           352:          INTO = NEWVAL;                                                \
        !           353:          if (undobuf.undo[undobuf.num_undo].old_contents.i != INTO)    \
        !           354:            undobuf.num_undo++;                                         \
        !           355:        }                                                               \
        !           356:      } while (0)
        !           357: 
        !           358: /* Number of times the pseudo being substituted for
        !           359:    was found and replaced.  */
        !           360: 
        !           361: static int n_occurrences;
        !           362: 
        !           363: static void init_reg_last_arrays       PROTO(());
        !           364: static void setup_incoming_promotions   PROTO(());
        !           365: static void set_nonzero_bits_and_sign_copies  PROTO((rtx, rtx));
        !           366: static int can_combine_p       PROTO((rtx, rtx, rtx, rtx, rtx *, rtx *));
        !           367: static int combinable_i3pat    PROTO((rtx, rtx *, rtx, rtx, int, rtx *));
        !           368: static rtx try_combine         PROTO((rtx, rtx, rtx));
        !           369: static void undo_all           PROTO((void));
        !           370: static rtx *find_split_point   PROTO((rtx *, rtx));
        !           371: static rtx subst               PROTO((rtx, rtx, rtx, int, int));
        !           372: static rtx expand_compound_operation  PROTO((rtx));
        !           373: static rtx expand_field_assignment  PROTO((rtx));
        !           374: static rtx make_extraction     PROTO((enum machine_mode, rtx, int, rtx, int,
        !           375:                                       int, int, int));
        !           376: static rtx make_compound_operation  PROTO((rtx, enum rtx_code));
        !           377: static int get_pos_from_mask   PROTO((unsigned HOST_WIDE_INT, int *));
        !           378: static rtx force_to_mode       PROTO((rtx, enum machine_mode,
        !           379:                                       unsigned HOST_WIDE_INT, rtx, int));
        !           380: static rtx known_cond          PROTO((rtx, enum rtx_code, rtx, rtx));
        !           381: static rtx make_field_assignment  PROTO((rtx));
        !           382: static rtx apply_distributive_law  PROTO((rtx));
        !           383: static rtx simplify_and_const_int  PROTO((rtx, enum machine_mode, rtx,
        !           384:                                          unsigned HOST_WIDE_INT));
        !           385: static unsigned HOST_WIDE_INT nonzero_bits  PROTO((rtx, enum machine_mode));
        !           386: static int num_sign_bit_copies  PROTO((rtx, enum machine_mode));
        !           387: static int merge_outer_ops     PROTO((enum rtx_code *, HOST_WIDE_INT *,
        !           388:                                       enum rtx_code, HOST_WIDE_INT,
        !           389:                                       enum machine_mode, int *));
        !           390: static rtx simplify_shift_const        PROTO((rtx, enum rtx_code, enum machine_mode,
        !           391:                                       rtx, int));
        !           392: static int recog_for_combine   PROTO((rtx *, rtx, rtx *));
        !           393: static rtx gen_lowpart_for_combine  PROTO((enum machine_mode, rtx));
        !           394: static rtx gen_rtx_combine ();  /* This is varargs.  */
        !           395: static rtx gen_binary          PROTO((enum rtx_code, enum machine_mode,
        !           396:                                       rtx, rtx));
        !           397: static rtx gen_unary           PROTO((enum rtx_code, enum machine_mode, rtx));
        !           398: static enum rtx_code simplify_comparison  PROTO((enum rtx_code, rtx *, rtx *));
        !           399: static int reversible_comparison_p  PROTO((rtx));
        !           400: static void update_table_tick  PROTO((rtx));
        !           401: static void record_value_for_reg  PROTO((rtx, rtx, rtx));
        !           402: static void record_dead_and_set_regs_1  PROTO((rtx, rtx));
        !           403: static void record_dead_and_set_regs  PROTO((rtx));
        !           404: static int get_last_value_validate  PROTO((rtx *, int, int));
        !           405: static rtx get_last_value      PROTO((rtx));
        !           406: static int use_crosses_set_p   PROTO((rtx, int));
        !           407: static void reg_dead_at_p_1    PROTO((rtx, rtx));
        !           408: static int reg_dead_at_p       PROTO((rtx, rtx));
        !           409: static void move_deaths                PROTO((rtx, int, rtx, rtx *));
        !           410: static int reg_bitfield_target_p  PROTO((rtx, rtx));
        !           411: static void distribute_notes   PROTO((rtx, rtx, rtx, rtx, rtx, rtx));
        !           412: static void distribute_links   PROTO((rtx));
        !           413: 
        !           414: /* Main entry point for combiner.  F is the first insn of the function.
        !           415:    NREGS is the first unused pseudo-reg number.  */
        !           416: 
        !           417: void
        !           418: combine_instructions (f, nregs)
        !           419:      rtx f;
        !           420:      int nregs;
        !           421: {
        !           422:   register rtx insn, next, prev;
        !           423:   register int i;
        !           424:   register rtx links, nextlinks;
        !           425: 
        !           426:   combine_attempts = 0;
        !           427:   combine_merges = 0;
        !           428:   combine_extras = 0;
        !           429:   combine_successes = 0;
        !           430:   undobuf.num_undo = previous_num_undos = 0;
        !           431: 
        !           432:   combine_max_regno = nregs;
        !           433: 
        !           434:   reg_nonzero_bits
        !           435:     = (unsigned HOST_WIDE_INT *) alloca (nregs * sizeof (HOST_WIDE_INT));
        !           436:   reg_sign_bit_copies = (char *) alloca (nregs * sizeof (char));
        !           437: 
        !           438:   bzero (reg_nonzero_bits, nregs * sizeof (HOST_WIDE_INT));
        !           439:   bzero (reg_sign_bit_copies, nregs * sizeof (char));
        !           440: 
        !           441:   reg_last_death = (rtx *) alloca (nregs * sizeof (rtx));
        !           442:   reg_last_set = (rtx *) alloca (nregs * sizeof (rtx));
        !           443:   reg_last_set_value = (rtx *) alloca (nregs * sizeof (rtx));
        !           444:   reg_last_set_table_tick = (int *) alloca (nregs * sizeof (int));
        !           445:   reg_last_set_label = (int *) alloca (nregs * sizeof (int));
        !           446:   reg_last_set_invalid = (char *) alloca (nregs * sizeof (char));
        !           447:   reg_last_set_mode
        !           448:     = (enum machine_mode *) alloca (nregs * sizeof (enum machine_mode));
        !           449:   reg_last_set_nonzero_bits
        !           450:     = (unsigned HOST_WIDE_INT *) alloca (nregs * sizeof (HOST_WIDE_INT));
        !           451:   reg_last_set_sign_bit_copies
        !           452:     = (char *) alloca (nregs * sizeof (char));
        !           453: 
        !           454:   init_reg_last_arrays ();
        !           455: 
        !           456:   init_recog_no_volatile ();
        !           457: 
        !           458:   /* Compute maximum uid value so uid_cuid can be allocated.  */
        !           459: 
        !           460:   for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
        !           461:     if (INSN_UID (insn) > i)
        !           462:       i = INSN_UID (insn);
        !           463: 
        !           464:   uid_cuid = (int *) alloca ((i + 1) * sizeof (int));
        !           465: 
        !           466:   nonzero_bits_mode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
        !           467: 
        !           468:   /* Don't use reg_nonzero_bits when computing it.  This can cause problems
        !           469:      when, for example, we have j <<= 1 in a loop.  */
        !           470: 
        !           471:   nonzero_sign_valid = 0;
        !           472: 
        !           473:   /* Compute the mapping from uids to cuids.
        !           474:      Cuids are numbers assigned to insns, like uids,
        !           475:      except that cuids increase monotonically through the code. 
        !           476: 
        !           477:      Scan all SETs and see if we can deduce anything about what
        !           478:      bits are known to be zero for some registers and how many copies
        !           479:      of the sign bit are known to exist for those registers.
        !           480: 
        !           481:      Also set any known values so that we can use it while searching
        !           482:      for what bits are known to be set.  */
        !           483: 
        !           484:   label_tick = 1;
        !           485: 
        !           486:   setup_incoming_promotions ();
        !           487: 
        !           488:   for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
        !           489:     {
        !           490:       INSN_CUID (insn) = ++i;
        !           491:       subst_low_cuid = i;
        !           492:       subst_insn = insn;
        !           493: 
        !           494:       if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
        !           495:        {
        !           496:          note_stores (PATTERN (insn), set_nonzero_bits_and_sign_copies);
        !           497:          record_dead_and_set_regs (insn);
        !           498:        }
        !           499: 
        !           500:       if (GET_CODE (insn) == CODE_LABEL)
        !           501:        label_tick++;
        !           502:     }
        !           503: 
        !           504:   nonzero_sign_valid = 1;
        !           505: 
        !           506:   /* Now scan all the insns in forward order.  */
        !           507: 
        !           508:   this_basic_block = -1;
        !           509:   label_tick = 1;
        !           510:   last_call_cuid = 0;
        !           511:   mem_last_set = 0;
        !           512:   init_reg_last_arrays ();
        !           513:   setup_incoming_promotions ();
        !           514: 
        !           515:   for (insn = f; insn; insn = next ? next : NEXT_INSN (insn))
        !           516:     {
        !           517:       next = 0;
        !           518: 
        !           519:       /* If INSN starts a new basic block, update our basic block number.  */
        !           520:       if (this_basic_block + 1 < n_basic_blocks
        !           521:          && basic_block_head[this_basic_block + 1] == insn)
        !           522:        this_basic_block++;
        !           523: 
        !           524:       if (GET_CODE (insn) == CODE_LABEL)
        !           525:        label_tick++;
        !           526: 
        !           527:       else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
        !           528:        {
        !           529:          /* Try this insn with each insn it links back to.  */
        !           530: 
        !           531:          for (links = LOG_LINKS (insn); links; links = XEXP (links, 1))
        !           532:            if ((next = try_combine (insn, XEXP (links, 0), NULL_RTX)) != 0)
        !           533:              goto retry;
        !           534: 
        !           535:          /* Try each sequence of three linked insns ending with this one.  */
        !           536: 
        !           537:          for (links = LOG_LINKS (insn); links; links = XEXP (links, 1))
        !           538:            for (nextlinks = LOG_LINKS (XEXP (links, 0)); nextlinks;
        !           539:                 nextlinks = XEXP (nextlinks, 1))
        !           540:              if ((next = try_combine (insn, XEXP (links, 0),
        !           541:                                       XEXP (nextlinks, 0))) != 0)
        !           542:                goto retry;
        !           543: 
        !           544: #ifdef HAVE_cc0
        !           545:          /* Try to combine a jump insn that uses CC0
        !           546:             with a preceding insn that sets CC0, and maybe with its
        !           547:             logical predecessor as well.
        !           548:             This is how we make decrement-and-branch insns.
        !           549:             We need this special code because data flow connections
        !           550:             via CC0 do not get entered in LOG_LINKS.  */
        !           551: 
        !           552:          if (GET_CODE (insn) == JUMP_INSN
        !           553:              && (prev = prev_nonnote_insn (insn)) != 0
        !           554:              && GET_CODE (prev) == INSN
        !           555:              && sets_cc0_p (PATTERN (prev)))
        !           556:            {
        !           557:              if ((next = try_combine (insn, prev, NULL_RTX)) != 0)
        !           558:                goto retry;
        !           559: 
        !           560:              for (nextlinks = LOG_LINKS (prev); nextlinks;
        !           561:                   nextlinks = XEXP (nextlinks, 1))
        !           562:                if ((next = try_combine (insn, prev,
        !           563:                                         XEXP (nextlinks, 0))) != 0)
        !           564:                  goto retry;
        !           565:            }
        !           566: 
        !           567:          /* Do the same for an insn that explicitly references CC0.  */
        !           568:          if (GET_CODE (insn) == INSN
        !           569:              && (prev = prev_nonnote_insn (insn)) != 0
        !           570:              && GET_CODE (prev) == INSN
        !           571:              && sets_cc0_p (PATTERN (prev))
        !           572:              && GET_CODE (PATTERN (insn)) == SET
        !           573:              && reg_mentioned_p (cc0_rtx, SET_SRC (PATTERN (insn))))
        !           574:            {
        !           575:              if ((next = try_combine (insn, prev, NULL_RTX)) != 0)
        !           576:                goto retry;
        !           577: 
        !           578:              for (nextlinks = LOG_LINKS (prev); nextlinks;
        !           579:                   nextlinks = XEXP (nextlinks, 1))
        !           580:                if ((next = try_combine (insn, prev,
        !           581:                                         XEXP (nextlinks, 0))) != 0)
        !           582:                  goto retry;
        !           583:            }
        !           584: 
        !           585:          /* Finally, see if any of the insns that this insn links to
        !           586:             explicitly references CC0.  If so, try this insn, that insn,
        !           587:             and its predecessor if it sets CC0.  */
        !           588:          for (links = LOG_LINKS (insn); links; links = XEXP (links, 1))
        !           589:            if (GET_CODE (XEXP (links, 0)) == INSN
        !           590:                && GET_CODE (PATTERN (XEXP (links, 0))) == SET
        !           591:                && reg_mentioned_p (cc0_rtx, SET_SRC (PATTERN (XEXP (links, 0))))
        !           592:                && (prev = prev_nonnote_insn (XEXP (links, 0))) != 0
        !           593:                && GET_CODE (prev) == INSN
        !           594:                && sets_cc0_p (PATTERN (prev))
        !           595:                && (next = try_combine (insn, XEXP (links, 0), prev)) != 0)
        !           596:              goto retry;
        !           597: #endif
        !           598: 
        !           599:          /* Try combining an insn with two different insns whose results it
        !           600:             uses.  */
        !           601:          for (links = LOG_LINKS (insn); links; links = XEXP (links, 1))
        !           602:            for (nextlinks = XEXP (links, 1); nextlinks;
        !           603:                 nextlinks = XEXP (nextlinks, 1))
        !           604:              if ((next = try_combine (insn, XEXP (links, 0),
        !           605:                                       XEXP (nextlinks, 0))) != 0)
        !           606:                goto retry;
        !           607: 
        !           608:          if (GET_CODE (insn) != NOTE)
        !           609:            record_dead_and_set_regs (insn);
        !           610: 
        !           611:        retry:
        !           612:          ;
        !           613:        }
        !           614:     }
        !           615: 
        !           616:   total_attempts += combine_attempts;
        !           617:   total_merges += combine_merges;
        !           618:   total_extras += combine_extras;
        !           619:   total_successes += combine_successes;
        !           620: 
        !           621:   nonzero_sign_valid = 0;
        !           622: }
        !           623: 
        !           624: /* Wipe the reg_last_xxx arrays in preparation for another pass.  */
        !           625: 
        !           626: static void
        !           627: init_reg_last_arrays ()
        !           628: {
        !           629:   int nregs = combine_max_regno;
        !           630: 
        !           631:   bzero (reg_last_death, nregs * sizeof (rtx));
        !           632:   bzero (reg_last_set, nregs * sizeof (rtx));
        !           633:   bzero (reg_last_set_value, nregs * sizeof (rtx));
        !           634:   bzero (reg_last_set_table_tick, nregs * sizeof (int));
        !           635:   bzero (reg_last_set_label, nregs * sizeof (int));
        !           636:   bzero (reg_last_set_invalid, nregs * sizeof (char));
        !           637:   bzero (reg_last_set_mode, nregs * sizeof (enum machine_mode));
        !           638:   bzero (reg_last_set_nonzero_bits, nregs * sizeof (HOST_WIDE_INT));
        !           639:   bzero (reg_last_set_sign_bit_copies, nregs * sizeof (char));
        !           640: }
        !           641: 
        !           642: /* Set up any promoted values for incoming argument registers.  */
        !           643: 
        !           644: static void
        !           645: setup_incoming_promotions ()
        !           646: {
        !           647: #ifdef PROMOTE_FUNCTION_ARGS
        !           648:   int regno;
        !           649:   rtx reg;
        !           650:   enum machine_mode mode;
        !           651:   int unsignedp;
        !           652:   rtx first = get_insns ();
        !           653: 
        !           654:   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
        !           655:     if (FUNCTION_ARG_REGNO_P (regno)
        !           656:        && (reg = promoted_input_arg (regno, &mode, &unsignedp)) != 0)
        !           657:       record_value_for_reg (reg, first,
        !           658:                            gen_rtx (unsignedp ? ZERO_EXTEND : SIGN_EXTEND,
        !           659:                                     GET_MODE (reg),
        !           660:                                     gen_rtx (CLOBBER, mode, const0_rtx)));
        !           661: #endif
        !           662: }
        !           663: 
        !           664: /* Called via note_stores.  If X is a pseudo that is used in more than
        !           665:    one basic block, is narrower that HOST_BITS_PER_WIDE_INT, and is being
        !           666:    set, record what bits are known zero.  If we are clobbering X,
        !           667:    ignore this "set" because the clobbered value won't be used. 
        !           668: 
        !           669:    If we are setting only a portion of X and we can't figure out what
        !           670:    portion, assume all bits will be used since we don't know what will
        !           671:    be happening.
        !           672: 
        !           673:    Similarly, set how many bits of X are known to be copies of the sign bit
        !           674:    at all locations in the function.  This is the smallest number implied 
        !           675:    by any set of X.  */
        !           676: 
        !           677: static void
        !           678: set_nonzero_bits_and_sign_copies (x, set)
        !           679:      rtx x;
        !           680:      rtx set;
        !           681: {
        !           682:   int num;
        !           683: 
        !           684:   if (GET_CODE (x) == REG
        !           685:       && REGNO (x) >= FIRST_PSEUDO_REGISTER
        !           686:       && reg_n_sets[REGNO (x)] > 1
        !           687:       && reg_basic_block[REGNO (x)] < 0
        !           688:       /* If this register is undefined at the start of the file, we can't
        !           689:         say what its contents were.  */
        !           690:       && ! (basic_block_live_at_start[0][REGNO (x) / REGSET_ELT_BITS]
        !           691:            & ((REGSET_ELT_TYPE) 1 << (REGNO (x) % REGSET_ELT_BITS)))
        !           692:       && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT)
        !           693:     {
        !           694:       if (GET_CODE (set) == CLOBBER)
        !           695:        {
        !           696:          reg_nonzero_bits[REGNO (x)] = GET_MODE_MASK (GET_MODE (x));
        !           697:          reg_sign_bit_copies[REGNO (x)] = 0;
        !           698:          return;
        !           699:        }
        !           700: 
        !           701:       /* If this is a complex assignment, see if we can convert it into a
        !           702:         simple assignment.  */
        !           703:       set = expand_field_assignment (set);
        !           704: 
        !           705:       /* If this is a simple assignment, or we have a paradoxical SUBREG,
        !           706:         set what we know about X.  */
        !           707: 
        !           708:       if (SET_DEST (set) == x
        !           709:          || (GET_CODE (SET_DEST (set)) == SUBREG
        !           710:              && (GET_MODE_SIZE (GET_MODE (SET_DEST (set)))
        !           711:                  > GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (set)))))
        !           712:              && SUBREG_REG (SET_DEST (set)) == x))
        !           713:        {
        !           714:          rtx src = SET_SRC (set);
        !           715: 
        !           716: #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
        !           717:          /* If X is narrower than a word and SRC is a non-negative
        !           718:             constant that would appear negative in the mode of X,
        !           719:             sign-extend it for use in reg_nonzero_bits because some
        !           720:             machines (maybe most) will actually do the sign-extension
        !           721:             and this is the conservative approach. 
        !           722: 
        !           723:             ??? For 2.5, try to tighten up the MD files in this regard
        !           724:             instead of this kludge.  */
        !           725: 
        !           726:          if (GET_MODE_BITSIZE (GET_MODE (x)) < BITS_PER_WORD
        !           727:              && GET_CODE (src) == CONST_INT
        !           728:              && INTVAL (src) > 0
        !           729:              && 0 != (INTVAL (src)
        !           730:                       & ((HOST_WIDE_INT) 1
        !           731:                          << GET_MODE_BITSIZE (GET_MODE (x)))))
        !           732:            src = GEN_INT (INTVAL (src)
        !           733:                           | ((HOST_WIDE_INT) (-1)
        !           734:                              << GET_MODE_BITSIZE (GET_MODE (x))));
        !           735: #endif
        !           736: 
        !           737:          reg_nonzero_bits[REGNO (x)]
        !           738:            |= nonzero_bits (src, nonzero_bits_mode);
        !           739:          num = num_sign_bit_copies (SET_SRC (set), GET_MODE (x));
        !           740:          if (reg_sign_bit_copies[REGNO (x)] == 0
        !           741:              || reg_sign_bit_copies[REGNO (x)] > num)
        !           742:            reg_sign_bit_copies[REGNO (x)] = num;
        !           743:        }
        !           744:       else
        !           745:        {
        !           746:          reg_nonzero_bits[REGNO (x)] = GET_MODE_MASK (GET_MODE (x));
        !           747:          reg_sign_bit_copies[REGNO (x)] = 0;
        !           748:        }
        !           749:     }
        !           750: }
        !           751: 
        !           752: /* See if INSN can be combined into I3.  PRED and SUCC are optionally
        !           753:    insns that were previously combined into I3 or that will be combined
        !           754:    into the merger of INSN and I3.
        !           755: 
        !           756:    Return 0 if the combination is not allowed for any reason.
        !           757: 
        !           758:    If the combination is allowed, *PDEST will be set to the single 
        !           759:    destination of INSN and *PSRC to the single source, and this function
        !           760:    will return 1.  */
        !           761: 
        !           762: static int
        !           763: can_combine_p (insn, i3, pred, succ, pdest, psrc)
        !           764:      rtx insn;
        !           765:      rtx i3;
        !           766:      rtx pred, succ;
        !           767:      rtx *pdest, *psrc;
        !           768: {
        !           769:   int i;
        !           770:   rtx set = 0, src, dest;
        !           771:   rtx p, link;
        !           772:   int all_adjacent = (succ ? (next_active_insn (insn) == succ
        !           773:                              && next_active_insn (succ) == i3)
        !           774:                      : next_active_insn (insn) == i3);
        !           775: 
        !           776:   /* Can combine only if previous insn is a SET of a REG, a SUBREG or CC0.
        !           777:      or a PARALLEL consisting of such a SET and CLOBBERs. 
        !           778: 
        !           779:      If INSN has CLOBBER parallel parts, ignore them for our processing.
        !           780:      By definition, these happen during the execution of the insn.  When it
        !           781:      is merged with another insn, all bets are off.  If they are, in fact,
        !           782:      needed and aren't also supplied in I3, they may be added by
        !           783:      recog_for_combine.  Otherwise, it won't match. 
        !           784: 
        !           785:      We can also ignore a SET whose SET_DEST is mentioned in a REG_UNUSED
        !           786:      note.
        !           787: 
        !           788:      Get the source and destination of INSN.  If more than one, can't 
        !           789:      combine.  */
        !           790:      
        !           791:   if (GET_CODE (PATTERN (insn)) == SET)
        !           792:     set = PATTERN (insn);
        !           793:   else if (GET_CODE (PATTERN (insn)) == PARALLEL
        !           794:           && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
        !           795:     {
        !           796:       for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
        !           797:        {
        !           798:          rtx elt = XVECEXP (PATTERN (insn), 0, i);
        !           799: 
        !           800:          switch (GET_CODE (elt))
        !           801:            {
        !           802:              /* We can ignore CLOBBERs.  */
        !           803:            case CLOBBER:
        !           804:              break;
        !           805: 
        !           806:            case SET:
        !           807:              /* Ignore SETs whose result isn't used but not those that
        !           808:                 have side-effects.  */
        !           809:              if (find_reg_note (insn, REG_UNUSED, SET_DEST (elt))
        !           810:                  && ! side_effects_p (elt))
        !           811:                break;
        !           812: 
        !           813:              /* If we have already found a SET, this is a second one and
        !           814:                 so we cannot combine with this insn.  */
        !           815:              if (set)
        !           816:                return 0;
        !           817: 
        !           818:              set = elt;
        !           819:              break;
        !           820: 
        !           821:            default:
        !           822:              /* Anything else means we can't combine.  */
        !           823:              return 0;
        !           824:            }
        !           825:        }
        !           826: 
        !           827:       if (set == 0
        !           828:          /* If SET_SRC is an ASM_OPERANDS we can't throw away these CLOBBERs,
        !           829:             so don't do anything with it.  */
        !           830:          || GET_CODE (SET_SRC (set)) == ASM_OPERANDS)
        !           831:        return 0;
        !           832:     }
        !           833:   else
        !           834:     return 0;
        !           835: 
        !           836:   if (set == 0)
        !           837:     return 0;
        !           838: 
        !           839:   set = expand_field_assignment (set);
        !           840:   src = SET_SRC (set), dest = SET_DEST (set);
        !           841: 
        !           842:   /* Don't eliminate a store in the stack pointer.  */
        !           843:   if (dest == stack_pointer_rtx
        !           844:       /* If we couldn't eliminate a field assignment, we can't combine.  */
        !           845:       || GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == STRICT_LOW_PART
        !           846:       /* Don't combine with an insn that sets a register to itself if it has
        !           847:         a REG_EQUAL note.  This may be part of a REG_NO_CONFLICT sequence.  */
        !           848:       || (rtx_equal_p (src, dest) && find_reg_note (insn, REG_EQUAL, NULL_RTX))
        !           849:       /* Can't merge a function call.  */
        !           850:       || GET_CODE (src) == CALL
        !           851:       /* Don't substitute into an incremented register.  */
        !           852:       || FIND_REG_INC_NOTE (i3, dest)
        !           853:       || (succ && FIND_REG_INC_NOTE (succ, dest))
        !           854:       /* Don't combine the end of a libcall into anything.  */
        !           855:       || find_reg_note (insn, REG_RETVAL, NULL_RTX)
        !           856:       /* Make sure that DEST is not used after SUCC but before I3.  */
        !           857:       || (succ && ! all_adjacent
        !           858:          && reg_used_between_p (dest, succ, i3))
        !           859:       /* Make sure that the value that is to be substituted for the register
        !           860:         does not use any registers whose values alter in between.  However,
        !           861:         If the insns are adjacent, a use can't cross a set even though we
        !           862:         think it might (this can happen for a sequence of insns each setting
        !           863:         the same destination; reg_last_set of that register might point to
        !           864:         a NOTE).  If INSN has a REG_EQUIV note, the register is always
        !           865:         equivalent to the memory so the substitution is valid even if there
        !           866:         are intervening stores.  Also, don't move a volatile asm or
        !           867:         UNSPEC_VOLATILE across any other insns.  */
        !           868:       || (! all_adjacent
        !           869:          && (((GET_CODE (src) != MEM
        !           870:                || ! find_reg_note (insn, REG_EQUIV, src))
        !           871:               && use_crosses_set_p (src, INSN_CUID (insn)))
        !           872:              || (GET_CODE (src) == ASM_OPERANDS && MEM_VOLATILE_P (src))
        !           873:              || GET_CODE (src) == UNSPEC_VOLATILE))
        !           874:       /* If there is a REG_NO_CONFLICT note for DEST in I3 or SUCC, we get
        !           875:         better register allocation by not doing the combine.  */
        !           876:       || find_reg_note (i3, REG_NO_CONFLICT, dest)
        !           877:       || (succ && find_reg_note (succ, REG_NO_CONFLICT, dest))
        !           878:       /* Don't combine across a CALL_INSN, because that would possibly
        !           879:         change whether the life span of some REGs crosses calls or not,
        !           880:         and it is a pain to update that information.
        !           881:         Exception: if source is a constant, moving it later can't hurt.
        !           882:         Accept that special case, because it helps -fforce-addr a lot.  */
        !           883:       || (INSN_CUID (insn) < last_call_cuid && ! CONSTANT_P (src)))
        !           884:     return 0;
        !           885: 
        !           886:   /* DEST must either be a REG or CC0.  */
        !           887:   if (GET_CODE (dest) == REG)
        !           888:     {
        !           889:       /* If register alignment is being enforced for multi-word items in all
        !           890:         cases except for parameters, it is possible to have a register copy
        !           891:         insn referencing a hard register that is not allowed to contain the
        !           892:         mode being copied and which would not be valid as an operand of most
        !           893:         insns.  Eliminate this problem by not combining with such an insn.
        !           894: 
        !           895:         Also, on some machines we don't want to extend the life of a hard
        !           896:         register.  */
        !           897: 
        !           898:       if (GET_CODE (src) == REG
        !           899:          && ((REGNO (dest) < FIRST_PSEUDO_REGISTER
        !           900:               && ! HARD_REGNO_MODE_OK (REGNO (dest), GET_MODE (dest)))
        !           901: #ifdef SMALL_REGISTER_CLASSES
        !           902:              /* Don't extend the life of a hard register.  */
        !           903:              || REGNO (src) < FIRST_PSEUDO_REGISTER
        !           904: #else
        !           905:              || (REGNO (src) < FIRST_PSEUDO_REGISTER
        !           906:                  && ! HARD_REGNO_MODE_OK (REGNO (src), GET_MODE (src)))
        !           907: #endif
        !           908:          ))
        !           909:        return 0;
        !           910:     }
        !           911:   else if (GET_CODE (dest) != CC0)
        !           912:     return 0;
        !           913: 
        !           914:   /* Don't substitute for a register intended as a clobberable operand.
        !           915:      Similarly, don't substitute an expression containing a register that
        !           916:      will be clobbered in I3.  */
        !           917:   if (GET_CODE (PATTERN (i3)) == PARALLEL)
        !           918:     for (i = XVECLEN (PATTERN (i3), 0) - 1; i >= 0; i--)
        !           919:       if (GET_CODE (XVECEXP (PATTERN (i3), 0, i)) == CLOBBER
        !           920:          && (reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (i3), 0, i), 0),
        !           921:                                       src)
        !           922:              || rtx_equal_p (XEXP (XVECEXP (PATTERN (i3), 0, i), 0), dest)))
        !           923:        return 0;
        !           924: 
        !           925:   /* If INSN contains anything volatile, or is an `asm' (whether volatile
        !           926:      or not), reject, unless nothing volatile comes between it and I3,
        !           927:      with the exception of SUCC.  */
        !           928: 
        !           929:   if (GET_CODE (src) == ASM_OPERANDS || volatile_refs_p (src))
        !           930:     for (p = NEXT_INSN (insn); p != i3; p = NEXT_INSN (p))
        !           931:       if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
        !           932:          && p != succ && volatile_refs_p (PATTERN (p)))
        !           933:        return 0;
        !           934: 
        !           935:   /* If there are any volatile insns between INSN and I3, reject, because
        !           936:      they might affect machine state.  */
        !           937: 
        !           938:   for (p = NEXT_INSN (insn); p != i3; p = NEXT_INSN (p))
        !           939:     if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
        !           940:        && p != succ && volatile_insn_p (PATTERN (p)))
        !           941:       return 0;
        !           942: 
        !           943:   /* If INSN or I2 contains an autoincrement or autodecrement,
        !           944:      make sure that register is not used between there and I3,
        !           945:      and not already used in I3 either.
        !           946:      Also insist that I3 not be a jump; if it were one
        !           947:      and the incremented register were spilled, we would lose.  */
        !           948: 
        !           949: #ifdef AUTO_INC_DEC
        !           950:   for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
        !           951:     if (REG_NOTE_KIND (link) == REG_INC
        !           952:        && (GET_CODE (i3) == JUMP_INSN
        !           953:            || reg_used_between_p (XEXP (link, 0), insn, i3)
        !           954:            || reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i3))))
        !           955:       return 0;
        !           956: #endif
        !           957: 
        !           958: #ifdef HAVE_cc0
        !           959:   /* Don't combine an insn that follows a CC0-setting insn.
        !           960:      An insn that uses CC0 must not be separated from the one that sets it.
        !           961:      We do, however, allow I2 to follow a CC0-setting insn if that insn
        !           962:      is passed as I1; in that case it will be deleted also.
        !           963:      We also allow combining in this case if all the insns are adjacent
        !           964:      because that would leave the two CC0 insns adjacent as well.
        !           965:      It would be more logical to test whether CC0 occurs inside I1 or I2,
        !           966:      but that would be much slower, and this ought to be equivalent.  */
        !           967: 
        !           968:   p = prev_nonnote_insn (insn);
        !           969:   if (p && p != pred && GET_CODE (p) == INSN && sets_cc0_p (PATTERN (p))
        !           970:       && ! all_adjacent)
        !           971:     return 0;
        !           972: #endif
        !           973: 
        !           974:   /* If we get here, we have passed all the tests and the combination is
        !           975:      to be allowed.  */
        !           976: 
        !           977:   *pdest = dest;
        !           978:   *psrc = src;
        !           979: 
        !           980:   return 1;
        !           981: }
        !           982: 
        !           983: /* LOC is the location within I3 that contains its pattern or the component
        !           984:    of a PARALLEL of the pattern.  We validate that it is valid for combining.
        !           985: 
        !           986:    One problem is if I3 modifies its output, as opposed to replacing it
        !           987:    entirely, we can't allow the output to contain I2DEST or I1DEST as doing
        !           988:    so would produce an insn that is not equivalent to the original insns.
        !           989: 
        !           990:    Consider:
        !           991: 
        !           992:          (set (reg:DI 101) (reg:DI 100))
        !           993:         (set (subreg:SI (reg:DI 101) 0) <foo>)
        !           994: 
        !           995:    This is NOT equivalent to:
        !           996: 
        !           997:          (parallel [(set (subreg:SI (reg:DI 100) 0) <foo>)
        !           998:                    (set (reg:DI 101) (reg:DI 100))])
        !           999: 
        !          1000:    Not only does this modify 100 (in which case it might still be valid
        !          1001:    if 100 were dead in I2), it sets 101 to the ORIGINAL value of 100. 
        !          1002: 
        !          1003:    We can also run into a problem if I2 sets a register that I1
        !          1004:    uses and I1 gets directly substituted into I3 (not via I2).  In that
        !          1005:    case, we would be getting the wrong value of I2DEST into I3, so we
        !          1006:    must reject the combination.  This case occurs when I2 and I1 both
        !          1007:    feed into I3, rather than when I1 feeds into I2, which feeds into I3.
        !          1008:    If I1_NOT_IN_SRC is non-zero, it means that finding I1 in the source
        !          1009:    of a SET must prevent combination from occurring.
        !          1010: 
        !          1011:    On machines where SMALL_REGISTER_CLASSES is defined, we don't combine
        !          1012:    if the destination of a SET is a hard register.
        !          1013: 
        !          1014:    Before doing the above check, we first try to expand a field assignment
        !          1015:    into a set of logical operations.
        !          1016: 
        !          1017:    If PI3_DEST_KILLED is non-zero, it is a pointer to a location in which
        !          1018:    we place a register that is both set and used within I3.  If more than one
        !          1019:    such register is detected, we fail.
        !          1020: 
        !          1021:    Return 1 if the combination is valid, zero otherwise.  */
        !          1022: 
        !          1023: static int
        !          1024: combinable_i3pat (i3, loc, i2dest, i1dest, i1_not_in_src, pi3dest_killed)
        !          1025:      rtx i3;
        !          1026:      rtx *loc;
        !          1027:      rtx i2dest;
        !          1028:      rtx i1dest;
        !          1029:      int i1_not_in_src;
        !          1030:      rtx *pi3dest_killed;
        !          1031: {
        !          1032:   rtx x = *loc;
        !          1033: 
        !          1034:   if (GET_CODE (x) == SET)
        !          1035:     {
        !          1036:       rtx set = expand_field_assignment (x);
        !          1037:       rtx dest = SET_DEST (set);
        !          1038:       rtx src = SET_SRC (set);
        !          1039:       rtx inner_dest = dest, inner_src = src;
        !          1040: 
        !          1041:       SUBST (*loc, set);
        !          1042: 
        !          1043:       while (GET_CODE (inner_dest) == STRICT_LOW_PART
        !          1044:             || GET_CODE (inner_dest) == SUBREG
        !          1045:             || GET_CODE (inner_dest) == ZERO_EXTRACT)
        !          1046:        inner_dest = XEXP (inner_dest, 0);
        !          1047: 
        !          1048:   /* We probably don't need this any more now that LIMIT_RELOAD_CLASS
        !          1049:      was added.  */
        !          1050: #if 0
        !          1051:       while (GET_CODE (inner_src) == STRICT_LOW_PART
        !          1052:             || GET_CODE (inner_src) == SUBREG
        !          1053:             || GET_CODE (inner_src) == ZERO_EXTRACT)
        !          1054:        inner_src = XEXP (inner_src, 0);
        !          1055: 
        !          1056:       /* If it is better that two different modes keep two different pseudos,
        !          1057:         avoid combining them.  This avoids producing the following pattern
        !          1058:         on a 386:
        !          1059:          (set (subreg:SI (reg/v:QI 21) 0)
        !          1060:               (lshiftrt:SI (reg/v:SI 20)
        !          1061:                   (const_int 24)))
        !          1062:         If that were made, reload could not handle the pair of
        !          1063:         reg 20/21, since it would try to get any GENERAL_REGS
        !          1064:         but some of them don't handle QImode.  */
        !          1065: 
        !          1066:       if (rtx_equal_p (inner_src, i2dest)
        !          1067:          && GET_CODE (inner_dest) == REG
        !          1068:          && ! MODES_TIEABLE_P (GET_MODE (i2dest), GET_MODE (inner_dest)))
        !          1069:        return 0;
        !          1070: #endif
        !          1071: 
        !          1072:       /* Check for the case where I3 modifies its output, as
        !          1073:         discussed above.  */
        !          1074:       if ((inner_dest != dest
        !          1075:           && (reg_overlap_mentioned_p (i2dest, inner_dest)
        !          1076:               || (i1dest && reg_overlap_mentioned_p (i1dest, inner_dest))))
        !          1077:          /* This is the same test done in can_combine_p except that we
        !          1078:             allow a hard register with SMALL_REGISTER_CLASSES if SRC is a
        !          1079:             CALL operation.  */
        !          1080:          || (GET_CODE (inner_dest) == REG
        !          1081:              && REGNO (inner_dest) < FIRST_PSEUDO_REGISTER
        !          1082: #ifdef SMALL_REGISTER_CLASSES
        !          1083:              && GET_CODE (src) != CALL
        !          1084: #else
        !          1085:              && ! HARD_REGNO_MODE_OK (REGNO (inner_dest),
        !          1086:                                       GET_MODE (inner_dest))
        !          1087: #endif
        !          1088:              )
        !          1089: 
        !          1090:          || (i1_not_in_src && reg_overlap_mentioned_p (i1dest, src)))
        !          1091:        return 0;
        !          1092: 
        !          1093:       /* If DEST is used in I3, it is being killed in this insn,
        !          1094:         so record that for later. 
        !          1095:         Never add REG_DEAD notes for the FRAME_POINTER_REGNUM or the
        !          1096:         STACK_POINTER_REGNUM, since these are always considered to be
        !          1097:         live.  Similarly for ARG_POINTER_REGNUM if it is fixed.  */
        !          1098:       if (pi3dest_killed && GET_CODE (dest) == REG
        !          1099:          && reg_referenced_p (dest, PATTERN (i3))
        !          1100:          && REGNO (dest) != FRAME_POINTER_REGNUM
        !          1101: #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
        !          1102:          && REGNO (dest) != HARD_FRAME_POINTER_REGNUM
        !          1103: #endif
        !          1104: #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
        !          1105:          && (REGNO (dest) != ARG_POINTER_REGNUM
        !          1106:              || ! fixed_regs [REGNO (dest)])
        !          1107: #endif
        !          1108:          && REGNO (dest) != STACK_POINTER_REGNUM)
        !          1109:        {
        !          1110:          if (*pi3dest_killed)
        !          1111:            return 0;
        !          1112: 
        !          1113:          *pi3dest_killed = dest;
        !          1114:        }
        !          1115:     }
        !          1116: 
        !          1117:   else if (GET_CODE (x) == PARALLEL)
        !          1118:     {
        !          1119:       int i;
        !          1120: 
        !          1121:       for (i = 0; i < XVECLEN (x, 0); i++)
        !          1122:        if (! combinable_i3pat (i3, &XVECEXP (x, 0, i), i2dest, i1dest,
        !          1123:                                i1_not_in_src, pi3dest_killed))
        !          1124:          return 0;
        !          1125:     }
        !          1126: 
        !          1127:   return 1;
        !          1128: }
        !          1129: 
        !          1130: /* Try to combine the insns I1 and I2 into I3.
        !          1131:    Here I1 and I2 appear earlier than I3.
        !          1132:    I1 can be zero; then we combine just I2 into I3.
        !          1133:  
        !          1134:    It we are combining three insns and the resulting insn is not recognized,
        !          1135:    try splitting it into two insns.  If that happens, I2 and I3 are retained
        !          1136:    and I1 is pseudo-deleted by turning it into a NOTE.  Otherwise, I1 and I2
        !          1137:    are pseudo-deleted.
        !          1138: 
        !          1139:    If we created two insns, return I2; otherwise return I3.
        !          1140:    Return 0 if the combination does not work.  Then nothing is changed.  */
        !          1141: 
        !          1142: static rtx
        !          1143: try_combine (i3, i2, i1)
        !          1144:      register rtx i3, i2, i1;
        !          1145: {
        !          1146:   /* New patterns for I3 and I3, respectively.  */
        !          1147:   rtx newpat, newi2pat = 0;
        !          1148:   /* Indicates need to preserve SET in I1 or I2 in I3 if it is not dead.  */
        !          1149:   int added_sets_1, added_sets_2;
        !          1150:   /* Total number of SETs to put into I3.  */
        !          1151:   int total_sets;
        !          1152:   /* Nonzero is I2's body now appears in I3.  */
        !          1153:   int i2_is_used;
        !          1154:   /* INSN_CODEs for new I3, new I2, and user of condition code.  */
        !          1155:   int insn_code_number, i2_code_number, other_code_number;
        !          1156:   /* Contains I3 if the destination of I3 is used in its source, which means
        !          1157:      that the old life of I3 is being killed.  If that usage is placed into
        !          1158:      I2 and not in I3, a REG_DEAD note must be made.  */
        !          1159:   rtx i3dest_killed = 0;
        !          1160:   /* SET_DEST and SET_SRC of I2 and I1.  */
        !          1161:   rtx i2dest, i2src, i1dest = 0, i1src = 0;
        !          1162:   /* PATTERN (I2), or a copy of it in certain cases.  */
        !          1163:   rtx i2pat;
        !          1164:   /* Indicates if I2DEST or I1DEST is in I2SRC or I1_SRC.  */
        !          1165:   int i2dest_in_i2src = 0, i1dest_in_i1src = 0, i2dest_in_i1src = 0;
        !          1166:   int i1_feeds_i3 = 0;
        !          1167:   /* Notes that must be added to REG_NOTES in I3 and I2.  */
        !          1168:   rtx new_i3_notes, new_i2_notes;
        !          1169:   /* Notes that we substituted I3 into I2 instead of the normal case.  */
        !          1170:   int i3_subst_into_i2 = 0;
        !          1171: 
        !          1172:   int maxreg;
        !          1173:   rtx temp;
        !          1174:   register rtx link;
        !          1175:   int i;
        !          1176: 
        !          1177:   /* If any of I1, I2, and I3 isn't really an insn, we can't do anything.
        !          1178:      This can occur when flow deletes an insn that it has merged into an
        !          1179:      auto-increment address.  We also can't do anything if I3 has a
        !          1180:      REG_LIBCALL note since we don't want to disrupt the contiguity of a
        !          1181:      libcall.  */
        !          1182: 
        !          1183:   if (GET_RTX_CLASS (GET_CODE (i3)) != 'i'
        !          1184:       || GET_RTX_CLASS (GET_CODE (i2)) != 'i'
        !          1185:       || (i1 && GET_RTX_CLASS (GET_CODE (i1)) != 'i')
        !          1186:       || find_reg_note (i3, REG_LIBCALL, NULL_RTX))
        !          1187:     return 0;
        !          1188: 
        !          1189:   combine_attempts++;
        !          1190: 
        !          1191:   undobuf.num_undo = previous_num_undos = 0;
        !          1192:   undobuf.other_insn = 0;
        !          1193: 
        !          1194:   /* Save the current high-water-mark so we can free storage if we didn't
        !          1195:      accept this combination.  */
        !          1196:   undobuf.storage = (char *) oballoc (0);
        !          1197: 
        !          1198:   /* If I1 and I2 both feed I3, they can be in any order.  To simplify the
        !          1199:      code below, set I1 to be the earlier of the two insns.  */
        !          1200:   if (i1 && INSN_CUID (i1) > INSN_CUID (i2))
        !          1201:     temp = i1, i1 = i2, i2 = temp;
        !          1202: 
        !          1203:   subst_prev_insn = 0;
        !          1204: 
        !          1205:   /* First check for one important special-case that the code below will
        !          1206:      not handle.  Namely, the case where I1 is zero, I2 has multiple sets,
        !          1207:      and I3 is a SET whose SET_SRC is a SET_DEST in I2.  In that case,
        !          1208:      we may be able to replace that destination with the destination of I3.
        !          1209:      This occurs in the common code where we compute both a quotient and
        !          1210:      remainder into a structure, in which case we want to do the computation
        !          1211:      directly into the structure to avoid register-register copies.
        !          1212: 
        !          1213:      We make very conservative checks below and only try to handle the
        !          1214:      most common cases of this.  For example, we only handle the case
        !          1215:      where I2 and I3 are adjacent to avoid making difficult register
        !          1216:      usage tests.  */
        !          1217: 
        !          1218:   if (i1 == 0 && GET_CODE (i3) == INSN && GET_CODE (PATTERN (i3)) == SET
        !          1219:       && GET_CODE (SET_SRC (PATTERN (i3))) == REG
        !          1220:       && REGNO (SET_SRC (PATTERN (i3))) >= FIRST_PSEUDO_REGISTER
        !          1221: #ifdef SMALL_REGISTER_CLASSES
        !          1222:       && (GET_CODE (SET_DEST (PATTERN (i3))) != REG
        !          1223:          || REGNO (SET_DEST (PATTERN (i3))) >= FIRST_PSEUDO_REGISTER)
        !          1224: #endif
        !          1225:       && find_reg_note (i3, REG_DEAD, SET_SRC (PATTERN (i3)))
        !          1226:       && GET_CODE (PATTERN (i2)) == PARALLEL
        !          1227:       && ! side_effects_p (SET_DEST (PATTERN (i3)))
        !          1228:       /* If the dest of I3 is a ZERO_EXTRACT or STRICT_LOW_PART, the code
        !          1229:         below would need to check what is inside (and reg_overlap_mentioned_p
        !          1230:         doesn't support those codes anyway).  Don't allow those destinations;
        !          1231:         the resulting insn isn't likely to be recognized anyway.  */
        !          1232:       && GET_CODE (SET_DEST (PATTERN (i3))) != ZERO_EXTRACT
        !          1233:       && GET_CODE (SET_DEST (PATTERN (i3))) != STRICT_LOW_PART
        !          1234:       && ! reg_overlap_mentioned_p (SET_SRC (PATTERN (i3)),
        !          1235:                                    SET_DEST (PATTERN (i3)))
        !          1236:       && next_real_insn (i2) == i3)
        !          1237:     {
        !          1238:       rtx p2 = PATTERN (i2);
        !          1239: 
        !          1240:       /* Make sure that the destination of I3,
        !          1241:         which we are going to substitute into one output of I2,
        !          1242:         is not used within another output of I2.  We must avoid making this:
        !          1243:         (parallel [(set (mem (reg 69)) ...)
        !          1244:                    (set (reg 69) ...)])
        !          1245:         which is not well-defined as to order of actions.
        !          1246:         (Besides, reload can't handle output reloads for this.)
        !          1247: 
        !          1248:         The problem can also happen if the dest of I3 is a memory ref,
        !          1249:         if another dest in I2 is an indirect memory ref.  */
        !          1250:       for (i = 0; i < XVECLEN (p2, 0); i++)
        !          1251:        if (GET_CODE (XVECEXP (p2, 0, i)) == SET
        !          1252:            && reg_overlap_mentioned_p (SET_DEST (PATTERN (i3)),
        !          1253:                                        SET_DEST (XVECEXP (p2, 0, i))))
        !          1254:          break;
        !          1255: 
        !          1256:       if (i == XVECLEN (p2, 0))
        !          1257:        for (i = 0; i < XVECLEN (p2, 0); i++)
        !          1258:          if (SET_DEST (XVECEXP (p2, 0, i)) == SET_SRC (PATTERN (i3)))
        !          1259:            {
        !          1260:              combine_merges++;
        !          1261: 
        !          1262:              subst_insn = i3;
        !          1263:              subst_low_cuid = INSN_CUID (i2);
        !          1264: 
        !          1265:              added_sets_2 = added_sets_1 = 0;
        !          1266:              i2dest = SET_SRC (PATTERN (i3));
        !          1267: 
        !          1268:              /* Replace the dest in I2 with our dest and make the resulting
        !          1269:                 insn the new pattern for I3.  Then skip to where we
        !          1270:                 validate the pattern.  Everything was set up above.  */
        !          1271:              SUBST (SET_DEST (XVECEXP (p2, 0, i)), 
        !          1272:                     SET_DEST (PATTERN (i3)));
        !          1273: 
        !          1274:              newpat = p2;
        !          1275:              i3_subst_into_i2 = 1;
        !          1276:              goto validate_replacement;
        !          1277:            }
        !          1278:     }
        !          1279: 
        !          1280: #ifndef HAVE_cc0
        !          1281:   /* If we have no I1 and I2 looks like:
        !          1282:        (parallel [(set (reg:CC X) (compare:CC OP (const_int 0)))
        !          1283:                   (set Y OP)])
        !          1284:      make up a dummy I1 that is
        !          1285:        (set Y OP)
        !          1286:      and change I2 to be
        !          1287:         (set (reg:CC X) (compare:CC Y (const_int 0)))
        !          1288: 
        !          1289:      (We can ignore any trailing CLOBBERs.)
        !          1290: 
        !          1291:      This undoes a previous combination and allows us to match a branch-and-
        !          1292:      decrement insn.  */
        !          1293: 
        !          1294:   if (i1 == 0 && GET_CODE (PATTERN (i2)) == PARALLEL
        !          1295:       && XVECLEN (PATTERN (i2), 0) >= 2
        !          1296:       && GET_CODE (XVECEXP (PATTERN (i2), 0, 0)) == SET
        !          1297:       && (GET_MODE_CLASS (GET_MODE (SET_DEST (XVECEXP (PATTERN (i2), 0, 0))))
        !          1298:          == MODE_CC)
        !          1299:       && GET_CODE (SET_SRC (XVECEXP (PATTERN (i2), 0, 0))) == COMPARE
        !          1300:       && XEXP (SET_SRC (XVECEXP (PATTERN (i2), 0, 0)), 1) == const0_rtx
        !          1301:       && GET_CODE (XVECEXP (PATTERN (i2), 0, 1)) == SET
        !          1302:       && GET_CODE (SET_DEST (XVECEXP (PATTERN (i2), 0, 1))) == REG
        !          1303:       && rtx_equal_p (XEXP (SET_SRC (XVECEXP (PATTERN (i2), 0, 0)), 0),
        !          1304:                      SET_SRC (XVECEXP (PATTERN (i2), 0, 1))))
        !          1305:     {
        !          1306:       for (i =  XVECLEN (PATTERN (i2), 0) - 1; i >= 2; i--)
        !          1307:        if (GET_CODE (XVECEXP (PATTERN (i2), 0, i)) != CLOBBER)
        !          1308:          break;
        !          1309: 
        !          1310:       if (i == 1)
        !          1311:        {
        !          1312:          /* We make I1 with the same INSN_UID as I2.  This gives it
        !          1313:             the same INSN_CUID for value tracking.  Our fake I1 will
        !          1314:             never appear in the insn stream so giving it the same INSN_UID
        !          1315:             as I2 will not cause a problem.  */
        !          1316: 
        !          1317:          subst_prev_insn = i1
        !          1318:            = gen_rtx (INSN, VOIDmode, INSN_UID (i2), 0, i2,
        !          1319:                       XVECEXP (PATTERN (i2), 0, 1), -1, 0, 0);
        !          1320: 
        !          1321:          SUBST (PATTERN (i2), XVECEXP (PATTERN (i2), 0, 0));
        !          1322:          SUBST (XEXP (SET_SRC (PATTERN (i2)), 0),
        !          1323:                 SET_DEST (PATTERN (i1)));
        !          1324:        }
        !          1325:     }
        !          1326: #endif
        !          1327: 
        !          1328:   /* Verify that I2 and I1 are valid for combining.  */
        !          1329:   if (! can_combine_p (i2, i3, i1, NULL_RTX, &i2dest, &i2src)
        !          1330:       || (i1 && ! can_combine_p (i1, i3, NULL_RTX, i2, &i1dest, &i1src)))
        !          1331:     {
        !          1332:       undo_all ();
        !          1333:       return 0;
        !          1334:     }
        !          1335: 
        !          1336:   /* Record whether I2DEST is used in I2SRC and similarly for the other
        !          1337:      cases.  Knowing this will help in register status updating below.  */
        !          1338:   i2dest_in_i2src = reg_overlap_mentioned_p (i2dest, i2src);
        !          1339:   i1dest_in_i1src = i1 && reg_overlap_mentioned_p (i1dest, i1src);
        !          1340:   i2dest_in_i1src = i1 && reg_overlap_mentioned_p (i2dest, i1src);
        !          1341: 
        !          1342:   /* See if I1 directly feeds into I3.  It does if I1DEST is not used
        !          1343:      in I2SRC.  */
        !          1344:   i1_feeds_i3 = i1 && ! reg_overlap_mentioned_p (i1dest, i2src);
        !          1345: 
        !          1346:   /* Ensure that I3's pattern can be the destination of combines.  */
        !          1347:   if (! combinable_i3pat (i3, &PATTERN (i3), i2dest, i1dest,
        !          1348:                          i1 && i2dest_in_i1src && i1_feeds_i3,
        !          1349:                          &i3dest_killed))
        !          1350:     {
        !          1351:       undo_all ();
        !          1352:       return 0;
        !          1353:     }
        !          1354: 
        !          1355:   /* If I3 has an inc, then give up if I1 or I2 uses the reg that is inc'd.
        !          1356:      We used to do this EXCEPT in one case: I3 has a post-inc in an
        !          1357:      output operand.  However, that exception can give rise to insns like
        !          1358:        mov r3,(r3)+
        !          1359:      which is a famous insn on the PDP-11 where the value of r3 used as the
        !          1360:      source was model-dependent.  Avoid this sort of thing.  */
        !          1361: 
        !          1362: #if 0
        !          1363:   if (!(GET_CODE (PATTERN (i3)) == SET
        !          1364:        && GET_CODE (SET_SRC (PATTERN (i3))) == REG
        !          1365:        && GET_CODE (SET_DEST (PATTERN (i3))) == MEM
        !          1366:        && (GET_CODE (XEXP (SET_DEST (PATTERN (i3)), 0)) == POST_INC
        !          1367:            || GET_CODE (XEXP (SET_DEST (PATTERN (i3)), 0)) == POST_DEC)))
        !          1368:     /* It's not the exception.  */
        !          1369: #endif
        !          1370: #ifdef AUTO_INC_DEC
        !          1371:     for (link = REG_NOTES (i3); link; link = XEXP (link, 1))
        !          1372:       if (REG_NOTE_KIND (link) == REG_INC
        !          1373:          && (reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i2))
        !          1374:              || (i1 != 0
        !          1375:                  && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i1)))))
        !          1376:        {
        !          1377:          undo_all ();
        !          1378:          return 0;
        !          1379:        }
        !          1380: #endif
        !          1381: 
        !          1382:   /* See if the SETs in I1 or I2 need to be kept around in the merged
        !          1383:      instruction: whenever the value set there is still needed past I3.
        !          1384:      For the SETs in I2, this is easy: we see if I2DEST dies or is set in I3.
        !          1385: 
        !          1386:      For the SET in I1, we have two cases:  If I1 and I2 independently
        !          1387:      feed into I3, the set in I1 needs to be kept around if I1DEST dies
        !          1388:      or is set in I3.  Otherwise (if I1 feeds I2 which feeds I3), the set
        !          1389:      in I1 needs to be kept around unless I1DEST dies or is set in either
        !          1390:      I2 or I3.  We can distinguish these cases by seeing if I2SRC mentions
        !          1391:      I1DEST.  If so, we know I1 feeds into I2.  */
        !          1392: 
        !          1393:   added_sets_2 = ! dead_or_set_p (i3, i2dest);
        !          1394: 
        !          1395:   added_sets_1
        !          1396:     = i1 && ! (i1_feeds_i3 ? dead_or_set_p (i3, i1dest)
        !          1397:               : (dead_or_set_p (i3, i1dest) || dead_or_set_p (i2, i1dest)));
        !          1398: 
        !          1399:   /* If the set in I2 needs to be kept around, we must make a copy of
        !          1400:      PATTERN (I2), so that when we substitute I1SRC for I1DEST in
        !          1401:      PATTERN (I2), we are only substituting for the original I1DEST, not into
        !          1402:      an already-substituted copy.  This also prevents making self-referential
        !          1403:      rtx.  If I2 is a PARALLEL, we just need the piece that assigns I2SRC to
        !          1404:      I2DEST.  */
        !          1405: 
        !          1406:   i2pat = (GET_CODE (PATTERN (i2)) == PARALLEL
        !          1407:           ? gen_rtx (SET, VOIDmode, i2dest, i2src)
        !          1408:           : PATTERN (i2));
        !          1409: 
        !          1410:   if (added_sets_2)
        !          1411:     i2pat = copy_rtx (i2pat);
        !          1412: 
        !          1413:   combine_merges++;
        !          1414: 
        !          1415:   /* Substitute in the latest insn for the regs set by the earlier ones.  */
        !          1416: 
        !          1417:   maxreg = max_reg_num ();
        !          1418: 
        !          1419:   subst_insn = i3;
        !          1420: 
        !          1421:   /* It is possible that the source of I2 or I1 may be performing an
        !          1422:      unneeded operation, such as a ZERO_EXTEND of something that is known
        !          1423:      to have the high part zero.  Handle that case by letting subst look at
        !          1424:      the innermost one of them.
        !          1425: 
        !          1426:      Another way to do this would be to have a function that tries to
        !          1427:      simplify a single insn instead of merging two or more insns.  We don't
        !          1428:      do this because of the potential of infinite loops and because
        !          1429:      of the potential extra memory required.  However, doing it the way
        !          1430:      we are is a bit of a kludge and doesn't catch all cases.
        !          1431: 
        !          1432:      But only do this if -fexpensive-optimizations since it slows things down
        !          1433:      and doesn't usually win.  */
        !          1434: 
        !          1435:   if (flag_expensive_optimizations)
        !          1436:     {
        !          1437:       /* Pass pc_rtx so no substitutions are done, just simplifications.
        !          1438:         The cases that we are interested in here do not involve the few
        !          1439:         cases were is_replaced is checked.  */
        !          1440:       if (i1)
        !          1441:        {
        !          1442:          subst_low_cuid = INSN_CUID (i1);
        !          1443:          i1src = subst (i1src, pc_rtx, pc_rtx, 0, 0);
        !          1444:        }
        !          1445:       else
        !          1446:        {
        !          1447:          subst_low_cuid = INSN_CUID (i2);
        !          1448:          i2src = subst (i2src, pc_rtx, pc_rtx, 0, 0);
        !          1449:        }
        !          1450: 
        !          1451:       previous_num_undos = undobuf.num_undo;
        !          1452:     }
        !          1453: 
        !          1454: #ifndef HAVE_cc0
        !          1455:   /* Many machines that don't use CC0 have insns that can both perform an
        !          1456:      arithmetic operation and set the condition code.  These operations will
        !          1457:      be represented as a PARALLEL with the first element of the vector
        !          1458:      being a COMPARE of an arithmetic operation with the constant zero.
        !          1459:      The second element of the vector will set some pseudo to the result
        !          1460:      of the same arithmetic operation.  If we simplify the COMPARE, we won't
        !          1461:      match such a pattern and so will generate an extra insn.   Here we test
        !          1462:      for this case, where both the comparison and the operation result are
        !          1463:      needed, and make the PARALLEL by just replacing I2DEST in I3SRC with
        !          1464:      I2SRC.  Later we will make the PARALLEL that contains I2.  */
        !          1465: 
        !          1466:   if (i1 == 0 && added_sets_2 && GET_CODE (PATTERN (i3)) == SET
        !          1467:       && GET_CODE (SET_SRC (PATTERN (i3))) == COMPARE
        !          1468:       && XEXP (SET_SRC (PATTERN (i3)), 1) == const0_rtx
        !          1469:       && rtx_equal_p (XEXP (SET_SRC (PATTERN (i3)), 0), i2dest))
        !          1470:     {
        !          1471:       rtx *cc_use;
        !          1472:       enum machine_mode compare_mode;
        !          1473: 
        !          1474:       newpat = PATTERN (i3);
        !          1475:       SUBST (XEXP (SET_SRC (newpat), 0), i2src);
        !          1476: 
        !          1477:       i2_is_used = 1;
        !          1478: 
        !          1479: #ifdef EXTRA_CC_MODES
        !          1480:       /* See if a COMPARE with the operand we substituted in should be done
        !          1481:         with the mode that is currently being used.  If not, do the same
        !          1482:         processing we do in `subst' for a SET; namely, if the destination
        !          1483:         is used only once, try to replace it with a register of the proper
        !          1484:         mode and also replace the COMPARE.  */
        !          1485:       if (undobuf.other_insn == 0
        !          1486:          && (cc_use = find_single_use (SET_DEST (newpat), i3,
        !          1487:                                        &undobuf.other_insn))
        !          1488:          && ((compare_mode = SELECT_CC_MODE (GET_CODE (*cc_use),
        !          1489:                                              i2src, const0_rtx))
        !          1490:              != GET_MODE (SET_DEST (newpat))))
        !          1491:        {
        !          1492:          int regno = REGNO (SET_DEST (newpat));
        !          1493:          rtx new_dest = gen_rtx (REG, compare_mode, regno);
        !          1494: 
        !          1495:          if (regno < FIRST_PSEUDO_REGISTER
        !          1496:              || (reg_n_sets[regno] == 1 && ! added_sets_2
        !          1497:                  && ! REG_USERVAR_P (SET_DEST (newpat))))
        !          1498:            {
        !          1499:              if (regno >= FIRST_PSEUDO_REGISTER)
        !          1500:                SUBST (regno_reg_rtx[regno], new_dest);
        !          1501: 
        !          1502:              SUBST (SET_DEST (newpat), new_dest);
        !          1503:              SUBST (XEXP (*cc_use, 0), new_dest);
        !          1504:              SUBST (SET_SRC (newpat),
        !          1505:                     gen_rtx_combine (COMPARE, compare_mode,
        !          1506:                                      i2src, const0_rtx));
        !          1507:            }
        !          1508:          else
        !          1509:            undobuf.other_insn = 0;
        !          1510:        }
        !          1511: #endif   
        !          1512:     }
        !          1513:   else
        !          1514: #endif
        !          1515:     {
        !          1516:       n_occurrences = 0;               /* `subst' counts here */
        !          1517: 
        !          1518:       /* If I1 feeds into I2 (not into I3) and I1DEST is in I1SRC, we
        !          1519:         need to make a unique copy of I2SRC each time we substitute it
        !          1520:         to avoid self-referential rtl.  */
        !          1521: 
        !          1522:       subst_low_cuid = INSN_CUID (i2);
        !          1523:       newpat = subst (PATTERN (i3), i2dest, i2src, 0,
        !          1524:                      ! i1_feeds_i3 && i1dest_in_i1src);
        !          1525:       previous_num_undos = undobuf.num_undo;
        !          1526: 
        !          1527:       /* Record whether i2's body now appears within i3's body.  */
        !          1528:       i2_is_used = n_occurrences;
        !          1529:     }
        !          1530: 
        !          1531:   /* If we already got a failure, don't try to do more.  Otherwise,
        !          1532:      try to substitute in I1 if we have it.  */
        !          1533: 
        !          1534:   if (i1 && GET_CODE (newpat) != CLOBBER)
        !          1535:     {
        !          1536:       /* Before we can do this substitution, we must redo the test done
        !          1537:         above (see detailed comments there) that ensures  that I1DEST
        !          1538:         isn't mentioned in any SETs in NEWPAT that are field assignments. */
        !          1539: 
        !          1540:       if (! combinable_i3pat (NULL_RTX, &newpat, i1dest, NULL_RTX,
        !          1541:                              0, NULL_PTR))
        !          1542:        {
        !          1543:          undo_all ();
        !          1544:          return 0;
        !          1545:        }
        !          1546: 
        !          1547:       n_occurrences = 0;
        !          1548:       subst_low_cuid = INSN_CUID (i1);
        !          1549:       newpat = subst (newpat, i1dest, i1src, 0, 0);
        !          1550:       previous_num_undos = undobuf.num_undo;
        !          1551:     }
        !          1552: 
        !          1553:   /* Fail if an autoincrement side-effect has been duplicated.  Be careful
        !          1554:      to count all the ways that I2SRC and I1SRC can be used.  */
        !          1555:   if ((FIND_REG_INC_NOTE (i2, NULL_RTX) != 0
        !          1556:        && i2_is_used + added_sets_2 > 1)
        !          1557:       || (i1 != 0 && FIND_REG_INC_NOTE (i1, NULL_RTX) != 0
        !          1558:          && (n_occurrences + added_sets_1 + (added_sets_2 && ! i1_feeds_i3)
        !          1559:              > 1))
        !          1560:       /* Fail if we tried to make a new register (we used to abort, but there's
        !          1561:         really no reason to).  */
        !          1562:       || max_reg_num () != maxreg
        !          1563:       /* Fail if we couldn't do something and have a CLOBBER.  */
        !          1564:       || GET_CODE (newpat) == CLOBBER)
        !          1565:     {
        !          1566:       undo_all ();
        !          1567:       return 0;
        !          1568:     }
        !          1569: 
        !          1570:   /* If the actions of the earlier insns must be kept
        !          1571:      in addition to substituting them into the latest one,
        !          1572:      we must make a new PARALLEL for the latest insn
        !          1573:      to hold additional the SETs.  */
        !          1574: 
        !          1575:   if (added_sets_1 || added_sets_2)
        !          1576:     {
        !          1577:       combine_extras++;
        !          1578: 
        !          1579:       if (GET_CODE (newpat) == PARALLEL)
        !          1580:        {
        !          1581:          rtvec old = XVEC (newpat, 0);
        !          1582:          total_sets = XVECLEN (newpat, 0) + added_sets_1 + added_sets_2;
        !          1583:          newpat = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (total_sets));
        !          1584:          bcopy (&old->elem[0], &XVECEXP (newpat, 0, 0),
        !          1585:                 sizeof (old->elem[0]) * old->num_elem);
        !          1586:        }
        !          1587:       else
        !          1588:        {
        !          1589:          rtx old = newpat;
        !          1590:          total_sets = 1 + added_sets_1 + added_sets_2;
        !          1591:          newpat = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (total_sets));
        !          1592:          XVECEXP (newpat, 0, 0) = old;
        !          1593:        }
        !          1594: 
        !          1595:      if (added_sets_1)
        !          1596:        XVECEXP (newpat, 0, --total_sets)
        !          1597:         = (GET_CODE (PATTERN (i1)) == PARALLEL
        !          1598:            ? gen_rtx (SET, VOIDmode, i1dest, i1src) : PATTERN (i1));
        !          1599: 
        !          1600:      if (added_sets_2)
        !          1601:        {
        !          1602:          /* If there is no I1, use I2's body as is.  We used to also not do
        !          1603:             the subst call below if I2 was substituted into I3,
        !          1604:             but that could lose a simplification.  */
        !          1605:          if (i1 == 0)
        !          1606:            XVECEXP (newpat, 0, --total_sets) = i2pat;
        !          1607:          else
        !          1608:            /* See comment where i2pat is assigned.  */
        !          1609:            XVECEXP (newpat, 0, --total_sets)
        !          1610:              = subst (i2pat, i1dest, i1src, 0, 0);
        !          1611:        }
        !          1612:     }
        !          1613: 
        !          1614:   /* We come here when we are replacing a destination in I2 with the
        !          1615:      destination of I3.  */
        !          1616:  validate_replacement:
        !          1617: 
        !          1618:   /* Is the result of combination a valid instruction?  */
        !          1619:   insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
        !          1620: 
        !          1621:   /* If the result isn't valid, see if it is a PARALLEL of two SETs where
        !          1622:      the second SET's destination is a register that is unused.  In that case,
        !          1623:      we just need the first SET.   This can occur when simplifying a divmod
        !          1624:      insn.  We *must* test for this case here because the code below that
        !          1625:      splits two independent SETs doesn't handle this case correctly when it
        !          1626:      updates the register status.  Also check the case where the first
        !          1627:      SET's destination is unused.  That would not cause incorrect code, but
        !          1628:      does cause an unneeded insn to remain.  */
        !          1629: 
        !          1630:   if (insn_code_number < 0 && GET_CODE (newpat) == PARALLEL
        !          1631:       && XVECLEN (newpat, 0) == 2
        !          1632:       && GET_CODE (XVECEXP (newpat, 0, 0)) == SET
        !          1633:       && GET_CODE (XVECEXP (newpat, 0, 1)) == SET
        !          1634:       && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) == REG
        !          1635:       && find_reg_note (i3, REG_UNUSED, SET_DEST (XVECEXP (newpat, 0, 1)))
        !          1636:       && ! side_effects_p (SET_SRC (XVECEXP (newpat, 0, 1)))
        !          1637:       && asm_noperands (newpat) < 0)
        !          1638:     {
        !          1639:       newpat = XVECEXP (newpat, 0, 0);
        !          1640:       insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
        !          1641:     }
        !          1642: 
        !          1643:   else if (insn_code_number < 0 && GET_CODE (newpat) == PARALLEL
        !          1644:           && XVECLEN (newpat, 0) == 2
        !          1645:           && GET_CODE (XVECEXP (newpat, 0, 0)) == SET
        !          1646:           && GET_CODE (XVECEXP (newpat, 0, 1)) == SET
        !          1647:           && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 0))) == REG
        !          1648:           && find_reg_note (i3, REG_UNUSED, SET_DEST (XVECEXP (newpat, 0, 0)))
        !          1649:           && ! side_effects_p (SET_SRC (XVECEXP (newpat, 0, 0)))
        !          1650:           && asm_noperands (newpat) < 0)
        !          1651:     {
        !          1652:       newpat = XVECEXP (newpat, 0, 1);
        !          1653:       insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
        !          1654:     }
        !          1655: 
        !          1656:   /* See if this is an XOR.  If so, perhaps the problem is that the
        !          1657:      constant is out of range.  Replace it with a complemented XOR with
        !          1658:      a complemented constant; it might be in range.  */
        !          1659: 
        !          1660:   else if (insn_code_number < 0 && GET_CODE (newpat) == SET
        !          1661:           && GET_CODE (SET_SRC (newpat)) == XOR
        !          1662:           && GET_CODE (XEXP (SET_SRC (newpat), 1)) == CONST_INT
        !          1663:           && ((temp = simplify_unary_operation (NOT,
        !          1664:                                                 GET_MODE (SET_SRC (newpat)),
        !          1665:                                                 XEXP (SET_SRC (newpat), 1),
        !          1666:                                                 GET_MODE (SET_SRC (newpat))))
        !          1667:               != 0))
        !          1668:     {
        !          1669:       enum machine_mode i_mode = GET_MODE (SET_SRC (newpat));
        !          1670:       rtx pat
        !          1671:        = gen_rtx_combine (SET, VOIDmode, SET_DEST (newpat),
        !          1672:                           gen_unary (NOT, i_mode,
        !          1673:                                      gen_binary (XOR, i_mode,
        !          1674:                                                  XEXP (SET_SRC (newpat), 0),
        !          1675:                                                  temp)));
        !          1676: 
        !          1677:       insn_code_number = recog_for_combine (&pat, i3, &new_i3_notes);
        !          1678:       if (insn_code_number >= 0)
        !          1679:        newpat = pat;
        !          1680:     }
        !          1681:                                                        
        !          1682:   /* If we were combining three insns and the result is a simple SET
        !          1683:      with no ASM_OPERANDS that wasn't recognized, try to split it into two
        !          1684:      insns.  There are two ways to do this.  It can be split using a 
        !          1685:      machine-specific method (like when you have an addition of a large
        !          1686:      constant) or by combine in the function find_split_point.  */
        !          1687: 
        !          1688:   if (i1 && insn_code_number < 0 && GET_CODE (newpat) == SET
        !          1689:       && asm_noperands (newpat) < 0)
        !          1690:     {
        !          1691:       rtx m_split, *split;
        !          1692:       rtx ni2dest = i2dest;
        !          1693: 
        !          1694:       /* See if the MD file can split NEWPAT.  If it can't, see if letting it
        !          1695:         use I2DEST as a scratch register will help.  In the latter case,
        !          1696:         convert I2DEST to the mode of the source of NEWPAT if we can.  */
        !          1697: 
        !          1698:       m_split = split_insns (newpat, i3);
        !          1699: 
        !          1700:       /* We can only use I2DEST as a scratch reg if it doesn't overlap any
        !          1701:         inputs of NEWPAT.  */
        !          1702: 
        !          1703:       /* ??? If I2DEST is not safe, and I1DEST exists, then it would be
        !          1704:         possible to try that as a scratch reg.  This would require adding
        !          1705:         more code to make it work though.  */
        !          1706: 
        !          1707:       if (m_split == 0 && ! reg_overlap_mentioned_p (ni2dest, newpat))
        !          1708:        {
        !          1709:          /* If I2DEST is a hard register or the only use of a pseudo,
        !          1710:             we can change its mode.  */
        !          1711:          if (GET_MODE (SET_DEST (newpat)) != GET_MODE (i2dest)
        !          1712:              && GET_MODE (SET_DEST (newpat)) != VOIDmode
        !          1713:              && GET_CODE (i2dest) == REG
        !          1714:              && (REGNO (i2dest) < FIRST_PSEUDO_REGISTER
        !          1715:                  || (reg_n_sets[REGNO (i2dest)] == 1 && ! added_sets_2
        !          1716:                      && ! REG_USERVAR_P (i2dest))))
        !          1717:            ni2dest = gen_rtx (REG, GET_MODE (SET_DEST (newpat)),
        !          1718:                               REGNO (i2dest));
        !          1719: 
        !          1720:          m_split = split_insns (gen_rtx (PARALLEL, VOIDmode,
        !          1721:                                          gen_rtvec (2, newpat,
        !          1722:                                                     gen_rtx (CLOBBER,
        !          1723:                                                              VOIDmode,
        !          1724:                                                              ni2dest))),
        !          1725:                                 i3);
        !          1726:        }
        !          1727: 
        !          1728:       if (m_split && GET_CODE (m_split) == SEQUENCE
        !          1729:          && XVECLEN (m_split, 0) == 2
        !          1730:          && (next_real_insn (i2) == i3
        !          1731:              || ! use_crosses_set_p (PATTERN (XVECEXP (m_split, 0, 0)),
        !          1732:                                      INSN_CUID (i2))))
        !          1733:        {
        !          1734:          rtx i2set, i3set;
        !          1735:          rtx newi3pat = PATTERN (XVECEXP (m_split, 0, 1));
        !          1736:          newi2pat = PATTERN (XVECEXP (m_split, 0, 0));
        !          1737: 
        !          1738:          i3set = single_set (XVECEXP (m_split, 0, 1));
        !          1739:          i2set = single_set (XVECEXP (m_split, 0, 0));
        !          1740: 
        !          1741:          /* In case we changed the mode of I2DEST, replace it in the
        !          1742:             pseudo-register table here.  We can't do it above in case this
        !          1743:             code doesn't get executed and we do a split the other way.  */
        !          1744: 
        !          1745:          if (REGNO (i2dest) >= FIRST_PSEUDO_REGISTER)
        !          1746:            SUBST (regno_reg_rtx[REGNO (i2dest)], ni2dest);
        !          1747: 
        !          1748:          i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
        !          1749: 
        !          1750:          /* If I2 or I3 has multiple SETs, we won't know how to track
        !          1751:             register status, so don't use these insns.  */
        !          1752: 
        !          1753:          if (i2_code_number >= 0 && i2set && i3set)
        !          1754:            insn_code_number = recog_for_combine (&newi3pat, i3,
        !          1755:                                                  &new_i3_notes);
        !          1756: 
        !          1757:          if (insn_code_number >= 0)
        !          1758:            newpat = newi3pat;
        !          1759: 
        !          1760:          /* It is possible that both insns now set the destination of I3.
        !          1761:             If so, we must show an extra use of it.  */
        !          1762: 
        !          1763:          if (insn_code_number >= 0 && GET_CODE (SET_DEST (i3set)) == REG
        !          1764:              && GET_CODE (SET_DEST (i2set)) == REG
        !          1765:              && REGNO (SET_DEST (i3set)) == REGNO (SET_DEST (i2set)))
        !          1766:            reg_n_sets[REGNO (SET_DEST (i2set))]++;
        !          1767:        }
        !          1768: 
        !          1769:       /* If we can split it and use I2DEST, go ahead and see if that
        !          1770:         helps things be recognized.  Verify that none of the registers
        !          1771:         are set between I2 and I3.  */
        !          1772:       if (insn_code_number < 0 && (split = find_split_point (&newpat, i3)) != 0
        !          1773: #ifdef HAVE_cc0
        !          1774:          && GET_CODE (i2dest) == REG
        !          1775: #endif
        !          1776:          /* We need I2DEST in the proper mode.  If it is a hard register
        !          1777:             or the only use of a pseudo, we can change its mode.  */
        !          1778:          && (GET_MODE (*split) == GET_MODE (i2dest)
        !          1779:              || GET_MODE (*split) == VOIDmode
        !          1780:              || REGNO (i2dest) < FIRST_PSEUDO_REGISTER
        !          1781:              || (reg_n_sets[REGNO (i2dest)] == 1 && ! added_sets_2
        !          1782:                  && ! REG_USERVAR_P (i2dest)))
        !          1783:          && (next_real_insn (i2) == i3
        !          1784:              || ! use_crosses_set_p (*split, INSN_CUID (i2)))
        !          1785:          /* We can't overwrite I2DEST if its value is still used by
        !          1786:             NEWPAT.  */
        !          1787:          && ! reg_referenced_p (i2dest, newpat))
        !          1788:        {
        !          1789:          rtx newdest = i2dest;
        !          1790: 
        !          1791:          /* Get NEWDEST as a register in the proper mode.  We have already
        !          1792:             validated that we can do this.  */
        !          1793:          if (GET_MODE (i2dest) != GET_MODE (*split)
        !          1794:              && GET_MODE (*split) != VOIDmode)
        !          1795:            {
        !          1796:              newdest = gen_rtx (REG, GET_MODE (*split), REGNO (i2dest));
        !          1797: 
        !          1798:              if (REGNO (i2dest) >= FIRST_PSEUDO_REGISTER)
        !          1799:                SUBST (regno_reg_rtx[REGNO (i2dest)], newdest);
        !          1800:            }
        !          1801: 
        !          1802:          /* If *SPLIT is a (mult FOO (const_int pow2)), convert it to
        !          1803:             an ASHIFT.  This can occur if it was inside a PLUS and hence
        !          1804:             appeared to be a memory address.  This is a kludge.  */
        !          1805:          if (GET_CODE (*split) == MULT
        !          1806:              && GET_CODE (XEXP (*split, 1)) == CONST_INT
        !          1807:              && (i = exact_log2 (INTVAL (XEXP (*split, 1)))) >= 0)
        !          1808:            SUBST (*split, gen_rtx_combine (ASHIFT, GET_MODE (*split),
        !          1809:                                            XEXP (*split, 0), GEN_INT (i)));
        !          1810: 
        !          1811: #ifdef INSN_SCHEDULING
        !          1812:          /* If *SPLIT is a paradoxical SUBREG, when we split it, it should
        !          1813:             be written as a ZERO_EXTEND.  */
        !          1814:          if (GET_CODE (*split) == SUBREG
        !          1815:              && GET_CODE (SUBREG_REG (*split)) == MEM)
        !          1816:            SUBST (*split, gen_rtx_combine (ZERO_EXTEND, GET_MODE (*split),
        !          1817:                                            XEXP (*split, 0)));
        !          1818: #endif
        !          1819: 
        !          1820:          newi2pat = gen_rtx_combine (SET, VOIDmode, newdest, *split);
        !          1821:          SUBST (*split, newdest);
        !          1822:          i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
        !          1823:          if (i2_code_number >= 0)
        !          1824:            insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
        !          1825:        }
        !          1826:     }
        !          1827: 
        !          1828:   /* Check for a case where we loaded from memory in a narrow mode and
        !          1829:      then sign extended it, but we need both registers.  In that case,
        !          1830:      we have a PARALLEL with both loads from the same memory location.
        !          1831:      We can split this into a load from memory followed by a register-register
        !          1832:      copy.  This saves at least one insn, more if register allocation can
        !          1833:      eliminate the copy.
        !          1834: 
        !          1835:      We cannot do this if the destination of the second assignment is
        !          1836:      a register that we have already assumed is zero-extended.  Similarly
        !          1837:      for a SUBREG of such a register.  */
        !          1838: 
        !          1839:   else if (i1 && insn_code_number < 0 && asm_noperands (newpat) < 0
        !          1840:           && GET_CODE (newpat) == PARALLEL
        !          1841:           && XVECLEN (newpat, 0) == 2
        !          1842:           && GET_CODE (XVECEXP (newpat, 0, 0)) == SET
        !          1843:           && GET_CODE (SET_SRC (XVECEXP (newpat, 0, 0))) == SIGN_EXTEND
        !          1844:           && GET_CODE (XVECEXP (newpat, 0, 1)) == SET
        !          1845:           && rtx_equal_p (SET_SRC (XVECEXP (newpat, 0, 1)),
        !          1846:                           XEXP (SET_SRC (XVECEXP (newpat, 0, 0)), 0))
        !          1847:           && ! use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 1)),
        !          1848:                                   INSN_CUID (i2))
        !          1849:           && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT
        !          1850:           && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART
        !          1851:           && ! (temp = SET_DEST (XVECEXP (newpat, 0, 1)),
        !          1852:                 (GET_CODE (temp) == REG
        !          1853:                  && reg_nonzero_bits[REGNO (temp)] != 0
        !          1854:                  && GET_MODE_BITSIZE (GET_MODE (temp)) < BITS_PER_WORD
        !          1855:                  && GET_MODE_BITSIZE (GET_MODE (temp)) < HOST_BITS_PER_INT
        !          1856:                  && (reg_nonzero_bits[REGNO (temp)]
        !          1857:                      != GET_MODE_MASK (word_mode))))
        !          1858:           && ! (GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) == SUBREG
        !          1859:                 && (temp = SUBREG_REG (SET_DEST (XVECEXP (newpat, 0, 1))),
        !          1860:                     (GET_CODE (temp) == REG
        !          1861:                      && reg_nonzero_bits[REGNO (temp)] != 0
        !          1862:                      && GET_MODE_BITSIZE (GET_MODE (temp)) < BITS_PER_WORD
        !          1863:                      && GET_MODE_BITSIZE (GET_MODE (temp)) < HOST_BITS_PER_INT
        !          1864:                      && (reg_nonzero_bits[REGNO (temp)]
        !          1865:                          != GET_MODE_MASK (word_mode)))))
        !          1866:           && ! reg_overlap_mentioned_p (SET_DEST (XVECEXP (newpat, 0, 1)),
        !          1867:                                         SET_SRC (XVECEXP (newpat, 0, 1)))
        !          1868:           && ! find_reg_note (i3, REG_UNUSED,
        !          1869:                               SET_DEST (XVECEXP (newpat, 0, 0))))
        !          1870:     {
        !          1871:       rtx ni2dest;
        !          1872: 
        !          1873:       newi2pat = XVECEXP (newpat, 0, 0);
        !          1874:       ni2dest = SET_DEST (XVECEXP (newpat, 0, 0));
        !          1875:       newpat = XVECEXP (newpat, 0, 1);
        !          1876:       SUBST (SET_SRC (newpat),
        !          1877:             gen_lowpart_for_combine (GET_MODE (SET_SRC (newpat)), ni2dest));
        !          1878:       i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
        !          1879:       if (i2_code_number >= 0)
        !          1880:        insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
        !          1881: 
        !          1882:       if (insn_code_number >= 0)
        !          1883:        {
        !          1884:          rtx insn;
        !          1885:          rtx link;
        !          1886: 
        !          1887:          /* If we will be able to accept this, we have made a change to the
        !          1888:             destination of I3.  This can invalidate a LOG_LINKS pointing
        !          1889:             to I3.  No other part of combine.c makes such a transformation.
        !          1890: 
        !          1891:             The new I3 will have a destination that was previously the
        !          1892:             destination of I1 or I2 and which was used in i2 or I3.  Call
        !          1893:             distribute_links to make a LOG_LINK from the next use of
        !          1894:             that destination.  */
        !          1895: 
        !          1896:          PATTERN (i3) = newpat;
        !          1897:          distribute_links (gen_rtx (INSN_LIST, VOIDmode, i3, NULL_RTX));
        !          1898: 
        !          1899:          /* I3 now uses what used to be its destination and which is
        !          1900:             now I2's destination.  That means we need a LOG_LINK from
        !          1901:             I3 to I2.  But we used to have one, so we still will.
        !          1902: 
        !          1903:             However, some later insn might be using I2's dest and have
        !          1904:             a LOG_LINK pointing at I3.  We must remove this link.
        !          1905:             The simplest way to remove the link is to point it at I1,
        !          1906:             which we know will be a NOTE.  */
        !          1907: 
        !          1908:          for (insn = NEXT_INSN (i3);
        !          1909:               insn && (this_basic_block == n_basic_blocks - 1
        !          1910:                        || insn != basic_block_head[this_basic_block + 1]);
        !          1911:               insn = NEXT_INSN (insn))
        !          1912:            {
        !          1913:              if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
        !          1914:                  && reg_referenced_p (ni2dest, PATTERN (insn)))
        !          1915:                {
        !          1916:                  for (link = LOG_LINKS (insn); link;
        !          1917:                       link = XEXP (link, 1))
        !          1918:                    if (XEXP (link, 0) == i3)
        !          1919:                      XEXP (link, 0) = i1;
        !          1920: 
        !          1921:                  break;
        !          1922:                }
        !          1923:            }
        !          1924:        }
        !          1925:     }
        !          1926:            
        !          1927:   /* Similarly, check for a case where we have a PARALLEL of two independent
        !          1928:      SETs but we started with three insns.  In this case, we can do the sets
        !          1929:      as two separate insns.  This case occurs when some SET allows two
        !          1930:      other insns to combine, but the destination of that SET is still live.  */
        !          1931: 
        !          1932:   else if (i1 && insn_code_number < 0 && asm_noperands (newpat) < 0
        !          1933:           && GET_CODE (newpat) == PARALLEL
        !          1934:           && XVECLEN (newpat, 0) == 2
        !          1935:           && GET_CODE (XVECEXP (newpat, 0, 0)) == SET
        !          1936:           && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 0))) != ZERO_EXTRACT
        !          1937:           && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 0))) != STRICT_LOW_PART
        !          1938:           && GET_CODE (XVECEXP (newpat, 0, 1)) == SET
        !          1939:           && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT
        !          1940:           && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART
        !          1941:           && ! use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 1)),
        !          1942:                                   INSN_CUID (i2))
        !          1943:           /* Don't pass sets with (USE (MEM ...)) dests to the following.  */
        !          1944:           && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != USE
        !          1945:           && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 0))) != USE
        !          1946:           && ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 1)),
        !          1947:                                  XVECEXP (newpat, 0, 0))
        !          1948:           && ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 0)),
        !          1949:                                  XVECEXP (newpat, 0, 1)))
        !          1950:     {
        !          1951:       newi2pat = XVECEXP (newpat, 0, 1);
        !          1952:       newpat = XVECEXP (newpat, 0, 0);
        !          1953: 
        !          1954:       i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
        !          1955:       if (i2_code_number >= 0)
        !          1956:        insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
        !          1957:     }
        !          1958: 
        !          1959:   /* If it still isn't recognized, fail and change things back the way they
        !          1960:      were.  */
        !          1961:   if ((insn_code_number < 0
        !          1962:        /* Is the result a reasonable ASM_OPERANDS?  */
        !          1963:        && (! check_asm_operands (newpat) || added_sets_1 || added_sets_2)))
        !          1964:     {
        !          1965:       undo_all ();
        !          1966:       return 0;
        !          1967:     }
        !          1968: 
        !          1969:   /* If we had to change another insn, make sure it is valid also.  */
        !          1970:   if (undobuf.other_insn)
        !          1971:     {
        !          1972:       rtx other_notes = REG_NOTES (undobuf.other_insn);
        !          1973:       rtx other_pat = PATTERN (undobuf.other_insn);
        !          1974:       rtx new_other_notes;
        !          1975:       rtx note, next;
        !          1976: 
        !          1977:       other_code_number = recog_for_combine (&other_pat, undobuf.other_insn,
        !          1978:                                             &new_other_notes);
        !          1979: 
        !          1980:       if (other_code_number < 0 && ! check_asm_operands (other_pat))
        !          1981:        {
        !          1982:          undo_all ();
        !          1983:          return 0;
        !          1984:        }
        !          1985: 
        !          1986:       PATTERN (undobuf.other_insn) = other_pat;
        !          1987: 
        !          1988:       /* If any of the notes in OTHER_INSN were REG_UNUSED, ensure that they
        !          1989:         are still valid.  Then add any non-duplicate notes added by
        !          1990:         recog_for_combine.  */
        !          1991:       for (note = REG_NOTES (undobuf.other_insn); note; note = next)
        !          1992:        {
        !          1993:          next = XEXP (note, 1);
        !          1994: 
        !          1995:          if (REG_NOTE_KIND (note) == REG_UNUSED
        !          1996:              && ! reg_set_p (XEXP (note, 0), PATTERN (undobuf.other_insn)))
        !          1997:            {
        !          1998:              if (GET_CODE (XEXP (note, 0)) == REG)
        !          1999:                reg_n_deaths[REGNO (XEXP (note, 0))]--;
        !          2000: 
        !          2001:              remove_note (undobuf.other_insn, note);
        !          2002:            }
        !          2003:        }
        !          2004: 
        !          2005:       for (note = new_other_notes; note; note = XEXP (note, 1))
        !          2006:        if (GET_CODE (XEXP (note, 0)) == REG)
        !          2007:          reg_n_deaths[REGNO (XEXP (note, 0))]++;
        !          2008: 
        !          2009:       distribute_notes (new_other_notes, undobuf.other_insn,
        !          2010:                        undobuf.other_insn, NULL_RTX, NULL_RTX, NULL_RTX);
        !          2011:     }
        !          2012: 
        !          2013:   /* We now know that we can do this combination.  Merge the insns and 
        !          2014:      update the status of registers and LOG_LINKS.  */
        !          2015: 
        !          2016:   {
        !          2017:     rtx i3notes, i2notes, i1notes = 0;
        !          2018:     rtx i3links, i2links, i1links = 0;
        !          2019:     rtx midnotes = 0;
        !          2020:     int all_adjacent = (next_real_insn (i2) == i3
        !          2021:                        && (i1 == 0 || next_real_insn (i1) == i2));
        !          2022:     register int regno;
        !          2023:     /* Compute which registers we expect to eliminate.  */
        !          2024:     rtx elim_i2 = (newi2pat || i2dest_in_i2src || i2dest_in_i1src
        !          2025:                   ? 0 : i2dest);
        !          2026:     rtx elim_i1 = i1 == 0 || i1dest_in_i1src ? 0 : i1dest;
        !          2027: 
        !          2028:     /* Get the old REG_NOTES and LOG_LINKS from all our insns and
        !          2029:        clear them.  */
        !          2030:     i3notes = REG_NOTES (i3), i3links = LOG_LINKS (i3);
        !          2031:     i2notes = REG_NOTES (i2), i2links = LOG_LINKS (i2);
        !          2032:     if (i1)
        !          2033:       i1notes = REG_NOTES (i1), i1links = LOG_LINKS (i1);
        !          2034: 
        !          2035:     /* Ensure that we do not have something that should not be shared but
        !          2036:        occurs multiple times in the new insns.  Check this by first
        !          2037:        resetting all the `used' flags and then copying anything is shared.  */
        !          2038: 
        !          2039:     reset_used_flags (i3notes);
        !          2040:     reset_used_flags (i2notes);
        !          2041:     reset_used_flags (i1notes);
        !          2042:     reset_used_flags (newpat);
        !          2043:     reset_used_flags (newi2pat);
        !          2044:     if (undobuf.other_insn)
        !          2045:       reset_used_flags (PATTERN (undobuf.other_insn));
        !          2046: 
        !          2047:     i3notes = copy_rtx_if_shared (i3notes);
        !          2048:     i2notes = copy_rtx_if_shared (i2notes);
        !          2049:     i1notes = copy_rtx_if_shared (i1notes);
        !          2050:     newpat = copy_rtx_if_shared (newpat);
        !          2051:     newi2pat = copy_rtx_if_shared (newi2pat);
        !          2052:     if (undobuf.other_insn)
        !          2053:       reset_used_flags (PATTERN (undobuf.other_insn));
        !          2054: 
        !          2055:     INSN_CODE (i3) = insn_code_number;
        !          2056:     PATTERN (i3) = newpat;
        !          2057:     if (undobuf.other_insn)
        !          2058:       INSN_CODE (undobuf.other_insn) = other_code_number;
        !          2059: 
        !          2060:     /* We had one special case above where I2 had more than one set and
        !          2061:        we replaced a destination of one of those sets with the destination
        !          2062:        of I3.  In that case, we have to update LOG_LINKS of insns later
        !          2063:        in this basic block.  Note that this (expensive) case is rare.
        !          2064: 
        !          2065:        Also, in this case, we must pretend that all REG_NOTEs for I2
        !          2066:        actually came from I3, so that REG_UNUSED notes from I2 will be
        !          2067:        properly handled.  */
        !          2068: 
        !          2069:     if (i3_subst_into_i2)
        !          2070:       {
        !          2071:        for (i = 0; i < XVECLEN (PATTERN (i2), 0); i++)
        !          2072:          if (GET_CODE (SET_DEST (XVECEXP (PATTERN (i2), 0, i))) == REG
        !          2073:              && SET_DEST (XVECEXP (PATTERN (i2), 0, i)) != i2dest
        !          2074:              && ! find_reg_note (i2, REG_UNUSED,
        !          2075:                                  SET_DEST (XVECEXP (PATTERN (i2), 0, i))))
        !          2076:            for (temp = NEXT_INSN (i2);
        !          2077:                 temp && (this_basic_block == n_basic_blocks - 1
        !          2078:                          || basic_block_head[this_basic_block] != temp);
        !          2079:                 temp = NEXT_INSN (temp))
        !          2080:              if (temp != i3 && GET_RTX_CLASS (GET_CODE (temp)) == 'i')
        !          2081:                for (link = LOG_LINKS (temp); link; link = XEXP (link, 1))
        !          2082:                  if (XEXP (link, 0) == i2)
        !          2083:                    XEXP (link, 0) = i3;
        !          2084: 
        !          2085:        if (i3notes)
        !          2086:          {
        !          2087:            rtx link = i3notes;
        !          2088:            while (XEXP (link, 1))
        !          2089:              link = XEXP (link, 1);
        !          2090:            XEXP (link, 1) = i2notes;
        !          2091:          }
        !          2092:        else
        !          2093:          i3notes = i2notes;
        !          2094:        i2notes = 0;
        !          2095:       }
        !          2096: 
        !          2097:     LOG_LINKS (i3) = 0;
        !          2098:     REG_NOTES (i3) = 0;
        !          2099:     LOG_LINKS (i2) = 0;
        !          2100:     REG_NOTES (i2) = 0;
        !          2101: 
        !          2102:     if (newi2pat)
        !          2103:       {
        !          2104:        INSN_CODE (i2) = i2_code_number;
        !          2105:        PATTERN (i2) = newi2pat;
        !          2106:       }
        !          2107:     else
        !          2108:       {
        !          2109:        PUT_CODE (i2, NOTE);
        !          2110:        NOTE_LINE_NUMBER (i2) = NOTE_INSN_DELETED;
        !          2111:        NOTE_SOURCE_FILE (i2) = 0;
        !          2112:       }
        !          2113: 
        !          2114:     if (i1)
        !          2115:       {
        !          2116:        LOG_LINKS (i1) = 0;
        !          2117:        REG_NOTES (i1) = 0;
        !          2118:        PUT_CODE (i1, NOTE);
        !          2119:        NOTE_LINE_NUMBER (i1) = NOTE_INSN_DELETED;
        !          2120:        NOTE_SOURCE_FILE (i1) = 0;
        !          2121:       }
        !          2122: 
        !          2123:     /* Get death notes for everything that is now used in either I3 or
        !          2124:        I2 and used to die in a previous insn.  */
        !          2125: 
        !          2126:     move_deaths (newpat, i1 ? INSN_CUID (i1) : INSN_CUID (i2), i3, &midnotes);
        !          2127:     if (newi2pat)
        !          2128:       move_deaths (newi2pat, INSN_CUID (i1), i2, &midnotes);
        !          2129: 
        !          2130:     /* Distribute all the LOG_LINKS and REG_NOTES from I1, I2, and I3.  */
        !          2131:     if (i3notes)
        !          2132:       distribute_notes (i3notes, i3, i3, newi2pat ? i2 : NULL_RTX,
        !          2133:                        elim_i2, elim_i1);
        !          2134:     if (i2notes)
        !          2135:       distribute_notes (i2notes, i2, i3, newi2pat ? i2 : NULL_RTX,
        !          2136:                        elim_i2, elim_i1);
        !          2137:     if (i1notes)
        !          2138:       distribute_notes (i1notes, i1, i3, newi2pat ? i2 : NULL_RTX,
        !          2139:                        elim_i2, elim_i1);
        !          2140:     if (midnotes)
        !          2141:       distribute_notes (midnotes, NULL_RTX, i3, newi2pat ? i2 : NULL_RTX,
        !          2142:                        elim_i2, elim_i1);
        !          2143: 
        !          2144:     /* Distribute any notes added to I2 or I3 by recog_for_combine.  We
        !          2145:        know these are REG_UNUSED and want them to go to the desired insn,
        !          2146:        so we always pass it as i3.  We have not counted the notes in 
        !          2147:        reg_n_deaths yet, so we need to do so now.  */
        !          2148: 
        !          2149:     if (newi2pat && new_i2_notes)
        !          2150:       {
        !          2151:        for (temp = new_i2_notes; temp; temp = XEXP (temp, 1))
        !          2152:          if (GET_CODE (XEXP (temp, 0)) == REG)
        !          2153:            reg_n_deaths[REGNO (XEXP (temp, 0))]++;
        !          2154:        
        !          2155:        distribute_notes (new_i2_notes, i2, i2, NULL_RTX, NULL_RTX, NULL_RTX);
        !          2156:       }
        !          2157: 
        !          2158:     if (new_i3_notes)
        !          2159:       {
        !          2160:        for (temp = new_i3_notes; temp; temp = XEXP (temp, 1))
        !          2161:          if (GET_CODE (XEXP (temp, 0)) == REG)
        !          2162:            reg_n_deaths[REGNO (XEXP (temp, 0))]++;
        !          2163:        
        !          2164:        distribute_notes (new_i3_notes, i3, i3, NULL_RTX, NULL_RTX, NULL_RTX);
        !          2165:       }
        !          2166: 
        !          2167:     /* If I3DEST was used in I3SRC, it really died in I3.  We may need to
        !          2168:        put a REG_DEAD note for it somewhere.  Similarly for I2 and I1.
        !          2169:        Show an additional death due to the REG_DEAD note we make here.  If
        !          2170:        we discard it in distribute_notes, we will decrement it again.  */
        !          2171: 
        !          2172:     if (i3dest_killed)
        !          2173:       {
        !          2174:        if (GET_CODE (i3dest_killed) == REG)
        !          2175:          reg_n_deaths[REGNO (i3dest_killed)]++;
        !          2176: 
        !          2177:        distribute_notes (gen_rtx (EXPR_LIST, REG_DEAD, i3dest_killed,
        !          2178:                                   NULL_RTX),
        !          2179:                          NULL_RTX, i3, newi2pat ? i2 : NULL_RTX,
        !          2180:                          NULL_RTX, NULL_RTX);
        !          2181:       }
        !          2182: 
        !          2183:     /* For I2 and I1, we have to be careful.  If NEWI2PAT exists and sets
        !          2184:        I2DEST or I1DEST, the death must be somewhere before I2, not I3.  If
        !          2185:        we passed I3 in that case, it might delete I2.  */
        !          2186: 
        !          2187:     if (i2dest_in_i2src)
        !          2188:       {
        !          2189:        if (GET_CODE (i2dest) == REG)
        !          2190:          reg_n_deaths[REGNO (i2dest)]++;
        !          2191: 
        !          2192:        if (newi2pat && reg_set_p (i2dest, newi2pat))
        !          2193:          distribute_notes (gen_rtx (EXPR_LIST, REG_DEAD, i2dest, NULL_RTX),
        !          2194:                            NULL_RTX, i2, NULL_RTX, NULL_RTX, NULL_RTX);
        !          2195:        else
        !          2196:          distribute_notes (gen_rtx (EXPR_LIST, REG_DEAD, i2dest, NULL_RTX),
        !          2197:                            NULL_RTX, i3, newi2pat ? i2 : NULL_RTX,
        !          2198:                            NULL_RTX, NULL_RTX);
        !          2199:       }
        !          2200: 
        !          2201:     if (i1dest_in_i1src)
        !          2202:       {
        !          2203:        if (GET_CODE (i1dest) == REG)
        !          2204:          reg_n_deaths[REGNO (i1dest)]++;
        !          2205: 
        !          2206:        if (newi2pat && reg_set_p (i1dest, newi2pat))
        !          2207:          distribute_notes (gen_rtx (EXPR_LIST, REG_DEAD, i1dest, NULL_RTX),
        !          2208:                            NULL_RTX, i2, NULL_RTX, NULL_RTX, NULL_RTX);
        !          2209:        else
        !          2210:          distribute_notes (gen_rtx (EXPR_LIST, REG_DEAD, i1dest, NULL_RTX),
        !          2211:                            NULL_RTX, i3, newi2pat ? i2 : NULL_RTX,
        !          2212:                            NULL_RTX, NULL_RTX);
        !          2213:       }
        !          2214: 
        !          2215:     distribute_links (i3links);
        !          2216:     distribute_links (i2links);
        !          2217:     distribute_links (i1links);
        !          2218: 
        !          2219:     if (GET_CODE (i2dest) == REG)
        !          2220:       {
        !          2221:        rtx link;
        !          2222:        rtx i2_insn = 0, i2_val = 0, set;
        !          2223: 
        !          2224:        /* The insn that used to set this register doesn't exist, and
        !          2225:           this life of the register may not exist either.  See if one of
        !          2226:           I3's links points to an insn that sets I2DEST.  If it does, 
        !          2227:           that is now the last known value for I2DEST. If we don't update
        !          2228:           this and I2 set the register to a value that depended on its old
        !          2229:           contents, we will get confused.  If this insn is used, thing
        !          2230:           will be set correctly in combine_instructions.  */
        !          2231: 
        !          2232:        for (link = LOG_LINKS (i3); link; link = XEXP (link, 1))
        !          2233:          if ((set = single_set (XEXP (link, 0))) != 0
        !          2234:              && rtx_equal_p (i2dest, SET_DEST (set)))
        !          2235:            i2_insn = XEXP (link, 0), i2_val = SET_SRC (set);
        !          2236: 
        !          2237:        record_value_for_reg (i2dest, i2_insn, i2_val);
        !          2238: 
        !          2239:        /* If the reg formerly set in I2 died only once and that was in I3,
        !          2240:           zero its use count so it won't make `reload' do any work.  */
        !          2241:        if (! added_sets_2 && newi2pat == 0)
        !          2242:          {
        !          2243:            regno = REGNO (i2dest);
        !          2244:            reg_n_sets[regno]--;
        !          2245:            if (reg_n_sets[regno] == 0
        !          2246:                && ! (basic_block_live_at_start[0][regno / REGSET_ELT_BITS]
        !          2247:                      & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS))))
        !          2248:              reg_n_refs[regno] = 0;
        !          2249:          }
        !          2250:       }
        !          2251: 
        !          2252:     if (i1 && GET_CODE (i1dest) == REG)
        !          2253:       {
        !          2254:        rtx link;
        !          2255:        rtx i1_insn = 0, i1_val = 0, set;
        !          2256: 
        !          2257:        for (link = LOG_LINKS (i3); link; link = XEXP (link, 1))
        !          2258:          if ((set = single_set (XEXP (link, 0))) != 0
        !          2259:              && rtx_equal_p (i1dest, SET_DEST (set)))
        !          2260:            i1_insn = XEXP (link, 0), i1_val = SET_SRC (set);
        !          2261: 
        !          2262:        record_value_for_reg (i1dest, i1_insn, i1_val);
        !          2263: 
        !          2264:        regno = REGNO (i1dest);
        !          2265:        if (! added_sets_1)
        !          2266:          {
        !          2267:            reg_n_sets[regno]--;
        !          2268:            if (reg_n_sets[regno] == 0
        !          2269:                && ! (basic_block_live_at_start[0][regno / REGSET_ELT_BITS]
        !          2270:                      & ((REGSET_ELT_TYPE) 1 << (regno % REGSET_ELT_BITS))))
        !          2271:              reg_n_refs[regno] = 0;
        !          2272:          }
        !          2273:       }
        !          2274: 
        !          2275:     /* Update reg_nonzero_bits et al for any changes that may have been made
        !          2276:        to this insn.  */
        !          2277: 
        !          2278:     note_stores (newpat, set_nonzero_bits_and_sign_copies);
        !          2279:     if (newi2pat)
        !          2280:       note_stores (newi2pat, set_nonzero_bits_and_sign_copies);
        !          2281: 
        !          2282:     /* If I3 is now an unconditional jump, ensure that it has a 
        !          2283:        BARRIER following it since it may have initially been a
        !          2284:        conditional jump.  It may also be the last nonnote insn.  */
        !          2285: 
        !          2286:     if ((GET_CODE (newpat) == RETURN || simplejump_p (i3))
        !          2287:        && ((temp = next_nonnote_insn (i3)) == NULL_RTX
        !          2288:            || GET_CODE (temp) != BARRIER))
        !          2289:       emit_barrier_after (i3);
        !          2290:   }
        !          2291: 
        !          2292:   combine_successes++;
        !          2293: 
        !          2294:   return newi2pat ? i2 : i3;
        !          2295: }
        !          2296: 
        !          2297: /* Undo all the modifications recorded in undobuf.  */
        !          2298: 
        !          2299: static void
        !          2300: undo_all ()
        !          2301: {
        !          2302:   register int i;
        !          2303:   if (undobuf.num_undo > MAX_UNDO)
        !          2304:     undobuf.num_undo = MAX_UNDO;
        !          2305:   for (i = undobuf.num_undo - 1; i >= 0; i--)
        !          2306:     {
        !          2307:       if (undobuf.undo[i].is_int)
        !          2308:        *undobuf.undo[i].where.i = undobuf.undo[i].old_contents.i;
        !          2309:       else
        !          2310:        *undobuf.undo[i].where.r = undobuf.undo[i].old_contents.r;
        !          2311:       
        !          2312:     }
        !          2313: 
        !          2314:   obfree (undobuf.storage);
        !          2315:   undobuf.num_undo = 0;
        !          2316: }
        !          2317: 
        !          2318: /* Find the innermost point within the rtx at LOC, possibly LOC itself,
        !          2319:    where we have an arithmetic expression and return that point.  LOC will
        !          2320:    be inside INSN.
        !          2321: 
        !          2322:    try_combine will call this function to see if an insn can be split into
        !          2323:    two insns.  */
        !          2324: 
        !          2325: static rtx *
        !          2326: find_split_point (loc, insn)
        !          2327:      rtx *loc;
        !          2328:      rtx insn;
        !          2329: {
        !          2330:   rtx x = *loc;
        !          2331:   enum rtx_code code = GET_CODE (x);
        !          2332:   rtx *split;
        !          2333:   int len = 0, pos, unsignedp;
        !          2334:   rtx inner;
        !          2335: 
        !          2336:   /* First special-case some codes.  */
        !          2337:   switch (code)
        !          2338:     {
        !          2339:     case SUBREG:
        !          2340: #ifdef INSN_SCHEDULING
        !          2341:       /* If we are making a paradoxical SUBREG invalid, it becomes a split
        !          2342:         point.  */
        !          2343:       if (GET_CODE (SUBREG_REG (x)) == MEM)
        !          2344:        return loc;
        !          2345: #endif
        !          2346:       return find_split_point (&SUBREG_REG (x), insn);
        !          2347: 
        !          2348:     case MEM:
        !          2349: #ifdef HAVE_lo_sum
        !          2350:       /* If we have (mem (const ..)) or (mem (symbol_ref ...)), split it
        !          2351:         using LO_SUM and HIGH.  */
        !          2352:       if (GET_CODE (XEXP (x, 0)) == CONST
        !          2353:          || GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
        !          2354:        {
        !          2355:          SUBST (XEXP (x, 0),
        !          2356:                 gen_rtx_combine (LO_SUM, Pmode,
        !          2357:                                  gen_rtx_combine (HIGH, Pmode, XEXP (x, 0)),
        !          2358:                                  XEXP (x, 0)));
        !          2359:          return &XEXP (XEXP (x, 0), 0);
        !          2360:        }
        !          2361: #endif
        !          2362: 
        !          2363:       /* If we have a PLUS whose second operand is a constant and the
        !          2364:         address is not valid, perhaps will can split it up using
        !          2365:         the machine-specific way to split large constants.  We use
        !          2366:         the first psuedo-reg (one of the virtual regs) as a placeholder;
        !          2367:         it will not remain in the result.  */
        !          2368:       if (GET_CODE (XEXP (x, 0)) == PLUS
        !          2369:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          2370:          && ! memory_address_p (GET_MODE (x), XEXP (x, 0)))
        !          2371:        {
        !          2372:          rtx reg = regno_reg_rtx[FIRST_PSEUDO_REGISTER];
        !          2373:          rtx seq = split_insns (gen_rtx (SET, VOIDmode, reg, XEXP (x, 0)),
        !          2374:                                 subst_insn);
        !          2375: 
        !          2376:          /* This should have produced two insns, each of which sets our
        !          2377:             placeholder.  If the source of the second is a valid address,
        !          2378:             we can make put both sources together and make a split point
        !          2379:             in the middle.  */
        !          2380: 
        !          2381:          if (seq && XVECLEN (seq, 0) == 2
        !          2382:              && GET_CODE (XVECEXP (seq, 0, 0)) == INSN
        !          2383:              && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) == SET
        !          2384:              && SET_DEST (PATTERN (XVECEXP (seq, 0, 0))) == reg
        !          2385:              && ! reg_mentioned_p (reg,
        !          2386:                                    SET_SRC (PATTERN (XVECEXP (seq, 0, 0))))
        !          2387:              && GET_CODE (XVECEXP (seq, 0, 1)) == INSN
        !          2388:              && GET_CODE (PATTERN (XVECEXP (seq, 0, 1))) == SET
        !          2389:              && SET_DEST (PATTERN (XVECEXP (seq, 0, 1))) == reg
        !          2390:              && memory_address_p (GET_MODE (x),
        !          2391:                                   SET_SRC (PATTERN (XVECEXP (seq, 0, 1)))))
        !          2392:            {
        !          2393:              rtx src1 = SET_SRC (PATTERN (XVECEXP (seq, 0, 0)));
        !          2394:              rtx src2 = SET_SRC (PATTERN (XVECEXP (seq, 0, 1)));
        !          2395: 
        !          2396:              /* Replace the placeholder in SRC2 with SRC1.  If we can
        !          2397:                 find where in SRC2 it was placed, that can become our
        !          2398:                 split point and we can replace this address with SRC2.
        !          2399:                 Just try two obvious places.  */
        !          2400: 
        !          2401:              src2 = replace_rtx (src2, reg, src1);
        !          2402:              split = 0;
        !          2403:              if (XEXP (src2, 0) == src1)
        !          2404:                split = &XEXP (src2, 0);
        !          2405:              else if (GET_RTX_FORMAT (GET_CODE (XEXP (src2, 0)))[0] == 'e'
        !          2406:                       && XEXP (XEXP (src2, 0), 0) == src1)
        !          2407:                split = &XEXP (XEXP (src2, 0), 0);
        !          2408: 
        !          2409:              if (split)
        !          2410:                {
        !          2411:                  SUBST (XEXP (x, 0), src2);
        !          2412:                  return split;
        !          2413:                }
        !          2414:            }
        !          2415:          
        !          2416:          /* If that didn't work, perhaps the first operand is complex and
        !          2417:             needs to be computed separately, so make a split point there.
        !          2418:             This will occur on machines that just support REG + CONST
        !          2419:             and have a constant moved through some previous computation.  */
        !          2420: 
        !          2421:          else if (GET_RTX_CLASS (GET_CODE (XEXP (XEXP (x, 0), 0))) != 'o'
        !          2422:                   && ! (GET_CODE (XEXP (XEXP (x, 0), 0)) == SUBREG
        !          2423:                         && (GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (XEXP (x, 0), 0))))
        !          2424:                             == 'o')))
        !          2425:            return &XEXP (XEXP (x, 0), 0);
        !          2426:        }
        !          2427:       break;
        !          2428: 
        !          2429:     case SET:
        !          2430: #ifdef HAVE_cc0
        !          2431:       /* If SET_DEST is CC0 and SET_SRC is not an operand, a COMPARE, or a
        !          2432:         ZERO_EXTRACT, the most likely reason why this doesn't match is that
        !          2433:         we need to put the operand into a register.  So split at that
        !          2434:         point.  */
        !          2435: 
        !          2436:       if (SET_DEST (x) == cc0_rtx
        !          2437:          && GET_CODE (SET_SRC (x)) != COMPARE
        !          2438:          && GET_CODE (SET_SRC (x)) != ZERO_EXTRACT
        !          2439:          && GET_RTX_CLASS (GET_CODE (SET_SRC (x))) != 'o'
        !          2440:          && ! (GET_CODE (SET_SRC (x)) == SUBREG
        !          2441:                && GET_RTX_CLASS (GET_CODE (SUBREG_REG (SET_SRC (x)))) == 'o'))
        !          2442:        return &SET_SRC (x);
        !          2443: #endif
        !          2444: 
        !          2445:       /* See if we can split SET_SRC as it stands.  */
        !          2446:       split = find_split_point (&SET_SRC (x), insn);
        !          2447:       if (split && split != &SET_SRC (x))
        !          2448:        return split;
        !          2449: 
        !          2450:       /* See if this is a bitfield assignment with everything constant.  If
        !          2451:         so, this is an IOR of an AND, so split it into that.  */
        !          2452:       if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT
        !          2453:          && (GET_MODE_BITSIZE (GET_MODE (XEXP (SET_DEST (x), 0)))
        !          2454:              <= HOST_BITS_PER_WIDE_INT)
        !          2455:          && GET_CODE (XEXP (SET_DEST (x), 1)) == CONST_INT
        !          2456:          && GET_CODE (XEXP (SET_DEST (x), 2)) == CONST_INT
        !          2457:          && GET_CODE (SET_SRC (x)) == CONST_INT
        !          2458:          && ((INTVAL (XEXP (SET_DEST (x), 1))
        !          2459:              + INTVAL (XEXP (SET_DEST (x), 2)))
        !          2460:              <= GET_MODE_BITSIZE (GET_MODE (XEXP (SET_DEST (x), 0))))
        !          2461:          && ! side_effects_p (XEXP (SET_DEST (x), 0)))
        !          2462:        {
        !          2463:          int pos = INTVAL (XEXP (SET_DEST (x), 2));
        !          2464:          int len = INTVAL (XEXP (SET_DEST (x), 1));
        !          2465:          int src = INTVAL (SET_SRC (x));
        !          2466:          rtx dest = XEXP (SET_DEST (x), 0);
        !          2467:          enum machine_mode mode = GET_MODE (dest);
        !          2468:          unsigned HOST_WIDE_INT mask = ((HOST_WIDE_INT) 1 << len) - 1;
        !          2469: 
        !          2470: #if BITS_BIG_ENDIAN
        !          2471:          pos = GET_MODE_BITSIZE (mode) - len - pos;
        !          2472: #endif
        !          2473: 
        !          2474:          if (src == mask)
        !          2475:            SUBST (SET_SRC (x),
        !          2476:                   gen_binary (IOR, mode, dest, GEN_INT (src << pos)));
        !          2477:          else
        !          2478:            SUBST (SET_SRC (x),
        !          2479:                   gen_binary (IOR, mode,
        !          2480:                               gen_binary (AND, mode, dest, 
        !          2481:                                           GEN_INT (~ (mask << pos)
        !          2482:                                                    & GET_MODE_MASK (mode))),
        !          2483:                               GEN_INT (src << pos)));
        !          2484: 
        !          2485:          SUBST (SET_DEST (x), dest);
        !          2486: 
        !          2487:          split = find_split_point (&SET_SRC (x), insn);
        !          2488:          if (split && split != &SET_SRC (x))
        !          2489:            return split;
        !          2490:        }
        !          2491: 
        !          2492:       /* Otherwise, see if this is an operation that we can split into two.
        !          2493:         If so, try to split that.  */
        !          2494:       code = GET_CODE (SET_SRC (x));
        !          2495: 
        !          2496:       switch (code)
        !          2497:        {
        !          2498:        case AND:
        !          2499:          /* If we are AND'ing with a large constant that is only a single
        !          2500:             bit and the result is only being used in a context where we
        !          2501:             need to know if it is zero or non-zero, replace it with a bit
        !          2502:             extraction.  This will avoid the large constant, which might
        !          2503:             have taken more than one insn to make.  If the constant were
        !          2504:             not a valid argument to the AND but took only one insn to make,
        !          2505:             this is no worse, but if it took more than one insn, it will
        !          2506:             be better.  */
        !          2507: 
        !          2508:          if (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
        !          2509:              && GET_CODE (XEXP (SET_SRC (x), 0)) == REG
        !          2510:              && (pos = exact_log2 (INTVAL (XEXP (SET_SRC (x), 1)))) >= 7
        !          2511:              && GET_CODE (SET_DEST (x)) == REG
        !          2512:              && (split = find_single_use (SET_DEST (x), insn, NULL_PTR)) != 0
        !          2513:              && (GET_CODE (*split) == EQ || GET_CODE (*split) == NE)
        !          2514:              && XEXP (*split, 0) == SET_DEST (x)
        !          2515:              && XEXP (*split, 1) == const0_rtx)
        !          2516:            {
        !          2517:              SUBST (SET_SRC (x),
        !          2518:                     make_extraction (GET_MODE (SET_DEST (x)),
        !          2519:                                      XEXP (SET_SRC (x), 0),
        !          2520:                                      pos, NULL_RTX, 1, 1, 0, 0));
        !          2521:              return find_split_point (loc, insn);
        !          2522:            }
        !          2523:          break;
        !          2524: 
        !          2525:        case SIGN_EXTEND:
        !          2526:          inner = XEXP (SET_SRC (x), 0);
        !          2527:          pos = 0;
        !          2528:          len = GET_MODE_BITSIZE (GET_MODE (inner));
        !          2529:          unsignedp = 0;
        !          2530:          break;
        !          2531: 
        !          2532:        case SIGN_EXTRACT:
        !          2533:        case ZERO_EXTRACT:
        !          2534:          if (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
        !          2535:              && GET_CODE (XEXP (SET_SRC (x), 2)) == CONST_INT)
        !          2536:            {
        !          2537:              inner = XEXP (SET_SRC (x), 0);
        !          2538:              len = INTVAL (XEXP (SET_SRC (x), 1));
        !          2539:              pos = INTVAL (XEXP (SET_SRC (x), 2));
        !          2540: 
        !          2541: #if BITS_BIG_ENDIAN
        !          2542:              pos = GET_MODE_BITSIZE (GET_MODE (inner)) - len - pos;
        !          2543: #endif
        !          2544:              unsignedp = (code == ZERO_EXTRACT);
        !          2545:            }
        !          2546:          break;
        !          2547:        }
        !          2548: 
        !          2549:       if (len && pos >= 0 && pos + len <= GET_MODE_BITSIZE (GET_MODE (inner)))
        !          2550:        {
        !          2551:          enum machine_mode mode = GET_MODE (SET_SRC (x));
        !          2552: 
        !          2553:          /* For unsigned, we have a choice of a shift followed by an
        !          2554:             AND or two shifts.  Use two shifts for field sizes where the
        !          2555:             constant might be too large.  We assume here that we can
        !          2556:             always at least get 8-bit constants in an AND insn, which is
        !          2557:             true for every current RISC.  */
        !          2558: 
        !          2559:          if (unsignedp && len <= 8)
        !          2560:            {
        !          2561:              SUBST (SET_SRC (x),
        !          2562:                     gen_rtx_combine
        !          2563:                     (AND, mode,
        !          2564:                      gen_rtx_combine (LSHIFTRT, mode,
        !          2565:                                       gen_lowpart_for_combine (mode, inner),
        !          2566:                                       GEN_INT (pos)),
        !          2567:                      GEN_INT (((HOST_WIDE_INT) 1 << len) - 1)));
        !          2568: 
        !          2569:              split = find_split_point (&SET_SRC (x), insn);
        !          2570:              if (split && split != &SET_SRC (x))
        !          2571:                return split;
        !          2572:            }
        !          2573:          else
        !          2574:            {
        !          2575:              SUBST (SET_SRC (x),
        !          2576:                     gen_rtx_combine
        !          2577:                     (unsignedp ? LSHIFTRT : ASHIFTRT, mode,
        !          2578:                      gen_rtx_combine (ASHIFT, mode,
        !          2579:                                       gen_lowpart_for_combine (mode, inner),
        !          2580:                                       GEN_INT (GET_MODE_BITSIZE (mode)
        !          2581:                                                - len - pos)),
        !          2582:                      GEN_INT (GET_MODE_BITSIZE (mode) - len)));
        !          2583: 
        !          2584:              split = find_split_point (&SET_SRC (x), insn);
        !          2585:              if (split && split != &SET_SRC (x))
        !          2586:                return split;
        !          2587:            }
        !          2588:        }
        !          2589: 
        !          2590:       /* See if this is a simple operation with a constant as the second
        !          2591:         operand.  It might be that this constant is out of range and hence
        !          2592:         could be used as a split point.  */
        !          2593:       if ((GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '2'
        !          2594:           || GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == 'c'
        !          2595:           || GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '<')
        !          2596:          && CONSTANT_P (XEXP (SET_SRC (x), 1))
        !          2597:          && (GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (x), 0))) == 'o'
        !          2598:              || (GET_CODE (XEXP (SET_SRC (x), 0)) == SUBREG
        !          2599:                  && (GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (SET_SRC (x), 0))))
        !          2600:                      == 'o'))))
        !          2601:        return &XEXP (SET_SRC (x), 1);
        !          2602: 
        !          2603:       /* Finally, see if this is a simple operation with its first operand
        !          2604:         not in a register.  The operation might require this operand in a
        !          2605:         register, so return it as a split point.  We can always do this
        !          2606:         because if the first operand were another operation, we would have
        !          2607:         already found it as a split point.  */
        !          2608:       if ((GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '2'
        !          2609:           || GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == 'c'
        !          2610:           || GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '<'
        !          2611:           || GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '1')
        !          2612:          && ! register_operand (XEXP (SET_SRC (x), 0), VOIDmode))
        !          2613:        return &XEXP (SET_SRC (x), 0);
        !          2614: 
        !          2615:       return 0;
        !          2616: 
        !          2617:     case AND:
        !          2618:     case IOR:
        !          2619:       /* We write NOR as (and (not A) (not B)), but if we don't have a NOR,
        !          2620:         it is better to write this as (not (ior A B)) so we can split it.
        !          2621:         Similarly for IOR.  */
        !          2622:       if (GET_CODE (XEXP (x, 0)) == NOT && GET_CODE (XEXP (x, 1)) == NOT)
        !          2623:        {
        !          2624:          SUBST (*loc,
        !          2625:                 gen_rtx_combine (NOT, GET_MODE (x),
        !          2626:                                  gen_rtx_combine (code == IOR ? AND : IOR,
        !          2627:                                                   GET_MODE (x),
        !          2628:                                                   XEXP (XEXP (x, 0), 0),
        !          2629:                                                   XEXP (XEXP (x, 1), 0))));
        !          2630:          return find_split_point (loc, insn);
        !          2631:        }
        !          2632: 
        !          2633:       /* Many RISC machines have a large set of logical insns.  If the
        !          2634:         second operand is a NOT, put it first so we will try to split the
        !          2635:         other operand first.  */
        !          2636:       if (GET_CODE (XEXP (x, 1)) == NOT)
        !          2637:        {
        !          2638:          rtx tem = XEXP (x, 0);
        !          2639:          SUBST (XEXP (x, 0), XEXP (x, 1));
        !          2640:          SUBST (XEXP (x, 1), tem);
        !          2641:        }
        !          2642:       break;
        !          2643:     }
        !          2644: 
        !          2645:   /* Otherwise, select our actions depending on our rtx class.  */
        !          2646:   switch (GET_RTX_CLASS (code))
        !          2647:     {
        !          2648:     case 'b':                  /* This is ZERO_EXTRACT and SIGN_EXTRACT.  */
        !          2649:     case '3':
        !          2650:       split = find_split_point (&XEXP (x, 2), insn);
        !          2651:       if (split)
        !          2652:        return split;
        !          2653:       /* ... fall through ... */
        !          2654:     case '2':
        !          2655:     case 'c':
        !          2656:     case '<':
        !          2657:       split = find_split_point (&XEXP (x, 1), insn);
        !          2658:       if (split)
        !          2659:        return split;
        !          2660:       /* ... fall through ... */
        !          2661:     case '1':
        !          2662:       /* Some machines have (and (shift ...) ...) insns.  If X is not
        !          2663:         an AND, but XEXP (X, 0) is, use it as our split point.  */
        !          2664:       if (GET_CODE (x) != AND && GET_CODE (XEXP (x, 0)) == AND)
        !          2665:        return &XEXP (x, 0);
        !          2666: 
        !          2667:       split = find_split_point (&XEXP (x, 0), insn);
        !          2668:       if (split)
        !          2669:        return split;
        !          2670:       return loc;
        !          2671:     }
        !          2672: 
        !          2673:   /* Otherwise, we don't have a split point.  */
        !          2674:   return 0;
        !          2675: }
        !          2676: 
        !          2677: /* Throughout X, replace FROM with TO, and return the result.
        !          2678:    The result is TO if X is FROM;
        !          2679:    otherwise the result is X, but its contents may have been modified.
        !          2680:    If they were modified, a record was made in undobuf so that
        !          2681:    undo_all will (among other things) return X to its original state.
        !          2682: 
        !          2683:    If the number of changes necessary is too much to record to undo,
        !          2684:    the excess changes are not made, so the result is invalid.
        !          2685:    The changes already made can still be undone.
        !          2686:    undobuf.num_undo is incremented for such changes, so by testing that
        !          2687:    the caller can tell whether the result is valid.
        !          2688: 
        !          2689:    `n_occurrences' is incremented each time FROM is replaced.
        !          2690:    
        !          2691:    IN_DEST is non-zero if we are processing the SET_DEST of a SET.
        !          2692: 
        !          2693:    UNIQUE_COPY is non-zero if each substitution must be unique.  We do this
        !          2694:    by copying if `n_occurrences' is non-zero.  */
        !          2695: 
        !          2696: static rtx
        !          2697: subst (x, from, to, in_dest, unique_copy)
        !          2698:      register rtx x, from, to;
        !          2699:      int in_dest;
        !          2700:      int unique_copy;
        !          2701: {
        !          2702:   register char *fmt;
        !          2703:   register int len, i;
        !          2704:   register enum rtx_code code = GET_CODE (x), orig_code = code;
        !          2705:   rtx temp;
        !          2706:   enum machine_mode mode = GET_MODE (x);
        !          2707:   enum machine_mode op0_mode = VOIDmode;
        !          2708:   rtx other_insn;
        !          2709:   rtx *cc_use;
        !          2710:   int n_restarts = 0;
        !          2711: 
        !          2712: /* FAKE_EXTEND_SAFE_P (MODE, FROM) is 1 if (subreg:MODE FROM 0) is a safe
        !          2713:    replacement for (zero_extend:MODE FROM) or (sign_extend:MODE FROM).
        !          2714:    If it is 0, that cannot be done.  We can now do this for any MEM
        !          2715:    because (SUBREG (MEM...)) is guaranteed to cause the MEM to be reloaded.
        !          2716:    If not for that, MEM's would very rarely be safe.  */
        !          2717: 
        !          2718: /* Reject MODEs bigger than a word, because we might not be able
        !          2719:    to reference a two-register group starting with an arbitrary register
        !          2720:    (and currently gen_lowpart might crash for a SUBREG).  */
        !          2721: 
        !          2722: #define FAKE_EXTEND_SAFE_P(MODE, FROM) \
        !          2723:   (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD)
        !          2724: 
        !          2725: /* Two expressions are equal if they are identical copies of a shared
        !          2726:    RTX or if they are both registers with the same register number
        !          2727:    and mode.  */
        !          2728: 
        !          2729: #define COMBINE_RTX_EQUAL_P(X,Y)                       \
        !          2730:   ((X) == (Y)                                          \
        !          2731:    || (GET_CODE (X) == REG && GET_CODE (Y) == REG      \
        !          2732:        && REGNO (X) == REGNO (Y) && GET_MODE (X) == GET_MODE (Y)))
        !          2733: 
        !          2734:   if (! in_dest && COMBINE_RTX_EQUAL_P (x, from))
        !          2735:     {
        !          2736:       n_occurrences++;
        !          2737:       return (unique_copy && n_occurrences > 1 ? copy_rtx (to) : to);
        !          2738:     }
        !          2739: 
        !          2740:   /* If X and FROM are the same register but different modes, they will
        !          2741:      not have been seen as equal above.  However, flow.c will make a 
        !          2742:      LOG_LINKS entry for that case.  If we do nothing, we will try to
        !          2743:      rerecognize our original insn and, when it succeeds, we will
        !          2744:      delete the feeding insn, which is incorrect.
        !          2745: 
        !          2746:      So force this insn not to match in this (rare) case.  */
        !          2747:   if (! in_dest && code == REG && GET_CODE (from) == REG
        !          2748:       && REGNO (x) == REGNO (from))
        !          2749:     return gen_rtx (CLOBBER, GET_MODE (x), const0_rtx);
        !          2750: 
        !          2751:   /* If this is an object, we are done unless it is a MEM or LO_SUM, both
        !          2752:      of which may contain things that can be combined.  */
        !          2753:   if (code != MEM && code != LO_SUM && GET_RTX_CLASS (code) == 'o')
        !          2754:     return x;
        !          2755: 
        !          2756:   /* It is possible to have a subexpression appear twice in the insn.
        !          2757:      Suppose that FROM is a register that appears within TO.
        !          2758:      Then, after that subexpression has been scanned once by `subst',
        !          2759:      the second time it is scanned, TO may be found.  If we were
        !          2760:      to scan TO here, we would find FROM within it and create a
        !          2761:      self-referent rtl structure which is completely wrong.  */
        !          2762:   if (COMBINE_RTX_EQUAL_P (x, to))
        !          2763:     return to;
        !          2764: 
        !          2765:   len = GET_RTX_LENGTH (code);
        !          2766:   fmt = GET_RTX_FORMAT (code);
        !          2767: 
        !          2768:   /* We don't need to process a SET_DEST that is a register, CC0, or PC, so
        !          2769:      set up to skip this common case.  All other cases where we want to
        !          2770:      suppress replacing something inside a SET_SRC are handled via the
        !          2771:      IN_DEST operand.  */
        !          2772:   if (code == SET
        !          2773:       && (GET_CODE (SET_DEST (x)) == REG
        !          2774:         || GET_CODE (SET_DEST (x)) == CC0
        !          2775:         || GET_CODE (SET_DEST (x)) == PC))
        !          2776:     fmt = "ie";
        !          2777: 
        !          2778:   /* Get the mode of operand 0 in case X is now a SIGN_EXTEND of a constant. */
        !          2779:   if (fmt[0] == 'e')
        !          2780:     op0_mode = GET_MODE (XEXP (x, 0));
        !          2781: 
        !          2782:   for (i = 0; i < len; i++)
        !          2783:     {
        !          2784:       if (fmt[i] == 'E')
        !          2785:        {
        !          2786:          register int j;
        !          2787:          for (j = XVECLEN (x, i) - 1; j >= 0; j--)
        !          2788:            {
        !          2789:              register rtx new;
        !          2790:              if (COMBINE_RTX_EQUAL_P (XVECEXP (x, i, j), from))
        !          2791:                {
        !          2792:                  new = (unique_copy && n_occurrences ? copy_rtx (to) : to);
        !          2793:                  n_occurrences++;
        !          2794:                }
        !          2795:              else
        !          2796:                {
        !          2797:                  new = subst (XVECEXP (x, i, j), from, to, 0, unique_copy);
        !          2798: 
        !          2799:                  /* If this substitution failed, this whole thing fails.  */
        !          2800:                  if (GET_CODE (new) == CLOBBER && XEXP (new, 0) == const0_rtx)
        !          2801:                    return new;
        !          2802:                }
        !          2803: 
        !          2804:              SUBST (XVECEXP (x, i, j), new);
        !          2805:            }
        !          2806:        }
        !          2807:       else if (fmt[i] == 'e')
        !          2808:        {
        !          2809:          register rtx new;
        !          2810: 
        !          2811:          if (COMBINE_RTX_EQUAL_P (XEXP (x, i), from))
        !          2812:            {
        !          2813:              /* In general, don't install a subreg involving two modes not
        !          2814:                 tieable.  It can worsen register allocation, and can even
        !          2815:                 make invalid reload insns, since the reg inside may need to
        !          2816:                 be copied from in the outside mode, and that may be invalid
        !          2817:                 if it is an fp reg copied in integer mode.
        !          2818: 
        !          2819:                 We allow two exceptions to this: It is valid if it is inside
        !          2820:                 another SUBREG and the mode of that SUBREG and the mode of
        !          2821:                 the inside of TO is tieable and it is valid if X is a SET
        !          2822:                 that copies FROM to CC0.  */
        !          2823:              if (GET_CODE (to) == SUBREG
        !          2824:                  && ! MODES_TIEABLE_P (GET_MODE (to),
        !          2825:                                        GET_MODE (SUBREG_REG (to)))
        !          2826:                  && ! (code == SUBREG
        !          2827:                        && MODES_TIEABLE_P (mode, GET_MODE (SUBREG_REG (to))))
        !          2828: #ifdef HAVE_cc0
        !          2829:                  && ! (code == SET && i == 1 && XEXP (x, 0) == cc0_rtx)
        !          2830: #endif
        !          2831:                  )
        !          2832:                return gen_rtx (CLOBBER, VOIDmode, const0_rtx);
        !          2833: 
        !          2834:              new = (unique_copy && n_occurrences ? copy_rtx (to) : to);
        !          2835:              n_occurrences++;
        !          2836:            }
        !          2837:          else
        !          2838:            /* If we are in a SET_DEST, suppress most cases unless we
        !          2839:               have gone inside a MEM, in which case we want to
        !          2840:               simplify the address.  We assume here that things that
        !          2841:               are actually part of the destination have their inner
        !          2842:               parts in the first expression.  This is true for SUBREG, 
        !          2843:               STRICT_LOW_PART, and ZERO_EXTRACT, which are the only
        !          2844:               things aside from REG and MEM that should appear in a
        !          2845:               SET_DEST.  */
        !          2846:            new = subst (XEXP (x, i), from, to,
        !          2847:                         (((in_dest
        !          2848:                            && (code == SUBREG || code == STRICT_LOW_PART
        !          2849:                                || code == ZERO_EXTRACT))
        !          2850:                           || code == SET)
        !          2851:                          && i == 0), unique_copy);
        !          2852: 
        !          2853:          /* If we found that we will have to reject this combination,
        !          2854:             indicate that by returning the CLOBBER ourselves, rather than
        !          2855:             an expression containing it.  This will speed things up as
        !          2856:             well as prevent accidents where two CLOBBERs are considered
        !          2857:             to be equal, thus producing an incorrect simplification.  */
        !          2858: 
        !          2859:          if (GET_CODE (new) == CLOBBER && XEXP (new, 0) == const0_rtx)
        !          2860:            return new;
        !          2861: 
        !          2862:          SUBST (XEXP (x, i), new);
        !          2863:        }
        !          2864:     }
        !          2865: 
        !          2866:   /* We come back to here if we have replaced the expression with one of
        !          2867:      a different code and it is likely that further simplification will be
        !          2868:      possible.  */
        !          2869: 
        !          2870:  restart:
        !          2871: 
        !          2872:   /* If we have restarted more than 4 times, we are probably looping, so
        !          2873:      give up.  */
        !          2874:   if (++n_restarts > 4)
        !          2875:     return x;
        !          2876: 
        !          2877:   /* If we are restarting at all, it means that we no longer know the
        !          2878:      original mode of operand 0 (since we have probably changed the
        !          2879:      form of X).  */
        !          2880: 
        !          2881:   if (n_restarts > 1)
        !          2882:     op0_mode = VOIDmode;
        !          2883: 
        !          2884:   code = GET_CODE (x);
        !          2885: 
        !          2886:   /* If this is a commutative operation, put a constant last and a complex
        !          2887:      expression first.  We don't need to do this for comparisons here.  */
        !          2888:   if (GET_RTX_CLASS (code) == 'c'
        !          2889:       && ((CONSTANT_P (XEXP (x, 0)) && GET_CODE (XEXP (x, 1)) != CONST_INT)
        !          2890:          || (GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == 'o'
        !          2891:              && GET_RTX_CLASS (GET_CODE (XEXP (x, 1))) != 'o')
        !          2892:          || (GET_CODE (XEXP (x, 0)) == SUBREG
        !          2893:              && GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (x, 0)))) == 'o'
        !          2894:              && GET_RTX_CLASS (GET_CODE (XEXP (x, 1))) != 'o')))
        !          2895:     {
        !          2896:       temp = XEXP (x, 0);
        !          2897:       SUBST (XEXP (x, 0), XEXP (x, 1));
        !          2898:       SUBST (XEXP (x, 1), temp);
        !          2899:     }
        !          2900: 
        !          2901:   /* If this is a PLUS, MINUS, or MULT, and the first operand is the
        !          2902:      sign extension of a PLUS with a constant, reverse the order of the sign
        !          2903:      extension and the addition. Note that this not the same as the original
        !          2904:      code, but overflow is undefined for signed values.  Also note that the
        !          2905:      PLUS will have been partially moved "inside" the sign-extension, so that
        !          2906:      the first operand of X will really look like:
        !          2907:          (ashiftrt (plus (ashift A C4) C5) C4).
        !          2908:      We convert this to
        !          2909:          (plus (ashiftrt (ashift A C4) C2) C4)
        !          2910:      and replace the first operand of X with that expression.  Later parts
        !          2911:      of this function may simplify the expression further.
        !          2912: 
        !          2913:      For example, if we start with (mult (sign_extend (plus A C1)) C2),
        !          2914:      we swap the SIGN_EXTEND and PLUS.  Later code will apply the
        !          2915:      distributive law to produce (plus (mult (sign_extend X) C1) C3).
        !          2916: 
        !          2917:      We do this to simplify address expressions.  */
        !          2918: 
        !          2919:   if ((code == PLUS || code == MINUS || code == MULT)
        !          2920:       && GET_CODE (XEXP (x, 0)) == ASHIFTRT
        !          2921:       && GET_CODE (XEXP (XEXP (x, 0), 0)) == PLUS
        !          2922:       && GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 0)) == ASHIFT
        !          2923:       && GET_CODE (XEXP (XEXP (XEXP (XEXP (x, 0), 0), 0), 1)) == CONST_INT
        !          2924:       && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          2925:       && XEXP (XEXP (XEXP (XEXP (x, 0), 0), 0), 1) == XEXP (XEXP (x, 0), 1)
        !          2926:       && GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 1)) == CONST_INT
        !          2927:       && (temp = simplify_binary_operation (ASHIFTRT, mode,
        !          2928:                                            XEXP (XEXP (XEXP (x, 0), 0), 1),
        !          2929:                                            XEXP (XEXP (x, 0), 1))) != 0)
        !          2930:     {
        !          2931:       rtx new
        !          2932:        = simplify_shift_const (NULL_RTX, ASHIFT, mode,
        !          2933:                                XEXP (XEXP (XEXP (XEXP (x, 0), 0), 0), 0),
        !          2934:                                INTVAL (XEXP (XEXP (x, 0), 1)));
        !          2935: 
        !          2936:       new = simplify_shift_const (NULL_RTX, ASHIFTRT, mode, new,
        !          2937:                                  INTVAL (XEXP (XEXP (x, 0), 1)));
        !          2938: 
        !          2939:       SUBST (XEXP (x, 0), gen_binary (PLUS, mode, new, temp));
        !          2940:     }
        !          2941: 
        !          2942:   /* If this is a simple operation applied to an IF_THEN_ELSE, try 
        !          2943:      applying it to the arms of the IF_THEN_ELSE.  This often simplifies
        !          2944:      things.  Don't deal with operations that change modes here.  */
        !          2945: 
        !          2946:   if ((GET_RTX_CLASS (code) == '2' || GET_RTX_CLASS (code) == 'c')
        !          2947:       && GET_CODE (XEXP (x, 0)) == IF_THEN_ELSE)
        !          2948:     {
        !          2949:       /* Don't do this by using SUBST inside X since we might be messing
        !          2950:         up a shared expression.  */
        !          2951:       rtx cond = XEXP (XEXP (x, 0), 0);
        !          2952:       rtx t_arm = subst (gen_binary (code, mode, XEXP (XEXP (x, 0), 1),
        !          2953:                                     XEXP (x, 1)),
        !          2954:                         pc_rtx, pc_rtx, 0, 0);
        !          2955:       rtx f_arm = subst (gen_binary (code, mode, XEXP (XEXP (x, 0), 2),
        !          2956:                                     XEXP (x, 1)),
        !          2957:                         pc_rtx, pc_rtx, 0, 0);
        !          2958: 
        !          2959: 
        !          2960:       x = gen_rtx (IF_THEN_ELSE, mode, cond, t_arm, f_arm);
        !          2961:       goto restart;
        !          2962:     }
        !          2963: 
        !          2964:   else if ((GET_RTX_CLASS (code) == '2' || GET_RTX_CLASS (code) == 'c')
        !          2965:           && GET_CODE (XEXP (x, 1)) == IF_THEN_ELSE)
        !          2966:     {
        !          2967:       /* Don't do this by using SUBST inside X since we might be messing
        !          2968:         up a shared expression.  */
        !          2969:       rtx cond = XEXP (XEXP (x, 1), 0);
        !          2970:       rtx t_arm = subst (gen_binary (code, mode, XEXP (x, 0),
        !          2971:                                     XEXP (XEXP (x, 1), 1)),
        !          2972:                         pc_rtx, pc_rtx, 0, 0);
        !          2973:       rtx f_arm = subst (gen_binary (code, mode, XEXP (x, 0),
        !          2974:                                     XEXP (XEXP (x, 1), 2)),
        !          2975:                         pc_rtx, pc_rtx, 0, 0);
        !          2976: 
        !          2977:       x = gen_rtx (IF_THEN_ELSE, mode, cond, t_arm, f_arm);
        !          2978:       goto restart;
        !          2979:     }
        !          2980: 
        !          2981:   else if (GET_RTX_CLASS (code) == '1'
        !          2982:           && GET_CODE (XEXP (x, 0)) == IF_THEN_ELSE
        !          2983:           && GET_MODE (XEXP (x, 0)) == mode)
        !          2984:     {
        !          2985:       rtx cond = XEXP (XEXP (x, 0), 0);
        !          2986:       rtx t_arm = subst (gen_unary (code, mode, XEXP (XEXP (x, 0), 1)),
        !          2987:                         pc_rtx, pc_rtx, 0, 0);
        !          2988:       rtx f_arm = subst (gen_unary (code, mode, XEXP (XEXP (x, 0), 2)),
        !          2989:                         pc_rtx, pc_rtx, 0, 0);
        !          2990: 
        !          2991:       x = gen_rtx_combine (IF_THEN_ELSE, mode, cond, t_arm, f_arm);
        !          2992:       goto restart;
        !          2993:     }
        !          2994: 
        !          2995:   /* Try to fold this expression in case we have constants that weren't
        !          2996:      present before.  */
        !          2997:   temp = 0;
        !          2998:   switch (GET_RTX_CLASS (code))
        !          2999:     {
        !          3000:     case '1':
        !          3001:       temp = simplify_unary_operation (code, mode, XEXP (x, 0), op0_mode);
        !          3002:       break;
        !          3003:     case '<':
        !          3004:       temp = simplify_relational_operation (code, op0_mode,
        !          3005:                                            XEXP (x, 0), XEXP (x, 1));
        !          3006: #ifdef FLOAT_STORE_FLAG_VALUE
        !          3007:       if (temp != 0 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
        !          3008:        temp = ((temp == const0_rtx) ? CONST0_RTX (GET_MODE (x))
        !          3009:                : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, GET_MODE (x)));
        !          3010: #endif
        !          3011:       break;
        !          3012:     case 'c':
        !          3013:     case '2':
        !          3014:       temp = simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
        !          3015:       break;
        !          3016:     case 'b':
        !          3017:     case '3':
        !          3018:       temp = simplify_ternary_operation (code, mode, op0_mode, XEXP (x, 0),
        !          3019:                                         XEXP (x, 1), XEXP (x, 2));
        !          3020:       break;
        !          3021:     }
        !          3022: 
        !          3023:   if (temp)
        !          3024:     x = temp, code = GET_CODE (temp);
        !          3025: 
        !          3026:   /* First see if we can apply the inverse distributive law.  */
        !          3027:   if (code == PLUS || code == MINUS
        !          3028:       || code == AND || code == IOR || code == XOR)
        !          3029:     {
        !          3030:       x = apply_distributive_law (x);
        !          3031:       code = GET_CODE (x);
        !          3032:     }
        !          3033: 
        !          3034:   /* If CODE is an associative operation not otherwise handled, see if we
        !          3035:      can associate some operands.  This can win if they are constants or
        !          3036:      if they are logically related (i.e. (a & b) & a.  */
        !          3037:   if ((code == PLUS || code == MINUS
        !          3038:        || code == MULT || code == AND || code == IOR || code == XOR
        !          3039:        || code == DIV || code == UDIV
        !          3040:        || code == SMAX || code == SMIN || code == UMAX || code == UMIN)
        !          3041:       && INTEGRAL_MODE_P (mode))
        !          3042:     {
        !          3043:       if (GET_CODE (XEXP (x, 0)) == code)
        !          3044:        {
        !          3045:          rtx other = XEXP (XEXP (x, 0), 0);
        !          3046:          rtx inner_op0 = XEXP (XEXP (x, 0), 1);
        !          3047:          rtx inner_op1 = XEXP (x, 1);
        !          3048:          rtx inner;
        !          3049:          
        !          3050:          /* Make sure we pass the constant operand if any as the second
        !          3051:             one if this is a commutative operation.  */
        !          3052:          if (CONSTANT_P (inner_op0) && GET_RTX_CLASS (code) == 'c')
        !          3053:            {
        !          3054:              rtx tem = inner_op0;
        !          3055:              inner_op0 = inner_op1;
        !          3056:              inner_op1 = tem;
        !          3057:            }
        !          3058:          inner = simplify_binary_operation (code == MINUS ? PLUS
        !          3059:                                             : code == DIV ? MULT
        !          3060:                                             : code == UDIV ? MULT
        !          3061:                                             : code,
        !          3062:                                             mode, inner_op0, inner_op1);
        !          3063: 
        !          3064:          /* For commutative operations, try the other pair if that one
        !          3065:             didn't simplify.  */
        !          3066:          if (inner == 0 && GET_RTX_CLASS (code) == 'c')
        !          3067:            {
        !          3068:              other = XEXP (XEXP (x, 0), 1);
        !          3069:              inner = simplify_binary_operation (code, mode,
        !          3070:                                                 XEXP (XEXP (x, 0), 0),
        !          3071:                                                 XEXP (x, 1));
        !          3072:            }
        !          3073: 
        !          3074:          if (inner)
        !          3075:            {
        !          3076:              x = gen_binary (code, mode, other, inner);
        !          3077:              goto restart;
        !          3078:            
        !          3079:            }
        !          3080:        }
        !          3081:     }
        !          3082: 
        !          3083:   /* A little bit of algebraic simplification here.  */
        !          3084:   switch (code)
        !          3085:     {
        !          3086:     case MEM:
        !          3087:       /* Ensure that our address has any ASHIFTs converted to MULT in case
        !          3088:         address-recognizing predicates are called later.  */
        !          3089:       temp = make_compound_operation (XEXP (x, 0), MEM);
        !          3090:       SUBST (XEXP (x, 0), temp);
        !          3091:       break;
        !          3092: 
        !          3093:     case SUBREG:
        !          3094:       /* (subreg:A (mem:B X) N) becomes a modified MEM unless the SUBREG
        !          3095:         is paradoxical.  If we can't do that safely, then it becomes
        !          3096:         something nonsensical so that this combination won't take place.  */
        !          3097: 
        !          3098:       if (GET_CODE (SUBREG_REG (x)) == MEM
        !          3099:          && (GET_MODE_SIZE (mode)
        !          3100:              <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
        !          3101:        {
        !          3102:          rtx inner = SUBREG_REG (x);
        !          3103:          int endian_offset = 0;
        !          3104:          /* Don't change the mode of the MEM
        !          3105:             if that would change the meaning of the address.  */
        !          3106:          if (MEM_VOLATILE_P (SUBREG_REG (x))
        !          3107:              || mode_dependent_address_p (XEXP (inner, 0)))
        !          3108:            return gen_rtx (CLOBBER, mode, const0_rtx);
        !          3109: 
        !          3110: #if BYTES_BIG_ENDIAN
        !          3111:          if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
        !          3112:            endian_offset += UNITS_PER_WORD - GET_MODE_SIZE (mode);
        !          3113:          if (GET_MODE_SIZE (GET_MODE (inner)) < UNITS_PER_WORD)
        !          3114:            endian_offset -= UNITS_PER_WORD - GET_MODE_SIZE (GET_MODE (inner));
        !          3115: #endif
        !          3116:          /* Note if the plus_constant doesn't make a valid address
        !          3117:             then this combination won't be accepted.  */
        !          3118:          x = gen_rtx (MEM, mode,
        !          3119:                       plus_constant (XEXP (inner, 0),
        !          3120:                                      (SUBREG_WORD (x) * UNITS_PER_WORD
        !          3121:                                       + endian_offset)));
        !          3122:          MEM_VOLATILE_P (x) = MEM_VOLATILE_P (inner);
        !          3123:          RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (inner);
        !          3124:          MEM_IN_STRUCT_P (x) = MEM_IN_STRUCT_P (inner);
        !          3125:          return x;
        !          3126:        }
        !          3127: 
        !          3128:       /* If we are in a SET_DEST, these other cases can't apply.  */
        !          3129:       if (in_dest)
        !          3130:        return x;
        !          3131: 
        !          3132:       /* Changing mode twice with SUBREG => just change it once,
        !          3133:         or not at all if changing back to starting mode.  */
        !          3134:       if (GET_CODE (SUBREG_REG (x)) == SUBREG)
        !          3135:        {
        !          3136:          if (mode == GET_MODE (SUBREG_REG (SUBREG_REG (x)))
        !          3137:              && SUBREG_WORD (x) == 0 && SUBREG_WORD (SUBREG_REG (x)) == 0)
        !          3138:            return SUBREG_REG (SUBREG_REG (x));
        !          3139: 
        !          3140:          SUBST_INT (SUBREG_WORD (x),
        !          3141:                     SUBREG_WORD (x) + SUBREG_WORD (SUBREG_REG (x)));
        !          3142:          SUBST (SUBREG_REG (x), SUBREG_REG (SUBREG_REG (x)));
        !          3143:        }
        !          3144: 
        !          3145:       /* SUBREG of a hard register => just change the register number
        !          3146:         and/or mode.  If the hard register is not valid in that mode,
        !          3147:         suppress this combination.  If the hard register is the stack,
        !          3148:         frame, or argument pointer, leave this as a SUBREG.  */
        !          3149: 
        !          3150:       if (GET_CODE (SUBREG_REG (x)) == REG
        !          3151:          && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
        !          3152:          && REGNO (SUBREG_REG (x)) != FRAME_POINTER_REGNUM
        !          3153: #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
        !          3154:          && REGNO (SUBREG_REG (x)) != HARD_FRAME_POINTER_REGNUM
        !          3155: #endif
        !          3156: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
        !          3157:          && REGNO (SUBREG_REG (x)) != ARG_POINTER_REGNUM
        !          3158: #endif
        !          3159:          && REGNO (SUBREG_REG (x)) != STACK_POINTER_REGNUM)
        !          3160:        {
        !          3161:          if (HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (x)) + SUBREG_WORD (x),
        !          3162:                                  mode))
        !          3163:            return gen_rtx (REG, mode,
        !          3164:                            REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
        !          3165:          else
        !          3166:            return gen_rtx (CLOBBER, mode, const0_rtx);
        !          3167:        }
        !          3168: 
        !          3169:       /* For a constant, try to pick up the part we want.  Handle a full
        !          3170:         word and low-order part.  Only do this if we are narrowing
        !          3171:         the constant; if it is being widened, we have no idea what
        !          3172:         the extra bits will have been set to.  */
        !          3173: 
        !          3174:       if (CONSTANT_P (SUBREG_REG (x)) && op0_mode != VOIDmode
        !          3175:          && GET_MODE_SIZE (mode) == UNITS_PER_WORD
        !          3176:          && GET_MODE_SIZE (op0_mode) < UNITS_PER_WORD
        !          3177:          && GET_MODE_CLASS (mode) == MODE_INT)
        !          3178:        {
        !          3179:          temp = operand_subword (SUBREG_REG (x), SUBREG_WORD (x),
        !          3180:                                  0, op0_mode);
        !          3181:          if (temp)
        !          3182:            return temp;
        !          3183:        }
        !          3184:        
        !          3185:       /* If we want a subreg of a constant, at offset 0,
        !          3186:         take the low bits.  On a little-endian machine, that's
        !          3187:         always valid.  On a big-endian machine, it's valid
        !          3188:         only if the constant's mode fits in one word.  */
        !          3189:       if (CONSTANT_P (SUBREG_REG (x)) && subreg_lowpart_p (x)
        !          3190:          && GET_MODE_SIZE (mode) < GET_MODE_SIZE (op0_mode)
        !          3191: #if WORDS_BIG_ENDIAN
        !          3192:          && GET_MODE_BITSIZE (op0_mode) <= BITS_PER_WORD
        !          3193: #endif
        !          3194:          )
        !          3195:        return gen_lowpart_for_combine (mode, SUBREG_REG (x));
        !          3196: 
        !          3197:       /* If we are narrowing an integral object, we need to see if we can
        !          3198:         simplify the expression for the object knowing that we only need the
        !          3199:         low-order bits.  */
        !          3200: 
        !          3201:       if (GET_MODE_CLASS (mode) == MODE_INT
        !          3202:          && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
        !          3203:          && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
        !          3204:          && subreg_lowpart_p (x))
        !          3205:        return force_to_mode (SUBREG_REG (x), mode, GET_MODE_MASK (mode),
        !          3206:                              NULL_RTX, 0);
        !          3207:       break;
        !          3208: 
        !          3209:     case NOT:
        !          3210:       /* (not (plus X -1)) can become (neg X).  */
        !          3211:       if (GET_CODE (XEXP (x, 0)) == PLUS
        !          3212:          && XEXP (XEXP (x, 0), 1) == constm1_rtx)
        !          3213:        {
        !          3214:          x = gen_rtx_combine (NEG, mode, XEXP (XEXP (x, 0), 0));
        !          3215:          goto restart;
        !          3216:        }
        !          3217: 
        !          3218:       /* Similarly, (not (neg X)) is (plus X -1).  */
        !          3219:       if (GET_CODE (XEXP (x, 0)) == NEG)
        !          3220:        {
        !          3221:          x = gen_rtx_combine (PLUS, mode, XEXP (XEXP (x, 0), 0), constm1_rtx);
        !          3222:          goto restart;
        !          3223:        }
        !          3224: 
        !          3225:       /* (not (xor X C)) for C constant is (xor X D) with D = ~ C.  */
        !          3226:       if (GET_CODE (XEXP (x, 0)) == XOR
        !          3227:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          3228:          && (temp = simplify_unary_operation (NOT, mode,
        !          3229:                                               XEXP (XEXP (x, 0), 1),
        !          3230:                                               mode)) != 0)
        !          3231:        {
        !          3232:          SUBST (XEXP (XEXP (x, 0), 1), temp);
        !          3233:          return XEXP (x, 0);
        !          3234:        }
        !          3235:              
        !          3236:       /* (not (ashift 1 X)) is (rotate ~1 X).  We used to do this for operands
        !          3237:         other than 1, but that is not valid.  We could do a similar
        !          3238:         simplification for (not (lshiftrt C X)) where C is just the sign bit,
        !          3239:         but this doesn't seem common enough to bother with.  */
        !          3240:       if (GET_CODE (XEXP (x, 0)) == ASHIFT
        !          3241:          && XEXP (XEXP (x, 0), 0) == const1_rtx)
        !          3242:        {
        !          3243:          x = gen_rtx (ROTATE, mode, gen_unary (NOT, mode, const1_rtx),
        !          3244:                       XEXP (XEXP (x, 0), 1));
        !          3245:          goto restart;
        !          3246:        }
        !          3247:                                            
        !          3248:       if (GET_CODE (XEXP (x, 0)) == SUBREG
        !          3249:          && subreg_lowpart_p (XEXP (x, 0))
        !          3250:          && (GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))
        !          3251:              < GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (x, 0)))))
        !          3252:          && GET_CODE (SUBREG_REG (XEXP (x, 0))) == ASHIFT
        !          3253:          && XEXP (SUBREG_REG (XEXP (x, 0)), 0) == const1_rtx)
        !          3254:        {
        !          3255:          enum machine_mode inner_mode = GET_MODE (SUBREG_REG (XEXP (x, 0)));
        !          3256: 
        !          3257:          x = gen_rtx (ROTATE, inner_mode,
        !          3258:                       gen_unary (NOT, inner_mode, const1_rtx),
        !          3259:                       XEXP (SUBREG_REG (XEXP (x, 0)), 1));
        !          3260:          x = gen_lowpart_for_combine (mode, x);
        !          3261:          goto restart;
        !          3262:        }
        !          3263:                                            
        !          3264: #if STORE_FLAG_VALUE == -1
        !          3265:       /* (not (comparison foo bar)) can be done by reversing the comparison
        !          3266:         code if valid.  */
        !          3267:       if (GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
        !          3268:          && reversible_comparison_p (XEXP (x, 0)))
        !          3269:        return gen_rtx_combine (reverse_condition (GET_CODE (XEXP (x, 0))),
        !          3270:                                mode, XEXP (XEXP (x, 0), 0),
        !          3271:                                XEXP (XEXP (x, 0), 1));
        !          3272: 
        !          3273:       /* (ashiftrt foo C) where C is the number of bits in FOO minus 1
        !          3274:         is (lt foo (const_int 0)), so we can perform the above
        !          3275:         simplification.  */
        !          3276: 
        !          3277:       if (XEXP (x, 1) == const1_rtx
        !          3278:          && GET_CODE (XEXP (x, 0)) == ASHIFTRT
        !          3279:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          3280:          && INTVAL (XEXP (XEXP (x, 0), 1)) == GET_MODE_BITSIZE (mode) - 1)
        !          3281:        return gen_rtx_combine (GE, mode, XEXP (XEXP (x, 0), 0), const0_rtx);
        !          3282: #endif
        !          3283: 
        !          3284:       /* Apply De Morgan's laws to reduce number of patterns for machines
        !          3285:         with negating logical insns (and-not, nand, etc.).  If result has
        !          3286:         only one NOT, put it first, since that is how the patterns are
        !          3287:         coded.  */
        !          3288: 
        !          3289:       if (GET_CODE (XEXP (x, 0)) == IOR || GET_CODE (XEXP (x, 0)) == AND)
        !          3290:        {
        !          3291:         rtx in1 = XEXP (XEXP (x, 0), 0), in2 = XEXP (XEXP (x, 0), 1);
        !          3292: 
        !          3293:         if (GET_CODE (in1) == NOT)
        !          3294:           in1 = XEXP (in1, 0);
        !          3295:         else
        !          3296:           in1 = gen_rtx_combine (NOT, GET_MODE (in1), in1);
        !          3297: 
        !          3298:         if (GET_CODE (in2) == NOT)
        !          3299:           in2 = XEXP (in2, 0);
        !          3300:         else if (GET_CODE (in2) == CONST_INT
        !          3301:                  && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
        !          3302:           in2 = GEN_INT (GET_MODE_MASK (mode) & ~ INTVAL (in2));
        !          3303:         else
        !          3304:           in2 = gen_rtx_combine (NOT, GET_MODE (in2), in2);
        !          3305: 
        !          3306:         if (GET_CODE (in2) == NOT)
        !          3307:           {
        !          3308:             rtx tem = in2;
        !          3309:             in2 = in1; in1 = tem;
        !          3310:           }
        !          3311: 
        !          3312:         x = gen_rtx_combine (GET_CODE (XEXP (x, 0)) == IOR ? AND : IOR,
        !          3313:                              mode, in1, in2);
        !          3314:         goto restart;
        !          3315:        } 
        !          3316:       break;
        !          3317: 
        !          3318:     case NEG:
        !          3319:       /* (neg (plus X 1)) can become (not X).  */
        !          3320:       if (GET_CODE (XEXP (x, 0)) == PLUS
        !          3321:          && XEXP (XEXP (x, 0), 1) == const1_rtx)
        !          3322:        {
        !          3323:          x = gen_rtx_combine (NOT, mode, XEXP (XEXP (x, 0), 0));
        !          3324:          goto restart;
        !          3325:        }
        !          3326: 
        !          3327:       /* Similarly, (neg (not X)) is (plus X 1).  */
        !          3328:       if (GET_CODE (XEXP (x, 0)) == NOT)
        !          3329:        {
        !          3330:          x = plus_constant (XEXP (XEXP (x, 0), 0), 1);
        !          3331:          goto restart;
        !          3332:        }
        !          3333: 
        !          3334:       /* (neg (minus X Y)) can become (minus Y X).  */
        !          3335:       if (GET_CODE (XEXP (x, 0)) == MINUS
        !          3336:          && (! FLOAT_MODE_P (mode)
        !          3337:              /* x-y != -(y-x) with IEEE floating point. */
        !          3338:              || TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT))
        !          3339:        {
        !          3340:          x = gen_binary (MINUS, mode, XEXP (XEXP (x, 0), 1),
        !          3341:                          XEXP (XEXP (x, 0), 0));
        !          3342:          goto restart;
        !          3343:        }
        !          3344: 
        !          3345:       /* (neg (xor A 1)) is (plus A -1) if A is known to be either 0 or 1. */
        !          3346:       if (GET_CODE (XEXP (x, 0)) == XOR && XEXP (XEXP (x, 0), 1) == const1_rtx
        !          3347:          && nonzero_bits (XEXP (XEXP (x, 0), 0), mode) == 1)
        !          3348:        {
        !          3349:          x = gen_binary (PLUS, mode, XEXP (XEXP (x, 0), 0), constm1_rtx);
        !          3350:          goto restart;
        !          3351:        }
        !          3352: 
        !          3353:       /* NEG commutes with ASHIFT since it is multiplication.  Only do this
        !          3354:         if we can then eliminate the NEG (e.g.,
        !          3355:         if the operand is a constant).  */
        !          3356: 
        !          3357:       if (GET_CODE (XEXP (x, 0)) == ASHIFT)
        !          3358:        {
        !          3359:          temp = simplify_unary_operation (NEG, mode,
        !          3360:                                           XEXP (XEXP (x, 0), 0), mode);
        !          3361:          if (temp)
        !          3362:            {
        !          3363:              SUBST (XEXP (XEXP (x, 0), 0), temp);
        !          3364:              return XEXP (x, 0);
        !          3365:            }
        !          3366:        }
        !          3367: 
        !          3368:       temp = expand_compound_operation (XEXP (x, 0));
        !          3369: 
        !          3370:       /* For C equal to the width of MODE minus 1, (neg (ashiftrt X C)) can be
        !          3371:         replaced by (lshiftrt X C).  This will convert
        !          3372:         (neg (sign_extract X 1 Y)) to (zero_extract X 1 Y).  */
        !          3373: 
        !          3374:       if (GET_CODE (temp) == ASHIFTRT
        !          3375:          && GET_CODE (XEXP (temp, 1)) == CONST_INT
        !          3376:          && INTVAL (XEXP (temp, 1)) == GET_MODE_BITSIZE (mode) - 1)
        !          3377:        {
        !          3378:          x = simplify_shift_const (temp, LSHIFTRT, mode, XEXP (temp, 0),
        !          3379:                                    INTVAL (XEXP (temp, 1)));
        !          3380:          goto restart;
        !          3381:        }
        !          3382: 
        !          3383:       /* If X has only a single bit that might be nonzero, say, bit I, convert
        !          3384:         (neg X) to (ashiftrt (ashift X C-I) C-I) where C is the bitsize of
        !          3385:         MODE minus 1.  This will convert (neg (zero_extract X 1 Y)) to
        !          3386:         (sign_extract X 1 Y).  But only do this if TEMP isn't a register
        !          3387:         or a SUBREG of one since we'd be making the expression more
        !          3388:         complex if it was just a register.  */
        !          3389: 
        !          3390:       if (GET_CODE (temp) != REG
        !          3391:          && ! (GET_CODE (temp) == SUBREG
        !          3392:                && GET_CODE (SUBREG_REG (temp)) == REG)
        !          3393:          && (i = exact_log2 (nonzero_bits (temp, mode))) >= 0)
        !          3394:        {
        !          3395:          rtx temp1 = simplify_shift_const
        !          3396:            (NULL_RTX, ASHIFTRT, mode,
        !          3397:             simplify_shift_const (NULL_RTX, ASHIFT, mode, temp,
        !          3398:                                   GET_MODE_BITSIZE (mode) - 1 - i),
        !          3399:             GET_MODE_BITSIZE (mode) - 1 - i);
        !          3400: 
        !          3401:          /* If all we did was surround TEMP with the two shifts, we
        !          3402:             haven't improved anything, so don't use it.  Otherwise,
        !          3403:             we are better off with TEMP1.  */
        !          3404:          if (GET_CODE (temp1) != ASHIFTRT
        !          3405:              || GET_CODE (XEXP (temp1, 0)) != ASHIFT
        !          3406:              || XEXP (XEXP (temp1, 0), 0) != temp)
        !          3407:            {
        !          3408:              x = temp1;
        !          3409:              goto restart;
        !          3410:            }
        !          3411:        }
        !          3412:       break;
        !          3413: 
        !          3414:     case FLOAT_TRUNCATE:
        !          3415:       /* (float_truncate:SF (float_extend:DF foo:SF)) = foo:SF.  */
        !          3416:       if (GET_CODE (XEXP (x, 0)) == FLOAT_EXTEND
        !          3417:          && GET_MODE (XEXP (XEXP (x, 0), 0)) == mode)
        !          3418:        return XEXP (XEXP (x, 0), 0);
        !          3419:       break;  
        !          3420: 
        !          3421: #ifdef HAVE_cc0
        !          3422:     case COMPARE:
        !          3423:       /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
        !          3424:         using cc0, in which case we want to leave it as a COMPARE
        !          3425:         so we can distinguish it from a register-register-copy.  */
        !          3426:       if (XEXP (x, 1) == const0_rtx)
        !          3427:        return XEXP (x, 0);
        !          3428: 
        !          3429:       /* In IEEE floating point, x-0 is not the same as x.  */
        !          3430:       if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
        !          3431:           || ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0))))
        !          3432:          && XEXP (x, 1) == CONST0_RTX (GET_MODE (XEXP (x, 0))))
        !          3433:        return XEXP (x, 0);
        !          3434:       break;
        !          3435: #endif
        !          3436: 
        !          3437:     case CONST:
        !          3438:       /* (const (const X)) can become (const X).  Do it this way rather than
        !          3439:         returning the inner CONST since CONST can be shared with a
        !          3440:         REG_EQUAL note.  */
        !          3441:       if (GET_CODE (XEXP (x, 0)) == CONST)
        !          3442:        SUBST (XEXP (x, 0), XEXP (XEXP (x, 0), 0));
        !          3443:       break;
        !          3444: 
        !          3445: #ifdef HAVE_lo_sum
        !          3446:     case LO_SUM:
        !          3447:       /* Convert (lo_sum (high FOO) FOO) to FOO.  This is necessary so we
        !          3448:         can add in an offset.  find_split_point will split this address up
        !          3449:         again if it doesn't match.  */
        !          3450:       if (GET_CODE (XEXP (x, 0)) == HIGH
        !          3451:          && rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (x, 1)))
        !          3452:        return XEXP (x, 1);
        !          3453:       break;
        !          3454: #endif
        !          3455: 
        !          3456:     case PLUS:
        !          3457:       /* If we have (plus (plus (A const) B)), associate it so that CONST is
        !          3458:         outermost.  That's because that's the way indexed addresses are
        !          3459:         supposed to appear.  This code used to check many more cases, but
        !          3460:         they are now checked elsewhere.  */
        !          3461:       if (GET_CODE (XEXP (x, 0)) == PLUS
        !          3462:          && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
        !          3463:        return gen_binary (PLUS, mode,
        !          3464:                           gen_binary (PLUS, mode, XEXP (XEXP (x, 0), 0),
        !          3465:                                       XEXP (x, 1)),
        !          3466:                           XEXP (XEXP (x, 0), 1));
        !          3467: 
        !          3468:       /* (plus (xor (and <foo> (const_int pow2 - 1)) <c>) <-c>)
        !          3469:         when c is (const_int (pow2 + 1) / 2) is a sign extension of a
        !          3470:         bit-field and can be replaced by either a sign_extend or a
        !          3471:         sign_extract.  The `and' may be a zero_extend.  */
        !          3472:       if (GET_CODE (XEXP (x, 0)) == XOR
        !          3473:          && GET_CODE (XEXP (x, 1)) == CONST_INT
        !          3474:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          3475:          && INTVAL (XEXP (x, 1)) == - INTVAL (XEXP (XEXP (x, 0), 1))
        !          3476:          && (i = exact_log2 (INTVAL (XEXP (XEXP (x, 0), 1)))) >= 0
        !          3477:          && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
        !          3478:          && ((GET_CODE (XEXP (XEXP (x, 0), 0)) == AND
        !          3479:               && GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 1)) == CONST_INT
        !          3480:               && (INTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1))
        !          3481:                   == ((HOST_WIDE_INT) 1 << (i + 1)) - 1))
        !          3482:              || (GET_CODE (XEXP (XEXP (x, 0), 0)) == ZERO_EXTEND
        !          3483:                  && (GET_MODE_BITSIZE (GET_MODE (XEXP (XEXP (XEXP (x, 0), 0), 0)))
        !          3484:                      == i + 1))))
        !          3485:        {
        !          3486:          x = simplify_shift_const
        !          3487:            (NULL_RTX, ASHIFTRT, mode,
        !          3488:             simplify_shift_const (NULL_RTX, ASHIFT, mode,
        !          3489:                                   XEXP (XEXP (XEXP (x, 0), 0), 0),
        !          3490:                                   GET_MODE_BITSIZE (mode) - (i + 1)),
        !          3491:             GET_MODE_BITSIZE (mode) - (i + 1));
        !          3492:          goto restart;
        !          3493:        }
        !          3494: 
        !          3495:       /* (plus (comparison A B) C) can become (neg (rev-comp A B)) if
        !          3496:         C is 1 and STORE_FLAG_VALUE is -1 or if C is -1 and STORE_FLAG_VALUE
        !          3497:         is 1.  This produces better code than the alternative immediately
        !          3498:         below.  */
        !          3499:       if (GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
        !          3500:          && reversible_comparison_p (XEXP (x, 0))
        !          3501:          && ((STORE_FLAG_VALUE == -1 && XEXP (x, 1) == const1_rtx)
        !          3502:              || (STORE_FLAG_VALUE == 1 && XEXP (x, 1) == constm1_rtx)))
        !          3503:        {
        !          3504:          x = gen_binary (reverse_condition (GET_CODE (XEXP (x, 0))),
        !          3505:                          mode, XEXP (XEXP (x, 0), 0), XEXP (XEXP (x, 0), 1));
        !          3506:          x = gen_unary (NEG, mode, x);
        !          3507:          goto restart;
        !          3508:        }
        !          3509: 
        !          3510:       /* If only the low-order bit of X is possibly nonzero, (plus x -1)
        !          3511:         can become (ashiftrt (ashift (xor x 1) C) C) where C is
        !          3512:         the bitsize of the mode - 1.  This allows simplification of
        !          3513:         "a = (b & 8) == 0;"  */
        !          3514:       if (XEXP (x, 1) == constm1_rtx
        !          3515:          && GET_CODE (XEXP (x, 0)) != REG
        !          3516:          && ! (GET_CODE (XEXP (x,0)) == SUBREG
        !          3517:                && GET_CODE (SUBREG_REG (XEXP (x, 0))) == REG)
        !          3518:          && nonzero_bits (XEXP (x, 0), mode) == 1)
        !          3519:        {
        !          3520:          x = simplify_shift_const
        !          3521:            (NULL_RTX, ASHIFTRT, mode,
        !          3522:             simplify_shift_const (NULL_RTX, ASHIFT, mode,
        !          3523:                                   gen_rtx_combine (XOR, mode,
        !          3524:                                                    XEXP (x, 0), const1_rtx),
        !          3525:                                   GET_MODE_BITSIZE (mode) - 1),
        !          3526:             GET_MODE_BITSIZE (mode) - 1);
        !          3527:          goto restart;
        !          3528:        }
        !          3529: 
        !          3530:       /* If we are adding two things that have no bits in common, convert
        !          3531:         the addition into an IOR.  This will often be further simplified,
        !          3532:         for example in cases like ((a & 1) + (a & 2)), which can
        !          3533:         become a & 3.  */
        !          3534: 
        !          3535:       if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
        !          3536:          && (nonzero_bits (XEXP (x, 0), mode)
        !          3537:              & nonzero_bits (XEXP (x, 1), mode)) == 0)
        !          3538:        {
        !          3539:          x = gen_binary (IOR, mode, XEXP (x, 0), XEXP (x, 1));
        !          3540:          goto restart;
        !          3541:        }
        !          3542:       break;
        !          3543: 
        !          3544:     case MINUS:
        !          3545: #if STORE_FLAG_VALUE == 1
        !          3546:       /* (minus 1 (comparison foo bar)) can be done by reversing the comparison
        !          3547:         code if valid.  */
        !          3548:       if (XEXP (x, 0) == const1_rtx
        !          3549:          && GET_RTX_CLASS (GET_CODE (XEXP (x, 1))) == '<'
        !          3550:          && reversible_comparison_p (XEXP (x, 1)))
        !          3551:        return gen_binary (reverse_condition (GET_CODE (XEXP (x, 1))),
        !          3552:                           mode, XEXP (XEXP (x, 1), 0),
        !          3553:                                XEXP (XEXP (x, 1), 1));
        !          3554: #endif
        !          3555: 
        !          3556:       /* (minus <foo> (and <foo> (const_int -pow2))) becomes
        !          3557:         (and <foo> (const_int pow2-1))  */
        !          3558:       if (GET_CODE (XEXP (x, 1)) == AND
        !          3559:          && GET_CODE (XEXP (XEXP (x, 1), 1)) == CONST_INT
        !          3560:          && exact_log2 (- INTVAL (XEXP (XEXP (x, 1), 1))) >= 0
        !          3561:          && rtx_equal_p (XEXP (XEXP (x, 1), 0), XEXP (x, 0)))
        !          3562:        {
        !          3563:          x = simplify_and_const_int (NULL_RTX, mode, XEXP (x, 0),
        !          3564:                                      - INTVAL (XEXP (XEXP (x, 1), 1)) - 1);
        !          3565:          goto restart;
        !          3566:        }
        !          3567:       break;
        !          3568: 
        !          3569:     case MULT:
        !          3570:       /* If we have (mult (plus A B) C), apply the distributive law and then
        !          3571:         the inverse distributive law to see if things simplify.  This
        !          3572:         occurs mostly in addresses, often when unrolling loops.  */
        !          3573: 
        !          3574:       if (GET_CODE (XEXP (x, 0)) == PLUS)
        !          3575:        {
        !          3576:          x = apply_distributive_law
        !          3577:            (gen_binary (PLUS, mode,
        !          3578:                         gen_binary (MULT, mode,
        !          3579:                                     XEXP (XEXP (x, 0), 0), XEXP (x, 1)),
        !          3580:                         gen_binary (MULT, mode,
        !          3581:                                     XEXP (XEXP (x, 0), 1), XEXP (x, 1))));
        !          3582: 
        !          3583:          if (GET_CODE (x) != MULT)
        !          3584:            goto restart;
        !          3585:        }
        !          3586: 
        !          3587:       /* If this is multiplication by a power of two and its first operand is
        !          3588:         a shift, treat the multiply as a shift to allow the shifts to
        !          3589:         possibly combine.  */
        !          3590:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          3591:          && (i = exact_log2 (INTVAL (XEXP (x, 1)))) >= 0
        !          3592:          && (GET_CODE (XEXP (x, 0)) == ASHIFT
        !          3593:              || GET_CODE (XEXP (x, 0)) == LSHIFTRT
        !          3594:              || GET_CODE (XEXP (x, 0)) == ASHIFTRT
        !          3595:              || GET_CODE (XEXP (x, 0)) == ROTATE
        !          3596:              || GET_CODE (XEXP (x, 0)) == ROTATERT))
        !          3597:        {
        !          3598:          x = simplify_shift_const (NULL_RTX, ASHIFT, mode, XEXP (x, 0), i);
        !          3599:          goto restart;
        !          3600:        }
        !          3601: 
        !          3602:       /* Convert (mult (ashift (const_int 1) A) B) to (ashift B A).  */
        !          3603:       if (GET_CODE (XEXP (x, 0)) == ASHIFT
        !          3604:          && XEXP (XEXP (x, 0), 0) == const1_rtx)
        !          3605:        return gen_rtx_combine (ASHIFT, mode, XEXP (x, 1),
        !          3606:                                XEXP (XEXP (x, 0), 1));
        !          3607:       break;
        !          3608: 
        !          3609:     case UDIV:
        !          3610:       /* If this is a divide by a power of two, treat it as a shift if
        !          3611:         its first operand is a shift.  */
        !          3612:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          3613:          && (i = exact_log2 (INTVAL (XEXP (x, 1)))) >= 0
        !          3614:          && (GET_CODE (XEXP (x, 0)) == ASHIFT
        !          3615:              || GET_CODE (XEXP (x, 0)) == LSHIFTRT
        !          3616:              || GET_CODE (XEXP (x, 0)) == ASHIFTRT
        !          3617:              || GET_CODE (XEXP (x, 0)) == ROTATE
        !          3618:              || GET_CODE (XEXP (x, 0)) == ROTATERT))
        !          3619:        {
        !          3620:          x = simplify_shift_const (NULL_RTX, LSHIFTRT, mode, XEXP (x, 0), i);
        !          3621:          goto restart;
        !          3622:        }
        !          3623:       break;
        !          3624: 
        !          3625:     case EQ:  case NE:
        !          3626:     case GT:  case GTU:  case GE:  case GEU:
        !          3627:     case LT:  case LTU:  case LE:  case LEU:
        !          3628:       /* If the first operand is a condition code, we can't do anything
        !          3629:         with it.  */
        !          3630:       if (GET_CODE (XEXP (x, 0)) == COMPARE
        !          3631:          || (GET_MODE_CLASS (GET_MODE (XEXP (x, 0))) != MODE_CC
        !          3632: #ifdef HAVE_cc0
        !          3633:              && XEXP (x, 0) != cc0_rtx
        !          3634: #endif
        !          3635:               ))
        !          3636:        {
        !          3637:          rtx op0 = XEXP (x, 0);
        !          3638:          rtx op1 = XEXP (x, 1);
        !          3639:          enum rtx_code new_code;
        !          3640: 
        !          3641:          if (GET_CODE (op0) == COMPARE)
        !          3642:            op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
        !          3643: 
        !          3644:          /* Simplify our comparison, if possible.  */
        !          3645:          new_code = simplify_comparison (code, &op0, &op1);
        !          3646: 
        !          3647: #if STORE_FLAG_VALUE == 1
        !          3648:          /* If STORE_FLAG_VALUE is 1, we can convert (ne x 0) to simply X
        !          3649:             if only the low-order bit is possibly nonzero in X (such as when
        !          3650:             X is a ZERO_EXTRACT of one bit).  Similarly, we can convert EQ to
        !          3651:             (xor X 1) or (minus 1 X); we use the former.  Finally, if X is
        !          3652:             known to be either 0 or -1, NE becomes a NEG and EQ becomes
        !          3653:             (plus X 1).
        !          3654: 
        !          3655:             Remove any ZERO_EXTRACT we made when thinking this was a
        !          3656:             comparison.  It may now be simpler to use, e.g., an AND.  If a
        !          3657:             ZERO_EXTRACT is indeed appropriate, it will be placed back by
        !          3658:             the call to make_compound_operation in the SET case.  */
        !          3659: 
        !          3660:          if (new_code == NE && GET_MODE_CLASS (mode) == MODE_INT
        !          3661:              && op1 == const0_rtx
        !          3662:              && nonzero_bits (op0, mode) == 1)
        !          3663:            return gen_lowpart_for_combine (mode,
        !          3664:                                            expand_compound_operation (op0));
        !          3665: 
        !          3666:          else if (new_code == NE && GET_MODE_CLASS (mode) == MODE_INT
        !          3667:                   && op1 == const0_rtx
        !          3668:                   && (num_sign_bit_copies (op0, mode)
        !          3669:                       == GET_MODE_BITSIZE (mode)))
        !          3670:            {
        !          3671:              op0 = expand_compound_operation (op0);
        !          3672:              x = gen_unary (NEG, mode, gen_lowpart_for_combine (mode, op0));
        !          3673:              goto restart;
        !          3674:            }
        !          3675: 
        !          3676:          else if (new_code == EQ && GET_MODE_CLASS (mode) == MODE_INT
        !          3677:                   && op1 == const0_rtx
        !          3678:                   && nonzero_bits (op0, mode) == 1)
        !          3679:            {
        !          3680:              op0 = expand_compound_operation (op0);
        !          3681:              x = gen_binary (XOR, mode,
        !          3682:                              gen_lowpart_for_combine (mode, op0),
        !          3683:                              const1_rtx);
        !          3684:              goto restart;
        !          3685:            }
        !          3686: 
        !          3687:          else if (new_code == EQ && GET_MODE_CLASS (mode) == MODE_INT
        !          3688:                   && op1 == const0_rtx
        !          3689:                   && (num_sign_bit_copies (op0, mode)
        !          3690:                       == GET_MODE_BITSIZE (mode)))
        !          3691:            {
        !          3692:              op0 = expand_compound_operation (op0);
        !          3693:              x = plus_constant (gen_lowpart_for_combine (mode, op0), 1);
        !          3694:              goto restart;
        !          3695:            }
        !          3696: #endif
        !          3697: 
        !          3698: #if STORE_FLAG_VALUE == -1
        !          3699:          /* If STORE_FLAG_VALUE is -1, we have cases similar to
        !          3700:             those above.  */
        !          3701:          if (new_code == NE && GET_MODE_CLASS (mode) == MODE_INT
        !          3702:              && op1 == const0_rtx
        !          3703:              && (num_sign_bit_copies (op0, mode)
        !          3704:                  == GET_MODE_BITSIZE (mode)))
        !          3705:            return gen_lowpart_for_combine (mode,
        !          3706:                                            expand_compound_operation (op0));
        !          3707: 
        !          3708:          else if (new_code == NE && GET_MODE_CLASS (mode) == MODE_INT
        !          3709:                   && op1 == const0_rtx
        !          3710:                   && nonzero_bits (op0, mode) == 1)
        !          3711:            {
        !          3712:              op0 = expand_compound_operation (op0);
        !          3713:              x = gen_unary (NEG, mode, gen_lowpart_for_combine (mode, op0));
        !          3714:              goto restart;
        !          3715:            }
        !          3716: 
        !          3717:          else if (new_code == EQ && GET_MODE_CLASS (mode) == MODE_INT
        !          3718:                   && op1 == const0_rtx
        !          3719:                   && (num_sign_bit_copies (op0, mode)
        !          3720:                       == GET_MODE_BITSIZE (mode)))
        !          3721:            {
        !          3722:              op0 = expand_compound_operation (op0);
        !          3723:              x = gen_unary (NOT, mode, gen_lowpart_for_combine (mode, op0));
        !          3724:              goto restart;
        !          3725:            }
        !          3726: 
        !          3727:          /* If X is 0/1, (eq X 0) is X-1.  */
        !          3728:          else if (new_code == EQ && GET_MODE_CLASS (mode) == MODE_INT
        !          3729:                   && op1 == const0_rtx
        !          3730:                   && nonzero_bits (op0, mode) == 1)
        !          3731:            {
        !          3732:              op0 = expand_compound_operation (op0);
        !          3733:              x = plus_constant (gen_lowpart_for_combine (mode, op0), -1);
        !          3734:              goto restart;
        !          3735:            }
        !          3736: #endif
        !          3737: 
        !          3738:          /* If STORE_FLAG_VALUE says to just test the sign bit and X has just
        !          3739:             one bit that might be nonzero, we can convert (ne x 0) to
        !          3740:             (ashift x c) where C puts the bit in the sign bit.  Remove any
        !          3741:             AND with STORE_FLAG_VALUE when we are done, since we are only
        !          3742:             going to test the sign bit.  */
        !          3743:          if (new_code == NE && GET_MODE_CLASS (mode) == MODE_INT
        !          3744:              && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
        !          3745:              && (STORE_FLAG_VALUE
        !          3746:                  == (HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (mode) - 1))
        !          3747:              && op1 == const0_rtx
        !          3748:              && mode == GET_MODE (op0)
        !          3749:              && (i = exact_log2 (nonzero_bits (op0, mode))) >= 0)
        !          3750:            {
        !          3751:              x = simplify_shift_const (NULL_RTX, ASHIFT, mode,
        !          3752:                                        expand_compound_operation (op0),
        !          3753:                                        GET_MODE_BITSIZE (mode) - 1 - i);
        !          3754:              if (GET_CODE (x) == AND && XEXP (x, 1) == const_true_rtx)
        !          3755:                return XEXP (x, 0);
        !          3756:              else
        !          3757:                return x;
        !          3758:            }
        !          3759: 
        !          3760:          /* If the code changed, return a whole new comparison.  */
        !          3761:          if (new_code != code)
        !          3762:            return gen_rtx_combine (new_code, mode, op0, op1);
        !          3763: 
        !          3764:          /* Otherwise, keep this operation, but maybe change its operands.  
        !          3765:             This also converts (ne (compare FOO BAR) 0) to (ne FOO BAR).  */
        !          3766:          SUBST (XEXP (x, 0), op0);
        !          3767:          SUBST (XEXP (x, 1), op1);
        !          3768:        }
        !          3769:       break;
        !          3770:          
        !          3771:     case IF_THEN_ELSE:
        !          3772:       /* Sometimes we can simplify the arm of an IF_THEN_ELSE if a register
        !          3773:         used in it is being compared against certain values.  Get the
        !          3774:         true and false comparisons and see if that says anything about the
        !          3775:         value of each arm.  */
        !          3776: 
        !          3777:       if (GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
        !          3778:          && reversible_comparison_p (XEXP (x, 0))
        !          3779:          && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG)
        !          3780:        {
        !          3781:          HOST_WIDE_INT nzb;
        !          3782:          rtx from = XEXP (XEXP (x, 0), 0);
        !          3783:          enum rtx_code true_code = GET_CODE (XEXP (x, 0));
        !          3784:          enum rtx_code false_code = reverse_condition (true_code);
        !          3785:          rtx true_val = XEXP (XEXP (x, 0), 1);
        !          3786:          rtx false_val = true_val;
        !          3787:          rtx true_arm = XEXP (x, 1);
        !          3788:          rtx false_arm = XEXP (x, 2);
        !          3789:          int swapped = 0;
        !          3790: 
        !          3791:          /* If FALSE_CODE is EQ, swap the codes and arms.  */
        !          3792: 
        !          3793:          if (false_code == EQ)
        !          3794:            {
        !          3795:              swapped = 1, true_code = EQ, false_code = NE;
        !          3796:              true_arm = XEXP (x, 2), false_arm = XEXP (x, 1);
        !          3797:            }
        !          3798: 
        !          3799:          /* If we are comparing against zero and the expression being tested
        !          3800:             has only a single bit that might be nonzero, that is its value
        !          3801:             when it is not equal to zero.  Similarly if it is known to be
        !          3802:             -1 or 0.  */
        !          3803: 
        !          3804:          if (true_code == EQ && true_val == const0_rtx
        !          3805:              && exact_log2 (nzb = nonzero_bits (from, GET_MODE (from))) >= 0)
        !          3806:            false_code = EQ, false_val = GEN_INT (nzb);
        !          3807:          else if (true_code == EQ && true_val == const0_rtx
        !          3808:                   && (num_sign_bit_copies (from, GET_MODE (from))
        !          3809:                       == GET_MODE_BITSIZE (GET_MODE (from))))
        !          3810:            false_code = EQ, false_val = constm1_rtx;
        !          3811: 
        !          3812:          /* Now simplify an arm if we know the value of the register
        !          3813:             in the branch and it is used in the arm.  Be carefull due to
        !          3814:             the potential of locally-shared RTL.  */
        !          3815: 
        !          3816:          if (reg_mentioned_p (from, true_arm))
        !          3817:            true_arm = subst (known_cond (copy_rtx (true_arm), true_code,
        !          3818:                                          from, true_val),
        !          3819:                              pc_rtx, pc_rtx, 0, 0);
        !          3820:          if (reg_mentioned_p (from, false_arm))
        !          3821:            false_arm = subst (known_cond (copy_rtx (false_arm), false_code,
        !          3822:                                           from, false_val),
        !          3823:                               pc_rtx, pc_rtx, 0, 0);
        !          3824: 
        !          3825:          SUBST (XEXP (x, 1), swapped ? false_arm : true_arm);
        !          3826:          SUBST (XEXP (x, 2), swapped ? true_arm : false_arm);
        !          3827:        }
        !          3828:       
        !          3829:       /* If we have (if_then_else FOO (pc) (label_ref BAR)) and FOO can be
        !          3830:         reversed, do so to avoid needing two sets of patterns for
        !          3831:         subtract-and-branch insns.  Similarly if we have a constant in that
        !          3832:         position or if the third operand is the same as the first operand
        !          3833:         of the comparison.  */
        !          3834: 
        !          3835:       if (GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
        !          3836:          && reversible_comparison_p (XEXP (x, 0))
        !          3837:          && (XEXP (x, 1) == pc_rtx || GET_CODE (XEXP (x, 1)) == CONST_INT
        !          3838:              || rtx_equal_p (XEXP (x, 2), XEXP (XEXP (x, 0), 0))))
        !          3839:        {
        !          3840:          SUBST (XEXP (x, 0),
        !          3841:                 gen_binary (reverse_condition (GET_CODE (XEXP (x, 0))),
        !          3842:                             GET_MODE (XEXP (x, 0)),
        !          3843:                             XEXP (XEXP (x, 0), 0), XEXP (XEXP (x, 0), 1)));
        !          3844: 
        !          3845:          temp = XEXP (x, 1);
        !          3846:          SUBST (XEXP (x, 1), XEXP (x, 2));
        !          3847:          SUBST (XEXP (x, 2), temp);
        !          3848:        }
        !          3849: 
        !          3850:       /* If the two arms are identical, we don't need the comparison.  */
        !          3851: 
        !          3852:       if (rtx_equal_p (XEXP (x, 1), XEXP (x, 2))
        !          3853:          && ! side_effects_p (XEXP (x, 0)))
        !          3854:        return XEXP (x, 1);
        !          3855: 
        !          3856:       /* Look for cases where we have (abs x) or (neg (abs X)).  */
        !          3857: 
        !          3858:       if (GET_MODE_CLASS (mode) == MODE_INT
        !          3859:          && GET_CODE (XEXP (x, 2)) == NEG
        !          3860:          && rtx_equal_p (XEXP (x, 1), XEXP (XEXP (x, 2), 0))
        !          3861:          && GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
        !          3862:          && rtx_equal_p (XEXP (x, 1), XEXP (XEXP (x, 0), 0))
        !          3863:          && ! side_effects_p (XEXP (x, 1)))
        !          3864:        switch (GET_CODE (XEXP (x, 0)))
        !          3865:          {
        !          3866:          case GT:
        !          3867:          case GE:
        !          3868:            x = gen_unary (ABS, mode, XEXP (x, 1));
        !          3869:            goto restart;
        !          3870:          case LT:
        !          3871:          case LE:
        !          3872:            x = gen_unary (NEG, mode, gen_unary (ABS, mode, XEXP (x, 1)));
        !          3873:            goto restart;
        !          3874:          }
        !          3875: 
        !          3876:       /* Look for MIN or MAX.  */
        !          3877: 
        !          3878:       if (! FLOAT_MODE_P (mode)
        !          3879:          && GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
        !          3880:          && rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (x, 1))
        !          3881:          && rtx_equal_p (XEXP (XEXP (x, 0), 1), XEXP (x, 2))
        !          3882:          && ! side_effects_p (XEXP (x, 0)))
        !          3883:        switch (GET_CODE (XEXP (x, 0)))
        !          3884:          {
        !          3885:          case GE:
        !          3886:          case GT:
        !          3887:            x = gen_binary (SMAX, mode, XEXP (x, 1), XEXP (x, 2));
        !          3888:            goto restart;
        !          3889:          case LE:
        !          3890:          case LT:
        !          3891:            x = gen_binary (SMIN, mode, XEXP (x, 1), XEXP (x, 2));
        !          3892:            goto restart;
        !          3893:          case GEU:
        !          3894:          case GTU:
        !          3895:            x = gen_binary (UMAX, mode, XEXP (x, 1), XEXP (x, 2));
        !          3896:            goto restart;
        !          3897:          case LEU:
        !          3898:          case LTU:
        !          3899:            x = gen_binary (UMIN, mode, XEXP (x, 1), XEXP (x, 2));
        !          3900:            goto restart;
        !          3901:          }
        !          3902: 
        !          3903: #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
        !          3904: 
        !          3905:       /* If we have (if_then_else COND (OP Z C1) Z) and OP is an identity when
        !          3906:         its second operand is zero, this can be done as (OP Z (mult COND C2))
        !          3907:         where C2 = C1 * STORE_FLAG_VALUE. Similarly if OP has an outer
        !          3908:         ZERO_EXTEND or SIGN_EXTEND as long as Z is already extended (so
        !          3909:         we don't destroy it).  We can do this kind of thing in some
        !          3910:         cases when STORE_FLAG_VALUE is neither of the above, but it isn't
        !          3911:         worth checking for.  */
        !          3912: 
        !          3913:       if (mode != VOIDmode && ! side_effects_p (x))
        !          3914:        {
        !          3915:          rtx t = make_compound_operation (XEXP (x, 1), SET);
        !          3916:          rtx f = make_compound_operation (XEXP (x, 2), SET);
        !          3917:          rtx cond_op0 = XEXP (XEXP (x, 0), 0);
        !          3918:          rtx cond_op1 = XEXP (XEXP (x, 0), 1);
        !          3919:          enum rtx_code cond_op = GET_CODE (XEXP (x, 0));
        !          3920:          enum rtx_code op, extend_op = NIL;
        !          3921:          enum machine_mode m = mode;
        !          3922:          rtx z = 0, c1, c2;
        !          3923: 
        !          3924:          if ((GET_CODE (t) == PLUS || GET_CODE (t) == MINUS
        !          3925:               || GET_CODE (t) == IOR || GET_CODE (t) == XOR
        !          3926:               || GET_CODE (t) == ASHIFT
        !          3927:               || GET_CODE (t) == LSHIFTRT || GET_CODE (t) == ASHIFTRT)
        !          3928:              && rtx_equal_p (XEXP (t, 0), f))
        !          3929:            c1 = XEXP (t, 1), op = GET_CODE (t), z = f;
        !          3930:          else if (GET_CODE (t) == SIGN_EXTEND
        !          3931:                   && (GET_CODE (XEXP (t, 0)) == PLUS
        !          3932:                       || GET_CODE (XEXP (t, 0)) == MINUS
        !          3933:                       || GET_CODE (XEXP (t, 0)) == IOR
        !          3934:                       || GET_CODE (XEXP (t, 0)) == XOR
        !          3935:                       || GET_CODE (XEXP (t, 0)) == ASHIFT
        !          3936:                       || GET_CODE (XEXP (t, 0)) == LSHIFTRT
        !          3937:                       || GET_CODE (XEXP (t, 0)) == ASHIFTRT)
        !          3938:                   && GET_CODE (XEXP (XEXP (t, 0), 0)) == SUBREG
        !          3939:                   && subreg_lowpart_p (XEXP (XEXP (t, 0), 0))
        !          3940:                   && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 0)), f)
        !          3941:                   && (num_sign_bit_copies (f, GET_MODE (f))
        !          3942:                       > (GET_MODE_BITSIZE (mode)
        !          3943:                          - GET_MODE_BITSIZE (GET_MODE (XEXP (XEXP (t, 0), 0))))))
        !          3944:            {
        !          3945:              c1 = XEXP (XEXP (t, 0), 1); z = f; op = GET_CODE (XEXP (t, 0));
        !          3946:              extend_op = SIGN_EXTEND;
        !          3947:              m = GET_MODE (XEXP (t, 0));
        !          3948:            }
        !          3949:          else if (GET_CODE (t) == ZERO_EXTEND
        !          3950:                   && (GET_CODE (XEXP (t, 0)) == PLUS
        !          3951:                       || GET_CODE (XEXP (t, 0)) == MINUS
        !          3952:                       || GET_CODE (XEXP (t, 0)) == IOR
        !          3953:                       || GET_CODE (XEXP (t, 0)) == XOR
        !          3954:                       || GET_CODE (XEXP (t, 0)) == ASHIFT
        !          3955:                       || GET_CODE (XEXP (t, 0)) == LSHIFTRT
        !          3956:                       || GET_CODE (XEXP (t, 0)) == ASHIFTRT)
        !          3957:                   && GET_CODE (XEXP (XEXP (t, 0), 0)) == SUBREG
        !          3958:                   && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
        !          3959:                   && subreg_lowpart_p (XEXP (XEXP (t, 0), 0))
        !          3960:                   && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 0)), f)
        !          3961:                   && ((nonzero_bits (f, GET_MODE (f))
        !          3962:                        & ~ GET_MODE_MASK (GET_MODE (XEXP (XEXP (t, 0), 0))))
        !          3963:                       == 0))
        !          3964:            {
        !          3965:              c1 = XEXP (XEXP (t, 0), 1); z = f; op = GET_CODE (XEXP (t, 0));
        !          3966:              extend_op = ZERO_EXTEND;
        !          3967:              m = GET_MODE (XEXP (t, 0));
        !          3968:            }
        !          3969: 
        !          3970:          if (reversible_comparison_p (XEXP (x, 0))
        !          3971:              && (GET_CODE (f) == PLUS || GET_CODE (f) == MINUS
        !          3972:                  || GET_CODE (f) == IOR || GET_CODE (f) == XOR
        !          3973:                  || GET_CODE (f) == ASHIFT
        !          3974:                  || GET_CODE (f) == LSHIFTRT || GET_CODE (f) == ASHIFTRT)
        !          3975:              && rtx_equal_p (XEXP (f, 0), t))
        !          3976:            {
        !          3977:              c1 = XEXP (f, 1), op = GET_CODE (f), z = t;
        !          3978:              cond_op = reverse_condition (cond_op);
        !          3979:            }
        !          3980:          else if (GET_CODE (f) == SIGN_EXTEND
        !          3981:                   && (GET_CODE (XEXP (f, 0)) == PLUS
        !          3982:                       || GET_CODE (XEXP (f, 0)) == MINUS
        !          3983:                       || GET_CODE (XEXP (f, 0)) == IOR
        !          3984:                       || GET_CODE (XEXP (f, 0)) == XOR
        !          3985:                       || GET_CODE (XEXP (f, 0)) == ASHIFT
        !          3986:                       || GET_CODE (XEXP (f, 0)) == LSHIFTRT
        !          3987:                       || GET_CODE (XEXP (f, 0)) == ASHIFTRT)
        !          3988:                   && GET_CODE (XEXP (XEXP (f, 0), 0)) == SUBREG
        !          3989:                   && subreg_lowpart_p (XEXP (XEXP (f, 0), 0))
        !          3990:                   && rtx_equal_p (SUBREG_REG (XEXP (XEXP (f, 0), 0)), f)
        !          3991:                   && (num_sign_bit_copies (t, GET_MODE (t))
        !          3992:                       > (GET_MODE_BITSIZE (mode)
        !          3993:                          - GET_MODE_BITSIZE (GET_MODE (XEXP (XEXP (f, 0), 0))))))
        !          3994:            {
        !          3995:              c1 = XEXP (XEXP (f, 0), 1); z = t; op = GET_CODE (XEXP (f, 0));
        !          3996:              extend_op = SIGN_EXTEND;
        !          3997:              m = GET_MODE (XEXP (f, 0));
        !          3998:              cond_op = reverse_condition (cond_op);
        !          3999:            }
        !          4000:          else if (GET_CODE (f) == ZERO_EXTEND
        !          4001:                   && (GET_CODE (XEXP (f, 0)) == PLUS
        !          4002:                       || GET_CODE (XEXP (f, 0)) == MINUS
        !          4003:                       || GET_CODE (XEXP (f, 0)) == IOR
        !          4004:                       || GET_CODE (XEXP (f, 0)) == XOR
        !          4005:                       || GET_CODE (XEXP (f, 0)) == ASHIFT
        !          4006:                       || GET_CODE (XEXP (f, 0)) == LSHIFTRT
        !          4007:                       || GET_CODE (XEXP (f, 0)) == ASHIFTRT)
        !          4008:                   && GET_CODE (XEXP (XEXP (f, 0), 0)) == SUBREG
        !          4009:                   && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
        !          4010:                   && subreg_lowpart_p (XEXP (XEXP (f, 0), 0))
        !          4011:                   && rtx_equal_p (SUBREG_REG (XEXP (XEXP (f, 0), 0)), t)
        !          4012:                   && ((nonzero_bits (t, GET_MODE (t))
        !          4013:                        & ~ GET_MODE_MASK (GET_MODE (XEXP (XEXP (f, 0), 0))))
        !          4014:                       == 0))
        !          4015:            {
        !          4016:              c1 = XEXP (XEXP (f, 0), 1); z = t; op = GET_CODE (XEXP (f, 0));
        !          4017:              extend_op = ZERO_EXTEND;
        !          4018:              m = GET_MODE (XEXP (f, 0));
        !          4019:              cond_op = reverse_condition (cond_op);
        !          4020:            }
        !          4021: 
        !          4022:          if (z)
        !          4023:            {
        !          4024:              temp = subst (gen_binary (cond_op, m, cond_op0, cond_op1),
        !          4025:                            pc_rtx, pc_rtx, 0, 0);
        !          4026: 
        !          4027: 
        !          4028:              temp = gen_binary (MULT, m, temp,
        !          4029:                                 gen_binary (MULT, m, c1,
        !          4030:                                             GEN_INT (STORE_FLAG_VALUE)));
        !          4031: 
        !          4032:              temp = gen_binary (op, m, gen_lowpart_for_combine (m, z), temp);
        !          4033: 
        !          4034:              if (extend_op != NIL)
        !          4035:                temp = gen_unary (extend_op, mode, temp);
        !          4036: 
        !          4037:              return temp;
        !          4038:            }
        !          4039:        }
        !          4040: #endif
        !          4041: 
        !          4042:       /* If we have (if_then_else (ne A 0) C1 0) and either A is known to 
        !          4043:         be 0 or 1 and C1 is a single bit or A is known to be 0 or -1 and
        !          4044:         C1 is the negation of a single bit, we can convert this operation
        !          4045:         to a shift.  We can actually do this in more general cases, but it
        !          4046:         doesn't seem worth it.  */
        !          4047: 
        !          4048:       if (GET_CODE (XEXP (x, 0)) == NE && XEXP (XEXP (x, 0), 1) == const0_rtx
        !          4049:          && XEXP (x, 2) == const0_rtx && GET_CODE (XEXP (x, 1)) == CONST_INT
        !          4050:          && ((1 == nonzero_bits (XEXP (XEXP (x, 0), 0), mode)
        !          4051:               && (i = exact_log2 (INTVAL (XEXP (x, 1)))) >= 0)
        !          4052:              || ((num_sign_bit_copies (XEXP (XEXP (x, 0), 0), mode)
        !          4053:                   == GET_MODE_BITSIZE (mode))
        !          4054:                  && (i = exact_log2 (- INTVAL (XEXP (x, 1)))) >= 0)))
        !          4055:        return
        !          4056:          simplify_shift_const (NULL_RTX, ASHIFT, mode,
        !          4057:                                gen_lowpart_for_combine (mode,
        !          4058:                                                         XEXP (XEXP (x, 0), 0)),
        !          4059:                                i);
        !          4060:       break;
        !          4061:          
        !          4062:     case ZERO_EXTRACT:
        !          4063:     case SIGN_EXTRACT:
        !          4064:     case ZERO_EXTEND:
        !          4065:     case SIGN_EXTEND:
        !          4066:       /* If we are processing SET_DEST, we are done. */
        !          4067:       if (in_dest)
        !          4068:        return x;
        !          4069: 
        !          4070:       x = expand_compound_operation (x);
        !          4071:       if (GET_CODE (x) != code)
        !          4072:        goto restart;
        !          4073:       break;
        !          4074: 
        !          4075:     case SET:
        !          4076:       /* (set (pc) (return)) gets written as (return).  */
        !          4077:       if (GET_CODE (SET_DEST (x)) == PC && GET_CODE (SET_SRC (x)) == RETURN)
        !          4078:        return SET_SRC (x);
        !          4079: 
        !          4080:       /* Convert this into a field assignment operation, if possible.  */
        !          4081:       x = make_field_assignment (x);
        !          4082: 
        !          4083:       /* If we are setting CC0 or if the source is a COMPARE, look for the
        !          4084:         use of the comparison result and try to simplify it unless we already
        !          4085:         have used undobuf.other_insn.  */
        !          4086:       if ((GET_CODE (SET_SRC (x)) == COMPARE
        !          4087: #ifdef HAVE_cc0
        !          4088:           || SET_DEST (x) == cc0_rtx
        !          4089: #endif
        !          4090:           )
        !          4091:          && (cc_use = find_single_use (SET_DEST (x), subst_insn,
        !          4092:                                        &other_insn)) != 0
        !          4093:          && (undobuf.other_insn == 0 || other_insn == undobuf.other_insn)
        !          4094:          && GET_RTX_CLASS (GET_CODE (*cc_use)) == '<'
        !          4095:          && XEXP (*cc_use, 0) == SET_DEST (x))
        !          4096:        {
        !          4097:          enum rtx_code old_code = GET_CODE (*cc_use);
        !          4098:          enum rtx_code new_code;
        !          4099:          rtx op0, op1;
        !          4100:          int other_changed = 0;
        !          4101:          enum machine_mode compare_mode = GET_MODE (SET_DEST (x));
        !          4102: 
        !          4103:          if (GET_CODE (SET_SRC (x)) == COMPARE)
        !          4104:            op0 = XEXP (SET_SRC (x), 0), op1 = XEXP (SET_SRC (x), 1);
        !          4105:          else
        !          4106:            op0 = SET_SRC (x), op1 = const0_rtx;
        !          4107: 
        !          4108:          /* Simplify our comparison, if possible.  */
        !          4109:          new_code = simplify_comparison (old_code, &op0, &op1);
        !          4110: 
        !          4111: #ifdef EXTRA_CC_MODES
        !          4112:          /* If this machine has CC modes other than CCmode, check to see
        !          4113:             if we need to use a different CC mode here.  */
        !          4114:          compare_mode = SELECT_CC_MODE (new_code, op0, op1);
        !          4115: #endif /* EXTRA_CC_MODES */
        !          4116: 
        !          4117: #if !defined (HAVE_cc0) && defined (EXTRA_CC_MODES)
        !          4118:          /* If the mode changed, we have to change SET_DEST, the mode
        !          4119:             in the compare, and the mode in the place SET_DEST is used.
        !          4120:             If SET_DEST is a hard register, just build new versions with
        !          4121:             the proper mode.  If it is a pseudo, we lose unless it is only
        !          4122:             time we set the pseudo, in which case we can safely change
        !          4123:             its mode.  */
        !          4124:          if (compare_mode != GET_MODE (SET_DEST (x)))
        !          4125:            {
        !          4126:              int regno = REGNO (SET_DEST (x));
        !          4127:              rtx new_dest = gen_rtx (REG, compare_mode, regno);
        !          4128: 
        !          4129:              if (regno < FIRST_PSEUDO_REGISTER
        !          4130:                  || (reg_n_sets[regno] == 1
        !          4131:                      && ! REG_USERVAR_P (SET_DEST (x))))
        !          4132:                {
        !          4133:                  if (regno >= FIRST_PSEUDO_REGISTER)
        !          4134:                    SUBST (regno_reg_rtx[regno], new_dest);
        !          4135: 
        !          4136:                  SUBST (SET_DEST (x), new_dest);
        !          4137:                  SUBST (XEXP (*cc_use, 0), new_dest);
        !          4138:                  other_changed = 1;
        !          4139:                }
        !          4140:            }
        !          4141: #endif
        !          4142: 
        !          4143:          /* If the code changed, we have to build a new comparison
        !          4144:             in undobuf.other_insn.  */
        !          4145:          if (new_code != old_code)
        !          4146:            {
        !          4147:              unsigned HOST_WIDE_INT mask;
        !          4148: 
        !          4149:              SUBST (*cc_use, gen_rtx_combine (new_code, GET_MODE (*cc_use),
        !          4150:                                               SET_DEST (x), const0_rtx));
        !          4151: 
        !          4152:              /* If the only change we made was to change an EQ into an
        !          4153:                 NE or vice versa, OP0 has only one bit that might be nonzero,
        !          4154:                 and OP1 is zero, check if changing the user of the condition
        !          4155:                 code will produce a valid insn.  If it won't, we can keep
        !          4156:                 the original code in that insn by surrounding our operation
        !          4157:                 with an XOR.  */
        !          4158: 
        !          4159:              if (((old_code == NE && new_code == EQ)
        !          4160:                   || (old_code == EQ && new_code == NE))
        !          4161:                  && ! other_changed && op1 == const0_rtx
        !          4162:                  && (GET_MODE_BITSIZE (GET_MODE (op0))
        !          4163:                      <= HOST_BITS_PER_WIDE_INT)
        !          4164:                  && (exact_log2 (mask = nonzero_bits (op0, GET_MODE (op0)))
        !          4165:                      >= 0))
        !          4166:                {
        !          4167:                  rtx pat = PATTERN (other_insn), note = 0;
        !          4168: 
        !          4169:                  if ((recog_for_combine (&pat, other_insn, &note) < 0
        !          4170:                       && ! check_asm_operands (pat)))
        !          4171:                    {
        !          4172:                      PUT_CODE (*cc_use, old_code);
        !          4173:                      other_insn = 0;
        !          4174: 
        !          4175:                      op0 = gen_binary (XOR, GET_MODE (op0), op0,
        !          4176:                                        GEN_INT (mask));
        !          4177:                    }
        !          4178:                }
        !          4179: 
        !          4180:              other_changed = 1;
        !          4181:            }
        !          4182: 
        !          4183:          if (other_changed)
        !          4184:            undobuf.other_insn = other_insn;
        !          4185: 
        !          4186: #ifdef HAVE_cc0
        !          4187:          /* If we are now comparing against zero, change our source if
        !          4188:             needed.  If we do not use cc0, we always have a COMPARE.  */
        !          4189:          if (op1 == const0_rtx && SET_DEST (x) == cc0_rtx)
        !          4190:            SUBST (SET_SRC (x), op0);
        !          4191:          else
        !          4192: #endif
        !          4193: 
        !          4194:          /* Otherwise, if we didn't previously have a COMPARE in the
        !          4195:             correct mode, we need one.  */
        !          4196:          if (GET_CODE (SET_SRC (x)) != COMPARE
        !          4197:              || GET_MODE (SET_SRC (x)) != compare_mode)
        !          4198:            SUBST (SET_SRC (x), gen_rtx_combine (COMPARE, compare_mode,
        !          4199:                                                 op0, op1));
        !          4200:          else
        !          4201:            {
        !          4202:              /* Otherwise, update the COMPARE if needed.  */
        !          4203:              SUBST (XEXP (SET_SRC (x), 0), op0);
        !          4204:              SUBST (XEXP (SET_SRC (x), 1), op1);
        !          4205:            }
        !          4206:        }
        !          4207:       else
        !          4208:        {
        !          4209:          /* Get SET_SRC in a form where we have placed back any
        !          4210:             compound expressions.  Then do the checks below.  */
        !          4211:          temp = make_compound_operation (SET_SRC (x), SET);
        !          4212:          SUBST (SET_SRC (x), temp);
        !          4213:        }
        !          4214: 
        !          4215:       /* If we have (set x (subreg:m1 (op:m2 ...) 0)) with OP being some
        !          4216:         operation, and X being a REG or (subreg (reg)), we may be able to
        !          4217:         convert this to (set (subreg:m2 x) (op)).
        !          4218: 
        !          4219:         We can always do this if M1 is narrower than M2 because that
        !          4220:         means that we only care about the low bits of the result.
        !          4221: 
        !          4222:         However, on machines without WORD_REGISTER_OPERATIONS defined,
        !          4223:         we cannot perform a narrower operation that requested since the
        !          4224:         high-order bits will be undefined.  On machine where it is defined,
        !          4225:         this transformation is safe as long as M1 and M2 have the same
        !          4226:         number of words.  */
        !          4227:  
        !          4228:       if (GET_CODE (SET_SRC (x)) == SUBREG
        !          4229:          && subreg_lowpart_p (SET_SRC (x))
        !          4230:          && GET_RTX_CLASS (GET_CODE (SUBREG_REG (SET_SRC (x)))) != 'o'
        !          4231:          && (((GET_MODE_SIZE (GET_MODE (SET_SRC (x))) + (UNITS_PER_WORD - 1))
        !          4232:               / UNITS_PER_WORD)
        !          4233:              == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_SRC (x))))
        !          4234:                   + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
        !          4235: #ifndef WORD_REGISTER_OPERATIONS
        !          4236:          && (GET_MODE_SIZE (GET_MODE (SET_SRC (x)))
        !          4237:              < GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_SRC (x)))))
        !          4238: #endif
        !          4239:          && (GET_CODE (SET_DEST (x)) == REG
        !          4240:              || (GET_CODE (SET_DEST (x)) == SUBREG
        !          4241:                  && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG)))
        !          4242:        {
        !          4243:          SUBST (SET_DEST (x),
        !          4244:                 gen_lowpart_for_combine (GET_MODE (SUBREG_REG (SET_SRC (x))),
        !          4245:                                          SET_DEST (x)));
        !          4246:          SUBST (SET_SRC (x), SUBREG_REG (SET_SRC (x)));
        !          4247:        }
        !          4248: 
        !          4249: #ifdef LOAD_EXTEND_OP
        !          4250:       /* If we have (set FOO (subreg:M (mem:N BAR) 0)) with
        !          4251:         M wider than N, this would require a paradoxical subreg.
        !          4252:         Replace the subreg with a zero_extend to avoid the reload that
        !          4253:         would otherwise be required. */
        !          4254: 
        !          4255:       if (GET_CODE (SET_SRC (x)) == SUBREG
        !          4256:          && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (SET_SRC (x)))) != NIL
        !          4257:          && subreg_lowpart_p (SET_SRC (x))
        !          4258:          && SUBREG_WORD (SET_SRC (x)) == 0
        !          4259:          && (GET_MODE_SIZE (GET_MODE (SET_SRC (x)))
        !          4260:              > GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_SRC (x)))))
        !          4261:          && GET_CODE (SUBREG_REG (SET_SRC (x))) == MEM)
        !          4262:        SUBST (SET_SRC (x),
        !          4263:               gen_rtx_combine (LOAD_EXTEND_OP (GET_MODE
        !          4264:                                                (SUBREG_REG (SET_SRC (x)))),
        !          4265:                                GET_MODE (SET_SRC (x)),
        !          4266:                                XEXP (SET_SRC (x), 0)));
        !          4267: #endif
        !          4268: 
        !          4269: #ifndef HAVE_conditional_move
        !          4270: 
        !          4271:       /* If we don't have a conditional move, SET_SRC is an IF_THEN_ELSE,
        !          4272:         and we are comparing an item known to be 0 or -1 against 0, use a
        !          4273:         logical operation instead. Check for one of the arms being an IOR
        !          4274:         of the other arm with some value.  We compute three terms to be
        !          4275:         IOR'ed together.  In practice, at most two will be nonzero.  Then
        !          4276:         we do the IOR's.  */
        !          4277: 
        !          4278:       if (GET_CODE (SET_DEST (x)) != PC
        !          4279:          && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE
        !          4280:          && (GET_CODE (XEXP (SET_SRC (x), 0)) == EQ
        !          4281:              || GET_CODE (XEXP (SET_SRC (x), 0)) == NE)
        !          4282:          && XEXP (XEXP (SET_SRC (x), 0), 1) == const0_rtx
        !          4283:          && (num_sign_bit_copies (XEXP (XEXP (SET_SRC (x), 0), 0),
        !          4284:                                   GET_MODE (XEXP (XEXP (SET_SRC (x), 0), 0)))
        !          4285:              == GET_MODE_BITSIZE (GET_MODE (XEXP (XEXP (SET_SRC (x), 0), 0))))
        !          4286:          && ! side_effects_p (SET_SRC (x)))
        !          4287:        {
        !          4288:          rtx true = (GET_CODE (XEXP (SET_SRC (x), 0)) == NE
        !          4289:                      ? XEXP (SET_SRC (x), 1) : XEXP (SET_SRC (x), 2));
        !          4290:          rtx false = (GET_CODE (XEXP (SET_SRC (x), 0)) == NE
        !          4291:                       ? XEXP (SET_SRC (x), 2) : XEXP (SET_SRC (x), 1));
        !          4292:          rtx term1 = const0_rtx, term2, term3;
        !          4293: 
        !          4294:          if (GET_CODE (true) == IOR && rtx_equal_p (XEXP (true, 0), false))
        !          4295:            term1 = false, true = XEXP (true, 1), false = const0_rtx;
        !          4296:          else if (GET_CODE (true) == IOR
        !          4297:                   && rtx_equal_p (XEXP (true, 1), false))
        !          4298:            term1 = false, true = XEXP (true, 0), false = const0_rtx;
        !          4299:          else if (GET_CODE (false) == IOR
        !          4300:                   && rtx_equal_p (XEXP (false, 0), true))
        !          4301:            term1 = true, false = XEXP (false, 1), true = const0_rtx;
        !          4302:          else if (GET_CODE (false) == IOR
        !          4303:                   && rtx_equal_p (XEXP (false, 1), true))
        !          4304:            term1 = true, false = XEXP (false, 0), true = const0_rtx;
        !          4305: 
        !          4306:          term2 = gen_binary (AND, GET_MODE (SET_SRC (x)),
        !          4307:                              XEXP (XEXP (SET_SRC (x), 0), 0), true);
        !          4308:          term3 = gen_binary (AND, GET_MODE (SET_SRC (x)),
        !          4309:                              gen_unary (NOT, GET_MODE (SET_SRC (x)),
        !          4310:                                         XEXP (XEXP (SET_SRC (x), 0), 0)),
        !          4311:                              false);
        !          4312: 
        !          4313:          SUBST (SET_SRC (x),
        !          4314:                 gen_binary (IOR, GET_MODE (SET_SRC (x)),
        !          4315:                             gen_binary (IOR, GET_MODE (SET_SRC (x)),
        !          4316:                                         term1, term2),
        !          4317:                             term3));
        !          4318:        }
        !          4319: #endif
        !          4320:       break;
        !          4321: 
        !          4322:     case AND:
        !          4323:       if (GET_CODE (XEXP (x, 1)) == CONST_INT)
        !          4324:        {
        !          4325:          x = simplify_and_const_int (x, mode, XEXP (x, 0),
        !          4326:                                      INTVAL (XEXP (x, 1)));
        !          4327: 
        !          4328:          /* If we have (ior (and (X C1) C2)) and the next restart would be
        !          4329:             the last, simplify this by making C1 as small as possible
        !          4330:             and then exit. */
        !          4331:          if (n_restarts >= 3 && GET_CODE (x) == IOR
        !          4332:              && GET_CODE (XEXP (x, 0)) == AND
        !          4333:              && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          4334:              && GET_CODE (XEXP (x, 1)) == CONST_INT)
        !          4335:            {
        !          4336:              temp = gen_binary (AND, mode, XEXP (XEXP (x, 0), 0),
        !          4337:                                 GEN_INT (INTVAL (XEXP (XEXP (x, 0), 1))
        !          4338:                                          & ~ INTVAL (XEXP (x, 1))));
        !          4339:              return gen_binary (IOR, mode, temp, XEXP (x, 1));
        !          4340:            }
        !          4341: 
        !          4342:          if (GET_CODE (x) != AND)
        !          4343:            goto restart;
        !          4344:        }
        !          4345: 
        !          4346:       /* Convert (A | B) & A to A.  */
        !          4347:       if (GET_CODE (XEXP (x, 0)) == IOR
        !          4348:          && (rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (x, 1))
        !          4349:              || rtx_equal_p (XEXP (XEXP (x, 0), 1), XEXP (x, 1)))
        !          4350:          && ! side_effects_p (XEXP (XEXP (x, 0), 0))
        !          4351:          && ! side_effects_p (XEXP (XEXP (x, 0), 1)))
        !          4352:        return XEXP (x, 1);
        !          4353: 
        !          4354:       /* Convert (A ^ B) & A to A & (~ B) since the latter is often a single
        !          4355:         insn (and may simplify more).  */
        !          4356:       else if (GET_CODE (XEXP (x, 0)) == XOR
        !          4357:          && rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (x, 1))
        !          4358:          && ! side_effects_p (XEXP (x, 1)))
        !          4359:        {
        !          4360:          x = gen_binary (AND, mode,
        !          4361:                          gen_unary (NOT, mode, XEXP (XEXP (x, 0), 1)),
        !          4362:                          XEXP (x, 1));
        !          4363:          goto restart;
        !          4364:        }
        !          4365:       else if (GET_CODE (XEXP (x, 0)) == XOR
        !          4366:               && rtx_equal_p (XEXP (XEXP (x, 0), 1), XEXP (x, 1))
        !          4367:               && ! side_effects_p (XEXP (x, 1)))
        !          4368:        {
        !          4369:          x = gen_binary (AND, mode,
        !          4370:                          gen_unary (NOT, mode, XEXP (XEXP (x, 0), 0)),
        !          4371:                          XEXP (x, 1));
        !          4372:          goto restart;
        !          4373:        }
        !          4374: 
        !          4375:       /* Similarly for (~ (A ^ B)) & A.  */
        !          4376:       else if (GET_CODE (XEXP (x, 0)) == NOT
        !          4377:               && GET_CODE (XEXP (XEXP (x, 0), 0)) == XOR
        !          4378:               && rtx_equal_p (XEXP (XEXP (XEXP (x, 0), 0), 0), XEXP (x, 1))
        !          4379:               && ! side_effects_p (XEXP (x, 1)))
        !          4380:        {
        !          4381:          x = gen_binary (AND, mode, XEXP (XEXP (XEXP (x, 0), 0), 1),
        !          4382:                          XEXP (x, 1));
        !          4383:          goto restart;
        !          4384:        }
        !          4385:       else if (GET_CODE (XEXP (x, 0)) == NOT
        !          4386:               && GET_CODE (XEXP (XEXP (x, 0), 0)) == XOR
        !          4387:               && rtx_equal_p (XEXP (XEXP (XEXP (x, 0), 0), 1), XEXP (x, 1))
        !          4388:               && ! side_effects_p (XEXP (x, 1)))
        !          4389:        {
        !          4390:          x = gen_binary (AND, mode, XEXP (XEXP (XEXP (x, 0), 0), 0),
        !          4391:                          XEXP (x, 1));
        !          4392:          goto restart;
        !          4393:        }
        !          4394: 
        !          4395:       /* If we have (and A B) with A not an object but that is known to
        !          4396:         be -1 or 0, this is equivalent to the expression
        !          4397:         (if_then_else (ne A (const_int 0)) B (const_int 0))
        !          4398:         We make this conversion because it may allow further
        !          4399:         simplifications and then allow use of conditional move insns.
        !          4400:         If the machine doesn't have condition moves, code in case SET
        !          4401:         will convert the IF_THEN_ELSE back to the logical operation.
        !          4402:         We build the IF_THEN_ELSE here in case further simplification
        !          4403:         is possible (e.g., we can convert it to ABS).  */
        !          4404: 
        !          4405:       if (GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) != 'o'
        !          4406:          && ! (GET_CODE (XEXP (x, 0)) == SUBREG
        !          4407:                && GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (x, 0)))) == 'o')
        !          4408:          && (num_sign_bit_copies (XEXP (x, 0), GET_MODE (XEXP (x, 0)))
        !          4409:              == GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))))
        !          4410:        {
        !          4411:          rtx op0 = XEXP (x, 0);
        !          4412:          rtx op1 = const0_rtx;
        !          4413:          enum rtx_code comp_code
        !          4414:            = simplify_comparison (NE, &op0, &op1);
        !          4415: 
        !          4416:          x =  gen_rtx_combine (IF_THEN_ELSE, mode,
        !          4417:                                gen_binary (comp_code, VOIDmode, op0, op1),
        !          4418:                                XEXP (x, 1), const0_rtx);
        !          4419:          goto restart;
        !          4420:        }
        !          4421: 
        !          4422:       /* In the following group of tests (and those in case IOR below),
        !          4423:         we start with some combination of logical operations and apply
        !          4424:         the distributive law followed by the inverse distributive law.
        !          4425:         Most of the time, this results in no change.  However, if some of
        !          4426:         the operands are the same or inverses of each other, simplifications
        !          4427:         will result.
        !          4428: 
        !          4429:         For example, (and (ior A B) (not B)) can occur as the result of
        !          4430:         expanding a bit field assignment.  When we apply the distributive
        !          4431:         law to this, we get (ior (and (A (not B))) (and (B (not B)))),
        !          4432:         which then simplifies to (and (A (not B))).  */
        !          4433: 
        !          4434:       /* If we have (and (ior A B) C), apply the distributive law and then
        !          4435:         the inverse distributive law to see if things simplify.  */
        !          4436: 
        !          4437:       if (GET_CODE (XEXP (x, 0)) == IOR || GET_CODE (XEXP (x, 0)) == XOR)
        !          4438:        {
        !          4439:          x = apply_distributive_law
        !          4440:            (gen_binary (GET_CODE (XEXP (x, 0)), mode,
        !          4441:                         gen_binary (AND, mode,
        !          4442:                                     XEXP (XEXP (x, 0), 0), XEXP (x, 1)),
        !          4443:                         gen_binary (AND, mode,
        !          4444:                                     XEXP (XEXP (x, 0), 1), XEXP (x, 1))));
        !          4445:          if (GET_CODE (x) != AND)
        !          4446:            goto restart;
        !          4447:        }
        !          4448: 
        !          4449:       if (GET_CODE (XEXP (x, 1)) == IOR || GET_CODE (XEXP (x, 1)) == XOR)
        !          4450:        {
        !          4451:          x = apply_distributive_law
        !          4452:            (gen_binary (GET_CODE (XEXP (x, 1)), mode,
        !          4453:                         gen_binary (AND, mode,
        !          4454:                                     XEXP (XEXP (x, 1), 0), XEXP (x, 0)),
        !          4455:                         gen_binary (AND, mode,
        !          4456:                                     XEXP (XEXP (x, 1), 1), XEXP (x, 0))));
        !          4457:          if (GET_CODE (x) != AND)
        !          4458:            goto restart;
        !          4459:        }
        !          4460: 
        !          4461:       /* Similarly, taking advantage of the fact that
        !          4462:         (and (not A) (xor B C)) == (xor (ior A B) (ior A C))  */
        !          4463: 
        !          4464:       if (GET_CODE (XEXP (x, 0)) == NOT && GET_CODE (XEXP (x, 1)) == XOR)
        !          4465:        {
        !          4466:          x = apply_distributive_law
        !          4467:            (gen_binary (XOR, mode,
        !          4468:                         gen_binary (IOR, mode, XEXP (XEXP (x, 0), 0),
        !          4469:                                     XEXP (XEXP (x, 1), 0)),
        !          4470:                         gen_binary (IOR, mode, XEXP (XEXP (x, 0), 0),
        !          4471:                                     XEXP (XEXP (x, 1), 1))));
        !          4472:          if (GET_CODE (x) != AND)
        !          4473:            goto restart;
        !          4474:        }
        !          4475:                                                            
        !          4476:       else if (GET_CODE (XEXP (x, 1)) == NOT && GET_CODE (XEXP (x, 0)) == XOR)
        !          4477:        {
        !          4478:          x = apply_distributive_law
        !          4479:            (gen_binary (XOR, mode,
        !          4480:                         gen_binary (IOR, mode, XEXP (XEXP (x, 1), 0),
        !          4481:                                     XEXP (XEXP (x, 0), 0)),
        !          4482:                         gen_binary (IOR, mode, XEXP (XEXP (x, 1), 0),
        !          4483:                                     XEXP (XEXP (x, 0), 1))));
        !          4484:          if (GET_CODE (x) != AND)
        !          4485:            goto restart;
        !          4486:        }
        !          4487:       break;
        !          4488: 
        !          4489:     case IOR:
        !          4490:       /* (ior A C) is C if all bits of A that might be nonzero are on in C.  */
        !          4491:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          4492:          && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
        !          4493:          && (nonzero_bits (XEXP (x, 0), mode) & ~ INTVAL (XEXP (x, 1))) == 0)
        !          4494:        return XEXP (x, 1);
        !          4495: 
        !          4496:       /* Convert (A & B) | A to A.  */
        !          4497:       if (GET_CODE (XEXP (x, 0)) == AND
        !          4498:          && (rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (x, 1))
        !          4499:              || rtx_equal_p (XEXP (XEXP (x, 0), 1), XEXP (x, 1)))
        !          4500:          && ! side_effects_p (XEXP (XEXP (x, 0), 0))
        !          4501:          && ! side_effects_p (XEXP (XEXP (x, 0), 1)))
        !          4502:        return XEXP (x, 1);
        !          4503: 
        !          4504:       /* If we have (ior (and A B) C), apply the distributive law and then
        !          4505:         the inverse distributive law to see if things simplify.  */
        !          4506: 
        !          4507:       if (GET_CODE (XEXP (x, 0)) == AND)
        !          4508:        {
        !          4509:          x = apply_distributive_law
        !          4510:            (gen_binary (AND, mode,
        !          4511:                         gen_binary (IOR, mode,
        !          4512:                                     XEXP (XEXP (x, 0), 0), XEXP (x, 1)),
        !          4513:                         gen_binary (IOR, mode,
        !          4514:                                     XEXP (XEXP (x, 0), 1), XEXP (x, 1))));
        !          4515: 
        !          4516:          if (GET_CODE (x) != IOR)
        !          4517:            goto restart;
        !          4518:        }
        !          4519: 
        !          4520:       if (GET_CODE (XEXP (x, 1)) == AND)
        !          4521:        {
        !          4522:          x = apply_distributive_law
        !          4523:            (gen_binary (AND, mode,
        !          4524:                         gen_binary (IOR, mode,
        !          4525:                                     XEXP (XEXP (x, 1), 0), XEXP (x, 0)),
        !          4526:                         gen_binary (IOR, mode,
        !          4527:                                     XEXP (XEXP (x, 1), 1), XEXP (x, 0))));
        !          4528: 
        !          4529:          if (GET_CODE (x) != IOR)
        !          4530:            goto restart;
        !          4531:        }
        !          4532: 
        !          4533:       /* Convert (ior (ashift A CX) (lshiftrt A CY)) where CX+CY equals the
        !          4534:         mode size to (rotate A CX).  */
        !          4535: 
        !          4536:       if (((GET_CODE (XEXP (x, 0)) == ASHIFT
        !          4537:            && GET_CODE (XEXP (x, 1)) == LSHIFTRT)
        !          4538:           || (GET_CODE (XEXP (x, 1)) == ASHIFT
        !          4539:               && GET_CODE (XEXP (x, 0)) == LSHIFTRT))
        !          4540:          && rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (XEXP (x, 1), 0))
        !          4541:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          4542:          && GET_CODE (XEXP (XEXP (x, 1), 1)) == CONST_INT
        !          4543:          && (INTVAL (XEXP (XEXP (x, 0), 1)) + INTVAL (XEXP (XEXP (x, 1), 1))
        !          4544:              == GET_MODE_BITSIZE (mode)))
        !          4545:        {
        !          4546:          rtx shift_count;
        !          4547: 
        !          4548:          if (GET_CODE (XEXP (x, 0)) == ASHIFT)
        !          4549:            shift_count = XEXP (XEXP (x, 0), 1);
        !          4550:          else
        !          4551:            shift_count = XEXP (XEXP (x, 1), 1);
        !          4552:          x = gen_rtx (ROTATE, mode, XEXP (XEXP (x, 0), 0), shift_count);
        !          4553:          goto restart;
        !          4554:        }
        !          4555:       break;
        !          4556: 
        !          4557:     case XOR:
        !          4558:       /* Convert (XOR (NOT x) (NOT y)) to (XOR x y).
        !          4559:         Also convert (XOR (NOT x) y) to (NOT (XOR x y)), similarly for
        !          4560:         (NOT y).  */
        !          4561:       {
        !          4562:        int num_negated = 0;
        !          4563:        rtx in1 = XEXP (x, 0), in2 = XEXP (x, 1);
        !          4564: 
        !          4565:        if (GET_CODE (in1) == NOT)
        !          4566:          num_negated++, in1 = XEXP (in1, 0);
        !          4567:        if (GET_CODE (in2) == NOT)
        !          4568:          num_negated++, in2 = XEXP (in2, 0);
        !          4569: 
        !          4570:        if (num_negated == 2)
        !          4571:          {
        !          4572:            SUBST (XEXP (x, 0), XEXP (XEXP (x, 0), 0));
        !          4573:            SUBST (XEXP (x, 1), XEXP (XEXP (x, 1), 0));
        !          4574:          }
        !          4575:        else if (num_negated == 1)
        !          4576:          {
        !          4577:            x =  gen_unary (NOT, mode,
        !          4578:                            gen_binary (XOR, mode, in1, in2));
        !          4579:            goto restart;
        !          4580:          }
        !          4581:       }
        !          4582: 
        !          4583:       /* Convert (xor (and A B) B) to (and (not A) B).  The latter may
        !          4584:         correspond to a machine insn or result in further simplifications
        !          4585:         if B is a constant.  */
        !          4586: 
        !          4587:       if (GET_CODE (XEXP (x, 0)) == AND
        !          4588:          && rtx_equal_p (XEXP (XEXP (x, 0), 1), XEXP (x, 1))
        !          4589:          && ! side_effects_p (XEXP (x, 1)))
        !          4590:        {
        !          4591:          x = gen_binary (AND, mode,
        !          4592:                          gen_unary (NOT, mode, XEXP (XEXP (x, 0), 0)),
        !          4593:                          XEXP (x, 1));
        !          4594:          goto restart;
        !          4595:        }
        !          4596:       else if (GET_CODE (XEXP (x, 0)) == AND
        !          4597:               && rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (x, 1))
        !          4598:               && ! side_effects_p (XEXP (x, 1)))
        !          4599:        {
        !          4600:          x = gen_binary (AND, mode,
        !          4601:                          gen_unary (NOT, mode, XEXP (XEXP (x, 0), 1)),
        !          4602:                          XEXP (x, 1));
        !          4603:          goto restart;
        !          4604:        }
        !          4605: 
        !          4606: 
        !          4607: #if STORE_FLAG_VALUE == 1
        !          4608:       /* (xor (comparison foo bar) (const_int 1)) can become the reversed
        !          4609:         comparison.  */
        !          4610:       if (XEXP (x, 1) == const1_rtx
        !          4611:          && GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
        !          4612:          && reversible_comparison_p (XEXP (x, 0)))
        !          4613:        return gen_rtx_combine (reverse_condition (GET_CODE (XEXP (x, 0))),
        !          4614:                                mode, XEXP (XEXP (x, 0), 0),
        !          4615:                                XEXP (XEXP (x, 0), 1));
        !          4616: 
        !          4617:       /* (lshiftrt foo C) where C is the number of bits in FOO minus 1
        !          4618:         is (lt foo (const_int 0)), so we can perform the above
        !          4619:         simplification.  */
        !          4620: 
        !          4621:       if (XEXP (x, 1) == const1_rtx
        !          4622:          && GET_CODE (XEXP (x, 0)) == LSHIFTRT
        !          4623:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          4624:          && INTVAL (XEXP (XEXP (x, 0), 1)) == GET_MODE_BITSIZE (mode) - 1)
        !          4625:        return gen_rtx_combine (GE, mode, XEXP (XEXP (x, 0), 0), const0_rtx);
        !          4626: #endif
        !          4627: 
        !          4628:       /* (xor (comparison foo bar) (const_int sign-bit))
        !          4629:         when STORE_FLAG_VALUE is the sign bit.  */
        !          4630:       if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
        !          4631:          && (STORE_FLAG_VALUE
        !          4632:              == (HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (mode) - 1))
        !          4633:          && XEXP (x, 1) == const_true_rtx
        !          4634:          && GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
        !          4635:          && reversible_comparison_p (XEXP (x, 0)))
        !          4636:        return gen_rtx_combine (reverse_condition (GET_CODE (XEXP (x, 0))),
        !          4637:                                mode, XEXP (XEXP (x, 0), 0),
        !          4638:                                XEXP (XEXP (x, 0), 1));
        !          4639:       break;
        !          4640: 
        !          4641:     case ABS:
        !          4642:       /* (abs (neg <foo>)) -> (abs <foo>) */
        !          4643:       if (GET_CODE (XEXP (x, 0)) == NEG)
        !          4644:        SUBST (XEXP (x, 0), XEXP (XEXP (x, 0), 0));
        !          4645: 
        !          4646:       /* If operand is something known to be positive, ignore the ABS.  */
        !          4647:       if (GET_CODE (XEXP (x, 0)) == FFS || GET_CODE (XEXP (x, 0)) == ABS
        !          4648:          || ((GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
        !          4649:               <= HOST_BITS_PER_WIDE_INT)
        !          4650:              && ((nonzero_bits (XEXP (x, 0), GET_MODE (XEXP (x, 0)))
        !          4651:                   & ((HOST_WIDE_INT) 1
        !          4652:                      << (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - 1)))
        !          4653:                  == 0)))
        !          4654:        return XEXP (x, 0);
        !          4655: 
        !          4656: 
        !          4657:       /* If operand is known to be only -1 or 0, convert ABS to NEG.  */
        !          4658:       if (num_sign_bit_copies (XEXP (x, 0), mode) == GET_MODE_BITSIZE (mode))
        !          4659:        {
        !          4660:          x = gen_rtx_combine (NEG, mode, XEXP (x, 0));
        !          4661:          goto restart;
        !          4662:        }
        !          4663:       break;
        !          4664: 
        !          4665:     case FFS:
        !          4666:       /* (ffs (*_extend <X>)) = (ffs <X>) */
        !          4667:       if (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND
        !          4668:          || GET_CODE (XEXP (x, 0)) == ZERO_EXTEND)
        !          4669:        SUBST (XEXP (x, 0), XEXP (XEXP (x, 0), 0));
        !          4670:       break;
        !          4671: 
        !          4672:     case FLOAT:
        !          4673:       /* (float (sign_extend <X>)) = (float <X>).  */
        !          4674:       if (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND)
        !          4675:        SUBST (XEXP (x, 0), XEXP (XEXP (x, 0), 0));
        !          4676:       break;
        !          4677: 
        !          4678:     case LSHIFT:
        !          4679:     case ASHIFT:
        !          4680:     case LSHIFTRT:
        !          4681:     case ASHIFTRT:
        !          4682:     case ROTATE:
        !          4683:     case ROTATERT:
        !          4684:       /* If this is a shift by a constant amount, simplify it.  */
        !          4685:       if (GET_CODE (XEXP (x, 1)) == CONST_INT)
        !          4686:        {
        !          4687:          x = simplify_shift_const (x, code, mode, XEXP (x, 0), 
        !          4688:                                    INTVAL (XEXP (x, 1)));
        !          4689:          if (GET_CODE (x) != code)
        !          4690:            goto restart;
        !          4691:        }
        !          4692: 
        !          4693: #ifdef SHIFT_COUNT_TRUNCATED
        !          4694:       else if (SHIFT_COUNT_TRUNCATED && GET_CODE (XEXP (x, 1)) != REG)
        !          4695:        SUBST (XEXP (x, 1),
        !          4696:               force_to_mode (XEXP (x, 1), GET_MODE (x),
        !          4697:                              ((HOST_WIDE_INT) 1 
        !          4698:                               << exact_log2 (GET_MODE_BITSIZE (GET_MODE (x))))
        !          4699:                              - 1,
        !          4700:                              NULL_RTX, 0));
        !          4701: #endif
        !          4702: 
        !          4703:       break;
        !          4704:     }
        !          4705: 
        !          4706:   return x;
        !          4707: }
        !          4708: 
        !          4709: /* We consider ZERO_EXTRACT, SIGN_EXTRACT, and SIGN_EXTEND as "compound
        !          4710:    operations" because they can be replaced with two more basic operations.
        !          4711:    ZERO_EXTEND is also considered "compound" because it can be replaced with
        !          4712:    an AND operation, which is simpler, though only one operation.
        !          4713: 
        !          4714:    The function expand_compound_operation is called with an rtx expression
        !          4715:    and will convert it to the appropriate shifts and AND operations, 
        !          4716:    simplifying at each stage.
        !          4717: 
        !          4718:    The function make_compound_operation is called to convert an expression
        !          4719:    consisting of shifts and ANDs into the equivalent compound expression.
        !          4720:    It is the inverse of this function, loosely speaking.  */
        !          4721: 
        !          4722: static rtx
        !          4723: expand_compound_operation (x)
        !          4724:      rtx x;
        !          4725: {
        !          4726:   int pos = 0, len;
        !          4727:   int unsignedp = 0;
        !          4728:   int modewidth;
        !          4729:   rtx tem;
        !          4730: 
        !          4731:   switch (GET_CODE (x))
        !          4732:     {
        !          4733:     case ZERO_EXTEND:
        !          4734:       unsignedp = 1;
        !          4735:     case SIGN_EXTEND:
        !          4736:       /* We can't necessarily use a const_int for a multiword mode;
        !          4737:         it depends on implicitly extending the value.
        !          4738:         Since we don't know the right way to extend it,
        !          4739:         we can't tell whether the implicit way is right.
        !          4740: 
        !          4741:         Even for a mode that is no wider than a const_int,
        !          4742:         we can't win, because we need to sign extend one of its bits through
        !          4743:         the rest of it, and we don't know which bit.  */
        !          4744:       if (GET_CODE (XEXP (x, 0)) == CONST_INT)
        !          4745:        return x;
        !          4746: 
        !          4747:       if (! FAKE_EXTEND_SAFE_P (GET_MODE (XEXP (x, 0)), XEXP (x, 0)))
        !          4748:        return x;
        !          4749: 
        !          4750:       len = GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)));
        !          4751:       /* If the inner object has VOIDmode (the only way this can happen
        !          4752:         is if it is a ASM_OPERANDS), we can't do anything since we don't
        !          4753:         know how much masking to do.  */
        !          4754:       if (len == 0)
        !          4755:        return x;
        !          4756: 
        !          4757:       break;
        !          4758: 
        !          4759:     case ZERO_EXTRACT:
        !          4760:       unsignedp = 1;
        !          4761:     case SIGN_EXTRACT:
        !          4762:       /* If the operand is a CLOBBER, just return it.  */
        !          4763:       if (GET_CODE (XEXP (x, 0)) == CLOBBER)
        !          4764:        return XEXP (x, 0);
        !          4765: 
        !          4766:       if (GET_CODE (XEXP (x, 1)) != CONST_INT
        !          4767:          || GET_CODE (XEXP (x, 2)) != CONST_INT
        !          4768:          || GET_MODE (XEXP (x, 0)) == VOIDmode)
        !          4769:        return x;
        !          4770: 
        !          4771:       len = INTVAL (XEXP (x, 1));
        !          4772:       pos = INTVAL (XEXP (x, 2));
        !          4773: 
        !          4774:       /* If this goes outside the object being extracted, replace the object
        !          4775:         with a (use (mem ...)) construct that only combine understands
        !          4776:         and is used only for this purpose.  */
        !          4777:       if (len + pos > GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))))
        !          4778:        SUBST (XEXP (x, 0), gen_rtx (USE, GET_MODE (x), XEXP (x, 0)));
        !          4779: 
        !          4780: #if BITS_BIG_ENDIAN
        !          4781:       pos = GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - len - pos;
        !          4782: #endif
        !          4783:       break;
        !          4784: 
        !          4785:     default:
        !          4786:       return x;
        !          4787:     }
        !          4788: 
        !          4789:   /* If we reach here, we want to return a pair of shifts.  The inner
        !          4790:      shift is a left shift of BITSIZE - POS - LEN bits.  The outer
        !          4791:      shift is a right shift of BITSIZE - LEN bits.  It is arithmetic or
        !          4792:      logical depending on the value of UNSIGNEDP.
        !          4793: 
        !          4794:      If this was a ZERO_EXTEND or ZERO_EXTRACT, this pair of shifts will be
        !          4795:      converted into an AND of a shift.
        !          4796: 
        !          4797:      We must check for the case where the left shift would have a negative
        !          4798:      count.  This can happen in a case like (x >> 31) & 255 on machines
        !          4799:      that can't shift by a constant.  On those machines, we would first
        !          4800:      combine the shift with the AND to produce a variable-position 
        !          4801:      extraction.  Then the constant of 31 would be substituted in to produce
        !          4802:      a such a position.  */
        !          4803: 
        !          4804:   modewidth = GET_MODE_BITSIZE (GET_MODE (x));
        !          4805:   if (modewidth >= pos - len)
        !          4806:     tem = simplify_shift_const (NULL_RTX, unsignedp ? LSHIFTRT : ASHIFTRT,
        !          4807:                                GET_MODE (x),
        !          4808:                                simplify_shift_const (NULL_RTX, ASHIFT,
        !          4809:                                                      GET_MODE (x),
        !          4810:                                                      XEXP (x, 0),
        !          4811:                                                      modewidth - pos - len),
        !          4812:                                modewidth - len);
        !          4813: 
        !          4814:   else if (unsignedp && len < HOST_BITS_PER_WIDE_INT)
        !          4815:     tem = simplify_and_const_int (NULL_RTX, GET_MODE (x),
        !          4816:                                  simplify_shift_const (NULL_RTX, LSHIFTRT,
        !          4817:                                                        GET_MODE (x),
        !          4818:                                                        XEXP (x, 0), pos),
        !          4819:                                  ((HOST_WIDE_INT) 1 << len) - 1);
        !          4820:   else
        !          4821:     /* Any other cases we can't handle.  */
        !          4822:     return x;
        !          4823:     
        !          4824: 
        !          4825:   /* If we couldn't do this for some reason, return the original
        !          4826:      expression.  */
        !          4827:   if (GET_CODE (tem) == CLOBBER)
        !          4828:     return x;
        !          4829: 
        !          4830:   return tem;
        !          4831: }
        !          4832: 
        !          4833: /* X is a SET which contains an assignment of one object into
        !          4834:    a part of another (such as a bit-field assignment, STRICT_LOW_PART,
        !          4835:    or certain SUBREGS). If possible, convert it into a series of
        !          4836:    logical operations.
        !          4837: 
        !          4838:    We half-heartedly support variable positions, but do not at all
        !          4839:    support variable lengths.  */
        !          4840: 
        !          4841: static rtx
        !          4842: expand_field_assignment (x)
        !          4843:      rtx x;
        !          4844: {
        !          4845:   rtx inner;
        !          4846:   rtx pos;                     /* Always counts from low bit. */
        !          4847:   int len;
        !          4848:   rtx mask;
        !          4849:   enum machine_mode compute_mode;
        !          4850: 
        !          4851:   /* Loop until we find something we can't simplify.  */
        !          4852:   while (1)
        !          4853:     {
        !          4854:       if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
        !          4855:          && GET_CODE (XEXP (SET_DEST (x), 0)) == SUBREG)
        !          4856:        {
        !          4857:          inner = SUBREG_REG (XEXP (SET_DEST (x), 0));
        !          4858:          len = GET_MODE_BITSIZE (GET_MODE (XEXP (SET_DEST (x), 0)));
        !          4859:          pos = const0_rtx;
        !          4860:        }
        !          4861:       else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT
        !          4862:               && GET_CODE (XEXP (SET_DEST (x), 1)) == CONST_INT)
        !          4863:        {
        !          4864:          inner = XEXP (SET_DEST (x), 0);
        !          4865:          len = INTVAL (XEXP (SET_DEST (x), 1));
        !          4866:          pos = XEXP (SET_DEST (x), 2);
        !          4867: 
        !          4868:          /* If the position is constant and spans the width of INNER,
        !          4869:             surround INNER  with a USE to indicate this.  */
        !          4870:          if (GET_CODE (pos) == CONST_INT
        !          4871:              && INTVAL (pos) + len > GET_MODE_BITSIZE (GET_MODE (inner)))
        !          4872:            inner = gen_rtx (USE, GET_MODE (SET_DEST (x)), inner);
        !          4873: 
        !          4874: #if BITS_BIG_ENDIAN
        !          4875:          if (GET_CODE (pos) == CONST_INT)
        !          4876:            pos = GEN_INT (GET_MODE_BITSIZE (GET_MODE (inner)) - len
        !          4877:                           - INTVAL (pos));
        !          4878:          else if (GET_CODE (pos) == MINUS
        !          4879:                   && GET_CODE (XEXP (pos, 1)) == CONST_INT
        !          4880:                   && (INTVAL (XEXP (pos, 1))
        !          4881:                       == GET_MODE_BITSIZE (GET_MODE (inner)) - len))
        !          4882:            /* If position is ADJUST - X, new position is X.  */
        !          4883:            pos = XEXP (pos, 0);
        !          4884:          else
        !          4885:            pos = gen_binary (MINUS, GET_MODE (pos),
        !          4886:                              GEN_INT (GET_MODE_BITSIZE (GET_MODE (inner))
        !          4887:                                       - len),
        !          4888:                              pos);
        !          4889: #endif
        !          4890:        }
        !          4891: 
        !          4892:       /* A SUBREG between two modes that occupy the same numbers of words
        !          4893:         can be done by moving the SUBREG to the source.  */
        !          4894:       else if (GET_CODE (SET_DEST (x)) == SUBREG
        !          4895:               && (((GET_MODE_SIZE (GET_MODE (SET_DEST (x)))
        !          4896:                     + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
        !          4897:                   == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (x))))
        !          4898:                        + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
        !          4899:        {
        !          4900:          x = gen_rtx (SET, VOIDmode, SUBREG_REG (SET_DEST (x)),
        !          4901:                       gen_lowpart_for_combine (GET_MODE (SUBREG_REG (SET_DEST (x))),
        !          4902:                                                SET_SRC (x)));
        !          4903:          continue;
        !          4904:        }
        !          4905:       else
        !          4906:        break;
        !          4907: 
        !          4908:       while (GET_CODE (inner) == SUBREG && subreg_lowpart_p (inner))
        !          4909:        inner = SUBREG_REG (inner);
        !          4910: 
        !          4911:       compute_mode = GET_MODE (inner);
        !          4912: 
        !          4913:       /* Compute a mask of LEN bits, if we can do this on the host machine.  */
        !          4914:       if (len < HOST_BITS_PER_WIDE_INT)
        !          4915:        mask = GEN_INT (((HOST_WIDE_INT) 1 << len) - 1);
        !          4916:       else
        !          4917:        break;
        !          4918: 
        !          4919:       /* Now compute the equivalent expression.  Make a copy of INNER
        !          4920:         for the SET_DEST in case it is a MEM into which we will substitute;
        !          4921:         we don't want shared RTL in that case.  */
        !          4922:       x = gen_rtx (SET, VOIDmode, copy_rtx (inner),
        !          4923:                   gen_binary (IOR, compute_mode,
        !          4924:                               gen_binary (AND, compute_mode,
        !          4925:                                           gen_unary (NOT, compute_mode,
        !          4926:                                                      gen_binary (ASHIFT,
        !          4927:                                                                  compute_mode,
        !          4928:                                                                  mask, pos)),
        !          4929:                                           inner),
        !          4930:                               gen_binary (ASHIFT, compute_mode,
        !          4931:                                           gen_binary (AND, compute_mode,
        !          4932:                                                       gen_lowpart_for_combine
        !          4933:                                                       (compute_mode,
        !          4934:                                                        SET_SRC (x)),
        !          4935:                                                       mask),
        !          4936:                                           pos)));
        !          4937:     }
        !          4938: 
        !          4939:   return x;
        !          4940: }
        !          4941: 
        !          4942: /* Return an RTX for a reference to LEN bits of INNER.  If POS_RTX is nonzero,
        !          4943:    it is an RTX that represents a variable starting position; otherwise,
        !          4944:    POS is the (constant) starting bit position (counted from the LSB).
        !          4945: 
        !          4946:    INNER may be a USE.  This will occur when we started with a bitfield
        !          4947:    that went outside the boundary of the object in memory, which is
        !          4948:    allowed on most machines.  To isolate this case, we produce a USE
        !          4949:    whose mode is wide enough and surround the MEM with it.  The only
        !          4950:    code that understands the USE is this routine.  If it is not removed,
        !          4951:    it will cause the resulting insn not to match.
        !          4952: 
        !          4953:    UNSIGNEDP is non-zero for an unsigned reference and zero for a 
        !          4954:    signed reference.
        !          4955: 
        !          4956:    IN_DEST is non-zero if this is a reference in the destination of a
        !          4957:    SET.  This is used when a ZERO_ or SIGN_EXTRACT isn't needed.  If non-zero,
        !          4958:    a STRICT_LOW_PART will be used, if zero, ZERO_EXTEND or SIGN_EXTEND will
        !          4959:    be used.
        !          4960: 
        !          4961:    IN_COMPARE is non-zero if we are in a COMPARE.  This means that a
        !          4962:    ZERO_EXTRACT should be built even for bits starting at bit 0.
        !          4963: 
        !          4964:    MODE is the desired mode of the result (if IN_DEST == 0).  */
        !          4965: 
        !          4966: static rtx
        !          4967: make_extraction (mode, inner, pos, pos_rtx, len,
        !          4968:                 unsignedp, in_dest, in_compare)
        !          4969:      enum machine_mode mode;
        !          4970:      rtx inner;
        !          4971:      int pos;
        !          4972:      rtx pos_rtx;
        !          4973:      int len;
        !          4974:      int unsignedp;
        !          4975:      int in_dest, in_compare;
        !          4976: {
        !          4977:   /* This mode describes the size of the storage area
        !          4978:      to fetch the overall value from.  Within that, we
        !          4979:      ignore the POS lowest bits, etc.  */
        !          4980:   enum machine_mode is_mode = GET_MODE (inner);
        !          4981:   enum machine_mode inner_mode;
        !          4982:   enum machine_mode wanted_mem_mode = byte_mode;
        !          4983:   enum machine_mode pos_mode = word_mode;
        !          4984:   enum machine_mode extraction_mode = word_mode;
        !          4985:   enum machine_mode tmode = mode_for_size (len, MODE_INT, 1);
        !          4986:   int spans_byte = 0;
        !          4987:   rtx new = 0;
        !          4988:   rtx orig_pos_rtx = pos_rtx;
        !          4989:   int orig_pos;
        !          4990: 
        !          4991:   /* Get some information about INNER and get the innermost object.  */
        !          4992:   if (GET_CODE (inner) == USE)
        !          4993:     /* (use:SI (mem:QI foo)) stands for (mem:SI foo).  */
        !          4994:     /* We don't need to adjust the position because we set up the USE
        !          4995:        to pretend that it was a full-word object.  */
        !          4996:     spans_byte = 1, inner = XEXP (inner, 0);
        !          4997:   else if (GET_CODE (inner) == SUBREG && subreg_lowpart_p (inner))
        !          4998:     {
        !          4999:       /* If going from (subreg:SI (mem:QI ...)) to (mem:QI ...),
        !          5000:         consider just the QI as the memory to extract from.
        !          5001:         The subreg adds or removes high bits; its mode is
        !          5002:         irrelevant to the meaning of this extraction,
        !          5003:         since POS and LEN count from the lsb.  */
        !          5004:       if (GET_CODE (SUBREG_REG (inner)) == MEM)
        !          5005:        is_mode = GET_MODE (SUBREG_REG (inner));
        !          5006:       inner = SUBREG_REG (inner);
        !          5007:     }
        !          5008: 
        !          5009:   inner_mode = GET_MODE (inner);
        !          5010: 
        !          5011:   if (pos_rtx && GET_CODE (pos_rtx) == CONST_INT)
        !          5012:     pos = INTVAL (pos_rtx), pos_rtx = 0;
        !          5013: 
        !          5014:   /* See if this can be done without an extraction.  We never can if the
        !          5015:      width of the field is not the same as that of some integer mode. For
        !          5016:      registers, we can only avoid the extraction if the position is at the
        !          5017:      low-order bit and this is either not in the destination or we have the
        !          5018:      appropriate STRICT_LOW_PART operation available.
        !          5019: 
        !          5020:      For MEM, we can avoid an extract if the field starts on an appropriate
        !          5021:      boundary and we can change the mode of the memory reference.  However,
        !          5022:      we cannot directly access the MEM if we have a USE and the underlying
        !          5023:      MEM is not TMODE.  This combination means that MEM was being used in a
        !          5024:      context where bits outside its mode were being referenced; that is only
        !          5025:      valid in bit-field insns.  */
        !          5026: 
        !          5027:   if (tmode != BLKmode
        !          5028:       && ! (spans_byte && inner_mode != tmode)
        !          5029:       && ((pos_rtx == 0 && pos == 0 && GET_CODE (inner) != MEM
        !          5030:           && (! in_dest
        !          5031:               || (GET_CODE (inner) == REG
        !          5032:                   && (movstrict_optab->handlers[(int) tmode].insn_code
        !          5033:                       != CODE_FOR_nothing))))
        !          5034:          || (GET_CODE (inner) == MEM && pos_rtx == 0
        !          5035:              && (pos
        !          5036:                  % (STRICT_ALIGNMENT ? GET_MODE_ALIGNMENT (tmode)
        !          5037:                     : BITS_PER_UNIT)) == 0
        !          5038:              /* We can't do this if we are widening INNER_MODE (it
        !          5039:                 may not be aligned, for one thing).  */
        !          5040:              && GET_MODE_BITSIZE (inner_mode) >= GET_MODE_BITSIZE (tmode)
        !          5041:              && (inner_mode == tmode
        !          5042:                  || (! mode_dependent_address_p (XEXP (inner, 0))
        !          5043:                      && ! MEM_VOLATILE_P (inner))))))
        !          5044:     {
        !          5045:       /* If INNER is a MEM, make a new MEM that encompasses just the desired
        !          5046:         field.  If the original and current mode are the same, we need not
        !          5047:         adjust the offset.  Otherwise, we do if bytes big endian.  
        !          5048: 
        !          5049:         If INNER is not a MEM, get a piece consisting of the just the field
        !          5050:         of interest (in this case POS must be 0).  */
        !          5051: 
        !          5052:       if (GET_CODE (inner) == MEM)
        !          5053:        {
        !          5054:          int offset;
        !          5055:          /* POS counts from lsb, but make OFFSET count in memory order.  */
        !          5056:          if (BYTES_BIG_ENDIAN)
        !          5057:            offset = (GET_MODE_BITSIZE (is_mode) - len - pos) / BITS_PER_UNIT;
        !          5058:          else
        !          5059:            offset = pos / BITS_PER_UNIT;
        !          5060: 
        !          5061:          new = gen_rtx (MEM, tmode, plus_constant (XEXP (inner, 0), offset));
        !          5062:          RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (inner);
        !          5063:          MEM_VOLATILE_P (new) = MEM_VOLATILE_P (inner);
        !          5064:          MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (inner);
        !          5065:        }
        !          5066:       else if (GET_CODE (inner) == REG)
        !          5067:        /* We can't call gen_lowpart_for_combine here since we always want
        !          5068:           a SUBREG and it would sometimes return a new hard register.  */
        !          5069:        new = gen_rtx (SUBREG, tmode, inner,
        !          5070:                       (WORDS_BIG_ENDIAN
        !          5071:                        && GET_MODE_SIZE (inner_mode) > UNITS_PER_WORD
        !          5072:                        ? ((GET_MODE_SIZE (inner_mode) - GET_MODE_SIZE (tmode))
        !          5073:                           / UNITS_PER_WORD)
        !          5074:                        : 0));
        !          5075:       else
        !          5076:        new = force_to_mode (inner, tmode,
        !          5077:                             len >= HOST_BITS_PER_WIDE_INT
        !          5078:                             ? GET_MODE_MASK (tmode)
        !          5079:                             : ((HOST_WIDE_INT) 1 << len) - 1,
        !          5080:                             NULL_RTX, 0);
        !          5081: 
        !          5082:       /* If this extraction is going into the destination of a SET, 
        !          5083:         make a STRICT_LOW_PART unless we made a MEM.  */
        !          5084: 
        !          5085:       if (in_dest)
        !          5086:        return (GET_CODE (new) == MEM ? new
        !          5087:                : (GET_CODE (new) != SUBREG
        !          5088:                   ? gen_rtx (CLOBBER, tmode, const0_rtx)
        !          5089:                   : gen_rtx_combine (STRICT_LOW_PART, VOIDmode, new)));
        !          5090: 
        !          5091:       /* Otherwise, sign- or zero-extend unless we already are in the
        !          5092:         proper mode.  */
        !          5093: 
        !          5094:       return (mode == tmode ? new
        !          5095:              : gen_rtx_combine (unsignedp ? ZERO_EXTEND : SIGN_EXTEND,
        !          5096:                                 mode, new));
        !          5097:     }
        !          5098: 
        !          5099:   /* Unless this is a COMPARE or we have a funny memory reference,
        !          5100:      don't do anything with zero-extending field extracts starting at
        !          5101:      the low-order bit since they are simple AND operations.  */
        !          5102:   if (pos_rtx == 0 && pos == 0 && ! in_dest
        !          5103:       && ! in_compare && ! spans_byte && unsignedp)
        !          5104:     return 0;
        !          5105: 
        !          5106:   /* Get the mode to use should INNER be a MEM, the mode for the position,
        !          5107:      and the mode for the result.  */
        !          5108: #ifdef HAVE_insv
        !          5109:   if (in_dest)
        !          5110:     {
        !          5111:       wanted_mem_mode = insn_operand_mode[(int) CODE_FOR_insv][0];
        !          5112:       pos_mode = insn_operand_mode[(int) CODE_FOR_insv][2];
        !          5113:       extraction_mode = insn_operand_mode[(int) CODE_FOR_insv][3];
        !          5114:     }
        !          5115: #endif
        !          5116: 
        !          5117: #ifdef HAVE_extzv
        !          5118:   if (! in_dest && unsignedp)
        !          5119:     {
        !          5120:       wanted_mem_mode = insn_operand_mode[(int) CODE_FOR_extzv][1];
        !          5121:       pos_mode = insn_operand_mode[(int) CODE_FOR_extzv][3];
        !          5122:       extraction_mode = insn_operand_mode[(int) CODE_FOR_extzv][0];
        !          5123:     }
        !          5124: #endif
        !          5125: 
        !          5126: #ifdef HAVE_extv
        !          5127:   if (! in_dest && ! unsignedp)
        !          5128:     {
        !          5129:       wanted_mem_mode = insn_operand_mode[(int) CODE_FOR_extv][1];
        !          5130:       pos_mode = insn_operand_mode[(int) CODE_FOR_extv][3];
        !          5131:       extraction_mode = insn_operand_mode[(int) CODE_FOR_extv][0];
        !          5132:     }
        !          5133: #endif
        !          5134: 
        !          5135:   /* Never narrow an object, since that might not be safe.  */
        !          5136: 
        !          5137:   if (mode != VOIDmode
        !          5138:       && GET_MODE_SIZE (extraction_mode) < GET_MODE_SIZE (mode))
        !          5139:     extraction_mode = mode;
        !          5140: 
        !          5141:   if (pos_rtx && GET_MODE (pos_rtx) != VOIDmode
        !          5142:       && GET_MODE_SIZE (pos_mode) < GET_MODE_SIZE (GET_MODE (pos_rtx)))
        !          5143:     pos_mode = GET_MODE (pos_rtx);
        !          5144: 
        !          5145:   /* If this is not from memory or we have to change the mode of memory and
        !          5146:      cannot, the desired mode is EXTRACTION_MODE.  */
        !          5147:   if (GET_CODE (inner) != MEM
        !          5148:       || (inner_mode != wanted_mem_mode
        !          5149:          && (mode_dependent_address_p (XEXP (inner, 0))
        !          5150:              || MEM_VOLATILE_P (inner))))
        !          5151:     wanted_mem_mode = extraction_mode;
        !          5152: 
        !          5153:   orig_pos = pos;
        !          5154: 
        !          5155: #if BITS_BIG_ENDIAN
        !          5156:   /* If position is constant, compute new position.  Otherwise, build
        !          5157:      subtraction.  */
        !          5158:   if (pos_rtx == 0)
        !          5159:     pos = (MAX (GET_MODE_BITSIZE (is_mode), GET_MODE_BITSIZE (wanted_mem_mode))
        !          5160:           - len - pos);
        !          5161:   else
        !          5162:     pos_rtx
        !          5163:       = gen_rtx_combine (MINUS, GET_MODE (pos_rtx),
        !          5164:                         GEN_INT (MAX (GET_MODE_BITSIZE (is_mode),
        !          5165:                                       GET_MODE_BITSIZE (wanted_mem_mode))
        !          5166:                                  - len),
        !          5167:                         pos_rtx);
        !          5168: #endif
        !          5169: 
        !          5170:   /* If INNER has a wider mode, make it smaller.  If this is a constant
        !          5171:      extract, try to adjust the byte to point to the byte containing
        !          5172:      the value.  */
        !          5173:   if (wanted_mem_mode != VOIDmode
        !          5174:       && GET_MODE_SIZE (wanted_mem_mode) < GET_MODE_SIZE (is_mode)
        !          5175:       && ((GET_CODE (inner) == MEM
        !          5176:           && (inner_mode == wanted_mem_mode
        !          5177:               || (! mode_dependent_address_p (XEXP (inner, 0))
        !          5178:                   && ! MEM_VOLATILE_P (inner))))))
        !          5179:     {
        !          5180:       int offset = 0;
        !          5181: 
        !          5182:       /* The computations below will be correct if the machine is big
        !          5183:         endian in both bits and bytes or little endian in bits and bytes.
        !          5184:         If it is mixed, we must adjust.  */
        !          5185:             
        !          5186:       /* If bytes are big endian and we had a paradoxical SUBREG, we must
        !          5187:         adjust OFFSET to compensate. */
        !          5188: #if BYTES_BIG_ENDIAN
        !          5189:       if (! spans_byte
        !          5190:          && GET_MODE_SIZE (inner_mode) < GET_MODE_SIZE (is_mode))
        !          5191:        offset -= GET_MODE_SIZE (is_mode) - GET_MODE_SIZE (inner_mode);
        !          5192: #endif
        !          5193: 
        !          5194:       /* If this is a constant position, we can move to the desired byte.  */
        !          5195:       if (pos_rtx == 0)
        !          5196:        {
        !          5197:          offset += pos / BITS_PER_UNIT;
        !          5198:          pos %= GET_MODE_BITSIZE (wanted_mem_mode);
        !          5199:        }
        !          5200: 
        !          5201: #if BYTES_BIG_ENDIAN != BITS_BIG_ENDIAN
        !          5202:       if (! spans_byte && is_mode != wanted_mem_mode)
        !          5203:        offset = (GET_MODE_SIZE (is_mode)
        !          5204:                  - GET_MODE_SIZE (wanted_mem_mode) - offset);
        !          5205: #endif
        !          5206: 
        !          5207:       if (offset != 0 || inner_mode != wanted_mem_mode)
        !          5208:        {
        !          5209:          rtx newmem = gen_rtx (MEM, wanted_mem_mode,
        !          5210:                                plus_constant (XEXP (inner, 0), offset));
        !          5211:          RTX_UNCHANGING_P (newmem) = RTX_UNCHANGING_P (inner);
        !          5212:          MEM_VOLATILE_P (newmem) = MEM_VOLATILE_P (inner);
        !          5213:          MEM_IN_STRUCT_P (newmem) = MEM_IN_STRUCT_P (inner);
        !          5214:          inner = newmem;
        !          5215:        }
        !          5216:     }
        !          5217: 
        !          5218:   /* If INNER is not memory, we can always get it into the proper mode. */
        !          5219:   else if (GET_CODE (inner) != MEM)
        !          5220:     inner = force_to_mode (inner, extraction_mode,
        !          5221:                           pos_rtx || len + orig_pos >= HOST_BITS_PER_WIDE_INT
        !          5222:                           ? GET_MODE_MASK (extraction_mode)
        !          5223:                           : (((HOST_WIDE_INT) 1 << len) - 1) << orig_pos,
        !          5224:                           NULL_RTX, 0);
        !          5225: 
        !          5226:   /* Adjust mode of POS_RTX, if needed.  If we want a wider mode, we
        !          5227:      have to zero extend.  Otherwise, we can just use a SUBREG.  */
        !          5228:   if (pos_rtx != 0
        !          5229:       && GET_MODE_SIZE (pos_mode) > GET_MODE_SIZE (GET_MODE (pos_rtx)))
        !          5230:     pos_rtx = gen_rtx_combine (ZERO_EXTEND, pos_mode, pos_rtx);
        !          5231:   else if (pos_rtx != 0
        !          5232:           && GET_MODE_SIZE (pos_mode) < GET_MODE_SIZE (GET_MODE (pos_rtx)))
        !          5233:     pos_rtx = gen_lowpart_for_combine (pos_mode, pos_rtx);
        !          5234: 
        !          5235:   /* Make POS_RTX unless we already have it and it is correct.  If we don't
        !          5236:      have a POS_RTX but we do have an ORIG_POS_RTX, the latter must
        !          5237:      be a CONST_INT. */
        !          5238:   if (pos_rtx == 0 && orig_pos_rtx != 0 && INTVAL (orig_pos_rtx) == pos)
        !          5239:     pos_rtx = orig_pos_rtx;
        !          5240: 
        !          5241:   else if (pos_rtx == 0)
        !          5242:     pos_rtx = GEN_INT (pos);
        !          5243: 
        !          5244:   /* Make the required operation.  See if we can use existing rtx.  */
        !          5245:   new = gen_rtx_combine (unsignedp ? ZERO_EXTRACT : SIGN_EXTRACT,
        !          5246:                         extraction_mode, inner, GEN_INT (len), pos_rtx);
        !          5247:   if (! in_dest)
        !          5248:     new = gen_lowpart_for_combine (mode, new);
        !          5249: 
        !          5250:   return new;
        !          5251: }
        !          5252: 
        !          5253: /* Look at the expression rooted at X.  Look for expressions
        !          5254:    equivalent to ZERO_EXTRACT, SIGN_EXTRACT, ZERO_EXTEND, SIGN_EXTEND.
        !          5255:    Form these expressions.
        !          5256: 
        !          5257:    Return the new rtx, usually just X.
        !          5258: 
        !          5259:    Also, for machines like the Vax that don't have logical shift insns,
        !          5260:    try to convert logical to arithmetic shift operations in cases where
        !          5261:    they are equivalent.  This undoes the canonicalizations to logical
        !          5262:    shifts done elsewhere.
        !          5263: 
        !          5264:    We try, as much as possible, to re-use rtl expressions to save memory.
        !          5265: 
        !          5266:    IN_CODE says what kind of expression we are processing.  Normally, it is
        !          5267:    SET.  In a memory address (inside a MEM, PLUS or minus, the latter two
        !          5268:    being kludges), it is MEM.  When processing the arguments of a comparison
        !          5269:    or a COMPARE against zero, it is COMPARE.  */
        !          5270: 
        !          5271: static rtx
        !          5272: make_compound_operation (x, in_code)
        !          5273:      rtx x;
        !          5274:      enum rtx_code in_code;
        !          5275: {
        !          5276:   enum rtx_code code = GET_CODE (x);
        !          5277:   enum machine_mode mode = GET_MODE (x);
        !          5278:   int mode_width = GET_MODE_BITSIZE (mode);
        !          5279:   enum rtx_code next_code;
        !          5280:   int i, count;
        !          5281:   rtx new = 0;
        !          5282:   rtx tem;
        !          5283:   char *fmt;
        !          5284: 
        !          5285:   /* Select the code to be used in recursive calls.  Once we are inside an
        !          5286:      address, we stay there.  If we have a comparison, set to COMPARE,
        !          5287:      but once inside, go back to our default of SET.  */
        !          5288: 
        !          5289:   next_code = (code == MEM || code == PLUS || code == MINUS ? MEM
        !          5290:               : ((code == COMPARE || GET_RTX_CLASS (code) == '<')
        !          5291:                  && XEXP (x, 1) == const0_rtx) ? COMPARE
        !          5292:               : in_code == COMPARE ? SET : in_code);
        !          5293: 
        !          5294:   /* Process depending on the code of this operation.  If NEW is set
        !          5295:      non-zero, it will be returned.  */
        !          5296: 
        !          5297:   switch (code)
        !          5298:     {
        !          5299:     case ASHIFT:
        !          5300:     case LSHIFT:
        !          5301:       /* Convert shifts by constants into multiplications if inside
        !          5302:         an address.  */
        !          5303:       if (in_code == MEM && GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5304:          && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT
        !          5305:          && INTVAL (XEXP (x, 1)) >= 0)
        !          5306:        {
        !          5307:          new = make_compound_operation (XEXP (x, 0), next_code);
        !          5308:          new = gen_rtx_combine (MULT, mode, new,
        !          5309:                                 GEN_INT ((HOST_WIDE_INT) 1
        !          5310:                                          << INTVAL (XEXP (x, 1))));
        !          5311:        }
        !          5312:       break;
        !          5313: 
        !          5314:     case AND:
        !          5315:       /* If the second operand is not a constant, we can't do anything
        !          5316:         with it.  */
        !          5317:       if (GET_CODE (XEXP (x, 1)) != CONST_INT)
        !          5318:        break;
        !          5319: 
        !          5320:       /* If the constant is a power of two minus one and the first operand
        !          5321:         is a logical right shift, make an extraction.  */
        !          5322:       if (GET_CODE (XEXP (x, 0)) == LSHIFTRT
        !          5323:          && (i = exact_log2 (INTVAL (XEXP (x, 1)) + 1)) >= 0)
        !          5324:        {
        !          5325:          new = make_compound_operation (XEXP (XEXP (x, 0), 0), next_code);
        !          5326:          new = make_extraction (mode, new, 0, XEXP (XEXP (x, 0), 1), i, 1,
        !          5327:                                 0, in_code == COMPARE);
        !          5328:        }
        !          5329: 
        !          5330:       /* Same as previous, but for (subreg (lshiftrt ...)) in first op.  */
        !          5331:       else if (GET_CODE (XEXP (x, 0)) == SUBREG
        !          5332:               && subreg_lowpart_p (XEXP (x, 0))
        !          5333:               && GET_CODE (SUBREG_REG (XEXP (x, 0))) == LSHIFTRT
        !          5334:               && (i = exact_log2 (INTVAL (XEXP (x, 1)) + 1)) >= 0)
        !          5335:        {
        !          5336:          new = make_compound_operation (XEXP (SUBREG_REG (XEXP (x, 0)), 0),
        !          5337:                                         next_code);
        !          5338:          new = make_extraction (GET_MODE (SUBREG_REG (XEXP (x, 0))), new, 0,
        !          5339:                                 XEXP (SUBREG_REG (XEXP (x, 0)), 1), i, 1,
        !          5340:                                 0, in_code == COMPARE);
        !          5341:        }
        !          5342:       /* Same as previous, but for (xor/ior (lshift...) (lshift...)).  */
        !          5343:       else if ((GET_CODE (XEXP (x, 0)) == XOR
        !          5344:                || GET_CODE (XEXP (x, 0)) == IOR)
        !          5345:               && GET_CODE (XEXP (XEXP (x, 0), 0)) == LSHIFTRT
        !          5346:               && GET_CODE (XEXP (XEXP (x, 0), 1)) == LSHIFTRT
        !          5347:               && (i = exact_log2 (INTVAL (XEXP (x, 1)) + 1)) >= 0)
        !          5348:        {
        !          5349:          /* Apply the distributive law, and then try to make extractions.  */
        !          5350:          new = gen_rtx_combine (GET_CODE (XEXP (x, 0)), mode,
        !          5351:                                 gen_rtx (AND, mode, XEXP (XEXP (x, 0), 0),
        !          5352:                                          XEXP (x, 1)),
        !          5353:                                 gen_rtx (AND, mode, XEXP (XEXP (x, 0), 1),
        !          5354:                                          XEXP (x, 1)));
        !          5355:          new = make_compound_operation (new, in_code);
        !          5356:        }
        !          5357: 
        !          5358:       /* If we are have (and (rotate X C) M) and C is larger than the number
        !          5359:         of bits in M, this is an extraction.  */
        !          5360: 
        !          5361:       else if (GET_CODE (XEXP (x, 0)) == ROTATE
        !          5362:               && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          5363:               && (i = exact_log2 (INTVAL (XEXP (x, 1)) + 1)) >= 0
        !          5364:               && i <= INTVAL (XEXP (XEXP (x, 0), 1)))
        !          5365:        {
        !          5366:          new = make_compound_operation (XEXP (XEXP (x, 0), 0), next_code);
        !          5367:          new = make_extraction (mode, new,
        !          5368:                                 (GET_MODE_BITSIZE (mode)
        !          5369:                                  - INTVAL (XEXP (XEXP (x, 0), 1))),
        !          5370:                                 NULL_RTX, i, 1, 0, in_code == COMPARE);
        !          5371:        }
        !          5372: 
        !          5373:       /* On machines without logical shifts, if the operand of the AND is
        !          5374:         a logical shift and our mask turns off all the propagated sign
        !          5375:         bits, we can replace the logical shift with an arithmetic shift.  */
        !          5376:       else if (ashr_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing
        !          5377:               && (lshr_optab->handlers[(int) mode].insn_code
        !          5378:                   == CODE_FOR_nothing)
        !          5379:               && GET_CODE (XEXP (x, 0)) == LSHIFTRT
        !          5380:               && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          5381:               && INTVAL (XEXP (XEXP (x, 0), 1)) >= 0
        !          5382:               && INTVAL (XEXP (XEXP (x, 0), 1)) < HOST_BITS_PER_WIDE_INT
        !          5383:               && mode_width <= HOST_BITS_PER_WIDE_INT)
        !          5384:        {
        !          5385:          unsigned HOST_WIDE_INT mask = GET_MODE_MASK (mode);
        !          5386: 
        !          5387:          mask >>= INTVAL (XEXP (XEXP (x, 0), 1));
        !          5388:          if ((INTVAL (XEXP (x, 1)) & ~mask) == 0)
        !          5389:            SUBST (XEXP (x, 0),
        !          5390:                   gen_rtx_combine (ASHIFTRT, mode,
        !          5391:                                    make_compound_operation (XEXP (XEXP (x, 0), 0),
        !          5392:                                                             next_code),
        !          5393:                                    XEXP (XEXP (x, 0), 1)));
        !          5394:        }
        !          5395: 
        !          5396:       /* If the constant is one less than a power of two, this might be
        !          5397:         representable by an extraction even if no shift is present.
        !          5398:         If it doesn't end up being a ZERO_EXTEND, we will ignore it unless
        !          5399:         we are in a COMPARE.  */
        !          5400:       else if ((i = exact_log2 (INTVAL (XEXP (x, 1)) + 1)) >= 0)
        !          5401:        new = make_extraction (mode,
        !          5402:                               make_compound_operation (XEXP (x, 0),
        !          5403:                                                        next_code),
        !          5404:                               0, NULL_RTX, i, 1, 0, in_code == COMPARE);
        !          5405: 
        !          5406:       /* If we are in a comparison and this is an AND with a power of two,
        !          5407:         convert this into the appropriate bit extract.  */
        !          5408:       else if (in_code == COMPARE
        !          5409:               && (i = exact_log2 (INTVAL (XEXP (x, 1)))) >= 0)
        !          5410:        new = make_extraction (mode,
        !          5411:                               make_compound_operation (XEXP (x, 0),
        !          5412:                                                        next_code),
        !          5413:                               i, NULL_RTX, 1, 1, 0, 1);
        !          5414: 
        !          5415:       break;
        !          5416: 
        !          5417:     case LSHIFTRT:
        !          5418:       /* If the sign bit is known to be zero, replace this with an
        !          5419:         arithmetic shift.  */
        !          5420:       if (ashr_optab->handlers[(int) mode].insn_code == CODE_FOR_nothing
        !          5421:          && lshr_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing
        !          5422:          && mode_width <= HOST_BITS_PER_WIDE_INT
        !          5423:          && (nonzero_bits (XEXP (x, 0), mode) & (1 << (mode_width - 1))) == 0)
        !          5424:        {
        !          5425:          new = gen_rtx_combine (ASHIFTRT, mode,
        !          5426:                                 make_compound_operation (XEXP (x, 0),
        !          5427:                                                          next_code),
        !          5428:                                 XEXP (x, 1));
        !          5429:          break;
        !          5430:        }
        !          5431: 
        !          5432:       /* ... fall through ... */
        !          5433: 
        !          5434:     case ASHIFTRT:
        !          5435:       /* If we have (ashiftrt (ashift foo C1) C2) with C2 >= C1,
        !          5436:         this is a SIGN_EXTRACT.  */
        !          5437:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5438:          && GET_CODE (XEXP (x, 0)) == ASHIFT
        !          5439:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          5440:          && INTVAL (XEXP (x, 1)) >= INTVAL (XEXP (XEXP (x, 0), 1)))
        !          5441:        {
        !          5442:          new = make_compound_operation (XEXP (XEXP (x, 0), 0), next_code);
        !          5443:          new = make_extraction (mode, new,
        !          5444:                                 (INTVAL (XEXP (x, 1))
        !          5445:                                  - INTVAL (XEXP (XEXP (x, 0), 1))),
        !          5446:                                 NULL_RTX, mode_width - INTVAL (XEXP (x, 1)),
        !          5447:                                 code == LSHIFTRT, 0, in_code == COMPARE);
        !          5448:        }
        !          5449: 
        !          5450:       /* Similarly if we have (ashifrt (OP (ashift foo C1) C3) C2).  In these
        !          5451:         cases, we are better off returning a SIGN_EXTEND of the operation.  */
        !          5452: 
        !          5453:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5454:          && (GET_CODE (XEXP (x, 0)) == IOR || GET_CODE (XEXP (x, 0)) == AND
        !          5455:              || GET_CODE (XEXP (x, 0)) == XOR
        !          5456:              || GET_CODE (XEXP (x, 0)) == PLUS)
        !          5457:          && GET_CODE (XEXP (XEXP (x, 0), 0)) == ASHIFT
        !          5458:          && GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 1)) == CONST_INT
        !          5459:          && INTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1)) < HOST_BITS_PER_WIDE_INT
        !          5460:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          5461:          && 0 == (INTVAL (XEXP (XEXP (x, 0), 1))
        !          5462:                   & (((HOST_WIDE_INT) 1
        !          5463:                       << (MIN (INTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1)),
        !          5464:                                INTVAL (XEXP (x, 1)))
        !          5465:                           - 1)))))
        !          5466:        {
        !          5467:          rtx c1 = XEXP (XEXP (XEXP (x, 0), 0), 1);
        !          5468:          rtx c2 = XEXP (x, 1);
        !          5469:          rtx c3 = XEXP (XEXP (x, 0), 1);
        !          5470:          HOST_WIDE_INT newop1;
        !          5471:          rtx inner = XEXP (XEXP (XEXP (x, 0), 0), 0);
        !          5472: 
        !          5473:          /* If C1 > C2, INNER needs to have the shift performed on it
        !          5474:             for C1-C2 bits.  */
        !          5475:          if (INTVAL (c1) > INTVAL (c2))
        !          5476:            {
        !          5477:              inner = gen_binary (ASHIFT, mode, inner,
        !          5478:                                  GEN_INT (INTVAL (c1) - INTVAL (c2)));
        !          5479:              c1 = c2;
        !          5480:            }
        !          5481: 
        !          5482:          newop1 = INTVAL (c3) >> INTVAL (c1);
        !          5483:          new = make_compound_operation (inner,
        !          5484:                                         GET_CODE (XEXP (x, 0)) == PLUS
        !          5485:                                         ? MEM : GET_CODE (XEXP (x, 0)));
        !          5486:          new = make_extraction (mode,
        !          5487:                                 gen_binary (GET_CODE (XEXP (x, 0)), mode, new,
        !          5488:                                             GEN_INT (newop1)),
        !          5489:                                 INTVAL (c2) - INTVAL (c1),
        !          5490:                                 NULL_RTX, mode_width - INTVAL (c2),
        !          5491:                                 code == LSHIFTRT, 0, in_code == COMPARE);
        !          5492:        }
        !          5493: 
        !          5494:       /* Similarly for (ashiftrt (neg (ashift FOO C1)) C2).  */
        !          5495:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5496:          && GET_CODE (XEXP (x, 0)) == NEG
        !          5497:          && GET_CODE (XEXP (XEXP (x, 0), 0)) == ASHIFT
        !          5498:          && GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 1)) == CONST_INT
        !          5499:          && INTVAL (XEXP (x, 1)) >= INTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1)))
        !          5500:        {
        !          5501:          new = make_compound_operation (XEXP (XEXP (XEXP (x, 0), 0), 0),
        !          5502:                                         next_code);
        !          5503:          new = make_extraction (mode,
        !          5504:                                 gen_unary (GET_CODE (XEXP (x, 0)), mode, new),
        !          5505:                                 (INTVAL (XEXP (x, 1))
        !          5506:                                  - INTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1))),
        !          5507:                                 NULL_RTX, mode_width - INTVAL (XEXP (x, 1)),
        !          5508:                                 code == LSHIFTRT, 0, in_code == COMPARE);
        !          5509:        }
        !          5510:       break;
        !          5511: 
        !          5512:     case SUBREG:
        !          5513:       /* Call ourselves recursively on the inner expression.  If we are
        !          5514:         narrowing the object and it has a different RTL code from
        !          5515:         what it originally did, do this SUBREG as a force_to_mode.  */
        !          5516: 
        !          5517:       tem = make_compound_operation (SUBREG_REG (x), in_code);
        !          5518:       if (GET_CODE (tem) != GET_CODE (SUBREG_REG (x))
        !          5519:          && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (tem))
        !          5520:          && subreg_lowpart_p (x))
        !          5521:        {
        !          5522:          rtx newer = force_to_mode (tem, mode,
        !          5523:                                     GET_MODE_MASK (mode), NULL_RTX, 0);
        !          5524: 
        !          5525:          /* If we have something other than a SUBREG, we might have
        !          5526:             done an expansion, so rerun outselves.  */
        !          5527:          if (GET_CODE (newer) != SUBREG)
        !          5528:            newer = make_compound_operation (newer, in_code);
        !          5529: 
        !          5530:          return newer;
        !          5531:        }
        !          5532:     }
        !          5533: 
        !          5534:   if (new)
        !          5535:     {
        !          5536:       x = gen_lowpart_for_combine (mode, new);
        !          5537:       code = GET_CODE (x);
        !          5538:     }
        !          5539: 
        !          5540:   /* Now recursively process each operand of this operation.  */
        !          5541:   fmt = GET_RTX_FORMAT (code);
        !          5542:   for (i = 0; i < GET_RTX_LENGTH (code); i++)
        !          5543:     if (fmt[i] == 'e')
        !          5544:       {
        !          5545:        new = make_compound_operation (XEXP (x, i), next_code);
        !          5546:        SUBST (XEXP (x, i), new);
        !          5547:       }
        !          5548: 
        !          5549:   return x;
        !          5550: }
        !          5551: 
        !          5552: /* Given M see if it is a value that would select a field of bits
        !          5553:     within an item, but not the entire word.  Return -1 if not.
        !          5554:     Otherwise, return the starting position of the field, where 0 is the
        !          5555:     low-order bit.
        !          5556: 
        !          5557:    *PLEN is set to the length of the field.  */
        !          5558: 
        !          5559: static int
        !          5560: get_pos_from_mask (m, plen)
        !          5561:      unsigned HOST_WIDE_INT m;
        !          5562:      int *plen;
        !          5563: {
        !          5564:   /* Get the bit number of the first 1 bit from the right, -1 if none.  */
        !          5565:   int pos = exact_log2 (m & - m);
        !          5566: 
        !          5567:   if (pos < 0)
        !          5568:     return -1;
        !          5569: 
        !          5570:   /* Now shift off the low-order zero bits and see if we have a power of
        !          5571:      two minus 1.  */
        !          5572:   *plen = exact_log2 ((m >> pos) + 1);
        !          5573: 
        !          5574:   if (*plen <= 0)
        !          5575:     return -1;
        !          5576: 
        !          5577:   return pos;
        !          5578: }
        !          5579: 
        !          5580: /* See if X can be simplified knowing that we will only refer to it in
        !          5581:    MODE and will only refer to those bits that are nonzero in MASK.
        !          5582:    If other bits are being computed or if masking operations are done
        !          5583:    that select a superset of the bits in MASK, they can sometimes be
        !          5584:    ignored.
        !          5585: 
        !          5586:    Return a possibly simplified expression, but always convert X to
        !          5587:    MODE.  If X is a CONST_INT, AND the CONST_INT with MASK.
        !          5588: 
        !          5589:    Also, if REG is non-zero and X is a register equal in value to REG, 
        !          5590:    replace X with REG.
        !          5591: 
        !          5592:    If JUST_SELECT is nonzero, don't optimize by noticing that bits in MASK
        !          5593:    are all off in X.  This is used when X will be complemented, by either
        !          5594:    NOT or XOR.  */
        !          5595: 
        !          5596: static rtx
        !          5597: force_to_mode (x, mode, mask, reg, just_select)
        !          5598:      rtx x;
        !          5599:      enum machine_mode mode;
        !          5600:      unsigned HOST_WIDE_INT mask;
        !          5601:      rtx reg;
        !          5602:      int just_select;
        !          5603: {
        !          5604:   enum rtx_code code = GET_CODE (x);
        !          5605:   int next_select = just_select || code == XOR || code == NOT;
        !          5606:   enum machine_mode op_mode;
        !          5607:   unsigned HOST_WIDE_INT fuller_mask, nonzero;
        !          5608:   rtx op0, op1, temp;
        !          5609: 
        !          5610:   /* We want to perform the operation is its present mode unless we know
        !          5611:      that the operation is valid in MODE, in which case we do the operation
        !          5612:      in MODE.  */
        !          5613:   op_mode = ((code_to_optab[(int) code] != 0
        !          5614:              && (code_to_optab[(int) code]->handlers[(int) mode].insn_code
        !          5615:                  != CODE_FOR_nothing))
        !          5616:             ? mode : GET_MODE (x));
        !          5617: 
        !          5618:   /* It is not valid to do a right-shift in a narrower mode
        !          5619:      than the one it came in with.  */
        !          5620:   if ((code == LSHIFTRT || code == ASHIFTRT)
        !          5621:       && GET_MODE_BITSIZE (mode) < GET_MODE_BITSIZE (GET_MODE (x)))
        !          5622:     op_mode = GET_MODE (x);
        !          5623: 
        !          5624:   /* Truncate MASK to fit OP_MODE.  */
        !          5625:   if (op_mode)
        !          5626:     mask &= GET_MODE_MASK (op_mode);
        !          5627: 
        !          5628:   /* When we have an arithmetic operation, or a shift whose count we
        !          5629:      do not know, we need to assume that all bit the up to the highest-order
        !          5630:      bit in MASK will be needed.  This is how we form such a mask.  */
        !          5631:   if (op_mode)
        !          5632:     fuller_mask = (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT
        !          5633:                   ? GET_MODE_MASK (op_mode)
        !          5634:                   : ((HOST_WIDE_INT) 1 << (floor_log2 (mask) + 1)) - 1);
        !          5635:   else
        !          5636:     fuller_mask = ~ (HOST_WIDE_INT) 0;
        !          5637: 
        !          5638:   /* Determine what bits of X are guaranteed to be (non)zero.  */
        !          5639:   nonzero = nonzero_bits (x, mode);
        !          5640: 
        !          5641:   /* If none of the bits in X are needed, return a zero.  */
        !          5642:   if (! just_select && (nonzero & mask) == 0)
        !          5643:     return const0_rtx;
        !          5644: 
        !          5645:   /* If X is a CONST_INT, return a new one.  Do this here since the
        !          5646:      test below will fail.  */
        !          5647:   if (GET_CODE (x) == CONST_INT)
        !          5648:     {
        !          5649:       HOST_WIDE_INT cval = INTVAL (x) & mask;
        !          5650:       int width = GET_MODE_BITSIZE (mode);
        !          5651: 
        !          5652:       /* If MODE is narrower that HOST_WIDE_INT and CVAL is a negative
        !          5653:         number, sign extend it.  */
        !          5654:       if (width > 0 && width < HOST_BITS_PER_WIDE_INT
        !          5655:          && (cval & ((HOST_WIDE_INT) 1 << (width - 1))) != 0)
        !          5656:        cval |= (HOST_WIDE_INT) -1 << width;
        !          5657:        
        !          5658:       return GEN_INT (cval);
        !          5659:     }
        !          5660: 
        !          5661:   /* If X is narrower than MODE, just get X in the proper mode.  */
        !          5662:   if (GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (mode))
        !          5663:     return gen_lowpart_for_combine (mode, x);
        !          5664: 
        !          5665:   /* If we aren't changing the mode and all zero bits in MASK are already
        !          5666:      known to be zero in X, we need not do anything.  */
        !          5667:   if (GET_MODE (x) == mode && (~ mask & nonzero) == 0)
        !          5668:     return x;
        !          5669: 
        !          5670:   switch (code)
        !          5671:     {
        !          5672:     case CLOBBER:
        !          5673:       /* If X is a (clobber (const_int)), return it since we know we are
        !          5674:         generating something that won't match. */
        !          5675:       return x;
        !          5676: 
        !          5677: #if ! BITS_BIG_ENDIAN
        !          5678:     case USE:
        !          5679:       /* X is a (use (mem ..)) that was made from a bit-field extraction that
        !          5680:         spanned the boundary of the MEM.  If we are now masking so it is
        !          5681:         within that boundary, we don't need the USE any more.  */
        !          5682:       if ((mask & ~ GET_MODE_MASK (GET_MODE (XEXP (x, 0)))) == 0)
        !          5683:        return force_to_mode (XEXP (x, 0), mode, mask, reg, next_select);
        !          5684: #endif
        !          5685: 
        !          5686:     case SIGN_EXTEND:
        !          5687:     case ZERO_EXTEND:
        !          5688:     case ZERO_EXTRACT:
        !          5689:     case SIGN_EXTRACT:
        !          5690:       x = expand_compound_operation (x);
        !          5691:       if (GET_CODE (x) != code)
        !          5692:        return force_to_mode (x, mode, mask, reg, next_select);
        !          5693:       break;
        !          5694: 
        !          5695:     case REG:
        !          5696:       if (reg != 0 && (rtx_equal_p (get_last_value (reg), x)
        !          5697:                       || rtx_equal_p (reg, get_last_value (x))))
        !          5698:        x = reg;
        !          5699:       break;
        !          5700: 
        !          5701:     case SUBREG:
        !          5702:       if (subreg_lowpart_p (x)
        !          5703:          /* We can ignore the effect this SUBREG if it narrows the mode or,
        !          5704:             on machines where register operations are performed on the full
        !          5705:             word, if the constant masks to zero all the bits the mode
        !          5706:             doesn't have.  */
        !          5707:          && ((GET_MODE_SIZE (GET_MODE (x))
        !          5708:               < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
        !          5709: #ifdef WORD_REGISTER_OPERATIONS
        !          5710:              || (0 == (mask
        !          5711:                        & GET_MODE_MASK (GET_MODE (x))
        !          5712:                        & ~ GET_MODE_MASK (GET_MODE (SUBREG_REG (x)))))
        !          5713: #endif
        !          5714:              ))
        !          5715:        return force_to_mode (SUBREG_REG (x), mode, mask, reg, next_select);
        !          5716:       break;
        !          5717: 
        !          5718:     case AND:
        !          5719:       /* If this is an AND with a constant, convert it into an AND
        !          5720:         whose constant is the AND of that constant with MASK.  If it
        !          5721:         remains an AND of MASK, delete it since it is redundant.  */
        !          5722: 
        !          5723:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5724:          && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT)
        !          5725:        {
        !          5726:          x = simplify_and_const_int (x, op_mode, XEXP (x, 0),
        !          5727:                                      mask & INTVAL (XEXP (x, 1)));
        !          5728: 
        !          5729:          /* If X is still an AND, see if it is an AND with a mask that
        !          5730:             is just some low-order bits.  If so, and it is BITS wide (it
        !          5731:             can't be wider), we don't need it.  */
        !          5732: 
        !          5733:          if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5734:              && INTVAL (XEXP (x, 1)) == mask)
        !          5735:            x = XEXP (x, 0);
        !          5736: 
        !          5737:          break;
        !          5738:        }
        !          5739: 
        !          5740:       goto binop;
        !          5741: 
        !          5742:     case PLUS:
        !          5743:       /* In (and (plus FOO C1) M), if M is a mask that just turns off
        !          5744:         low-order bits (as in an alignment operation) and FOO is already
        !          5745:         aligned to that boundary, mask C1 to that boundary as well.
        !          5746:         This may eliminate that PLUS and, later, the AND.  */
        !          5747:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5748:          && exact_log2 (- mask) >= 0
        !          5749:          && (nonzero_bits (XEXP (x, 0), mode) & ~ mask) == 0
        !          5750:          && (INTVAL (XEXP (x, 1)) & ~ mask) != 0)
        !          5751:        return force_to_mode (plus_constant (XEXP (x, 0),
        !          5752:                                             INTVAL (XEXP (x, 1)) & mask),
        !          5753:                              mode, mask, reg, next_select);
        !          5754: 
        !          5755:       /* ... fall through ... */
        !          5756: 
        !          5757:     case MINUS:
        !          5758:     case MULT:
        !          5759:       /* For PLUS, MINUS and MULT, we need any bits less significant than the
        !          5760:         most significant bit in MASK since carries from those bits will
        !          5761:         affect the bits we are interested in.  */
        !          5762:       mask = fuller_mask;
        !          5763:       goto binop;
        !          5764: 
        !          5765:     case IOR:
        !          5766:     case XOR:
        !          5767:       /* If X is (ior (lshiftrt FOO C1) C2), try to commute the IOR and
        !          5768:         LSHIFTRT so we end up with an (and (lshiftrt (ior ...) ...) ...)
        !          5769:         operation which may be a bitfield extraction.  Ensure that the
        !          5770:         constant we form is not wider than the mode of X.  */
        !          5771: 
        !          5772:       if (GET_CODE (XEXP (x, 0)) == LSHIFTRT
        !          5773:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          5774:          && INTVAL (XEXP (XEXP (x, 0), 1)) >= 0
        !          5775:          && INTVAL (XEXP (XEXP (x, 0), 1)) < HOST_BITS_PER_WIDE_INT
        !          5776:          && GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5777:          && ((INTVAL (XEXP (XEXP (x, 0), 1))
        !          5778:               + floor_log2 (INTVAL (XEXP (x, 1))))
        !          5779:              < GET_MODE_BITSIZE (GET_MODE (x)))
        !          5780:          && (INTVAL (XEXP (x, 1))
        !          5781:              & ~ nonzero_bits (XEXP (x, 0), GET_MODE (x)) == 0))
        !          5782:        {
        !          5783:          temp = GEN_INT ((INTVAL (XEXP (x, 1)) & mask)
        !          5784:                              << INTVAL (XEXP (XEXP (x, 0), 1)));
        !          5785:          temp = gen_binary (GET_CODE (x), GET_MODE (x),
        !          5786:                             XEXP (XEXP (x, 0), 0), temp);
        !          5787:          x = gen_binary (LSHIFTRT, GET_MODE (x), temp, XEXP (x, 1));
        !          5788:          return force_to_mode (x, mode, mask, reg, next_select);
        !          5789:        }
        !          5790: 
        !          5791:     binop:
        !          5792:       /* For most binary operations, just propagate into the operation and
        !          5793:         change the mode if we have an operation of that mode.   */
        !          5794: 
        !          5795:       op0 = gen_lowpart_for_combine (op_mode,
        !          5796:                                     force_to_mode (XEXP (x, 0), mode, mask,
        !          5797:                                                    reg, next_select));
        !          5798:       op1 = gen_lowpart_for_combine (op_mode,
        !          5799:                                     force_to_mode (XEXP (x, 1), mode, mask,
        !          5800:                                                    reg, next_select));
        !          5801: 
        !          5802:       /* If OP1 is a CONST_INT and X is an IOR or XOR, clear bits outside
        !          5803:         MASK since OP1 might have been sign-extended but we never want
        !          5804:         to turn on extra bits, since combine might have previously relied
        !          5805:         on them being off.  */
        !          5806:       if (GET_CODE (op1) == CONST_INT && (code == IOR || code == XOR)
        !          5807:          && (INTVAL (op1) & mask) != 0)
        !          5808:        op1 = GEN_INT (INTVAL (op1) & mask);
        !          5809:         
        !          5810:       if (op_mode != GET_MODE (x) || op0 != XEXP (x, 0) || op1 != XEXP (x, 1))
        !          5811:        x = gen_binary (code, op_mode, op0, op1);
        !          5812:       break;
        !          5813: 
        !          5814:     case ASHIFT:
        !          5815:     case LSHIFT:
        !          5816:       /* For left shifts, do the same, but just for the first operand.
        !          5817:         However, we cannot do anything with shifts where we cannot
        !          5818:         guarantee that the counts are smaller than the size of the mode
        !          5819:         because such a count will have a different meaning in a
        !          5820:         wider mode.  */
        !          5821: 
        !          5822:       if (! (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5823:             && INTVAL (XEXP (x, 1)) >= 0
        !          5824:             && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (mode))
        !          5825:          && ! (GET_MODE (XEXP (x, 1)) != VOIDmode
        !          5826:                && (nonzero_bits (XEXP (x, 1), GET_MODE (XEXP (x, 1)))
        !          5827:                    < (unsigned HOST_WIDE_INT) GET_MODE_BITSIZE (mode))))
        !          5828:        break;
        !          5829:        
        !          5830:       /* If the shift count is a constant and we can do arithmetic in
        !          5831:         the mode of the shift, refine which bits we need.  Otherwise, use the
        !          5832:         conservative form of the mask.  */
        !          5833:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5834:          && INTVAL (XEXP (x, 1)) >= 0
        !          5835:          && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (op_mode)
        !          5836:          && GET_MODE_BITSIZE (op_mode) <= HOST_BITS_PER_WIDE_INT)
        !          5837:        mask >>= INTVAL (XEXP (x, 1));
        !          5838:       else
        !          5839:        mask = fuller_mask;
        !          5840: 
        !          5841:       op0 = gen_lowpart_for_combine (op_mode,
        !          5842:                                     force_to_mode (XEXP (x, 0), op_mode,
        !          5843:                                                    mask, reg, next_select));
        !          5844: 
        !          5845:       if (op_mode != GET_MODE (x) || op0 != XEXP (x, 0))
        !          5846:        x =  gen_binary (code, op_mode, op0, XEXP (x, 1));
        !          5847:       break;
        !          5848: 
        !          5849:     case LSHIFTRT:
        !          5850:       /* Here we can only do something if the shift count is a constant,
        !          5851:         this shift constant is valid for the host, and we can do arithmetic
        !          5852:         in OP_MODE.  */
        !          5853: 
        !          5854:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5855:          && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT
        !          5856:          && GET_MODE_BITSIZE (op_mode) <= HOST_BITS_PER_WIDE_INT)
        !          5857:        {
        !          5858:          rtx inner = XEXP (x, 0);
        !          5859: 
        !          5860:          /* Select the mask of the bits we need for the shift operand.  */
        !          5861:          mask <<= INTVAL (XEXP (x, 1));
        !          5862: 
        !          5863:          /* We can only change the mode of the shift if we can do arithmetic
        !          5864:             in the mode of the shift and MASK is no wider than the width of
        !          5865:             OP_MODE.  */
        !          5866:          if (GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT
        !          5867:              || (mask & ~ GET_MODE_MASK (op_mode)) != 0)
        !          5868:            op_mode = GET_MODE (x);
        !          5869: 
        !          5870:          inner = force_to_mode (inner, op_mode, mask, reg, next_select);
        !          5871: 
        !          5872:          if (GET_MODE (x) != op_mode || inner != XEXP (x, 0))
        !          5873:            x = gen_binary (LSHIFTRT, op_mode, inner, XEXP (x, 1));
        !          5874:        }
        !          5875: 
        !          5876:       /* If we have (and (lshiftrt FOO C1) C2) where the combination of the
        !          5877:         shift and AND produces only copies of the sign bit (C2 is one less
        !          5878:         than a power of two), we can do this with just a shift.  */
        !          5879: 
        !          5880:       if (GET_CODE (x) == LSHIFTRT
        !          5881:          && GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5882:          && ((INTVAL (XEXP (x, 1))
        !          5883:               + num_sign_bit_copies (XEXP (x, 0), GET_MODE (XEXP (x, 0))))
        !          5884:              >= GET_MODE_BITSIZE (GET_MODE (x)))
        !          5885:          && exact_log2 (mask + 1) >= 0
        !          5886:          && (num_sign_bit_copies (XEXP (x, 0), GET_MODE (XEXP (x, 0)))
        !          5887:              >= exact_log2 (mask + 1)))
        !          5888:        x = gen_binary (LSHIFTRT, GET_MODE (x), XEXP (x, 0),
        !          5889:                        GEN_INT (GET_MODE_BITSIZE (GET_MODE (x))
        !          5890:                                 - exact_log2 (mask + 1)));
        !          5891:       break;
        !          5892: 
        !          5893:     case ASHIFTRT:
        !          5894:       /* If we are just looking for the sign bit, we don't need this shift at
        !          5895:         all, even if it has a variable count.  */
        !          5896:       if (mask == ((HOST_WIDE_INT) 1
        !          5897:                   << (GET_MODE_BITSIZE (GET_MODE (x)) - 1)))
        !          5898:        return force_to_mode (XEXP (x, 0), mode, mask, reg, next_select);
        !          5899: 
        !          5900:       /* If this is a shift by a constant, get a mask that contains those bits
        !          5901:         that are not copies of the sign bit.  We then have two cases:  If
        !          5902:         MASK only includes those bits, this can be a logical shift, which may
        !          5903:         allow simplifications.  If MASK is a single-bit field not within
        !          5904:         those bits, we are requesting a copy of the sign bit and hence can
        !          5905:         shift the sign bit to the appropriate location.  */
        !          5906: 
        !          5907:       if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0
        !          5908:          && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
        !          5909:        {
        !          5910:          int i = -1;
        !          5911: 
        !          5912:          nonzero = GET_MODE_MASK (GET_MODE (x));
        !          5913:          nonzero >>= INTVAL (XEXP (x, 1));
        !          5914: 
        !          5915:          if ((mask & ~ nonzero) == 0
        !          5916:              || (i = exact_log2 (mask)) >= 0)
        !          5917:            {
        !          5918:              x = simplify_shift_const
        !          5919:                (x, LSHIFTRT, GET_MODE (x), XEXP (x, 0),
        !          5920:                 i < 0 ? INTVAL (XEXP (x, 1))
        !          5921:                 : GET_MODE_BITSIZE (GET_MODE (x)) - 1 - i);
        !          5922: 
        !          5923:              if (GET_CODE (x) != ASHIFTRT)
        !          5924:                return force_to_mode (x, mode, mask, reg, next_select);
        !          5925:            }
        !          5926:        }
        !          5927: 
        !          5928:       /* If MASK is 1, convert this to a LSHIFTRT.  This can be done
        !          5929:         even if the shift count isn't a constant.  */
        !          5930:       if (mask == 1)
        !          5931:        x = gen_binary (LSHIFTRT, GET_MODE (x), XEXP (x, 0), XEXP (x, 1));
        !          5932: 
        !          5933:       /* If this is a sign-extension operation that just affects bits
        !          5934:         we don't care about, remove it.  Be sure the call above returned
        !          5935:         something that is still a shift.  */
        !          5936: 
        !          5937:       if ((GET_CODE (x) == LSHIFTRT || GET_CODE (x) == ASHIFTRT)
        !          5938:          && GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5939:          && INTVAL (XEXP (x, 1)) >= 0
        !          5940:          && (INTVAL (XEXP (x, 1))
        !          5941:              <= GET_MODE_BITSIZE (GET_MODE (x)) - (floor_log2 (mask) + 1))
        !          5942:          && GET_CODE (XEXP (x, 0)) == ASHIFT
        !          5943:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          5944:          && INTVAL (XEXP (XEXP (x, 0), 1)) == INTVAL (XEXP (x, 1)))
        !          5945:        return force_to_mode (XEXP (XEXP (x, 0), 0), mode, mask,
        !          5946:                              reg, next_select);
        !          5947: 
        !          5948:       break;
        !          5949: 
        !          5950:     case ROTATE:
        !          5951:     case ROTATERT:
        !          5952:       /* If the shift count is constant and we can do computations
        !          5953:         in the mode of X, compute where the bits we care about are.
        !          5954:         Otherwise, we can't do anything.  Don't change the mode of
        !          5955:         the shift or propagate MODE into the shift, though.  */
        !          5956:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          5957:          && INTVAL (XEXP (x, 1)) >= 0)
        !          5958:        {
        !          5959:          temp = simplify_binary_operation (code == ROTATE ? ROTATERT : ROTATE,
        !          5960:                                            GET_MODE (x), GEN_INT (mask),
        !          5961:                                            XEXP (x, 1));
        !          5962:          if (temp)
        !          5963:            SUBST (XEXP (x, 0),
        !          5964:                   force_to_mode (XEXP (x, 0), GET_MODE (x),
        !          5965:                                  INTVAL (temp), reg, next_select));
        !          5966:        }
        !          5967:       break;
        !          5968:        
        !          5969:     case NEG:
        !          5970:       /* We need any bits less significant than the most significant bit in
        !          5971:         MASK since carries from those bits will affect the bits we are
        !          5972:         interested in.  */
        !          5973:       mask = fuller_mask;
        !          5974:       goto unop;
        !          5975: 
        !          5976:     case NOT:
        !          5977:       /* (not FOO) is (xor FOO CONST), so if FOO is an LSHIFTRT, we can do the
        !          5978:         same as the XOR case above.  Ensure that the constant we form is not
        !          5979:         wider than the mode of X.  */
        !          5980: 
        !          5981:       if (GET_CODE (XEXP (x, 0)) == LSHIFTRT
        !          5982:          && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
        !          5983:          && INTVAL (XEXP (XEXP (x, 0), 1)) >= 0
        !          5984:          && (INTVAL (XEXP (XEXP (x, 0), 1)) + floor_log2 (mask)
        !          5985:              < GET_MODE_BITSIZE (GET_MODE (x)))
        !          5986:          && INTVAL (XEXP (XEXP (x, 0), 1)) < HOST_BITS_PER_WIDE_INT)
        !          5987:        {
        !          5988:          temp = GEN_INT (mask << INTVAL (XEXP (XEXP (x, 0), 1)));
        !          5989:          temp = gen_binary (XOR, GET_MODE (x), XEXP (XEXP (x, 0), 0), temp);
        !          5990:          x = gen_binary (LSHIFTRT, GET_MODE (x), temp, XEXP (XEXP (x, 0), 1));
        !          5991: 
        !          5992:          return force_to_mode (x, mode, mask, reg, next_select);
        !          5993:        }
        !          5994: 
        !          5995:     unop:
        !          5996:       op0 = gen_lowpart_for_combine (op_mode,
        !          5997:                                     force_to_mode (XEXP (x, 0), mode, mask,
        !          5998:                                                    reg, next_select));
        !          5999:       if (op_mode != GET_MODE (x) || op0 != XEXP (x, 0))
        !          6000:        x = gen_unary (code, op_mode, op0);
        !          6001:       break;
        !          6002: 
        !          6003:     case NE:
        !          6004:       /* (and (ne FOO 0) CONST) can be (and FOO CONST) if CONST is included
        !          6005:         in STORE_FLAG_VALUE and FOO has no bits that might be nonzero not
        !          6006:         in CONST.  */
        !          6007:       if ((mask & ~ STORE_FLAG_VALUE) == 0 && XEXP (x, 0) == const0_rtx
        !          6008:          && (nonzero_bits (XEXP (x, 0), mode) & ~ mask) == 0)
        !          6009:        return force_to_mode (XEXP (x, 0), mode, mask, reg, next_select);
        !          6010: 
        !          6011:       break;
        !          6012: 
        !          6013:     case IF_THEN_ELSE:
        !          6014:       /* We have no way of knowing if the IF_THEN_ELSE can itself be
        !          6015:         written in a narrower mode.  We play it safe and do not do so.  */
        !          6016: 
        !          6017:       SUBST (XEXP (x, 1),
        !          6018:             gen_lowpart_for_combine (GET_MODE (x),
        !          6019:                                      force_to_mode (XEXP (x, 1), mode,
        !          6020:                                                     mask, reg, next_select)));
        !          6021:       SUBST (XEXP (x, 2),
        !          6022:             gen_lowpart_for_combine (GET_MODE (x),
        !          6023:                                      force_to_mode (XEXP (x, 2), mode,
        !          6024:                                                     mask, reg,next_select)));
        !          6025:       break;
        !          6026:     }
        !          6027: 
        !          6028:   /* Ensure we return a value of the proper mode.  */
        !          6029:   return gen_lowpart_for_combine (mode, x);
        !          6030: }
        !          6031: 
        !          6032: /* Return the value of expression X given the fact that condition COND
        !          6033:    is known to be true when applied to REG as its first operand and VAL
        !          6034:    as its second.  X is known to not be shared and so can be modified in
        !          6035:    place.
        !          6036: 
        !          6037:    We only handle the simplest cases, and specifically those cases that
        !          6038:    arise with IF_THEN_ELSE expressions.  */
        !          6039: 
        !          6040: static rtx
        !          6041: known_cond (x, cond, reg, val)
        !          6042:      rtx x;
        !          6043:      enum rtx_code cond;
        !          6044:      rtx reg, val;
        !          6045: {
        !          6046:   enum rtx_code code = GET_CODE (x);
        !          6047:   rtx new, temp;
        !          6048:   char *fmt;
        !          6049:   int i, j;
        !          6050: 
        !          6051:   if (side_effects_p (x))
        !          6052:     return x;
        !          6053: 
        !          6054:   if (cond == EQ && rtx_equal_p (x, reg))
        !          6055:     return val;
        !          6056: 
        !          6057:   /* If X is (abs REG) and we know something about REG's relationship
        !          6058:      with zero, we may be able to simplify this.  */
        !          6059: 
        !          6060:   if (code == ABS && rtx_equal_p (XEXP (x, 0), reg) && val == const0_rtx)
        !          6061:     switch (cond)
        !          6062:       {
        !          6063:       case GE:  case GT:  case EQ:
        !          6064:        return XEXP (x, 0);
        !          6065:       case LT:  case LE:
        !          6066:        return gen_unary (NEG, GET_MODE (XEXP (x, 0)), XEXP (x, 0));
        !          6067:       }
        !          6068: 
        !          6069:   /* The only other cases we handle are MIN, MAX, and comparisons if the
        !          6070:      operands are the same as REG and VAL.  */
        !          6071: 
        !          6072:   else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == 'c')
        !          6073:     {
        !          6074:       if (rtx_equal_p (XEXP (x, 0), val))
        !          6075:        cond = swap_condition (cond), temp = val, val = reg, reg = temp;
        !          6076: 
        !          6077:       if (rtx_equal_p (XEXP (x, 0), reg) && rtx_equal_p (XEXP (x, 1), val))
        !          6078:        {
        !          6079:          if (GET_RTX_CLASS (code) == '<')
        !          6080:            return (comparison_dominates_p (cond, code) ? const_true_rtx
        !          6081:                    : (comparison_dominates_p (cond,
        !          6082:                                               reverse_condition (code))
        !          6083:                       ? const0_rtx : x));
        !          6084: 
        !          6085:          else if (code == SMAX || code == SMIN
        !          6086:                   || code == UMIN || code == UMAX)
        !          6087:            {
        !          6088:              int unsignedp = (code == UMIN || code == UMAX);
        !          6089: 
        !          6090:              if (code == SMAX || code == UMAX)
        !          6091:                cond = reverse_condition (cond);
        !          6092: 
        !          6093:              switch (cond)
        !          6094:                {
        !          6095:                case GE:   case GT:
        !          6096:                  return unsignedp ? x : XEXP (x, 1);
        !          6097:                case LE:   case LT:
        !          6098:                  return unsignedp ? x : XEXP (x, 0);
        !          6099:                case GEU:  case GTU:
        !          6100:                  return unsignedp ? XEXP (x, 1) : x;
        !          6101:                case LEU:  case LTU:
        !          6102:                  return unsignedp ? XEXP (x, 0) : x;
        !          6103:                }
        !          6104:            }
        !          6105:        }
        !          6106:     }
        !          6107: 
        !          6108:   fmt = GET_RTX_FORMAT (code);
        !          6109:   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
        !          6110:     {
        !          6111:       if (fmt[i] == 'e')
        !          6112:        SUBST (XEXP (x, i), known_cond (XEXP (x, i), cond, reg, val));
        !          6113:       else if (fmt[i] == 'E')
        !          6114:        for (j = XVECLEN (x, i) - 1; j >= 0; j--)
        !          6115:          SUBST (XVECEXP (x, i, j), known_cond (XVECEXP (x, i, j),
        !          6116:                                                cond, reg, val));
        !          6117:     }
        !          6118: 
        !          6119:   return x;
        !          6120: }
        !          6121: 
        !          6122: /* See if X, a SET operation, can be rewritten as a bit-field assignment.
        !          6123:    Return that assignment if so.
        !          6124: 
        !          6125:    We only handle the most common cases.  */
        !          6126: 
        !          6127: static rtx
        !          6128: make_field_assignment (x)
        !          6129:      rtx x;
        !          6130: {
        !          6131:   rtx dest = SET_DEST (x);
        !          6132:   rtx src = SET_SRC (x);
        !          6133:   rtx ourdest;
        !          6134:   rtx assign;
        !          6135:   HOST_WIDE_INT c1;
        !          6136:   int pos, len;
        !          6137:   rtx other;
        !          6138:   enum machine_mode mode;
        !          6139: 
        !          6140:   /* If SRC was (and (not (ashift (const_int 1) POS)) DEST), this is
        !          6141:      a clear of a one-bit field.  We will have changed it to
        !          6142:      (and (rotate (const_int -2) POS) DEST), so check for that.  Also check
        !          6143:      for a SUBREG.  */
        !          6144: 
        !          6145:   if (GET_CODE (src) == AND && GET_CODE (XEXP (src, 0)) == ROTATE
        !          6146:       && GET_CODE (XEXP (XEXP (src, 0), 0)) == CONST_INT
        !          6147:       && INTVAL (XEXP (XEXP (src, 0), 0)) == -2
        !          6148:       && (rtx_equal_p (dest, XEXP (src, 1))
        !          6149:          || rtx_equal_p (dest, get_last_value (XEXP (src, 1)))
        !          6150:          || rtx_equal_p (get_last_value (dest), XEXP (src, 1))))
        !          6151:     {
        !          6152:       assign = make_extraction (VOIDmode, dest, 0, XEXP (XEXP (src, 0), 1),
        !          6153:                                1, 1, 1, 0);
        !          6154:       return gen_rtx (SET, VOIDmode, assign, const0_rtx);
        !          6155:     }
        !          6156: 
        !          6157:   else if (GET_CODE (src) == AND && GET_CODE (XEXP (src, 0)) == SUBREG
        !          6158:           && subreg_lowpart_p (XEXP (src, 0))
        !          6159:           && (GET_MODE_SIZE (GET_MODE (XEXP (src, 0))) 
        !          6160:               < GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (src, 0)))))
        !          6161:           && GET_CODE (SUBREG_REG (XEXP (src, 0))) == ROTATE
        !          6162:           && INTVAL (XEXP (SUBREG_REG (XEXP (src, 0)), 0)) == -2
        !          6163:           && (rtx_equal_p (dest, XEXP (src, 1))
        !          6164:               || rtx_equal_p (dest, get_last_value (XEXP (src, 1)))
        !          6165:               || rtx_equal_p (get_last_value (dest), XEXP (src, 1))))
        !          6166:     {
        !          6167:       assign = make_extraction (VOIDmode, dest, 0,
        !          6168:                                XEXP (SUBREG_REG (XEXP (src, 0)), 1),
        !          6169:                                1, 1, 1, 0);
        !          6170:       return gen_rtx (SET, VOIDmode, assign, const0_rtx);
        !          6171:     }
        !          6172: 
        !          6173:   /* If SRC is (ior (ashift (const_int 1) POS DEST)), this is a set of a
        !          6174:      one-bit field.  */
        !          6175:   else if (GET_CODE (src) == IOR && GET_CODE (XEXP (src, 0)) == ASHIFT
        !          6176:           && XEXP (XEXP (src, 0), 0) == const1_rtx
        !          6177:           && (rtx_equal_p (dest, XEXP (src, 1))
        !          6178:               || rtx_equal_p (dest, get_last_value (XEXP (src, 1)))
        !          6179:               || rtx_equal_p (get_last_value (dest), XEXP (src, 1))))
        !          6180:     {
        !          6181:       assign = make_extraction (VOIDmode, dest, 0, XEXP (XEXP (src, 0), 1),
        !          6182:                                1, 1, 1, 0);
        !          6183:       return gen_rtx (SET, VOIDmode, assign, const1_rtx);
        !          6184:     }
        !          6185: 
        !          6186:   /* The other case we handle is assignments into a constant-position
        !          6187:      field.  They look like (ior (and DEST C1) OTHER).  If C1 represents
        !          6188:      a mask that has all one bits except for a group of zero bits and
        !          6189:      OTHER is known to have zeros where C1 has ones, this is such an
        !          6190:      assignment.  Compute the position and length from C1.  Shift OTHER
        !          6191:      to the appropriate position, force it to the required mode, and
        !          6192:      make the extraction.  Check for the AND in both operands.  */
        !          6193: 
        !          6194:   if (GET_CODE (src) == IOR && GET_CODE (XEXP (src, 0)) == AND
        !          6195:       && GET_CODE (XEXP (XEXP (src, 0), 1)) == CONST_INT
        !          6196:       && (rtx_equal_p (XEXP (XEXP (src, 0), 0), dest)
        !          6197:          || rtx_equal_p (XEXP (XEXP (src, 0), 0), get_last_value (dest))
        !          6198:          || rtx_equal_p (get_last_value (XEXP (XEXP (src, 0), 1)), dest)))
        !          6199:     c1 = INTVAL (XEXP (XEXP (src, 0), 1)), other = XEXP (src, 1);
        !          6200:   else if (GET_CODE (src) == IOR && GET_CODE (XEXP (src, 1)) == AND
        !          6201:           && GET_CODE (XEXP (XEXP (src, 1), 1)) == CONST_INT
        !          6202:           && (rtx_equal_p (XEXP (XEXP (src, 1), 0), dest)
        !          6203:               || rtx_equal_p (XEXP (XEXP (src, 1), 0), get_last_value (dest))
        !          6204:               || rtx_equal_p (get_last_value (XEXP (XEXP (src, 1), 0)),
        !          6205:                               dest)))
        !          6206:     c1 = INTVAL (XEXP (XEXP (src, 1), 1)), other = XEXP (src, 0);
        !          6207:   else
        !          6208:     return x;
        !          6209: 
        !          6210:   pos = get_pos_from_mask (c1 ^ GET_MODE_MASK (GET_MODE (dest)), &len);
        !          6211:   if (pos < 0 || pos + len > GET_MODE_BITSIZE (GET_MODE (dest))
        !          6212:       || (GET_MODE_BITSIZE (GET_MODE (other)) <= HOST_BITS_PER_WIDE_INT
        !          6213:          && (c1 & nonzero_bits (other, GET_MODE (other))) != 0))
        !          6214:     return x;
        !          6215: 
        !          6216:   assign = make_extraction (VOIDmode, dest, pos, NULL_RTX, len, 1, 1, 0);
        !          6217: 
        !          6218:   /* The mode to use for the source is the mode of the assignment, or of
        !          6219:      what is inside a possible STRICT_LOW_PART.  */
        !          6220:   mode = (GET_CODE (assign) == STRICT_LOW_PART 
        !          6221:          ? GET_MODE (XEXP (assign, 0)) : GET_MODE (assign));
        !          6222: 
        !          6223:   /* Shift OTHER right POS places and make it the source, restricting it
        !          6224:      to the proper length and mode.  */
        !          6225: 
        !          6226:   src = force_to_mode (simplify_shift_const (NULL_RTX, LSHIFTRT,
        !          6227:                                             GET_MODE (src), other, pos),
        !          6228:                       mode,
        !          6229:                       GET_MODE_BITSIZE (mode) >= HOST_BITS_PER_WIDE_INT
        !          6230:                       ? GET_MODE_MASK (mode)
        !          6231:                       : ((HOST_WIDE_INT) 1 << len) - 1,
        !          6232:                       dest, 0);
        !          6233: 
        !          6234:   return gen_rtx_combine (SET, VOIDmode, assign, src);
        !          6235: }
        !          6236: 
        !          6237: /* See if X is of the form (+ (* a c) (* b c)) and convert to (* (+ a b) c)
        !          6238:    if so.  */
        !          6239: 
        !          6240: static rtx
        !          6241: apply_distributive_law (x)
        !          6242:      rtx x;
        !          6243: {
        !          6244:   enum rtx_code code = GET_CODE (x);
        !          6245:   rtx lhs, rhs, other;
        !          6246:   rtx tem;
        !          6247:   enum rtx_code inner_code;
        !          6248: 
        !          6249:   /* Distributivity is not true for floating point.
        !          6250:      It can change the value.  So don't do it.
        !          6251:      -- rms and [email protected].  */
        !          6252:   if (FLOAT_MODE_P (GET_MODE (x)))
        !          6253:     return x;
        !          6254: 
        !          6255:   /* The outer operation can only be one of the following:  */
        !          6256:   if (code != IOR && code != AND && code != XOR
        !          6257:       && code != PLUS && code != MINUS)
        !          6258:     return x;
        !          6259: 
        !          6260:   lhs = XEXP (x, 0), rhs = XEXP (x, 1);
        !          6261: 
        !          6262:   /* If either operand is a primitive we can't do anything, so get out fast. */
        !          6263:   if (GET_RTX_CLASS (GET_CODE (lhs)) == 'o'
        !          6264:       || GET_RTX_CLASS (GET_CODE (rhs)) == 'o')
        !          6265:     return x;
        !          6266: 
        !          6267:   lhs = expand_compound_operation (lhs);
        !          6268:   rhs = expand_compound_operation (rhs);
        !          6269:   inner_code = GET_CODE (lhs);
        !          6270:   if (inner_code != GET_CODE (rhs))
        !          6271:     return x;
        !          6272: 
        !          6273:   /* See if the inner and outer operations distribute.  */
        !          6274:   switch (inner_code)
        !          6275:     {
        !          6276:     case LSHIFTRT:
        !          6277:     case ASHIFTRT:
        !          6278:     case AND:
        !          6279:     case IOR:
        !          6280:       /* These all distribute except over PLUS.  */
        !          6281:       if (code == PLUS || code == MINUS)
        !          6282:        return x;
        !          6283:       break;
        !          6284: 
        !          6285:     case MULT:
        !          6286:       if (code != PLUS && code != MINUS)
        !          6287:        return x;
        !          6288:       break;
        !          6289: 
        !          6290:     case ASHIFT:
        !          6291:     case LSHIFT:
        !          6292:       /* These are also multiplies, so they distribute over everything.  */
        !          6293:       break;
        !          6294: 
        !          6295:     case SUBREG:
        !          6296:       /* Non-paradoxical SUBREGs distributes over all operations, provided
        !          6297:         the inner modes and word numbers are the same, this is an extraction
        !          6298:         of a low-order part, we don't convert an fp operation to int or
        !          6299:         vice versa, and we would not be converting a single-word
        !          6300:         operation into a multi-word operation.  The latter test is not
        !          6301:         required, but it prevents generating unneeded multi-word operations.
        !          6302:         Some of the previous tests are redundant given the latter test, but
        !          6303:         are retained because they are required for correctness.
        !          6304: 
        !          6305:         We produce the result slightly differently in this case.  */
        !          6306: 
        !          6307:       if (GET_MODE (SUBREG_REG (lhs)) != GET_MODE (SUBREG_REG (rhs))
        !          6308:          || SUBREG_WORD (lhs) != SUBREG_WORD (rhs)
        !          6309:          || ! subreg_lowpart_p (lhs)
        !          6310:          || (GET_MODE_CLASS (GET_MODE (lhs))
        !          6311:              != GET_MODE_CLASS (GET_MODE (SUBREG_REG (lhs))))
        !          6312:          || (GET_MODE_SIZE (GET_MODE (lhs))
        !          6313:              < GET_MODE_SIZE (GET_MODE (SUBREG_REG (lhs))))
        !          6314:          || GET_MODE_SIZE (GET_MODE (SUBREG_REG (lhs))) > UNITS_PER_WORD)
        !          6315:        return x;
        !          6316: 
        !          6317:       tem = gen_binary (code, GET_MODE (SUBREG_REG (lhs)),
        !          6318:                        SUBREG_REG (lhs), SUBREG_REG (rhs));
        !          6319:       return gen_lowpart_for_combine (GET_MODE (x), tem);
        !          6320: 
        !          6321:     default:
        !          6322:       return x;
        !          6323:     }
        !          6324: 
        !          6325:   /* Set LHS and RHS to the inner operands (A and B in the example
        !          6326:      above) and set OTHER to the common operand (C in the example).
        !          6327:      These is only one way to do this unless the inner operation is
        !          6328:      commutative.  */
        !          6329:   if (GET_RTX_CLASS (inner_code) == 'c'
        !          6330:       && rtx_equal_p (XEXP (lhs, 0), XEXP (rhs, 0)))
        !          6331:     other = XEXP (lhs, 0), lhs = XEXP (lhs, 1), rhs = XEXP (rhs, 1);
        !          6332:   else if (GET_RTX_CLASS (inner_code) == 'c'
        !          6333:           && rtx_equal_p (XEXP (lhs, 0), XEXP (rhs, 1)))
        !          6334:     other = XEXP (lhs, 0), lhs = XEXP (lhs, 1), rhs = XEXP (rhs, 0);
        !          6335:   else if (GET_RTX_CLASS (inner_code) == 'c'
        !          6336:           && rtx_equal_p (XEXP (lhs, 1), XEXP (rhs, 0)))
        !          6337:     other = XEXP (lhs, 1), lhs = XEXP (lhs, 0), rhs = XEXP (rhs, 1);
        !          6338:   else if (rtx_equal_p (XEXP (lhs, 1), XEXP (rhs, 1)))
        !          6339:     other = XEXP (lhs, 1), lhs = XEXP (lhs, 0), rhs = XEXP (rhs, 0);
        !          6340:   else
        !          6341:     return x;
        !          6342: 
        !          6343:   /* Form the new inner operation, seeing if it simplifies first.  */
        !          6344:   tem = gen_binary (code, GET_MODE (x), lhs, rhs);
        !          6345: 
        !          6346:   /* There is one exception to the general way of distributing:
        !          6347:      (a ^ b) | (a ^ c) -> (~a) & (b ^ c)  */
        !          6348:   if (code == XOR && inner_code == IOR)
        !          6349:     {
        !          6350:       inner_code = AND;
        !          6351:       other = gen_unary (NOT, GET_MODE (x), other);
        !          6352:     }
        !          6353: 
        !          6354:   /* We may be able to continuing distributing the result, so call
        !          6355:      ourselves recursively on the inner operation before forming the
        !          6356:      outer operation, which we return.  */
        !          6357:   return gen_binary (inner_code, GET_MODE (x),
        !          6358:                     apply_distributive_law (tem), other);
        !          6359: }
        !          6360: 
        !          6361: /* We have X, a logical `and' of VAROP with the constant CONSTOP, to be done
        !          6362:    in MODE.
        !          6363: 
        !          6364:    Return an equivalent form, if different from X.  Otherwise, return X.  If
        !          6365:    X is zero, we are to always construct the equivalent form.  */
        !          6366: 
        !          6367: static rtx
        !          6368: simplify_and_const_int (x, mode, varop, constop)
        !          6369:      rtx x;
        !          6370:      enum machine_mode mode;
        !          6371:      rtx varop;
        !          6372:      unsigned HOST_WIDE_INT constop;
        !          6373: {
        !          6374:   register enum machine_mode tmode;
        !          6375:   register rtx temp;
        !          6376:   unsigned HOST_WIDE_INT nonzero;
        !          6377:   int i;
        !          6378: 
        !          6379:   /* Simplify VAROP knowing that we will be only looking at some of the
        !          6380:      bits in it.  */
        !          6381:   varop = force_to_mode (varop, mode, constop, NULL_RTX, 0);
        !          6382: 
        !          6383:   /* If VAROP is a CLOBBER, we will fail so return it; if it is a
        !          6384:      CONST_INT, we are done.  */
        !          6385:   if (GET_CODE (varop) == CLOBBER || GET_CODE (varop) == CONST_INT)
        !          6386:     return varop;
        !          6387: 
        !          6388:   /* See what bits may be nonzero in VAROP.  Unlike the general case of
        !          6389:      a call to nonzero_bits, here we don't care about bits outside
        !          6390:      MODE.  */
        !          6391: 
        !          6392:   nonzero = nonzero_bits (varop, mode) & GET_MODE_MASK (mode);
        !          6393: 
        !          6394:   /* Turn off all bits in the constant that are known to already be zero.
        !          6395:      Thus, if the AND isn't needed at all, we will have CONSTOP == NONZERO_BITS
        !          6396:      which is tested below.  */
        !          6397: 
        !          6398:   constop &= nonzero;
        !          6399: 
        !          6400:   /* If we don't have any bits left, return zero.  */
        !          6401:   if (constop == 0)
        !          6402:     return const0_rtx;
        !          6403: 
        !          6404:   /* If VAROP is a NEG of something known to be zero or 1 and CONSTOP is
        !          6405:      a power of two, we can replace this with a ASHIFT.  */
        !          6406:   if (GET_CODE (varop) == NEG && nonzero_bits (XEXP (varop, 0), mode) == 1
        !          6407:       && (i = exact_log2 (constop)) >= 0)
        !          6408:     return simplify_shift_const (NULL_RTX, ASHIFT, mode, XEXP (varop, 0), i);
        !          6409:                                 
        !          6410:   /* If VAROP is an IOR or XOR, apply the AND to both branches of the IOR
        !          6411:      or XOR, then try to apply the distributive law.  This may eliminate
        !          6412:      operations if either branch can be simplified because of the AND.
        !          6413:      It may also make some cases more complex, but those cases probably
        !          6414:      won't match a pattern either with or without this.  */
        !          6415: 
        !          6416:   if (GET_CODE (varop) == IOR || GET_CODE (varop) == XOR)
        !          6417:     return
        !          6418:       gen_lowpart_for_combine
        !          6419:        (mode,
        !          6420:         apply_distributive_law
        !          6421:         (gen_binary (GET_CODE (varop), GET_MODE (varop),
        !          6422:                      simplify_and_const_int (NULL_RTX, GET_MODE (varop),
        !          6423:                                              XEXP (varop, 0), constop),
        !          6424:                      simplify_and_const_int (NULL_RTX, GET_MODE (varop),
        !          6425:                                              XEXP (varop, 1), constop))));
        !          6426: 
        !          6427:   /* Get VAROP in MODE.  Try to get a SUBREG if not.  Don't make a new SUBREG
        !          6428:      if we already had one (just check for the simplest cases).  */
        !          6429:   if (x && GET_CODE (XEXP (x, 0)) == SUBREG
        !          6430:       && GET_MODE (XEXP (x, 0)) == mode
        !          6431:       && SUBREG_REG (XEXP (x, 0)) == varop)
        !          6432:     varop = XEXP (x, 0);
        !          6433:   else
        !          6434:     varop = gen_lowpart_for_combine (mode, varop);
        !          6435: 
        !          6436:   /* If we can't make the SUBREG, try to return what we were given. */
        !          6437:   if (GET_CODE (varop) == CLOBBER)
        !          6438:     return x ? x : varop;
        !          6439: 
        !          6440:   /* If we are only masking insignificant bits, return VAROP.  */
        !          6441:   if (constop == nonzero)
        !          6442:     x = varop;
        !          6443: 
        !          6444:   /* Otherwise, return an AND.  See how much, if any, of X we can use.  */
        !          6445:   else if (x == 0 || GET_CODE (x) != AND || GET_MODE (x) != mode)
        !          6446:     x = gen_binary (AND, mode, varop, GEN_INT (constop));
        !          6447: 
        !          6448:   else
        !          6449:     {
        !          6450:       if (GET_CODE (XEXP (x, 1)) != CONST_INT
        !          6451:          || INTVAL (XEXP (x, 1)) != constop)
        !          6452:        SUBST (XEXP (x, 1), GEN_INT (constop));
        !          6453: 
        !          6454:       SUBST (XEXP (x, 0), varop);
        !          6455:     }
        !          6456: 
        !          6457:   return x;
        !          6458: }
        !          6459: 
        !          6460: /* Given an expression, X, compute which bits in X can be non-zero.
        !          6461:    We don't care about bits outside of those defined in MODE.
        !          6462: 
        !          6463:    For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
        !          6464:    a shift, AND, or zero_extract, we can do better.  */
        !          6465: 
        !          6466: static unsigned HOST_WIDE_INT
        !          6467: nonzero_bits (x, mode)
        !          6468:      rtx x;
        !          6469:      enum machine_mode mode;
        !          6470: {
        !          6471:   unsigned HOST_WIDE_INT nonzero = GET_MODE_MASK (mode);
        !          6472:   unsigned HOST_WIDE_INT inner_nz;
        !          6473:   enum rtx_code code;
        !          6474:   int mode_width = GET_MODE_BITSIZE (mode);
        !          6475:   rtx tem;
        !          6476: 
        !          6477:   /* If X is wider than MODE, use its mode instead.  */
        !          6478:   if (GET_MODE_BITSIZE (GET_MODE (x)) > mode_width)
        !          6479:     {
        !          6480:       mode = GET_MODE (x);
        !          6481:       nonzero = GET_MODE_MASK (mode);
        !          6482:       mode_width = GET_MODE_BITSIZE (mode);
        !          6483:     }
        !          6484: 
        !          6485:   if (mode_width > HOST_BITS_PER_WIDE_INT)
        !          6486:     /* Our only callers in this case look for single bit values.  So
        !          6487:        just return the mode mask.  Those tests will then be false.  */
        !          6488:     return nonzero;
        !          6489: 
        !          6490: #ifndef WORD_REGISTER_OPERATIONS
        !          6491:   /* If MODE is wider than X, but both are a single word for both the host
        !          6492:      and target machines, we can compute this from which bits of the 
        !          6493:      object might be nonzero in its own mode, taking into account the fact
        !          6494:      that on many CISC machines, accessing an object in a wider mode
        !          6495:      causes the high-order bits to become undefined.  So they are
        !          6496:      not known to be zero.  */
        !          6497: 
        !          6498:   if (GET_MODE (x) != VOIDmode && GET_MODE (x) != mode
        !          6499:       && GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD
        !          6500:       && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT
        !          6501:       && GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (GET_MODE (x)))
        !          6502:     {
        !          6503:       nonzero &= nonzero_bits (x, GET_MODE (x));
        !          6504:       nonzero |= GET_MODE_MASK (mode) & ~ GET_MODE_MASK (GET_MODE (x));
        !          6505:       return nonzero;
        !          6506:     }
        !          6507: #endif
        !          6508: 
        !          6509:   code = GET_CODE (x);
        !          6510:   switch (code)
        !          6511:     {
        !          6512:     case REG:
        !          6513: #ifdef STACK_BOUNDARY
        !          6514:       /* If this is the stack pointer, we may know something about its
        !          6515:         alignment.  If PUSH_ROUNDING is defined, it is possible for the
        !          6516:         stack to be momentarily aligned only to that amount, so we pick
        !          6517:         the least alignment.  */
        !          6518: 
        !          6519:       if (x == stack_pointer_rtx)
        !          6520:        {
        !          6521:          int sp_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
        !          6522: 
        !          6523: #ifdef PUSH_ROUNDING
        !          6524:          sp_alignment = MIN (PUSH_ROUNDING (1), sp_alignment);
        !          6525: #endif
        !          6526: 
        !          6527:          return nonzero & ~ (sp_alignment - 1);
        !          6528:        }
        !          6529: #endif
        !          6530: 
        !          6531:       /* If X is a register whose nonzero bits value is current, use it.
        !          6532:         Otherwise, if X is a register whose value we can find, use that
        !          6533:         value.  Otherwise, use the previously-computed global nonzero bits
        !          6534:         for this register.  */
        !          6535: 
        !          6536:       if (reg_last_set_value[REGNO (x)] != 0
        !          6537:          && reg_last_set_mode[REGNO (x)] == mode
        !          6538:          && (reg_n_sets[REGNO (x)] == 1
        !          6539:              || reg_last_set_label[REGNO (x)] == label_tick)
        !          6540:          && INSN_CUID (reg_last_set[REGNO (x)]) < subst_low_cuid)
        !          6541:        return reg_last_set_nonzero_bits[REGNO (x)];
        !          6542: 
        !          6543:       tem = get_last_value (x);
        !          6544: 
        !          6545:       if (tem)
        !          6546:        {
        !          6547: #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
        !          6548:          /* If X is narrower than MODE and TEM is a non-negative
        !          6549:             constant that would appear negative in the mode of X,
        !          6550:             sign-extend it for use in reg_nonzero_bits because some
        !          6551:             machines (maybe most) will actually do the sign-extension
        !          6552:             and this is the conservative approach. 
        !          6553: 
        !          6554:             ??? For 2.5, try to tighten up the MD files in this regard
        !          6555:             instead of this kludge.  */
        !          6556: 
        !          6557:          if (GET_MODE_BITSIZE (GET_MODE (x)) < mode_width
        !          6558:              && GET_CODE (tem) == CONST_INT
        !          6559:              && INTVAL (tem) > 0
        !          6560:              && 0 != (INTVAL (tem)
        !          6561:                       & ((HOST_WIDE_INT) 1
        !          6562:                          << GET_MODE_BITSIZE (GET_MODE (x)))))
        !          6563:            tem = GEN_INT (INTVAL (tem)
        !          6564:                           | ((HOST_WIDE_INT) (-1)
        !          6565:                              << GET_MODE_BITSIZE (GET_MODE (x))));
        !          6566: #endif
        !          6567:          return nonzero_bits (tem, mode);
        !          6568:        }
        !          6569:       else if (nonzero_sign_valid && reg_nonzero_bits[REGNO (x)])
        !          6570:        return reg_nonzero_bits[REGNO (x)] & nonzero;
        !          6571:       else
        !          6572:        return nonzero;
        !          6573: 
        !          6574:     case CONST_INT:
        !          6575: #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
        !          6576:       /* If X is negative in MODE, sign-extend the value.  */
        !          6577:       if (INTVAL (x) > 0
        !          6578:          && 0 != (INTVAL (x)
        !          6579:                   & ((HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (GET_MODE (x)))))
        !          6580:        return (INTVAL (x)
        !          6581:                | ((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (GET_MODE (x))));
        !          6582: #endif
        !          6583: 
        !          6584:       return INTVAL (x);
        !          6585: 
        !          6586:     case MEM:
        !          6587: #ifdef LOAD_EXTEND_OP
        !          6588:       /* In many, if not most, RISC machines, reading a byte from memory
        !          6589:         zeros the rest of the register.  Noticing that fact saves a lot
        !          6590:         of extra zero-extends.  */
        !          6591:       if (LOAD_EXTEND_OP (GET_MODE (x)) == ZERO_EXTEND)
        !          6592:        nonzero &= GET_MODE_MASK (GET_MODE (x));
        !          6593: #endif
        !          6594:       break;
        !          6595: 
        !          6596:     case EQ:  case NE:
        !          6597:     case GT:  case GTU:
        !          6598:     case LT:  case LTU:
        !          6599:     case GE:  case GEU:
        !          6600:     case LE:  case LEU:
        !          6601: 
        !          6602:       /* If this produces an integer result, we know which bits are set.
        !          6603:         Code here used to clear bits outside the mode of X, but that is
        !          6604:         now done above.  */
        !          6605: 
        !          6606:       if (GET_MODE_CLASS (mode) == MODE_INT
        !          6607:          && mode_width <= HOST_BITS_PER_WIDE_INT)
        !          6608:        nonzero = STORE_FLAG_VALUE;
        !          6609:       break;
        !          6610: 
        !          6611:     case NEG:
        !          6612:       if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
        !          6613:          == GET_MODE_BITSIZE (GET_MODE (x)))
        !          6614:        nonzero = 1;
        !          6615: 
        !          6616:       if (GET_MODE_SIZE (GET_MODE (x)) < mode_width)
        !          6617:        nonzero |= (GET_MODE_MASK (mode) & ~ GET_MODE_MASK (GET_MODE (x)));
        !          6618:       break;
        !          6619: 
        !          6620:     case ABS:
        !          6621:       if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
        !          6622:          == GET_MODE_BITSIZE (GET_MODE (x)))
        !          6623:        nonzero = 1;
        !          6624:       break;
        !          6625: 
        !          6626:     case TRUNCATE:
        !          6627:       nonzero &= (nonzero_bits (XEXP (x, 0), mode) & GET_MODE_MASK (mode));
        !          6628:       break;
        !          6629: 
        !          6630:     case ZERO_EXTEND:
        !          6631:       nonzero &= nonzero_bits (XEXP (x, 0), mode);
        !          6632:       if (GET_MODE (XEXP (x, 0)) != VOIDmode)
        !          6633:        nonzero &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
        !          6634:       break;
        !          6635: 
        !          6636:     case SIGN_EXTEND:
        !          6637:       /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
        !          6638:         Otherwise, show all the bits in the outer mode but not the inner
        !          6639:         may be non-zero.  */
        !          6640:       inner_nz = nonzero_bits (XEXP (x, 0), mode);
        !          6641:       if (GET_MODE (XEXP (x, 0)) != VOIDmode)
        !          6642:        {
        !          6643:          inner_nz &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
        !          6644:          if (inner_nz &
        !          6645:              (((HOST_WIDE_INT) 1
        !          6646:                << (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - 1))))
        !          6647:            inner_nz |= (GET_MODE_MASK (mode)
        !          6648:                          & ~ GET_MODE_MASK (GET_MODE (XEXP (x, 0))));
        !          6649:        }
        !          6650: 
        !          6651:       nonzero &= inner_nz;
        !          6652:       break;
        !          6653: 
        !          6654:     case AND:
        !          6655:       nonzero &= (nonzero_bits (XEXP (x, 0), mode)
        !          6656:                  & nonzero_bits (XEXP (x, 1), mode));
        !          6657:       break;
        !          6658: 
        !          6659:     case XOR:   case IOR:
        !          6660:     case UMIN:  case UMAX:  case SMIN:  case SMAX:
        !          6661:       nonzero &= (nonzero_bits (XEXP (x, 0), mode)
        !          6662:                  | nonzero_bits (XEXP (x, 1), mode));
        !          6663:       break;
        !          6664: 
        !          6665:     case PLUS:  case MINUS:
        !          6666:     case MULT:
        !          6667:     case DIV:   case UDIV:
        !          6668:     case MOD:   case UMOD:
        !          6669:       /* We can apply the rules of arithmetic to compute the number of
        !          6670:         high- and low-order zero bits of these operations.  We start by
        !          6671:         computing the width (position of the highest-order non-zero bit)
        !          6672:         and the number of low-order zero bits for each value.  */
        !          6673:       {
        !          6674:        unsigned HOST_WIDE_INT nz0 = nonzero_bits (XEXP (x, 0), mode);
        !          6675:        unsigned HOST_WIDE_INT nz1 = nonzero_bits (XEXP (x, 1), mode);
        !          6676:        int width0 = floor_log2 (nz0) + 1;
        !          6677:        int width1 = floor_log2 (nz1) + 1;
        !          6678:        int low0 = floor_log2 (nz0 & -nz0);
        !          6679:        int low1 = floor_log2 (nz1 & -nz1);
        !          6680:        int op0_maybe_minusp = (nz0 & ((HOST_WIDE_INT) 1 << (mode_width - 1)));
        !          6681:        int op1_maybe_minusp = (nz1 & ((HOST_WIDE_INT) 1 << (mode_width - 1)));
        !          6682:        int result_width = mode_width;
        !          6683:        int result_low = 0;
        !          6684: 
        !          6685:        switch (code)
        !          6686:          {
        !          6687:          case PLUS:
        !          6688:            result_width = MAX (width0, width1) + 1;
        !          6689:            result_low = MIN (low0, low1);
        !          6690:            break;
        !          6691:          case MINUS:
        !          6692:            result_low = MIN (low0, low1);
        !          6693:            break;
        !          6694:          case MULT:
        !          6695:            result_width = width0 + width1;
        !          6696:            result_low = low0 + low1;
        !          6697:            break;
        !          6698:          case DIV:
        !          6699:            if (! op0_maybe_minusp && ! op1_maybe_minusp)
        !          6700:              result_width = width0;
        !          6701:            break;
        !          6702:          case UDIV:
        !          6703:            result_width = width0;
        !          6704:            break;
        !          6705:          case MOD:
        !          6706:            if (! op0_maybe_minusp && ! op1_maybe_minusp)
        !          6707:              result_width = MIN (width0, width1);
        !          6708:            result_low = MIN (low0, low1);
        !          6709:            break;
        !          6710:          case UMOD:
        !          6711:            result_width = MIN (width0, width1);
        !          6712:            result_low = MIN (low0, low1);
        !          6713:            break;
        !          6714:          }
        !          6715: 
        !          6716:        if (result_width < mode_width)
        !          6717:          nonzero &= ((HOST_WIDE_INT) 1 << result_width) - 1;
        !          6718: 
        !          6719:        if (result_low > 0)
        !          6720:          nonzero &= ~ (((HOST_WIDE_INT) 1 << result_low) - 1);
        !          6721:       }
        !          6722:       break;
        !          6723: 
        !          6724:     case ZERO_EXTRACT:
        !          6725:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          6726:          && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
        !          6727:        nonzero &= ((HOST_WIDE_INT) 1 << INTVAL (XEXP (x, 1))) - 1;
        !          6728:       break;
        !          6729: 
        !          6730:     case SUBREG:
        !          6731:       /* If this is a SUBREG formed for a promoted variable that has
        !          6732:         been zero-extended, we know that at least the high-order bits
        !          6733:         are zero, though others might be too.  */
        !          6734: 
        !          6735:       if (SUBREG_PROMOTED_VAR_P (x) && SUBREG_PROMOTED_UNSIGNED_P (x))
        !          6736:        nonzero = (GET_MODE_MASK (GET_MODE (x))
        !          6737:                   & nonzero_bits (SUBREG_REG (x), GET_MODE (x)));
        !          6738: 
        !          6739:       /* If the inner mode is a single word for both the host and target
        !          6740:         machines, we can compute this from which bits of the inner
        !          6741:         object might be nonzero.  */
        !          6742:       if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) <= BITS_PER_WORD
        !          6743:          && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
        !          6744:              <= HOST_BITS_PER_WIDE_INT))
        !          6745:        {
        !          6746:          nonzero &= nonzero_bits (SUBREG_REG (x), mode);
        !          6747: 
        !          6748: #ifndef WORD_REGISTER_OPERATIONS
        !          6749:          /* On many CISC machines, accessing an object in a wider mode
        !          6750:             causes the high-order bits to become undefined.  So they are
        !          6751:             not known to be zero.  */
        !          6752:          if (GET_MODE_SIZE (GET_MODE (x))
        !          6753:              > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
        !          6754:            nonzero |= (GET_MODE_MASK (GET_MODE (x))
        !          6755:                        & ~ GET_MODE_MASK (GET_MODE (SUBREG_REG (x))));
        !          6756: #endif
        !          6757:        }
        !          6758:       break;
        !          6759: 
        !          6760:     case ASHIFTRT:
        !          6761:     case LSHIFTRT:
        !          6762:     case ASHIFT:
        !          6763:     case LSHIFT:
        !          6764:     case ROTATE:
        !          6765:       /* The nonzero bits are in two classes: any bits within MODE
        !          6766:         that aren't in GET_MODE (x) are always significant.  The rest of the
        !          6767:         nonzero bits are those that are significant in the operand of
        !          6768:         the shift when shifted the appropriate number of bits.  This
        !          6769:         shows that high-order bits are cleared by the right shift and
        !          6770:         low-order bits by left shifts.  */
        !          6771:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          6772:          && INTVAL (XEXP (x, 1)) >= 0
        !          6773:          && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
        !          6774:        {
        !          6775:          enum machine_mode inner_mode = GET_MODE (x);
        !          6776:          int width = GET_MODE_BITSIZE (inner_mode);
        !          6777:          int count = INTVAL (XEXP (x, 1));
        !          6778:          unsigned HOST_WIDE_INT mode_mask = GET_MODE_MASK (inner_mode);
        !          6779:          unsigned HOST_WIDE_INT op_nonzero = nonzero_bits (XEXP (x, 0), mode);
        !          6780:          unsigned HOST_WIDE_INT inner = op_nonzero & mode_mask;
        !          6781:          unsigned HOST_WIDE_INT outer = 0;
        !          6782: 
        !          6783:          if (mode_width > width)
        !          6784:            outer = (op_nonzero & nonzero & ~ mode_mask);
        !          6785: 
        !          6786:          if (code == LSHIFTRT)
        !          6787:            inner >>= count;
        !          6788:          else if (code == ASHIFTRT)
        !          6789:            {
        !          6790:              inner >>= count;
        !          6791: 
        !          6792:              /* If the sign bit may have been nonzero before the shift, we
        !          6793:                 need to mark all the places it could have been copied to
        !          6794:                 by the shift as possibly nonzero.  */
        !          6795:              if (inner & ((HOST_WIDE_INT) 1 << (width - 1 - count)))
        !          6796:                inner |= (((HOST_WIDE_INT) 1 << count) - 1) << (width - count);
        !          6797:            }
        !          6798:          else if (code == LSHIFT || code == ASHIFT)
        !          6799:            inner <<= count;
        !          6800:          else
        !          6801:            inner = ((inner << (count % width)
        !          6802:                      | (inner >> (width - (count % width)))) & mode_mask);
        !          6803: 
        !          6804:          nonzero &= (outer | inner);
        !          6805:        }
        !          6806:       break;
        !          6807: 
        !          6808:     case FFS:
        !          6809:       /* This is at most the number of bits in the mode.  */
        !          6810:       nonzero = ((HOST_WIDE_INT) 1 << (floor_log2 (mode_width) + 1)) - 1;
        !          6811:       break;
        !          6812: 
        !          6813:     case IF_THEN_ELSE:
        !          6814:       nonzero &= (nonzero_bits (XEXP (x, 1), mode)
        !          6815:                  | nonzero_bits (XEXP (x, 2), mode));
        !          6816:       break;
        !          6817:     }
        !          6818: 
        !          6819:   return nonzero;
        !          6820: }
        !          6821: 
        !          6822: /* Return the number of bits at the high-order end of X that are known to
        !          6823:    be equal to the sign bit.  X will be used in mode MODE; if MODE is
        !          6824:    VOIDmode, X will be used in its own mode.  The returned value  will always
        !          6825:    be between 1 and the number of bits in MODE.  */
        !          6826: 
        !          6827: static int
        !          6828: num_sign_bit_copies (x, mode)
        !          6829:      rtx x;
        !          6830:      enum machine_mode mode;
        !          6831: {
        !          6832:   enum rtx_code code = GET_CODE (x);
        !          6833:   int bitwidth;
        !          6834:   int num0, num1, result;
        !          6835:   unsigned HOST_WIDE_INT nonzero;
        !          6836:   rtx tem;
        !          6837: 
        !          6838:   /* If we weren't given a mode, use the mode of X.  If the mode is still
        !          6839:      VOIDmode, we don't know anything.  */
        !          6840: 
        !          6841:   if (mode == VOIDmode)
        !          6842:     mode = GET_MODE (x);
        !          6843: 
        !          6844:   if (mode == VOIDmode)
        !          6845:     return 1;
        !          6846: 
        !          6847:   bitwidth = GET_MODE_BITSIZE (mode);
        !          6848: 
        !          6849:   /* For a smaller object, just ignore the high bits. */
        !          6850:   if (bitwidth < GET_MODE_BITSIZE (GET_MODE (x)))
        !          6851:     return MAX (1, (num_sign_bit_copies (x, GET_MODE (x))
        !          6852:                    - (GET_MODE_BITSIZE (GET_MODE (x)) - bitwidth)));
        !          6853:      
        !          6854:   switch (code)
        !          6855:     {
        !          6856:     case REG:
        !          6857: 
        !          6858:       if (reg_last_set_value[REGNO (x)] != 0
        !          6859:          && reg_last_set_mode[REGNO (x)] == mode
        !          6860:          && (reg_n_sets[REGNO (x)] == 1
        !          6861:              || reg_last_set_label[REGNO (x)] == label_tick)
        !          6862:          && INSN_CUID (reg_last_set[REGNO (x)]) < subst_low_cuid)
        !          6863:        return reg_last_set_sign_bit_copies[REGNO (x)];
        !          6864: 
        !          6865:       tem =  get_last_value (x);
        !          6866:       if (tem != 0)
        !          6867:        return num_sign_bit_copies (tem, mode);
        !          6868: 
        !          6869:       if (nonzero_sign_valid && reg_sign_bit_copies[REGNO (x)] != 0)
        !          6870:        return reg_sign_bit_copies[REGNO (x)];
        !          6871:       break;
        !          6872: 
        !          6873:     case MEM:
        !          6874: #ifdef LOAD_EXTEND_OP
        !          6875:       /* Some RISC machines sign-extend all loads of smaller than a word.  */
        !          6876:       if (LOAD_EXTEND_OP (GET_MODE (x)) == SIGN_EXTEND)
        !          6877:        return MAX (1, bitwidth - GET_MODE_BITSIZE (GET_MODE (x)) + 1);
        !          6878: #endif
        !          6879:       break;
        !          6880: 
        !          6881:     case CONST_INT:
        !          6882:       /* If the constant is negative, take its 1's complement and remask.
        !          6883:         Then see how many zero bits we have.  */
        !          6884:       nonzero = INTVAL (x) & GET_MODE_MASK (mode);
        !          6885:       if (bitwidth <= HOST_BITS_PER_WIDE_INT
        !          6886:          && (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
        !          6887:        nonzero = (~ nonzero) & GET_MODE_MASK (mode);
        !          6888: 
        !          6889:       return (nonzero == 0 ? bitwidth : bitwidth - floor_log2 (nonzero) - 1);
        !          6890: 
        !          6891:     case SUBREG:
        !          6892:       /* If this is a SUBREG for a promoted object that is sign-extended
        !          6893:         and we are looking at it in a wider mode, we know that at least the
        !          6894:         high-order bits are known to be sign bit copies.  */
        !          6895: 
        !          6896:       if (SUBREG_PROMOTED_VAR_P (x) && ! SUBREG_PROMOTED_UNSIGNED_P (x))
        !          6897:        return MAX (bitwidth - GET_MODE_BITSIZE (GET_MODE (x)) + 1,
        !          6898:                    num_sign_bit_copies (SUBREG_REG (x), mode));
        !          6899: 
        !          6900:       /* For a smaller object, just ignore the high bits. */
        !          6901:       if (bitwidth <= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))
        !          6902:        {
        !          6903:          num0 = num_sign_bit_copies (SUBREG_REG (x), VOIDmode);
        !          6904:          return MAX (1, (num0
        !          6905:                          - (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
        !          6906:                             - bitwidth)));
        !          6907:        }
        !          6908: 
        !          6909: #ifdef WORD_REGISTER_OPERATIONS
        !          6910:       /* For paradoxical SUBREGs on machines where all register operations
        !          6911:         affect the entire register, just look inside.  Note that we are
        !          6912:         passing MODE to the recursive call, so the number of sign bit copies
        !          6913:         will remain relative to that mode, not the inner mode.  */
        !          6914: 
        !          6915:       if (GET_MODE_SIZE (GET_MODE (x))
        !          6916:          > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
        !          6917:        return num_sign_bit_copies (SUBREG_REG (x), mode);
        !          6918: #endif
        !          6919:       break;
        !          6920: 
        !          6921:     case SIGN_EXTRACT:
        !          6922:       if (GET_CODE (XEXP (x, 1)) == CONST_INT)
        !          6923:        return MAX (1, bitwidth - INTVAL (XEXP (x, 1)));
        !          6924:       break;
        !          6925: 
        !          6926:     case SIGN_EXTEND: 
        !          6927:       return (bitwidth - GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
        !          6928:              + num_sign_bit_copies (XEXP (x, 0), VOIDmode));
        !          6929: 
        !          6930:     case TRUNCATE:
        !          6931:       /* For a smaller object, just ignore the high bits. */
        !          6932:       num0 = num_sign_bit_copies (XEXP (x, 0), VOIDmode);
        !          6933:       return MAX (1, (num0 - (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
        !          6934:                              - bitwidth)));
        !          6935: 
        !          6936:     case NOT:
        !          6937:       return num_sign_bit_copies (XEXP (x, 0), mode);
        !          6938: 
        !          6939:     case ROTATE:       case ROTATERT:
        !          6940:       /* If we are rotating left by a number of bits less than the number
        !          6941:         of sign bit copies, we can just subtract that amount from the
        !          6942:         number.  */
        !          6943:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          6944:          && INTVAL (XEXP (x, 1)) >= 0 && INTVAL (XEXP (x, 1)) < bitwidth)
        !          6945:        {
        !          6946:          num0 = num_sign_bit_copies (XEXP (x, 0), mode);
        !          6947:          return MAX (1, num0 - (code == ROTATE ? INTVAL (XEXP (x, 1))
        !          6948:                                 : bitwidth - INTVAL (XEXP (x, 1))));
        !          6949:        }
        !          6950:       break;
        !          6951: 
        !          6952:     case NEG:
        !          6953:       /* In general, this subtracts one sign bit copy.  But if the value
        !          6954:         is known to be positive, the number of sign bit copies is the
        !          6955:         same as that of the input.  Finally, if the input has just one bit
        !          6956:         that might be nonzero, all the bits are copies of the sign bit.  */
        !          6957:       nonzero = nonzero_bits (XEXP (x, 0), mode);
        !          6958:       if (nonzero == 1)
        !          6959:        return bitwidth;
        !          6960: 
        !          6961:       num0 = num_sign_bit_copies (XEXP (x, 0), mode);
        !          6962:       if (num0 > 1
        !          6963:          && bitwidth <= HOST_BITS_PER_WIDE_INT
        !          6964:          && (((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero))
        !          6965:        num0--;
        !          6966: 
        !          6967:       return num0;
        !          6968: 
        !          6969:     case IOR:   case AND:   case XOR:
        !          6970:     case SMIN:  case SMAX:  case UMIN:  case UMAX:
        !          6971:       /* Logical operations will preserve the number of sign-bit copies.
        !          6972:         MIN and MAX operations always return one of the operands.  */
        !          6973:       num0 = num_sign_bit_copies (XEXP (x, 0), mode);
        !          6974:       num1 = num_sign_bit_copies (XEXP (x, 1), mode);
        !          6975:       return MIN (num0, num1);
        !          6976: 
        !          6977:     case PLUS:  case MINUS:
        !          6978:       /* For addition and subtraction, we can have a 1-bit carry.  However,
        !          6979:         if we are subtracting 1 from a positive number, there will not
        !          6980:         be such a carry.  Furthermore, if the positive number is known to
        !          6981:         be 0 or 1, we know the result is either -1 or 0.  */
        !          6982: 
        !          6983:       if (code == PLUS && XEXP (x, 1) == constm1_rtx
        !          6984:          && bitwidth <= HOST_BITS_PER_WIDE_INT)
        !          6985:        {
        !          6986:          nonzero = nonzero_bits (XEXP (x, 0), mode);
        !          6987:          if ((((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero) == 0)
        !          6988:            return (nonzero == 1 || nonzero == 0 ? bitwidth
        !          6989:                    : bitwidth - floor_log2 (nonzero) - 1);
        !          6990:        }
        !          6991: 
        !          6992:       num0 = num_sign_bit_copies (XEXP (x, 0), mode);
        !          6993:       num1 = num_sign_bit_copies (XEXP (x, 1), mode);
        !          6994:       return MAX (1, MIN (num0, num1) - 1);
        !          6995:       
        !          6996:     case MULT:
        !          6997:       /* The number of bits of the product is the sum of the number of
        !          6998:         bits of both terms.  However, unless one of the terms if known
        !          6999:         to be positive, we must allow for an additional bit since negating
        !          7000:         a negative number can remove one sign bit copy.  */
        !          7001: 
        !          7002:       num0 = num_sign_bit_copies (XEXP (x, 0), mode);
        !          7003:       num1 = num_sign_bit_copies (XEXP (x, 1), mode);
        !          7004: 
        !          7005:       result = bitwidth - (bitwidth - num0) - (bitwidth - num1);
        !          7006:       if (result > 0
        !          7007:          && bitwidth <= HOST_BITS_PER_WIDE_INT
        !          7008:          && ((nonzero_bits (XEXP (x, 0), mode)
        !          7009:               & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
        !          7010:          && (nonzero_bits (XEXP (x, 1), mode)
        !          7011:              & ((HOST_WIDE_INT) 1 << (bitwidth - 1)) != 0))
        !          7012:        result--;
        !          7013: 
        !          7014:       return MAX (1, result);
        !          7015: 
        !          7016:     case UDIV:
        !          7017:       /* The result must be <= the first operand.  */
        !          7018:       return num_sign_bit_copies (XEXP (x, 0), mode);
        !          7019: 
        !          7020:     case UMOD:
        !          7021:       /* The result must be <= the scond operand.  */
        !          7022:       return num_sign_bit_copies (XEXP (x, 1), mode);
        !          7023: 
        !          7024:     case DIV:
        !          7025:       /* Similar to unsigned division, except that we have to worry about
        !          7026:         the case where the divisor is negative, in which case we have
        !          7027:         to add 1.  */
        !          7028:       result = num_sign_bit_copies (XEXP (x, 0), mode);
        !          7029:       if (result > 1
        !          7030:          && bitwidth <= HOST_BITS_PER_WIDE_INT
        !          7031:          && (nonzero_bits (XEXP (x, 1), mode)
        !          7032:              & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
        !          7033:        result --;
        !          7034: 
        !          7035:       return result;
        !          7036: 
        !          7037:     case MOD:
        !          7038:       result = num_sign_bit_copies (XEXP (x, 1), mode);
        !          7039:       if (result > 1
        !          7040:          && bitwidth <= HOST_BITS_PER_WIDE_INT
        !          7041:          && (nonzero_bits (XEXP (x, 1), mode)
        !          7042:              & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
        !          7043:        result --;
        !          7044: 
        !          7045:       return result;
        !          7046: 
        !          7047:     case ASHIFTRT:
        !          7048:       /* Shifts by a constant add to the number of bits equal to the
        !          7049:         sign bit.  */
        !          7050:       num0 = num_sign_bit_copies (XEXP (x, 0), mode);
        !          7051:       if (GET_CODE (XEXP (x, 1)) == CONST_INT
        !          7052:          && INTVAL (XEXP (x, 1)) > 0)
        !          7053:        num0 = MIN (bitwidth, num0 + INTVAL (XEXP (x, 1)));
        !          7054: 
        !          7055:       return num0;
        !          7056: 
        !          7057:     case ASHIFT:
        !          7058:     case LSHIFT:
        !          7059:       /* Left shifts destroy copies.  */
        !          7060:       if (GET_CODE (XEXP (x, 1)) != CONST_INT
        !          7061:          || INTVAL (XEXP (x, 1)) < 0
        !          7062:          || INTVAL (XEXP (x, 1)) >= bitwidth)
        !          7063:        return 1;
        !          7064: 
        !          7065:       num0 = num_sign_bit_copies (XEXP (x, 0), mode);
        !          7066:       return MAX (1, num0 - INTVAL (XEXP (x, 1)));
        !          7067: 
        !          7068:     case IF_THEN_ELSE:
        !          7069:       num0 = num_sign_bit_copies (XEXP (x, 1), mode);
        !          7070:       num1 = num_sign_bit_copies (XEXP (x, 2), mode);
        !          7071:       return MIN (num0, num1);
        !          7072: 
        !          7073: #if STORE_FLAG_VALUE == -1
        !          7074:     case EQ:  case NE:  case GE:  case GT:  case LE:  case LT:
        !          7075:     case GEU: case GTU: case LEU: case LTU:
        !          7076:       return bitwidth;
        !          7077: #endif
        !          7078:     }
        !          7079: 
        !          7080:   /* If we haven't been able to figure it out by one of the above rules,
        !          7081:      see if some of the high-order bits are known to be zero.  If so,
        !          7082:      count those bits and return one less than that amount.  If we can't
        !          7083:      safely compute the mask for this mode, always return BITWIDTH.  */
        !          7084: 
        !          7085:   if (bitwidth > HOST_BITS_PER_WIDE_INT)
        !          7086:     return 1;
        !          7087: 
        !          7088:   nonzero = nonzero_bits (x, mode);
        !          7089:   return (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))
        !          7090:          ? 1 : bitwidth - floor_log2 (nonzero) - 1);
        !          7091: }
        !          7092: 
        !          7093: /* Return the number of "extended" bits there are in X, when interpreted
        !          7094:    as a quantity in MODE whose signedness is indicated by UNSIGNEDP.  For
        !          7095:    unsigned quantities, this is the number of high-order zero bits.
        !          7096:    For signed quantities, this is the number of copies of the sign bit
        !          7097:    minus 1.  In both case, this function returns the number of "spare"
        !          7098:    bits.  For example, if two quantities for which this function returns
        !          7099:    at least 1 are added, the addition is known not to overflow.
        !          7100: 
        !          7101:    This function will always return 0 unless called during combine, which
        !          7102:    implies that it must be called from a define_split.  */
        !          7103: 
        !          7104: int
        !          7105: extended_count (x, mode, unsignedp)
        !          7106:      rtx x;
        !          7107:      enum machine_mode mode;
        !          7108:      int unsignedp;
        !          7109: {
        !          7110:   if (nonzero_sign_valid == 0)
        !          7111:     return 0;
        !          7112: 
        !          7113:   return (unsignedp
        !          7114:          ? (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
        !          7115:             && (GET_MODE_BITSIZE (mode) - 1
        !          7116:                 - floor_log2 (nonzero_bits (x, mode))))
        !          7117:          : num_sign_bit_copies (x, mode) - 1);
        !          7118: }
        !          7119: 
        !          7120: /* This function is called from `simplify_shift_const' to merge two
        !          7121:    outer operations.  Specifically, we have already found that we need
        !          7122:    to perform operation *POP0 with constant *PCONST0 at the outermost
        !          7123:    position.  We would now like to also perform OP1 with constant CONST1
        !          7124:    (with *POP0 being done last).
        !          7125: 
        !          7126:    Return 1 if we can do the operation and update *POP0 and *PCONST0 with
        !          7127:    the resulting operation.  *PCOMP_P is set to 1 if we would need to 
        !          7128:    complement the innermost operand, otherwise it is unchanged.
        !          7129: 
        !          7130:    MODE is the mode in which the operation will be done.  No bits outside
        !          7131:    the width of this mode matter.  It is assumed that the width of this mode
        !          7132:    is smaller than or equal to HOST_BITS_PER_WIDE_INT.
        !          7133: 
        !          7134:    If *POP0 or OP1 are NIL, it means no operation is required.  Only NEG, PLUS,
        !          7135:    IOR, XOR, and AND are supported.  We may set *POP0 to SET if the proper
        !          7136:    result is simply *PCONST0.
        !          7137: 
        !          7138:    If the resulting operation cannot be expressed as one operation, we
        !          7139:    return 0 and do not change *POP0, *PCONST0, and *PCOMP_P.  */
        !          7140: 
        !          7141: static int
        !          7142: merge_outer_ops (pop0, pconst0, op1, const1, mode, pcomp_p)
        !          7143:      enum rtx_code *pop0;
        !          7144:      HOST_WIDE_INT *pconst0;
        !          7145:      enum rtx_code op1;
        !          7146:      HOST_WIDE_INT const1;
        !          7147:      enum machine_mode mode;
        !          7148:      int *pcomp_p;
        !          7149: {
        !          7150:   enum rtx_code op0 = *pop0;
        !          7151:   HOST_WIDE_INT const0 = *pconst0;
        !          7152: 
        !          7153:   const0 &= GET_MODE_MASK (mode);
        !          7154:   const1 &= GET_MODE_MASK (mode);
        !          7155: 
        !          7156:   /* If OP0 is an AND, clear unimportant bits in CONST1.  */
        !          7157:   if (op0 == AND)
        !          7158:     const1 &= const0;
        !          7159: 
        !          7160:   /* If OP0 or OP1 is NIL, this is easy.  Similarly if they are the same or
        !          7161:      if OP0 is SET.  */
        !          7162: 
        !          7163:   if (op1 == NIL || op0 == SET)
        !          7164:     return 1;
        !          7165: 
        !          7166:   else if (op0 == NIL)
        !          7167:     op0 = op1, const0 = const1;
        !          7168: 
        !          7169:   else if (op0 == op1)
        !          7170:     {
        !          7171:       switch (op0)
        !          7172:        {
        !          7173:        case AND:
        !          7174:          const0 &= const1;
        !          7175:          break;
        !          7176:        case IOR:
        !          7177:          const0 |= const1;
        !          7178:          break;
        !          7179:        case XOR:
        !          7180:          const0 ^= const1;
        !          7181:          break;
        !          7182:        case PLUS:
        !          7183:          const0 += const1;
        !          7184:          break;
        !          7185:        case NEG:
        !          7186:          op0 = NIL;
        !          7187:          break;
        !          7188:        }
        !          7189:     }
        !          7190: 
        !          7191:   /* Otherwise, if either is a PLUS or NEG, we can't do anything.  */
        !          7192:   else if (op0 == PLUS || op1 == PLUS || op0 == NEG || op1 == NEG)
        !          7193:     return 0;
        !          7194: 
        !          7195:   /* If the two constants aren't the same, we can't do anything.  The
        !          7196:      remaining six cases can all be done.  */
        !          7197:   else if (const0 != const1)
        !          7198:     return 0;
        !          7199: 
        !          7200:   else
        !          7201:     switch (op0)
        !          7202:       {
        !          7203:       case IOR:
        !          7204:        if (op1 == AND)
        !          7205:          /* (a & b) | b == b */
        !          7206:          op0 = SET;
        !          7207:        else /* op1 == XOR */
        !          7208:          /* (a ^ b) | b == a | b */
        !          7209:          ;
        !          7210:        break;
        !          7211: 
        !          7212:       case XOR:
        !          7213:        if (op1 == AND)
        !          7214:          /* (a & b) ^ b == (~a) & b */
        !          7215:          op0 = AND, *pcomp_p = 1;
        !          7216:        else /* op1 == IOR */
        !          7217:          /* (a | b) ^ b == a & ~b */
        !          7218:          op0 = AND, *pconst0 = ~ const0;
        !          7219:        break;
        !          7220: 
        !          7221:       case AND:
        !          7222:        if (op1 == IOR)
        !          7223:          /* (a | b) & b == b */
        !          7224:        op0 = SET;
        !          7225:        else /* op1 == XOR */
        !          7226:          /* (a ^ b) & b) == (~a) & b */
        !          7227:          *pcomp_p = 1;
        !          7228:        break;
        !          7229:       }
        !          7230: 
        !          7231:   /* Check for NO-OP cases.  */
        !          7232:   const0 &= GET_MODE_MASK (mode);
        !          7233:   if (const0 == 0
        !          7234:       && (op0 == IOR || op0 == XOR || op0 == PLUS))
        !          7235:     op0 = NIL;
        !          7236:   else if (const0 == 0 && op0 == AND)
        !          7237:     op0 = SET;
        !          7238:   else if (const0 == GET_MODE_MASK (mode) && op0 == AND)
        !          7239:     op0 = NIL;
        !          7240: 
        !          7241:   *pop0 = op0;
        !          7242:   *pconst0 = const0;
        !          7243: 
        !          7244:   return 1;
        !          7245: }
        !          7246: 
        !          7247: /* Simplify a shift of VAROP by COUNT bits.  CODE says what kind of shift.
        !          7248:    The result of the shift is RESULT_MODE.  X, if non-zero, is an expression
        !          7249:    that we started with.
        !          7250: 
        !          7251:    The shift is normally computed in the widest mode we find in VAROP, as
        !          7252:    long as it isn't a different number of words than RESULT_MODE.  Exceptions
        !          7253:    are ASHIFTRT and ROTATE, which are always done in their original mode,  */
        !          7254: 
        !          7255: static rtx
        !          7256: simplify_shift_const (x, code, result_mode, varop, count)
        !          7257:      rtx x;
        !          7258:      enum rtx_code code;
        !          7259:      enum machine_mode result_mode;
        !          7260:      rtx varop;
        !          7261:      int count;
        !          7262: {
        !          7263:   enum rtx_code orig_code = code;
        !          7264:   int orig_count = count;
        !          7265:   enum machine_mode mode = result_mode;
        !          7266:   enum machine_mode shift_mode, tmode;
        !          7267:   int mode_words
        !          7268:     = (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
        !          7269:   /* We form (outer_op (code varop count) (outer_const)).  */
        !          7270:   enum rtx_code outer_op = NIL;
        !          7271:   HOST_WIDE_INT outer_const = 0;
        !          7272:   rtx const_rtx;
        !          7273:   int complement_p = 0;
        !          7274:   rtx new;
        !          7275: 
        !          7276:   /* If we were given an invalid count, don't do anything except exactly
        !          7277:      what was requested.  */
        !          7278: 
        !          7279:   if (count < 0 || count > GET_MODE_BITSIZE (mode))
        !          7280:     {
        !          7281:       if (x)
        !          7282:        return x;
        !          7283: 
        !          7284:       return gen_rtx (code, mode, varop, GEN_INT (count));
        !          7285:     }
        !          7286: 
        !          7287:   /* Unless one of the branches of the `if' in this loop does a `continue',
        !          7288:      we will `break' the loop after the `if'.  */
        !          7289: 
        !          7290:   while (count != 0)
        !          7291:     {
        !          7292:       /* If we have an operand of (clobber (const_int 0)), just return that
        !          7293:         value.  */
        !          7294:       if (GET_CODE (varop) == CLOBBER)
        !          7295:        return varop;
        !          7296: 
        !          7297:       /* If we discovered we had to complement VAROP, leave.  Making a NOT
        !          7298:         here would cause an infinite loop.  */
        !          7299:       if (complement_p)
        !          7300:        break;
        !          7301: 
        !          7302:       /* Convert ROTATETRT to ROTATE.  */
        !          7303:       if (code == ROTATERT)
        !          7304:        code = ROTATE, count = GET_MODE_BITSIZE (result_mode) - count;
        !          7305: 
        !          7306:       /* Canonicalize LSHIFT to ASHIFT.  */
        !          7307:       if (code == LSHIFT)
        !          7308:        code = ASHIFT;
        !          7309: 
        !          7310:       /* We need to determine what mode we will do the shift in.  If the
        !          7311:         shift is a ASHIFTRT or ROTATE, we must always do it in the mode it
        !          7312:         was originally done in.  Otherwise, we can do it in MODE, the widest
        !          7313:         mode encountered. */
        !          7314:       shift_mode = (code == ASHIFTRT || code == ROTATE ? result_mode : mode);
        !          7315: 
        !          7316:       /* Handle cases where the count is greater than the size of the mode
        !          7317:         minus 1.  For ASHIFT, use the size minus one as the count (this can
        !          7318:         occur when simplifying (lshiftrt (ashiftrt ..))).  For rotates,
        !          7319:         take the count modulo the size.  For other shifts, the result is
        !          7320:         zero.
        !          7321: 
        !          7322:         Since these shifts are being produced by the compiler by combining
        !          7323:         multiple operations, each of which are defined, we know what the
        !          7324:         result is supposed to be.  */
        !          7325:         
        !          7326:       if (count > GET_MODE_BITSIZE (shift_mode) - 1)
        !          7327:        {
        !          7328:          if (code == ASHIFTRT)
        !          7329:            count = GET_MODE_BITSIZE (shift_mode) - 1;
        !          7330:          else if (code == ROTATE || code == ROTATERT)
        !          7331:            count %= GET_MODE_BITSIZE (shift_mode);
        !          7332:          else
        !          7333:            {
        !          7334:              /* We can't simply return zero because there may be an
        !          7335:                 outer op.  */
        !          7336:              varop = const0_rtx;
        !          7337:              count = 0;
        !          7338:              break;
        !          7339:            }
        !          7340:        }
        !          7341: 
        !          7342:       /* Negative counts are invalid and should not have been made (a
        !          7343:         programmer-specified negative count should have been handled
        !          7344:         above). */
        !          7345:       else if (count < 0)
        !          7346:        abort ();
        !          7347: 
        !          7348:       /* An arithmetic right shift of a quantity known to be -1 or 0
        !          7349:         is a no-op.  */
        !          7350:       if (code == ASHIFTRT
        !          7351:          && (num_sign_bit_copies (varop, shift_mode)
        !          7352:              == GET_MODE_BITSIZE (shift_mode)))
        !          7353:        {
        !          7354:          count = 0;
        !          7355:          break;
        !          7356:        }
        !          7357: 
        !          7358:       /* If we are doing an arithmetic right shift and discarding all but
        !          7359:         the sign bit copies, this is equivalent to doing a shift by the
        !          7360:         bitsize minus one.  Convert it into that shift because it will often
        !          7361:         allow other simplifications.  */
        !          7362: 
        !          7363:       if (code == ASHIFTRT
        !          7364:          && (count + num_sign_bit_copies (varop, shift_mode)
        !          7365:              >= GET_MODE_BITSIZE (shift_mode)))
        !          7366:        count = GET_MODE_BITSIZE (shift_mode) - 1;
        !          7367: 
        !          7368:       /* We simplify the tests below and elsewhere by converting
        !          7369:         ASHIFTRT to LSHIFTRT if we know the sign bit is clear.
        !          7370:         `make_compound_operation' will convert it to a ASHIFTRT for
        !          7371:         those machines (such as Vax) that don't have a LSHIFTRT.  */
        !          7372:       if (GET_MODE_BITSIZE (shift_mode) <= HOST_BITS_PER_WIDE_INT
        !          7373:          && code == ASHIFTRT
        !          7374:          && ((nonzero_bits (varop, shift_mode)
        !          7375:               & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (shift_mode) - 1)))
        !          7376:              == 0))
        !          7377:        code = LSHIFTRT;
        !          7378: 
        !          7379:       switch (GET_CODE (varop))
        !          7380:        {
        !          7381:        case SIGN_EXTEND:
        !          7382:        case ZERO_EXTEND:
        !          7383:        case SIGN_EXTRACT:
        !          7384:        case ZERO_EXTRACT:
        !          7385:          new = expand_compound_operation (varop);
        !          7386:          if (new != varop)
        !          7387:            {
        !          7388:              varop = new;
        !          7389:              continue;
        !          7390:            }
        !          7391:          break;
        !          7392: 
        !          7393:        case MEM:
        !          7394:          /* If we have (xshiftrt (mem ...) C) and C is MODE_WIDTH
        !          7395:             minus the width of a smaller mode, we can do this with a
        !          7396:             SIGN_EXTEND or ZERO_EXTEND from the narrower memory location.  */
        !          7397:          if ((code == ASHIFTRT || code == LSHIFTRT)
        !          7398:              && ! mode_dependent_address_p (XEXP (varop, 0))
        !          7399:              && ! MEM_VOLATILE_P (varop)
        !          7400:              && (tmode = mode_for_size (GET_MODE_BITSIZE (mode) - count,
        !          7401:                                         MODE_INT, 1)) != BLKmode)
        !          7402:            {
        !          7403: #if BYTES_BIG_ENDIAN
        !          7404:              new = gen_rtx (MEM, tmode, XEXP (varop, 0));
        !          7405: #else
        !          7406:              new = gen_rtx (MEM, tmode,
        !          7407:                             plus_constant (XEXP (varop, 0),
        !          7408:                                            count / BITS_PER_UNIT));
        !          7409:              RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (varop);
        !          7410:              MEM_VOLATILE_P (new) = MEM_VOLATILE_P (varop);
        !          7411:              MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (varop);
        !          7412: #endif
        !          7413:              varop = gen_rtx_combine (code == ASHIFTRT ? SIGN_EXTEND
        !          7414:                                       : ZERO_EXTEND, mode, new);
        !          7415:              count = 0;
        !          7416:              continue;
        !          7417:            }
        !          7418:          break;
        !          7419: 
        !          7420:        case USE:
        !          7421:          /* Similar to the case above, except that we can only do this if
        !          7422:             the resulting mode is the same as that of the underlying
        !          7423:             MEM and adjust the address depending on the *bits* endianness
        !          7424:             because of the way that bit-field extract insns are defined.  */
        !          7425:          if ((code == ASHIFTRT || code == LSHIFTRT)
        !          7426:              && (tmode = mode_for_size (GET_MODE_BITSIZE (mode) - count,
        !          7427:                                         MODE_INT, 1)) != BLKmode
        !          7428:              && tmode == GET_MODE (XEXP (varop, 0)))
        !          7429:            {
        !          7430: #if BITS_BIG_ENDIAN
        !          7431:              new = XEXP (varop, 0);
        !          7432: #else
        !          7433:              new = copy_rtx (XEXP (varop, 0));
        !          7434:              SUBST (XEXP (new, 0), 
        !          7435:                     plus_constant (XEXP (new, 0),
        !          7436:                                    count / BITS_PER_UNIT));
        !          7437: #endif
        !          7438: 
        !          7439:              varop = gen_rtx_combine (code == ASHIFTRT ? SIGN_EXTEND
        !          7440:                                       : ZERO_EXTEND, mode, new);
        !          7441:              count = 0;
        !          7442:              continue;
        !          7443:            }
        !          7444:          break;
        !          7445: 
        !          7446:        case SUBREG:
        !          7447:          /* If VAROP is a SUBREG, strip it as long as the inner operand has
        !          7448:             the same number of words as what we've seen so far.  Then store
        !          7449:             the widest mode in MODE.  */
        !          7450:          if (subreg_lowpart_p (varop)
        !          7451:              && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop)))
        !          7452:                  > GET_MODE_SIZE (GET_MODE (varop)))
        !          7453:              && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop)))
        !          7454:                    + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
        !          7455:                  == mode_words))
        !          7456:            {
        !          7457:              varop = SUBREG_REG (varop);
        !          7458:              if (GET_MODE_SIZE (GET_MODE (varop)) > GET_MODE_SIZE (mode))
        !          7459:                mode = GET_MODE (varop);
        !          7460:              continue;
        !          7461:            }
        !          7462:          break;
        !          7463: 
        !          7464:        case MULT:
        !          7465:          /* Some machines use MULT instead of ASHIFT because MULT
        !          7466:             is cheaper.  But it is still better on those machines to
        !          7467:             merge two shifts into one.  */
        !          7468:          if (GET_CODE (XEXP (varop, 1)) == CONST_INT
        !          7469:              && exact_log2 (INTVAL (XEXP (varop, 1))) >= 0)
        !          7470:            {
        !          7471:              varop = gen_binary (ASHIFT, GET_MODE (varop), XEXP (varop, 0),
        !          7472:                                  GEN_INT (exact_log2 (INTVAL (XEXP (varop, 1)))));;
        !          7473:              continue;
        !          7474:            }
        !          7475:          break;
        !          7476: 
        !          7477:        case UDIV:
        !          7478:          /* Similar, for when divides are cheaper.  */
        !          7479:          if (GET_CODE (XEXP (varop, 1)) == CONST_INT
        !          7480:              && exact_log2 (INTVAL (XEXP (varop, 1))) >= 0)
        !          7481:            {
        !          7482:              varop = gen_binary (LSHIFTRT, GET_MODE (varop), XEXP (varop, 0),
        !          7483:                                  GEN_INT (exact_log2 (INTVAL (XEXP (varop, 1)))));
        !          7484:              continue;
        !          7485:            }
        !          7486:          break;
        !          7487: 
        !          7488:        case ASHIFTRT:
        !          7489:          /* If we are extracting just the sign bit of an arithmetic right 
        !          7490:             shift, that shift is not needed.  */
        !          7491:          if (code == LSHIFTRT && count == GET_MODE_BITSIZE (result_mode) - 1)
        !          7492:            {
        !          7493:              varop = XEXP (varop, 0);
        !          7494:              continue;
        !          7495:            }
        !          7496: 
        !          7497:          /* ... fall through ... */
        !          7498: 
        !          7499:        case LSHIFTRT:
        !          7500:        case ASHIFT:
        !          7501:        case LSHIFT:
        !          7502:        case ROTATE:
        !          7503:          /* Here we have two nested shifts.  The result is usually the
        !          7504:             AND of a new shift with a mask.  We compute the result below.  */
        !          7505:          if (GET_CODE (XEXP (varop, 1)) == CONST_INT
        !          7506:              && INTVAL (XEXP (varop, 1)) >= 0
        !          7507:              && INTVAL (XEXP (varop, 1)) < GET_MODE_BITSIZE (GET_MODE (varop))
        !          7508:              && GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT
        !          7509:              && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
        !          7510:            {
        !          7511:              enum rtx_code first_code = GET_CODE (varop);
        !          7512:              int first_count = INTVAL (XEXP (varop, 1));
        !          7513:              unsigned HOST_WIDE_INT mask;
        !          7514:              rtx mask_rtx;
        !          7515:              rtx inner;
        !          7516: 
        !          7517:              if (first_code == LSHIFT)
        !          7518:                first_code = ASHIFT;
        !          7519: 
        !          7520:              /* We have one common special case.  We can't do any merging if
        !          7521:                 the inner code is an ASHIFTRT of a smaller mode.  However, if
        !          7522:                 we have (ashift:M1 (subreg:M1 (ashiftrt:M2 FOO C1) 0) C2)
        !          7523:                 with C2 == GET_MODE_BITSIZE (M1) - GET_MODE_BITSIZE (M2),
        !          7524:                 we can convert it to
        !          7525:                 (ashiftrt:M1 (ashift:M1 (and:M1 (subreg:M1 FOO 0 C2) C3) C1).
        !          7526:                 This simplifies certain SIGN_EXTEND operations.  */
        !          7527:              if (code == ASHIFT && first_code == ASHIFTRT
        !          7528:                  && (GET_MODE_BITSIZE (result_mode)
        !          7529:                      - GET_MODE_BITSIZE (GET_MODE (varop))) == count)
        !          7530:                {
        !          7531:                  /* C3 has the low-order C1 bits zero.  */
        !          7532:                  
        !          7533:                  mask = (GET_MODE_MASK (mode)
        !          7534:                          & ~ (((HOST_WIDE_INT) 1 << first_count) - 1));
        !          7535: 
        !          7536:                  varop = simplify_and_const_int (NULL_RTX, result_mode,
        !          7537:                                                  XEXP (varop, 0), mask);
        !          7538:                  varop = simplify_shift_const (NULL_RTX, ASHIFT, result_mode,
        !          7539:                                                varop, count);
        !          7540:                  count = first_count;
        !          7541:                  code = ASHIFTRT;
        !          7542:                  continue;
        !          7543:                }
        !          7544:              
        !          7545:              /* If this was (ashiftrt (ashift foo C1) C2) and FOO has more
        !          7546:                 than C1 high-order bits equal to the sign bit, we can convert
        !          7547:                 this to either an ASHIFT or a ASHIFTRT depending on the
        !          7548:                 two counts. 
        !          7549: 
        !          7550:                 We cannot do this if VAROP's mode is not SHIFT_MODE.  */
        !          7551: 
        !          7552:              if (code == ASHIFTRT && first_code == ASHIFT
        !          7553:                  && GET_MODE (varop) == shift_mode
        !          7554:                  && (num_sign_bit_copies (XEXP (varop, 0), shift_mode)
        !          7555:                      > first_count))
        !          7556:                {
        !          7557:                  count -= first_count;
        !          7558:                  if (count < 0)
        !          7559:                    count = - count, code = ASHIFT;
        !          7560:                  varop = XEXP (varop, 0);
        !          7561:                  continue;
        !          7562:                }
        !          7563: 
        !          7564:              /* There are some cases we can't do.  If CODE is ASHIFTRT,
        !          7565:                 we can only do this if FIRST_CODE is also ASHIFTRT.
        !          7566: 
        !          7567:                 We can't do the case when CODE is ROTATE and FIRST_CODE is
        !          7568:                 ASHIFTRT.
        !          7569: 
        !          7570:                 If the mode of this shift is not the mode of the outer shift,
        !          7571:                 we can't do this if either shift is ASHIFTRT or ROTATE.
        !          7572: 
        !          7573:                 Finally, we can't do any of these if the mode is too wide
        !          7574:                 unless the codes are the same.
        !          7575: 
        !          7576:                 Handle the case where the shift codes are the same
        !          7577:                 first.  */
        !          7578: 
        !          7579:              if (code == first_code)
        !          7580:                {
        !          7581:                  if (GET_MODE (varop) != result_mode
        !          7582:                      && (code == ASHIFTRT || code == ROTATE))
        !          7583:                    break;
        !          7584: 
        !          7585:                  count += first_count;
        !          7586:                  varop = XEXP (varop, 0);
        !          7587:                  continue;
        !          7588:                }
        !          7589: 
        !          7590:              if (code == ASHIFTRT
        !          7591:                  || (code == ROTATE && first_code == ASHIFTRT)
        !          7592:                  || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT
        !          7593:                  || (GET_MODE (varop) != result_mode
        !          7594:                      && (first_code == ASHIFTRT || first_code == ROTATE
        !          7595:                          || code == ROTATE)))
        !          7596:                break;
        !          7597: 
        !          7598:              /* To compute the mask to apply after the shift, shift the
        !          7599:                 nonzero bits of the inner shift the same way the 
        !          7600:                 outer shift will.  */
        !          7601: 
        !          7602:              mask_rtx = GEN_INT (nonzero_bits (varop, GET_MODE (varop)));
        !          7603: 
        !          7604:              mask_rtx
        !          7605:                = simplify_binary_operation (code, result_mode, mask_rtx,
        !          7606:                                             GEN_INT (count));
        !          7607:                                  
        !          7608:              /* Give up if we can't compute an outer operation to use.  */
        !          7609:              if (mask_rtx == 0
        !          7610:                  || GET_CODE (mask_rtx) != CONST_INT
        !          7611:                  || ! merge_outer_ops (&outer_op, &outer_const, AND,
        !          7612:                                        INTVAL (mask_rtx),
        !          7613:                                        result_mode, &complement_p))
        !          7614:                break;
        !          7615: 
        !          7616:              /* If the shifts are in the same direction, we add the
        !          7617:                 counts.  Otherwise, we subtract them.  */
        !          7618:              if ((code == ASHIFTRT || code == LSHIFTRT)
        !          7619:                  == (first_code == ASHIFTRT || first_code == LSHIFTRT))
        !          7620:                count += first_count;
        !          7621:              else
        !          7622:                count -= first_count;
        !          7623: 
        !          7624:              /* If COUNT is positive, the new shift is usually CODE, 
        !          7625:                 except for the two exceptions below, in which case it is
        !          7626:                 FIRST_CODE.  If the count is negative, FIRST_CODE should
        !          7627:                 always be used  */
        !          7628:              if (count > 0
        !          7629:                  && ((first_code == ROTATE && code == ASHIFT)
        !          7630:                      || (first_code == ASHIFTRT && code == LSHIFTRT)))
        !          7631:                code = first_code;
        !          7632:              else if (count < 0)
        !          7633:                code = first_code, count = - count;
        !          7634: 
        !          7635:              varop = XEXP (varop, 0);
        !          7636:              continue;
        !          7637:            }
        !          7638: 
        !          7639:          /* If we have (A << B << C) for any shift, we can convert this to
        !          7640:             (A << C << B).  This wins if A is a constant.  Only try this if
        !          7641:             B is not a constant.  */
        !          7642: 
        !          7643:          else if (GET_CODE (varop) == code
        !          7644:                   && GET_CODE (XEXP (varop, 1)) != CONST_INT
        !          7645:                   && 0 != (new
        !          7646:                            = simplify_binary_operation (code, mode,
        !          7647:                                                         XEXP (varop, 0),
        !          7648:                                                         GEN_INT (count))))
        !          7649:            {
        !          7650:              varop = gen_rtx_combine (code, mode, new, XEXP (varop, 1));
        !          7651:              count = 0;
        !          7652:              continue;
        !          7653:            }
        !          7654:          break;
        !          7655: 
        !          7656:        case NOT:
        !          7657:          /* Make this fit the case below.  */
        !          7658:          varop = gen_rtx_combine (XOR, mode, XEXP (varop, 0),
        !          7659:                                   GEN_INT (GET_MODE_MASK (mode)));
        !          7660:          continue;
        !          7661: 
        !          7662:        case IOR:
        !          7663:        case AND:
        !          7664:        case XOR:
        !          7665:          /* If we have (xshiftrt (ior (plus X (const_int -1)) X) C)
        !          7666:             with C the size of VAROP - 1 and the shift is logical if
        !          7667:             STORE_FLAG_VALUE is 1 and arithmetic if STORE_FLAG_VALUE is -1,
        !          7668:             we have an (le X 0) operation.   If we have an arithmetic shift
        !          7669:             and STORE_FLAG_VALUE is 1 or we have a logical shift with
        !          7670:             STORE_FLAG_VALUE of -1, we have a (neg (le X 0)) operation.  */
        !          7671: 
        !          7672:          if (GET_CODE (varop) == IOR && GET_CODE (XEXP (varop, 0)) == PLUS
        !          7673:              && XEXP (XEXP (varop, 0), 1) == constm1_rtx
        !          7674:              && (STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1)
        !          7675:              && (code == LSHIFTRT || code == ASHIFTRT)
        !          7676:              && count == GET_MODE_BITSIZE (GET_MODE (varop)) - 1
        !          7677:              && rtx_equal_p (XEXP (XEXP (varop, 0), 0), XEXP (varop, 1)))
        !          7678:            {
        !          7679:              count = 0;
        !          7680:              varop = gen_rtx_combine (LE, GET_MODE (varop), XEXP (varop, 1),
        !          7681:                                       const0_rtx);
        !          7682: 
        !          7683:              if (STORE_FLAG_VALUE == 1 ? code == ASHIFTRT : code == LSHIFTRT)
        !          7684:                varop = gen_rtx_combine (NEG, GET_MODE (varop), varop);
        !          7685: 
        !          7686:              continue;
        !          7687:            }
        !          7688: 
        !          7689:          /* If we have (shift (logical)), move the logical to the outside
        !          7690:             to allow it to possibly combine with another logical and the
        !          7691:             shift to combine with another shift.  This also canonicalizes to
        !          7692:             what a ZERO_EXTRACT looks like.  Also, some machines have
        !          7693:             (and (shift)) insns.  */
        !          7694: 
        !          7695:          if (GET_CODE (XEXP (varop, 1)) == CONST_INT
        !          7696:              && (new = simplify_binary_operation (code, result_mode,
        !          7697:                                                   XEXP (varop, 1),
        !          7698:                                                   GEN_INT (count))) != 0
        !          7699:              && merge_outer_ops (&outer_op, &outer_const, GET_CODE (varop),
        !          7700:                                  INTVAL (new), result_mode, &complement_p))
        !          7701:            {
        !          7702:              varop = XEXP (varop, 0);
        !          7703:              continue;
        !          7704:            }
        !          7705: 
        !          7706:          /* If we can't do that, try to simplify the shift in each arm of the
        !          7707:             logical expression, make a new logical expression, and apply
        !          7708:             the inverse distributive law.  */
        !          7709:          {
        !          7710:            rtx lhs = simplify_shift_const (NULL_RTX, code, shift_mode,
        !          7711:                                            XEXP (varop, 0), count);
        !          7712:            rtx rhs = simplify_shift_const (NULL_RTX, code, shift_mode,
        !          7713:                                            XEXP (varop, 1), count);
        !          7714: 
        !          7715:            varop = gen_binary (GET_CODE (varop), GET_MODE (varop), lhs, rhs);
        !          7716:            varop = apply_distributive_law (varop);
        !          7717: 
        !          7718:            count = 0;
        !          7719:          }
        !          7720:          break;
        !          7721: 
        !          7722:        case EQ:
        !          7723:          /* convert (lshift (eq FOO 0) C) to (xor FOO 1) if STORE_FLAG_VALUE
        !          7724:             says that the sign bit can be tested, FOO has mode MODE, C is
        !          7725:             GET_MODE_BITSIZE (MODE) - 1, and FOO has only the low-order bit
        !          7726:             may be nonzero.  */
        !          7727:          if (code == LSHIFT
        !          7728:              && XEXP (varop, 1) == const0_rtx
        !          7729:              && GET_MODE (XEXP (varop, 0)) == result_mode
        !          7730:              && count == GET_MODE_BITSIZE (result_mode) - 1
        !          7731:              && GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT
        !          7732:              && ((STORE_FLAG_VALUE
        !          7733:                   & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (result_mode) - 1))))
        !          7734:              && nonzero_bits (XEXP (varop, 0), result_mode) == 1
        !          7735:              && merge_outer_ops (&outer_op, &outer_const, XOR,
        !          7736:                                  (HOST_WIDE_INT) 1, result_mode,
        !          7737:                                  &complement_p))
        !          7738:            {
        !          7739:              varop = XEXP (varop, 0);
        !          7740:              count = 0;
        !          7741:              continue;
        !          7742:            }
        !          7743:          break;
        !          7744: 
        !          7745:        case NEG:
        !          7746:          /* (lshiftrt (neg A) C) where A is either 0 or 1 and C is one less
        !          7747:             than the number of bits in the mode is equivalent to A.  */
        !          7748:          if (code == LSHIFTRT && count == GET_MODE_BITSIZE (result_mode) - 1
        !          7749:              && nonzero_bits (XEXP (varop, 0), result_mode) == 1)
        !          7750:            {
        !          7751:              varop = XEXP (varop, 0);
        !          7752:              count = 0;
        !          7753:              continue;
        !          7754:            }
        !          7755: 
        !          7756:          /* NEG commutes with ASHIFT since it is multiplication.  Move the
        !          7757:             NEG outside to allow shifts to combine.  */
        !          7758:          if (code == ASHIFT
        !          7759:              && merge_outer_ops (&outer_op, &outer_const, NEG,
        !          7760:                                  (HOST_WIDE_INT) 0, result_mode,
        !          7761:                                  &complement_p))
        !          7762:            {
        !          7763:              varop = XEXP (varop, 0);
        !          7764:              continue;
        !          7765:            }
        !          7766:          break;
        !          7767: 
        !          7768:        case PLUS:
        !          7769:          /* (lshiftrt (plus A -1) C) where A is either 0 or 1 and C
        !          7770:             is one less than the number of bits in the mode is
        !          7771:             equivalent to (xor A 1).  */
        !          7772:          if (code == LSHIFTRT && count == GET_MODE_BITSIZE (result_mode) - 1
        !          7773:              && XEXP (varop, 1) == constm1_rtx
        !          7774:              && nonzero_bits (XEXP (varop, 0), result_mode) == 1
        !          7775:              && merge_outer_ops (&outer_op, &outer_const, XOR,
        !          7776:                                  (HOST_WIDE_INT) 1, result_mode,
        !          7777:                                  &complement_p))
        !          7778:            {
        !          7779:              count = 0;
        !          7780:              varop = XEXP (varop, 0);
        !          7781:              continue;
        !          7782:            }
        !          7783: 
        !          7784:          /* If we have (xshiftrt (plus FOO BAR) C), and the only bits
        !          7785:             that might be nonzero in BAR are those being shifted out and those
        !          7786:             bits are known zero in FOO, we can replace the PLUS with FOO.
        !          7787:             Similarly in the other operand order.  This code occurs when
        !          7788:             we are computing the size of a variable-size array.  */
        !          7789: 
        !          7790:          if ((code == ASHIFTRT || code == LSHIFTRT)
        !          7791:              && count < HOST_BITS_PER_WIDE_INT
        !          7792:              && nonzero_bits (XEXP (varop, 1), result_mode) >> count == 0
        !          7793:              && (nonzero_bits (XEXP (varop, 1), result_mode)
        !          7794:                  & nonzero_bits (XEXP (varop, 0), result_mode)) == 0)
        !          7795:            {
        !          7796:              varop = XEXP (varop, 0);
        !          7797:              continue;
        !          7798:            }
        !          7799:          else if ((code == ASHIFTRT || code == LSHIFTRT)
        !          7800:                   && count < HOST_BITS_PER_WIDE_INT
        !          7801:                   && GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT
        !          7802:                   && 0 == (nonzero_bits (XEXP (varop, 0), result_mode)
        !          7803:                            >> count)
        !          7804:                   && 0 == (nonzero_bits (XEXP (varop, 0), result_mode)
        !          7805:                            & nonzero_bits (XEXP (varop, 1),
        !          7806:                                                 result_mode)))
        !          7807:            {
        !          7808:              varop = XEXP (varop, 1);
        !          7809:              continue;
        !          7810:            }
        !          7811: 
        !          7812:          /* (ashift (plus foo C) N) is (plus (ashift foo N) C').  */
        !          7813:          if (code == ASHIFT
        !          7814:              && GET_CODE (XEXP (varop, 1)) == CONST_INT
        !          7815:              && (new = simplify_binary_operation (ASHIFT, result_mode,
        !          7816:                                                   XEXP (varop, 1),
        !          7817:                                                   GEN_INT (count))) != 0
        !          7818:              && merge_outer_ops (&outer_op, &outer_const, PLUS,
        !          7819:                                  INTVAL (new), result_mode, &complement_p))
        !          7820:            {
        !          7821:              varop = XEXP (varop, 0);
        !          7822:              continue;
        !          7823:            }
        !          7824:          break;
        !          7825: 
        !          7826:        case MINUS:
        !          7827:          /* If we have (xshiftrt (minus (ashiftrt X C)) X) C)
        !          7828:             with C the size of VAROP - 1 and the shift is logical if
        !          7829:             STORE_FLAG_VALUE is 1 and arithmetic if STORE_FLAG_VALUE is -1,
        !          7830:             we have a (gt X 0) operation.  If the shift is arithmetic with
        !          7831:             STORE_FLAG_VALUE of 1 or logical with STORE_FLAG_VALUE == -1,
        !          7832:             we have a (neg (gt X 0)) operation.  */
        !          7833: 
        !          7834:          if (GET_CODE (XEXP (varop, 0)) == ASHIFTRT
        !          7835:              && count == GET_MODE_BITSIZE (GET_MODE (varop)) - 1
        !          7836:              && (STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1)
        !          7837:              && (code == LSHIFTRT || code == ASHIFTRT)
        !          7838:              && GET_CODE (XEXP (XEXP (varop, 0), 1)) == CONST_INT
        !          7839:              && INTVAL (XEXP (XEXP (varop, 0), 1)) == count
        !          7840:              && rtx_equal_p (XEXP (XEXP (varop, 0), 0), XEXP (varop, 1)))
        !          7841:            {
        !          7842:              count = 0;
        !          7843:              varop = gen_rtx_combine (GT, GET_MODE (varop), XEXP (varop, 1),
        !          7844:                                       const0_rtx);
        !          7845: 
        !          7846:              if (STORE_FLAG_VALUE == 1 ? code == ASHIFTRT : code == LSHIFTRT)
        !          7847:                varop = gen_rtx_combine (NEG, GET_MODE (varop), varop);
        !          7848: 
        !          7849:              continue;
        !          7850:            }
        !          7851:          break;
        !          7852:        }
        !          7853: 
        !          7854:       break;
        !          7855:     }
        !          7856: 
        !          7857:   /* We need to determine what mode to do the shift in.  If the shift is
        !          7858:      a ASHIFTRT or ROTATE, we must always do it in the mode it was originally
        !          7859:      done in.  Otherwise, we can do it in MODE, the widest mode encountered.
        !          7860:      The code we care about is that of the shift that will actually be done,
        !          7861:      not the shift that was originally requested.  */
        !          7862:   shift_mode = (code == ASHIFTRT || code == ROTATE ? result_mode : mode);
        !          7863: 
        !          7864:   /* We have now finished analyzing the shift.  The result should be
        !          7865:      a shift of type CODE with SHIFT_MODE shifting VAROP COUNT places.  If
        !          7866:      OUTER_OP is non-NIL, it is an operation that needs to be applied
        !          7867:      to the result of the shift.  OUTER_CONST is the relevant constant,
        !          7868:      but we must turn off all bits turned off in the shift.
        !          7869: 
        !          7870:      If we were passed a value for X, see if we can use any pieces of
        !          7871:      it.  If not, make new rtx.  */
        !          7872: 
        !          7873:   if (x && GET_RTX_CLASS (GET_CODE (x)) == '2'
        !          7874:       && GET_CODE (XEXP (x, 1)) == CONST_INT
        !          7875:       && INTVAL (XEXP (x, 1)) == count)
        !          7876:     const_rtx = XEXP (x, 1);
        !          7877:   else
        !          7878:     const_rtx = GEN_INT (count);
        !          7879: 
        !          7880:   if (x && GET_CODE (XEXP (x, 0)) == SUBREG
        !          7881:       && GET_MODE (XEXP (x, 0)) == shift_mode
        !          7882:       && SUBREG_REG (XEXP (x, 0)) == varop)
        !          7883:     varop = XEXP (x, 0);
        !          7884:   else if (GET_MODE (varop) != shift_mode)
        !          7885:     varop = gen_lowpart_for_combine (shift_mode, varop);
        !          7886: 
        !          7887:   /* If we can't make the SUBREG, try to return what we were given. */
        !          7888:   if (GET_CODE (varop) == CLOBBER)
        !          7889:     return x ? x : varop;
        !          7890: 
        !          7891:   new = simplify_binary_operation (code, shift_mode, varop, const_rtx);
        !          7892:   if (new != 0)
        !          7893:     x = new;
        !          7894:   else
        !          7895:     {
        !          7896:       if (x == 0 || GET_CODE (x) != code || GET_MODE (x) != shift_mode)
        !          7897:        x = gen_rtx_combine (code, shift_mode, varop, const_rtx);
        !          7898: 
        !          7899:       SUBST (XEXP (x, 0), varop);
        !          7900:       SUBST (XEXP (x, 1), const_rtx);
        !          7901:     }
        !          7902: 
        !          7903:   /* If we have an outer operation and we just made a shift, it is
        !          7904:      possible that we could have simplified the shift were it not
        !          7905:      for the outer operation.  So try to do the simplification
        !          7906:      recursively.  */
        !          7907: 
        !          7908:   if (outer_op != NIL && GET_CODE (x) == code
        !          7909:       && GET_CODE (XEXP (x, 1)) == CONST_INT)
        !          7910:     x = simplify_shift_const (x, code, shift_mode, XEXP (x, 0),
        !          7911:                              INTVAL (XEXP (x, 1)));
        !          7912: 
        !          7913:   /* If we were doing a LSHIFTRT in a wider mode than it was originally,
        !          7914:      turn off all the bits that the shift would have turned off.  */
        !          7915:   if (orig_code == LSHIFTRT && result_mode != shift_mode)
        !          7916:     x = simplify_and_const_int (NULL_RTX, shift_mode, x,
        !          7917:                                GET_MODE_MASK (result_mode) >> orig_count);
        !          7918:       
        !          7919:   /* Do the remainder of the processing in RESULT_MODE.  */
        !          7920:   x = gen_lowpart_for_combine (result_mode, x);
        !          7921: 
        !          7922:   /* If COMPLEMENT_P is set, we have to complement X before doing the outer
        !          7923:      operation.  */
        !          7924:   if (complement_p)
        !          7925:     x = gen_unary (NOT, result_mode, x);
        !          7926: 
        !          7927:   if (outer_op != NIL)
        !          7928:     {
        !          7929:       if (GET_MODE_BITSIZE (result_mode) < HOST_BITS_PER_WIDE_INT)
        !          7930:        outer_const &= GET_MODE_MASK (result_mode);
        !          7931: 
        !          7932:       if (outer_op == AND)
        !          7933:        x = simplify_and_const_int (NULL_RTX, result_mode, x, outer_const);
        !          7934:       else if (outer_op == SET)
        !          7935:        /* This means that we have determined that the result is
        !          7936:           equivalent to a constant.  This should be rare.  */
        !          7937:        x = GEN_INT (outer_const);
        !          7938:       else if (GET_RTX_CLASS (outer_op) == '1')
        !          7939:        x = gen_unary (outer_op, result_mode, x);
        !          7940:       else
        !          7941:        x = gen_binary (outer_op, result_mode, x, GEN_INT (outer_const));
        !          7942:     }
        !          7943: 
        !          7944:   return x;
        !          7945: }  
        !          7946: 
        !          7947: /* Like recog, but we receive the address of a pointer to a new pattern.
        !          7948:    We try to match the rtx that the pointer points to.
        !          7949:    If that fails, we may try to modify or replace the pattern,
        !          7950:    storing the replacement into the same pointer object.
        !          7951: 
        !          7952:    Modifications include deletion or addition of CLOBBERs.
        !          7953: 
        !          7954:    PNOTES is a pointer to a location where any REG_UNUSED notes added for
        !          7955:    the CLOBBERs are placed.
        !          7956: 
        !          7957:    The value is the final insn code from the pattern ultimately matched,
        !          7958:    or -1.  */
        !          7959: 
        !          7960: static int
        !          7961: recog_for_combine (pnewpat, insn, pnotes)
        !          7962:      rtx *pnewpat;
        !          7963:      rtx insn;
        !          7964:      rtx *pnotes;
        !          7965: {
        !          7966:   register rtx pat = *pnewpat;
        !          7967:   int insn_code_number;
        !          7968:   int num_clobbers_to_add = 0;
        !          7969:   int i;
        !          7970:   rtx notes = 0;
        !          7971: 
        !          7972:   /* If PAT is a PARALLEL, check to see if it contains the CLOBBER
        !          7973:      we use to indicate that something didn't match.  If we find such a
        !          7974:      thing, force rejection.  */
        !          7975:   if (GET_CODE (pat) == PARALLEL)
        !          7976:     for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
        !          7977:       if (GET_CODE (XVECEXP (pat, 0, i)) == CLOBBER
        !          7978:          && XEXP (XVECEXP (pat, 0, i), 0) == const0_rtx)
        !          7979:        return -1;
        !          7980: 
        !          7981:   /* Is the result of combination a valid instruction?  */
        !          7982:   insn_code_number = recog (pat, insn, &num_clobbers_to_add);
        !          7983: 
        !          7984:   /* If it isn't, there is the possibility that we previously had an insn
        !          7985:      that clobbered some register as a side effect, but the combined
        !          7986:      insn doesn't need to do that.  So try once more without the clobbers
        !          7987:      unless this represents an ASM insn.  */
        !          7988: 
        !          7989:   if (insn_code_number < 0 && ! check_asm_operands (pat)
        !          7990:       && GET_CODE (pat) == PARALLEL)
        !          7991:     {
        !          7992:       int pos;
        !          7993: 
        !          7994:       for (pos = 0, i = 0; i < XVECLEN (pat, 0); i++)
        !          7995:        if (GET_CODE (XVECEXP (pat, 0, i)) != CLOBBER)
        !          7996:          {
        !          7997:            if (i != pos)
        !          7998:              SUBST (XVECEXP (pat, 0, pos), XVECEXP (pat, 0, i));
        !          7999:            pos++;
        !          8000:          }
        !          8001: 
        !          8002:       SUBST_INT (XVECLEN (pat, 0), pos);
        !          8003: 
        !          8004:       if (pos == 1)
        !          8005:        pat = XVECEXP (pat, 0, 0);
        !          8006: 
        !          8007:       insn_code_number = recog (pat, insn, &num_clobbers_to_add);
        !          8008:     }
        !          8009: 
        !          8010:   /* If we had any clobbers to add, make a new pattern than contains
        !          8011:      them.  Then check to make sure that all of them are dead.  */
        !          8012:   if (num_clobbers_to_add)
        !          8013:     {
        !          8014:       rtx newpat = gen_rtx (PARALLEL, VOIDmode,
        !          8015:                            gen_rtvec (GET_CODE (pat) == PARALLEL
        !          8016:                                       ? XVECLEN (pat, 0) + num_clobbers_to_add
        !          8017:                                       : num_clobbers_to_add + 1));
        !          8018: 
        !          8019:       if (GET_CODE (pat) == PARALLEL)
        !          8020:        for (i = 0; i < XVECLEN (pat, 0); i++)
        !          8021:          XVECEXP (newpat, 0, i) = XVECEXP (pat, 0, i);
        !          8022:       else
        !          8023:        XVECEXP (newpat, 0, 0) = pat;
        !          8024: 
        !          8025:       add_clobbers (newpat, insn_code_number);
        !          8026: 
        !          8027:       for (i = XVECLEN (newpat, 0) - num_clobbers_to_add;
        !          8028:           i < XVECLEN (newpat, 0); i++)
        !          8029:        {
        !          8030:          if (GET_CODE (XEXP (XVECEXP (newpat, 0, i), 0)) == REG
        !          8031:              && ! reg_dead_at_p (XEXP (XVECEXP (newpat, 0, i), 0), insn))
        !          8032:            return -1;
        !          8033:          notes = gen_rtx (EXPR_LIST, REG_UNUSED,
        !          8034:                           XEXP (XVECEXP (newpat, 0, i), 0), notes);
        !          8035:        }
        !          8036:       pat = newpat;
        !          8037:     }
        !          8038: 
        !          8039:   *pnewpat = pat;
        !          8040:   *pnotes = notes;
        !          8041: 
        !          8042:   return insn_code_number;
        !          8043: }
        !          8044: 
        !          8045: /* Like gen_lowpart but for use by combine.  In combine it is not possible
        !          8046:    to create any new pseudoregs.  However, it is safe to create
        !          8047:    invalid memory addresses, because combine will try to recognize
        !          8048:    them and all they will do is make the combine attempt fail.
        !          8049: 
        !          8050:    If for some reason this cannot do its job, an rtx
        !          8051:    (clobber (const_int 0)) is returned.
        !          8052:    An insn containing that will not be recognized.  */
        !          8053: 
        !          8054: #undef gen_lowpart
        !          8055: 
        !          8056: static rtx
        !          8057: gen_lowpart_for_combine (mode, x)
        !          8058:      enum machine_mode mode;
        !          8059:      register rtx x;
        !          8060: {
        !          8061:   rtx result;
        !          8062: 
        !          8063:   if (GET_MODE (x) == mode)
        !          8064:     return x;
        !          8065: 
        !          8066:   /* We can only support MODE being wider than a word if X is a
        !          8067:      constant integer or has a mode the same size.  */
        !          8068: 
        !          8069:   if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
        !          8070:       && ! ((GET_MODE (x) == VOIDmode
        !          8071:             && (GET_CODE (x) == CONST_INT
        !          8072:                 || GET_CODE (x) == CONST_DOUBLE))
        !          8073:            || GET_MODE_SIZE (GET_MODE (x)) == GET_MODE_SIZE (mode)))
        !          8074:     return gen_rtx (CLOBBER, GET_MODE (x), const0_rtx);
        !          8075: 
        !          8076:   /* X might be a paradoxical (subreg (mem)).  In that case, gen_lowpart
        !          8077:      won't know what to do.  So we will strip off the SUBREG here and
        !          8078:      process normally.  */
        !          8079:   if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
        !          8080:     {
        !          8081:       x = SUBREG_REG (x);
        !          8082:       if (GET_MODE (x) == mode)
        !          8083:        return x;
        !          8084:     }
        !          8085: 
        !          8086:   result = gen_lowpart_common (mode, x);
        !          8087:   if (result)
        !          8088:     return result;
        !          8089: 
        !          8090:   if (GET_CODE (x) == MEM)
        !          8091:     {
        !          8092:       register int offset = 0;
        !          8093:       rtx new;
        !          8094: 
        !          8095:       /* Refuse to work on a volatile memory ref or one with a mode-dependent
        !          8096:         address.  */
        !          8097:       if (MEM_VOLATILE_P (x) || mode_dependent_address_p (XEXP (x, 0)))
        !          8098:        return gen_rtx (CLOBBER, GET_MODE (x), const0_rtx);
        !          8099: 
        !          8100:       /* If we want to refer to something bigger than the original memref,
        !          8101:         generate a perverse subreg instead.  That will force a reload
        !          8102:         of the original memref X.  */
        !          8103:       if (GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (mode))
        !          8104:        return gen_rtx (SUBREG, mode, x, 0);
        !          8105: 
        !          8106: #if WORDS_BIG_ENDIAN
        !          8107:       offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
        !          8108:                - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
        !          8109: #endif
        !          8110: #if BYTES_BIG_ENDIAN
        !          8111:       /* Adjust the address so that the address-after-the-data
        !          8112:         is unchanged.  */
        !          8113:       offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
        !          8114:                 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
        !          8115: #endif
        !          8116:       new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset));
        !          8117:       RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
        !          8118:       MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
        !          8119:       MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
        !          8120:       return new;
        !          8121:     }
        !          8122: 
        !          8123:   /* If X is a comparison operator, rewrite it in a new mode.  This
        !          8124:      probably won't match, but may allow further simplifications.  */
        !          8125:   else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
        !          8126:     return gen_rtx_combine (GET_CODE (x), mode, XEXP (x, 0), XEXP (x, 1));
        !          8127: 
        !          8128:   /* If we couldn't simplify X any other way, just enclose it in a
        !          8129:      SUBREG.  Normally, this SUBREG won't match, but some patterns may
        !          8130:      include an explicit SUBREG or we may simplify it further in combine.  */
        !          8131:   else
        !          8132:     {
        !          8133:       int word = 0;
        !          8134: 
        !          8135:       if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
        !          8136:        word = ((GET_MODE_SIZE (GET_MODE (x))
        !          8137:                 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
        !          8138:                / UNITS_PER_WORD);
        !          8139:       return gen_rtx (SUBREG, mode, x, word);
        !          8140:     }
        !          8141: }
        !          8142: 
        !          8143: /* Make an rtx expression.  This is a subset of gen_rtx and only supports
        !          8144:    expressions of 1, 2, or 3 operands, each of which are rtx expressions.
        !          8145: 
        !          8146:    If the identical expression was previously in the insn (in the undobuf),
        !          8147:    it will be returned.  Only if it is not found will a new expression
        !          8148:    be made.  */
        !          8149: 
        !          8150: /*VARARGS2*/
        !          8151: static rtx
        !          8152: gen_rtx_combine (va_alist)
        !          8153:      va_dcl
        !          8154: {
        !          8155:   va_list p;
        !          8156:   enum rtx_code code;
        !          8157:   enum machine_mode mode;
        !          8158:   int n_args;
        !          8159:   rtx args[3];
        !          8160:   int i, j;
        !          8161:   char *fmt;
        !          8162:   rtx rt;
        !          8163: 
        !          8164:   va_start (p);
        !          8165:   code = va_arg (p, enum rtx_code);
        !          8166:   mode = va_arg (p, enum machine_mode);
        !          8167:   n_args = GET_RTX_LENGTH (code);
        !          8168:   fmt = GET_RTX_FORMAT (code);
        !          8169: 
        !          8170:   if (n_args == 0 || n_args > 3)
        !          8171:     abort ();
        !          8172: 
        !          8173:   /* Get each arg and verify that it is supposed to be an expression.  */
        !          8174:   for (j = 0; j < n_args; j++)
        !          8175:     {
        !          8176:       if (*fmt++ != 'e')
        !          8177:        abort ();
        !          8178: 
        !          8179:       args[j] = va_arg (p, rtx);
        !          8180:     }
        !          8181: 
        !          8182:   /* See if this is in undobuf.  Be sure we don't use objects that came
        !          8183:      from another insn; this could produce circular rtl structures.  */
        !          8184: 
        !          8185:   for (i = previous_num_undos; i < undobuf.num_undo; i++)
        !          8186:     if (!undobuf.undo[i].is_int
        !          8187:        && GET_CODE (undobuf.undo[i].old_contents.r) == code
        !          8188:        && GET_MODE (undobuf.undo[i].old_contents.r) == mode)
        !          8189:       {
        !          8190:        for (j = 0; j < n_args; j++)
        !          8191:          if (XEXP (undobuf.undo[i].old_contents.r, j) != args[j])
        !          8192:            break;
        !          8193: 
        !          8194:        if (j == n_args)
        !          8195:          return undobuf.undo[i].old_contents.r;
        !          8196:       }
        !          8197: 
        !          8198:   /* Otherwise make a new rtx.  We know we have 1, 2, or 3 args.
        !          8199:      Use rtx_alloc instead of gen_rtx because it's faster on RISC.  */
        !          8200:   rt = rtx_alloc (code);
        !          8201:   PUT_MODE (rt, mode);
        !          8202:   XEXP (rt, 0) = args[0];
        !          8203:   if (n_args > 1)
        !          8204:     {
        !          8205:       XEXP (rt, 1) = args[1];
        !          8206:       if (n_args > 2)
        !          8207:        XEXP (rt, 2) = args[2];
        !          8208:     }
        !          8209:   return rt;
        !          8210: }
        !          8211: 
        !          8212: /* These routines make binary and unary operations by first seeing if they
        !          8213:    fold; if not, a new expression is allocated.  */
        !          8214: 
        !          8215: static rtx
        !          8216: gen_binary (code, mode, op0, op1)
        !          8217:      enum rtx_code code;
        !          8218:      enum machine_mode mode;
        !          8219:      rtx op0, op1;
        !          8220: {
        !          8221:   rtx result;
        !          8222:   rtx tem;
        !          8223: 
        !          8224:   if (GET_RTX_CLASS (code) == 'c'
        !          8225:       && (GET_CODE (op0) == CONST_INT
        !          8226:          || (CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)))
        !          8227:     tem = op0, op0 = op1, op1 = tem;
        !          8228: 
        !          8229:   if (GET_RTX_CLASS (code) == '<') 
        !          8230:     {
        !          8231:       enum machine_mode op_mode = GET_MODE (op0);
        !          8232:       if (op_mode == VOIDmode)
        !          8233:        op_mode = GET_MODE (op1);
        !          8234:       result = simplify_relational_operation (code, op_mode, op0, op1);
        !          8235:     }
        !          8236:   else
        !          8237:     result = simplify_binary_operation (code, mode, op0, op1);
        !          8238: 
        !          8239:   if (result)
        !          8240:     return result;
        !          8241: 
        !          8242:   /* Put complex operands first and constants second.  */
        !          8243:   if (GET_RTX_CLASS (code) == 'c'
        !          8244:       && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
        !          8245:          || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
        !          8246:              && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
        !          8247:          || (GET_CODE (op0) == SUBREG
        !          8248:              && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
        !          8249:              && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
        !          8250:     return gen_rtx_combine (code, mode, op1, op0);
        !          8251: 
        !          8252:   return gen_rtx_combine (code, mode, op0, op1);
        !          8253: }
        !          8254: 
        !          8255: static rtx
        !          8256: gen_unary (code, mode, op0)
        !          8257:      enum rtx_code code;
        !          8258:      enum machine_mode mode;
        !          8259:      rtx op0;
        !          8260: {
        !          8261:   rtx result = simplify_unary_operation (code, mode, op0, mode);
        !          8262: 
        !          8263:   if (result)
        !          8264:     return result;
        !          8265: 
        !          8266:   return gen_rtx_combine (code, mode, op0);
        !          8267: }
        !          8268: 
        !          8269: /* Simplify a comparison between *POP0 and *POP1 where CODE is the
        !          8270:    comparison code that will be tested.
        !          8271: 
        !          8272:    The result is a possibly different comparison code to use.  *POP0 and
        !          8273:    *POP1 may be updated.
        !          8274: 
        !          8275:    It is possible that we might detect that a comparison is either always
        !          8276:    true or always false.  However, we do not perform general constant
        !          8277:    folding in combine, so this knowledge isn't useful.  Such tautologies
        !          8278:    should have been detected earlier.  Hence we ignore all such cases.  */
        !          8279: 
        !          8280: static enum rtx_code
        !          8281: simplify_comparison (code, pop0, pop1)
        !          8282:      enum rtx_code code;
        !          8283:      rtx *pop0;
        !          8284:      rtx *pop1;
        !          8285: {
        !          8286:   rtx op0 = *pop0;
        !          8287:   rtx op1 = *pop1;
        !          8288:   rtx tem, tem1;
        !          8289:   int i;
        !          8290:   enum machine_mode mode, tmode;
        !          8291: 
        !          8292:   /* Try a few ways of applying the same transformation to both operands.  */
        !          8293:   while (1)
        !          8294:     {
        !          8295:       /* If both operands are the same constant shift, see if we can ignore the
        !          8296:         shift.  We can if the shift is a rotate or if the bits shifted out of
        !          8297:         this shift are known to be zero for both inputs and if the type of
        !          8298:         comparison is compatible with the shift.  */
        !          8299:       if (GET_CODE (op0) == GET_CODE (op1)
        !          8300:          && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT
        !          8301:          && ((GET_CODE (op0) == ROTATE && (code == NE || code == EQ))
        !          8302:              || ((GET_CODE (op0) == LSHIFTRT
        !          8303:                   || GET_CODE (op0) == ASHIFT || GET_CODE (op0) == LSHIFT)
        !          8304:                  && (code != GT && code != LT && code != GE && code != LE))
        !          8305:              || (GET_CODE (op0) == ASHIFTRT
        !          8306:                  && (code != GTU && code != LTU
        !          8307:                      && code != GEU && code != GEU)))
        !          8308:          && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          8309:          && INTVAL (XEXP (op0, 1)) >= 0
        !          8310:          && INTVAL (XEXP (op0, 1)) < HOST_BITS_PER_WIDE_INT
        !          8311:          && XEXP (op0, 1) == XEXP (op1, 1))
        !          8312:        {
        !          8313:          enum machine_mode mode = GET_MODE (op0);
        !          8314:          unsigned HOST_WIDE_INT mask = GET_MODE_MASK (mode);
        !          8315:          int shift_count = INTVAL (XEXP (op0, 1));
        !          8316: 
        !          8317:          if (GET_CODE (op0) == LSHIFTRT || GET_CODE (op0) == ASHIFTRT)
        !          8318:            mask &= (mask >> shift_count) << shift_count;
        !          8319:          else if (GET_CODE (op0) == ASHIFT || GET_CODE (op0) == LSHIFT)
        !          8320:            mask = (mask & (mask << shift_count)) >> shift_count;
        !          8321: 
        !          8322:          if ((nonzero_bits (XEXP (op0, 0), mode) & ~ mask) == 0
        !          8323:              && (nonzero_bits (XEXP (op1, 0), mode) & ~ mask) == 0)
        !          8324:            op0 = XEXP (op0, 0), op1 = XEXP (op1, 0);
        !          8325:          else
        !          8326:            break;
        !          8327:        }
        !          8328: 
        !          8329:       /* If both operands are AND's of a paradoxical SUBREG by constant, the
        !          8330:         SUBREGs are of the same mode, and, in both cases, the AND would
        !          8331:         be redundant if the comparison was done in the narrower mode,
        !          8332:         do the comparison in the narrower mode (e.g., we are AND'ing with 1
        !          8333:         and the operand's possibly nonzero bits are 0xffffff01; in that case
        !          8334:         if we only care about QImode, we don't need the AND).  This case
        !          8335:         occurs if the output mode of an scc insn is not SImode and
        !          8336:         STORE_FLAG_VALUE == 1 (e.g., the 386).  */
        !          8337: 
        !          8338:       else if  (GET_CODE (op0) == AND && GET_CODE (op1) == AND
        !          8339:                && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          8340:                && GET_CODE (XEXP (op1, 1)) == CONST_INT
        !          8341:                && GET_CODE (XEXP (op0, 0)) == SUBREG
        !          8342:                && GET_CODE (XEXP (op1, 0)) == SUBREG
        !          8343:                && (GET_MODE_SIZE (GET_MODE (XEXP (op0, 0)))
        !          8344:                    > GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (op0, 0)))))
        !          8345:                && (GET_MODE (SUBREG_REG (XEXP (op0, 0)))
        !          8346:                    == GET_MODE (SUBREG_REG (XEXP (op1, 0))))
        !          8347:                && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (XEXP (op0, 0))))
        !          8348:                    <= HOST_BITS_PER_WIDE_INT)
        !          8349:                && (nonzero_bits (SUBREG_REG (XEXP (op0, 0)),
        !          8350:                                      GET_MODE (SUBREG_REG (XEXP (op0, 0))))
        !          8351:                    & ~ INTVAL (XEXP (op0, 1))) == 0
        !          8352:                && (nonzero_bits (SUBREG_REG (XEXP (op1, 0)),
        !          8353:                                      GET_MODE (SUBREG_REG (XEXP (op1, 0))))
        !          8354:                    & ~ INTVAL (XEXP (op1, 1))) == 0)
        !          8355:        {
        !          8356:          op0 = SUBREG_REG (XEXP (op0, 0));
        !          8357:          op1 = SUBREG_REG (XEXP (op1, 0));
        !          8358: 
        !          8359:          /* the resulting comparison is always unsigned since we masked off
        !          8360:             the original sign bit. */
        !          8361:          code = unsigned_condition (code);
        !          8362:        }
        !          8363:       else
        !          8364:        break;
        !          8365:     }
        !          8366:      
        !          8367:   /* If the first operand is a constant, swap the operands and adjust the
        !          8368:      comparison code appropriately.  */
        !          8369:   if (CONSTANT_P (op0))
        !          8370:     {
        !          8371:       tem = op0, op0 = op1, op1 = tem;
        !          8372:       code = swap_condition (code);
        !          8373:     }
        !          8374: 
        !          8375:   /* We now enter a loop during which we will try to simplify the comparison.
        !          8376:      For the most part, we only are concerned with comparisons with zero,
        !          8377:      but some things may really be comparisons with zero but not start
        !          8378:      out looking that way.  */
        !          8379: 
        !          8380:   while (GET_CODE (op1) == CONST_INT)
        !          8381:     {
        !          8382:       enum machine_mode mode = GET_MODE (op0);
        !          8383:       int mode_width = GET_MODE_BITSIZE (mode);
        !          8384:       unsigned HOST_WIDE_INT mask = GET_MODE_MASK (mode);
        !          8385:       int equality_comparison_p;
        !          8386:       int sign_bit_comparison_p;
        !          8387:       int unsigned_comparison_p;
        !          8388:       HOST_WIDE_INT const_op;
        !          8389: 
        !          8390:       /* We only want to handle integral modes.  This catches VOIDmode,
        !          8391:         CCmode, and the floating-point modes.  An exception is that we
        !          8392:         can handle VOIDmode if OP0 is a COMPARE or a comparison
        !          8393:         operation.  */
        !          8394: 
        !          8395:       if (GET_MODE_CLASS (mode) != MODE_INT
        !          8396:          && ! (mode == VOIDmode
        !          8397:                && (GET_CODE (op0) == COMPARE
        !          8398:                    || GET_RTX_CLASS (GET_CODE (op0)) == '<')))
        !          8399:        break;
        !          8400: 
        !          8401:       /* Get the constant we are comparing against and turn off all bits
        !          8402:         not on in our mode.  */
        !          8403:       const_op = INTVAL (op1);
        !          8404:       if (mode_width <= HOST_BITS_PER_WIDE_INT)
        !          8405:        const_op &= mask;
        !          8406: 
        !          8407:       /* If we are comparing against a constant power of two and the value
        !          8408:         being compared can only have that single bit nonzero (e.g., it was
        !          8409:         `and'ed with that bit), we can replace this with a comparison
        !          8410:         with zero.  */
        !          8411:       if (const_op
        !          8412:          && (code == EQ || code == NE || code == GE || code == GEU
        !          8413:              || code == LT || code == LTU)
        !          8414:          && mode_width <= HOST_BITS_PER_WIDE_INT
        !          8415:          && exact_log2 (const_op) >= 0
        !          8416:          && nonzero_bits (op0, mode) == const_op)
        !          8417:        {
        !          8418:          code = (code == EQ || code == GE || code == GEU ? NE : EQ);
        !          8419:          op1 = const0_rtx, const_op = 0;
        !          8420:        }
        !          8421: 
        !          8422:       /* Similarly, if we are comparing a value known to be either -1 or
        !          8423:         0 with -1, change it to the opposite comparison against zero.  */
        !          8424: 
        !          8425:       if (const_op == -1
        !          8426:          && (code == EQ || code == NE || code == GT || code == LE
        !          8427:              || code == GEU || code == LTU)
        !          8428:          && num_sign_bit_copies (op0, mode) == mode_width)
        !          8429:        {
        !          8430:          code = (code == EQ || code == LE || code == GEU ? NE : EQ);
        !          8431:          op1 = const0_rtx, const_op = 0;
        !          8432:        }
        !          8433: 
        !          8434:       /* Do some canonicalizations based on the comparison code.  We prefer
        !          8435:         comparisons against zero and then prefer equality comparisons.  
        !          8436:         If we can reduce the size of a constant, we will do that too.  */
        !          8437: 
        !          8438:       switch (code)
        !          8439:        {
        !          8440:        case LT:
        !          8441:          /* < C is equivalent to <= (C - 1) */
        !          8442:          if (const_op > 0)
        !          8443:            {
        !          8444:              const_op -= 1;
        !          8445:              op1 = GEN_INT (const_op);
        !          8446:              code = LE;
        !          8447:              /* ... fall through to LE case below.  */
        !          8448:            }
        !          8449:          else
        !          8450:            break;
        !          8451: 
        !          8452:        case LE:
        !          8453:          /* <= C is equivalent to < (C + 1); we do this for C < 0  */
        !          8454:          if (const_op < 0)
        !          8455:            {
        !          8456:              const_op += 1;
        !          8457:              op1 = GEN_INT (const_op);
        !          8458:              code = LT;
        !          8459:            }
        !          8460: 
        !          8461:          /* If we are doing a <= 0 comparison on a value known to have
        !          8462:             a zero sign bit, we can replace this with == 0.  */
        !          8463:          else if (const_op == 0
        !          8464:                   && mode_width <= HOST_BITS_PER_WIDE_INT
        !          8465:                   && (nonzero_bits (op0, mode)
        !          8466:                       & ((HOST_WIDE_INT) 1 << (mode_width - 1))) == 0)
        !          8467:            code = EQ;
        !          8468:          break;
        !          8469: 
        !          8470:        case GE:
        !          8471:          /* >= C is equivalent to > (C - 1). */
        !          8472:          if (const_op > 0)
        !          8473:            {
        !          8474:              const_op -= 1;
        !          8475:              op1 = GEN_INT (const_op);
        !          8476:              code = GT;
        !          8477:              /* ... fall through to GT below.  */
        !          8478:            }
        !          8479:          else
        !          8480:            break;
        !          8481: 
        !          8482:        case GT:
        !          8483:          /* > C is equivalent to >= (C + 1); we do this for C < 0*/
        !          8484:          if (const_op < 0)
        !          8485:            {
        !          8486:              const_op += 1;
        !          8487:              op1 = GEN_INT (const_op);
        !          8488:              code = GE;
        !          8489:            }
        !          8490: 
        !          8491:          /* If we are doing a > 0 comparison on a value known to have
        !          8492:             a zero sign bit, we can replace this with != 0.  */
        !          8493:          else if (const_op == 0
        !          8494:                   && mode_width <= HOST_BITS_PER_WIDE_INT
        !          8495:                   && (nonzero_bits (op0, mode)
        !          8496:                       & ((HOST_WIDE_INT) 1 << (mode_width - 1))) == 0)
        !          8497:            code = NE;
        !          8498:          break;
        !          8499: 
        !          8500:        case LTU:
        !          8501:          /* < C is equivalent to <= (C - 1).  */
        !          8502:          if (const_op > 0)
        !          8503:            {
        !          8504:              const_op -= 1;
        !          8505:              op1 = GEN_INT (const_op);
        !          8506:              code = LEU;
        !          8507:              /* ... fall through ... */
        !          8508:            }
        !          8509: 
        !          8510:          /* (unsigned) < 0x80000000 is equivalent to >= 0.  */
        !          8511:          else if (const_op == (HOST_WIDE_INT) 1 << (mode_width - 1))
        !          8512:            {
        !          8513:              const_op = 0, op1 = const0_rtx;
        !          8514:              code = GE;
        !          8515:              break;
        !          8516:            }
        !          8517:          else
        !          8518:            break;
        !          8519: 
        !          8520:        case LEU:
        !          8521:          /* unsigned <= 0 is equivalent to == 0 */
        !          8522:          if (const_op == 0)
        !          8523:            code = EQ;
        !          8524: 
        !          8525:          /* (unsigned) <= 0x7fffffff is equivalent to >= 0. */
        !          8526:          else if (const_op == ((HOST_WIDE_INT) 1 << (mode_width - 1)) - 1)
        !          8527:            {
        !          8528:              const_op = 0, op1 = const0_rtx;
        !          8529:              code = GE;
        !          8530:            }
        !          8531:          break;
        !          8532: 
        !          8533:        case GEU:
        !          8534:          /* >= C is equivalent to < (C - 1).  */
        !          8535:          if (const_op > 1)
        !          8536:            {
        !          8537:              const_op -= 1;
        !          8538:              op1 = GEN_INT (const_op);
        !          8539:              code = GTU;
        !          8540:              /* ... fall through ... */
        !          8541:            }
        !          8542: 
        !          8543:          /* (unsigned) >= 0x80000000 is equivalent to < 0.  */
        !          8544:          else if (const_op == (HOST_WIDE_INT) 1 << (mode_width - 1))
        !          8545:            {
        !          8546:              const_op = 0, op1 = const0_rtx;
        !          8547:              code = LT;
        !          8548:            }
        !          8549:          else
        !          8550:            break;
        !          8551: 
        !          8552:        case GTU:
        !          8553:          /* unsigned > 0 is equivalent to != 0 */
        !          8554:          if (const_op == 0)
        !          8555:            code = NE;
        !          8556: 
        !          8557:          /* (unsigned) > 0x7fffffff is equivalent to < 0.  */
        !          8558:          else if (const_op == ((HOST_WIDE_INT) 1 << (mode_width - 1)) - 1)
        !          8559:            {
        !          8560:              const_op = 0, op1 = const0_rtx;
        !          8561:              code = LT;
        !          8562:            }
        !          8563:          break;
        !          8564:        }
        !          8565: 
        !          8566:       /* Compute some predicates to simplify code below.  */
        !          8567: 
        !          8568:       equality_comparison_p = (code == EQ || code == NE);
        !          8569:       sign_bit_comparison_p = ((code == LT || code == GE) && const_op == 0);
        !          8570:       unsigned_comparison_p = (code == LTU || code == LEU || code == GTU
        !          8571:                               || code == LEU);
        !          8572: 
        !          8573:       /* If this is a sign bit comparison and we can do arithmetic in
        !          8574:         MODE, say that we will only be needing the sign bit of OP0.  */
        !          8575:       if (sign_bit_comparison_p
        !          8576:          && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
        !          8577:        op0 = force_to_mode (op0, mode,
        !          8578:                             ((HOST_WIDE_INT) 1
        !          8579:                              << (GET_MODE_BITSIZE (mode) - 1)),
        !          8580:                             NULL_RTX, 0);
        !          8581: 
        !          8582:       /* Now try cases based on the opcode of OP0.  If none of the cases
        !          8583:         does a "continue", we exit this loop immediately after the
        !          8584:         switch.  */
        !          8585: 
        !          8586:       switch (GET_CODE (op0))
        !          8587:        {
        !          8588:        case ZERO_EXTRACT:
        !          8589:          /* If we are extracting a single bit from a variable position in
        !          8590:             a constant that has only a single bit set and are comparing it
        !          8591:             with zero, we can convert this into an equality comparison 
        !          8592:             between the position and the location of the single bit.  We can't
        !          8593:             do this if bit endian and we don't have an extzv since we then
        !          8594:             can't know what mode to use for the endianness adjustment.  */
        !          8595: 
        !          8596: #if ! BITS_BIG_ENDIAN || defined (HAVE_extzv)
        !          8597:          if (GET_CODE (XEXP (op0, 0)) == CONST_INT
        !          8598:              && XEXP (op0, 1) == const1_rtx
        !          8599:              && equality_comparison_p && const_op == 0
        !          8600:              && (i = exact_log2 (INTVAL (XEXP (op0, 0)))) >= 0)
        !          8601:            {
        !          8602: #if BITS_BIG_ENDIAN
        !          8603:              i = (GET_MODE_BITSIZE
        !          8604:                   (insn_operand_mode[(int) CODE_FOR_extzv][1]) - 1 - i);
        !          8605: #endif
        !          8606: 
        !          8607:              op0 = XEXP (op0, 2);
        !          8608:              op1 = GEN_INT (i);
        !          8609:              const_op = i;
        !          8610: 
        !          8611:              /* Result is nonzero iff shift count is equal to I.  */
        !          8612:              code = reverse_condition (code);
        !          8613:              continue;
        !          8614:            }
        !          8615: #endif
        !          8616: 
        !          8617:          /* ... fall through ... */
        !          8618: 
        !          8619:        case SIGN_EXTRACT:
        !          8620:          tem = expand_compound_operation (op0);
        !          8621:          if (tem != op0)
        !          8622:            {
        !          8623:              op0 = tem;
        !          8624:              continue;
        !          8625:            }
        !          8626:          break;
        !          8627: 
        !          8628:        case NOT:
        !          8629:          /* If testing for equality, we can take the NOT of the constant.  */
        !          8630:          if (equality_comparison_p
        !          8631:              && (tem = simplify_unary_operation (NOT, mode, op1, mode)) != 0)
        !          8632:            {
        !          8633:              op0 = XEXP (op0, 0);
        !          8634:              op1 = tem;
        !          8635:              continue;
        !          8636:            }
        !          8637: 
        !          8638:          /* If just looking at the sign bit, reverse the sense of the
        !          8639:             comparison.  */
        !          8640:          if (sign_bit_comparison_p)
        !          8641:            {
        !          8642:              op0 = XEXP (op0, 0);
        !          8643:              code = (code == GE ? LT : GE);
        !          8644:              continue;
        !          8645:            }
        !          8646:          break;
        !          8647: 
        !          8648:        case NEG:
        !          8649:          /* If testing for equality, we can take the NEG of the constant.  */
        !          8650:          if (equality_comparison_p
        !          8651:              && (tem = simplify_unary_operation (NEG, mode, op1, mode)) != 0)
        !          8652:            {
        !          8653:              op0 = XEXP (op0, 0);
        !          8654:              op1 = tem;
        !          8655:              continue;
        !          8656:            }
        !          8657: 
        !          8658:          /* The remaining cases only apply to comparisons with zero.  */
        !          8659:          if (const_op != 0)
        !          8660:            break;
        !          8661: 
        !          8662:          /* When X is ABS or is known positive,
        !          8663:             (neg X) is < 0 if and only if X != 0.  */
        !          8664: 
        !          8665:          if (sign_bit_comparison_p
        !          8666:              && (GET_CODE (XEXP (op0, 0)) == ABS
        !          8667:                  || (mode_width <= HOST_BITS_PER_WIDE_INT
        !          8668:                      && (nonzero_bits (XEXP (op0, 0), mode)
        !          8669:                          & ((HOST_WIDE_INT) 1 << (mode_width - 1))) == 0)))
        !          8670:            {
        !          8671:              op0 = XEXP (op0, 0);
        !          8672:              code = (code == LT ? NE : EQ);
        !          8673:              continue;
        !          8674:            }
        !          8675: 
        !          8676:          /* If we have NEG of something whose two high-order bits are the
        !          8677:             same, we know that "(-a) < 0" is equivalent to "a > 0". */
        !          8678:          if (num_sign_bit_copies (op0, mode) >= 2)
        !          8679:            {
        !          8680:              op0 = XEXP (op0, 0);
        !          8681:              code = swap_condition (code);
        !          8682:              continue;
        !          8683:            }
        !          8684:          break;
        !          8685: 
        !          8686:        case ROTATE:
        !          8687:          /* If we are testing equality and our count is a constant, we
        !          8688:             can perform the inverse operation on our RHS.  */
        !          8689:          if (equality_comparison_p && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          8690:              && (tem = simplify_binary_operation (ROTATERT, mode,
        !          8691:                                                   op1, XEXP (op0, 1))) != 0)
        !          8692:            {
        !          8693:              op0 = XEXP (op0, 0);
        !          8694:              op1 = tem;
        !          8695:              continue;
        !          8696:            }
        !          8697: 
        !          8698:          /* If we are doing a < 0 or >= 0 comparison, it means we are testing
        !          8699:             a particular bit.  Convert it to an AND of a constant of that
        !          8700:             bit.  This will be converted into a ZERO_EXTRACT.  */
        !          8701:          if (const_op == 0 && sign_bit_comparison_p
        !          8702:              && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          8703:              && mode_width <= HOST_BITS_PER_WIDE_INT)
        !          8704:            {
        !          8705:              op0 = simplify_and_const_int (NULL_RTX, mode, XEXP (op0, 0),
        !          8706:                                            ((HOST_WIDE_INT) 1
        !          8707:                                             << (mode_width - 1
        !          8708:                                                 - INTVAL (XEXP (op0, 1)))));
        !          8709:              code = (code == LT ? NE : EQ);
        !          8710:              continue;
        !          8711:            }
        !          8712: 
        !          8713:          /* ... fall through ... */
        !          8714: 
        !          8715:        case ABS:
        !          8716:          /* ABS is ignorable inside an equality comparison with zero.  */
        !          8717:          if (const_op == 0 && equality_comparison_p)
        !          8718:            {
        !          8719:              op0 = XEXP (op0, 0);
        !          8720:              continue;
        !          8721:            }
        !          8722:          break;
        !          8723:          
        !          8724: 
        !          8725:        case SIGN_EXTEND:
        !          8726:          /* Can simplify (compare (zero/sign_extend FOO) CONST)
        !          8727:             to (compare FOO CONST) if CONST fits in FOO's mode and we 
        !          8728:             are either testing inequality or have an unsigned comparison
        !          8729:             with ZERO_EXTEND or a signed comparison with SIGN_EXTEND.  */
        !          8730:          if (! unsigned_comparison_p
        !          8731:              && (GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
        !          8732:                  <= HOST_BITS_PER_WIDE_INT)
        !          8733:              && ((unsigned HOST_WIDE_INT) const_op
        !          8734:                  < (((HOST_WIDE_INT) 1
        !          8735:                      << (GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))) - 1)))))
        !          8736:            {
        !          8737:              op0 = XEXP (op0, 0);
        !          8738:              continue;
        !          8739:            }
        !          8740:          break;
        !          8741: 
        !          8742:        case SUBREG:
        !          8743:          /* Check for the case where we are comparing A - C1 with C2,
        !          8744:             both constants are smaller than 1/2 the maxium positive
        !          8745:             value in MODE, and the comparison is equality or unsigned.
        !          8746:             In that case, if A is either zero-extended to MODE or has
        !          8747:             sufficient sign bits so that the high-order bit in MODE
        !          8748:             is a copy of the sign in the inner mode, we can prove that it is
        !          8749:             safe to do the operation in the wider mode.  This simplifies
        !          8750:             many range checks.  */
        !          8751: 
        !          8752:          if (mode_width <= HOST_BITS_PER_WIDE_INT
        !          8753:              && subreg_lowpart_p (op0)
        !          8754:              && GET_CODE (SUBREG_REG (op0)) == PLUS
        !          8755:              && GET_CODE (XEXP (SUBREG_REG (op0), 1)) == CONST_INT
        !          8756:              && INTVAL (XEXP (SUBREG_REG (op0), 1)) < 0
        !          8757:              && (- INTVAL (XEXP (SUBREG_REG (op0), 1))
        !          8758:                  < GET_MODE_MASK (mode) / 2)
        !          8759:              && (unsigned HOST_WIDE_INT) const_op < GET_MODE_MASK (mode) / 2
        !          8760:              && (0 == (nonzero_bits (XEXP (SUBREG_REG (op0), 0),
        !          8761:                                      GET_MODE (SUBREG_REG (op0)))
        !          8762:                        & ~ GET_MODE_MASK (mode))
        !          8763:                  || (num_sign_bit_copies (XEXP (SUBREG_REG (op0), 0),
        !          8764:                                           GET_MODE (SUBREG_REG (op0)))
        !          8765:                      > (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
        !          8766:                         - GET_MODE_BITSIZE (mode)))))
        !          8767:            {
        !          8768:              op0 = SUBREG_REG (op0);
        !          8769:              continue;
        !          8770:            }
        !          8771: 
        !          8772:          /* If the inner mode is narrower and we are extracting the low part,
        !          8773:             we can treat the SUBREG as if it were a ZERO_EXTEND.  */
        !          8774:          if (subreg_lowpart_p (op0)
        !          8775:              && GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0))) < mode_width)
        !          8776:            /* Fall through */ ;
        !          8777:          else
        !          8778:            break;
        !          8779: 
        !          8780:          /* ... fall through ... */
        !          8781: 
        !          8782:        case ZERO_EXTEND:
        !          8783:          if ((unsigned_comparison_p || equality_comparison_p)
        !          8784:              && (GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
        !          8785:                  <= HOST_BITS_PER_WIDE_INT)
        !          8786:              && ((unsigned HOST_WIDE_INT) const_op
        !          8787:                  < GET_MODE_MASK (GET_MODE (XEXP (op0, 0)))))
        !          8788:            {
        !          8789:              op0 = XEXP (op0, 0);
        !          8790:              continue;
        !          8791:            }
        !          8792:          break;
        !          8793: 
        !          8794:        case PLUS:
        !          8795:          /* (eq (plus X A) B) -> (eq X (minus B A)).  We can only do
        !          8796:             this for equality comparisons due to pathological cases involving
        !          8797:             overflows.  */
        !          8798:          if (equality_comparison_p
        !          8799:              && 0 != (tem = simplify_binary_operation (MINUS, mode,
        !          8800:                                                        op1, XEXP (op0, 1))))
        !          8801:            {
        !          8802:              op0 = XEXP (op0, 0);
        !          8803:              op1 = tem;
        !          8804:              continue;
        !          8805:            }
        !          8806: 
        !          8807:          /* (plus (abs X) (const_int -1)) is < 0 if and only if X == 0.  */
        !          8808:          if (const_op == 0 && XEXP (op0, 1) == constm1_rtx
        !          8809:              && GET_CODE (XEXP (op0, 0)) == ABS && sign_bit_comparison_p)
        !          8810:            {
        !          8811:              op0 = XEXP (XEXP (op0, 0), 0);
        !          8812:              code = (code == LT ? EQ : NE);
        !          8813:              continue;
        !          8814:            }
        !          8815:          break;
        !          8816: 
        !          8817:        case MINUS:
        !          8818:          /* (eq (minus A B) C) -> (eq A (plus B C)) or
        !          8819:             (eq B (minus A C)), whichever simplifies.  We can only do
        !          8820:             this for equality comparisons due to pathological cases involving
        !          8821:             overflows.  */
        !          8822:          if (equality_comparison_p
        !          8823:              && 0 != (tem = simplify_binary_operation (PLUS, mode,
        !          8824:                                                        XEXP (op0, 1), op1)))
        !          8825:            {
        !          8826:              op0 = XEXP (op0, 0);
        !          8827:              op1 = tem;
        !          8828:              continue;
        !          8829:            }
        !          8830: 
        !          8831:          if (equality_comparison_p
        !          8832:              && 0 != (tem = simplify_binary_operation (MINUS, mode,
        !          8833:                                                        XEXP (op0, 0), op1)))
        !          8834:            {
        !          8835:              op0 = XEXP (op0, 1);
        !          8836:              op1 = tem;
        !          8837:              continue;
        !          8838:            }
        !          8839: 
        !          8840:          /* The sign bit of (minus (ashiftrt X C) X), where C is the number
        !          8841:             of bits in X minus 1, is one iff X > 0.  */
        !          8842:          if (sign_bit_comparison_p && GET_CODE (XEXP (op0, 0)) == ASHIFTRT
        !          8843:              && GET_CODE (XEXP (XEXP (op0, 0), 1)) == CONST_INT
        !          8844:              && INTVAL (XEXP (XEXP (op0, 0), 1)) == mode_width - 1
        !          8845:              && rtx_equal_p (XEXP (XEXP (op0, 0), 0), XEXP (op0, 1)))
        !          8846:            {
        !          8847:              op0 = XEXP (op0, 1);
        !          8848:              code = (code == GE ? LE : GT);
        !          8849:              continue;
        !          8850:            }
        !          8851:          break;
        !          8852: 
        !          8853:        case XOR:
        !          8854:          /* (eq (xor A B) C) -> (eq A (xor B C)).  This is a simplification
        !          8855:             if C is zero or B is a constant.  */
        !          8856:          if (equality_comparison_p
        !          8857:              && 0 != (tem = simplify_binary_operation (XOR, mode,
        !          8858:                                                        XEXP (op0, 1), op1)))
        !          8859:            {
        !          8860:              op0 = XEXP (op0, 0);
        !          8861:              op1 = tem;
        !          8862:              continue;
        !          8863:            }
        !          8864:          break;
        !          8865: 
        !          8866:        case EQ:  case NE:
        !          8867:        case LT:  case LTU:  case LE:  case LEU:
        !          8868:        case GT:  case GTU:  case GE:  case GEU:
        !          8869:          /* We can't do anything if OP0 is a condition code value, rather
        !          8870:             than an actual data value.  */
        !          8871:          if (const_op != 0
        !          8872: #ifdef HAVE_cc0
        !          8873:              || XEXP (op0, 0) == cc0_rtx
        !          8874: #endif
        !          8875:              || GET_MODE_CLASS (GET_MODE (XEXP (op0, 0))) == MODE_CC)
        !          8876:            break;
        !          8877: 
        !          8878:          /* Get the two operands being compared.  */
        !          8879:          if (GET_CODE (XEXP (op0, 0)) == COMPARE)
        !          8880:            tem = XEXP (XEXP (op0, 0), 0), tem1 = XEXP (XEXP (op0, 0), 1);
        !          8881:          else
        !          8882:            tem = XEXP (op0, 0), tem1 = XEXP (op0, 1);
        !          8883: 
        !          8884:          /* Check for the cases where we simply want the result of the
        !          8885:             earlier test or the opposite of that result.  */
        !          8886:          if (code == NE
        !          8887:              || (code == EQ && reversible_comparison_p (op0))
        !          8888:              || (GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT
        !          8889:                  && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
        !          8890:                  && (STORE_FLAG_VALUE
        !          8891:                      & (((HOST_WIDE_INT) 1
        !          8892:                          << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
        !          8893:                  && (code == LT
        !          8894:                      || (code == GE && reversible_comparison_p (op0)))))
        !          8895:            {
        !          8896:              code = (code == LT || code == NE
        !          8897:                      ? GET_CODE (op0) : reverse_condition (GET_CODE (op0)));
        !          8898:              op0 = tem, op1 = tem1;
        !          8899:              continue;
        !          8900:            }
        !          8901:          break;
        !          8902: 
        !          8903:        case IOR:
        !          8904:          /* The sign bit of (ior (plus X (const_int -1)) X) is non-zero
        !          8905:             iff X <= 0.  */
        !          8906:          if (sign_bit_comparison_p && GET_CODE (XEXP (op0, 0)) == PLUS
        !          8907:              && XEXP (XEXP (op0, 0), 1) == constm1_rtx
        !          8908:              && rtx_equal_p (XEXP (XEXP (op0, 0), 0), XEXP (op0, 1)))
        !          8909:            {
        !          8910:              op0 = XEXP (op0, 1);
        !          8911:              code = (code == GE ? GT : LE);
        !          8912:              continue;
        !          8913:            }
        !          8914:          break;
        !          8915: 
        !          8916:        case AND:
        !          8917:          /* Convert (and (xshift 1 X) Y) to (and (lshiftrt Y X) 1).  This
        !          8918:             will be converted to a ZERO_EXTRACT later.  */
        !          8919:          if (const_op == 0 && equality_comparison_p
        !          8920:              && (GET_CODE (XEXP (op0, 0)) == ASHIFT
        !          8921:                  || GET_CODE (XEXP (op0, 0)) == LSHIFT)
        !          8922:              && XEXP (XEXP (op0, 0), 0) == const1_rtx)
        !          8923:            {
        !          8924:              op0 = simplify_and_const_int
        !          8925:                (op0, mode, gen_rtx_combine (LSHIFTRT, mode,
        !          8926:                                             XEXP (op0, 1),
        !          8927:                                             XEXP (XEXP (op0, 0), 1)),
        !          8928:                 (HOST_WIDE_INT) 1);
        !          8929:              continue;
        !          8930:            }
        !          8931: 
        !          8932:          /* If we are comparing (and (lshiftrt X C1) C2) for equality with
        !          8933:             zero and X is a comparison and C1 and C2 describe only bits set
        !          8934:             in STORE_FLAG_VALUE, we can compare with X.  */
        !          8935:          if (const_op == 0 && equality_comparison_p
        !          8936:              && mode_width <= HOST_BITS_PER_WIDE_INT
        !          8937:              && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          8938:              && GET_CODE (XEXP (op0, 0)) == LSHIFTRT
        !          8939:              && GET_CODE (XEXP (XEXP (op0, 0), 1)) == CONST_INT
        !          8940:              && INTVAL (XEXP (XEXP (op0, 0), 1)) >= 0
        !          8941:              && INTVAL (XEXP (XEXP (op0, 0), 1)) < HOST_BITS_PER_WIDE_INT)
        !          8942:            {
        !          8943:              mask = ((INTVAL (XEXP (op0, 1)) & GET_MODE_MASK (mode))
        !          8944:                      << INTVAL (XEXP (XEXP (op0, 0), 1)));
        !          8945:              if ((~ STORE_FLAG_VALUE & mask) == 0
        !          8946:                  && (GET_RTX_CLASS (GET_CODE (XEXP (XEXP (op0, 0), 0))) == '<'
        !          8947:                      || ((tem = get_last_value (XEXP (XEXP (op0, 0), 0))) != 0
        !          8948:                          && GET_RTX_CLASS (GET_CODE (tem)) == '<')))
        !          8949:                {
        !          8950:                  op0 = XEXP (XEXP (op0, 0), 0);
        !          8951:                  continue;
        !          8952:                }
        !          8953:            }
        !          8954: 
        !          8955:          /* If we are doing an equality comparison of an AND of a bit equal
        !          8956:             to the sign bit, replace this with a LT or GE comparison of
        !          8957:             the underlying value.  */
        !          8958:          if (equality_comparison_p
        !          8959:              && const_op == 0
        !          8960:              && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          8961:              && mode_width <= HOST_BITS_PER_WIDE_INT
        !          8962:              && ((INTVAL (XEXP (op0, 1)) & GET_MODE_MASK (mode))
        !          8963:                  == (HOST_WIDE_INT) 1 << (mode_width - 1)))
        !          8964:            {
        !          8965:              op0 = XEXP (op0, 0);
        !          8966:              code = (code == EQ ? GE : LT);
        !          8967:              continue;
        !          8968:            }
        !          8969: 
        !          8970:          /* If this AND operation is really a ZERO_EXTEND from a narrower
        !          8971:             mode, the constant fits within that mode, and this is either an
        !          8972:             equality or unsigned comparison, try to do this comparison in
        !          8973:             the narrower mode.  */
        !          8974:          if ((equality_comparison_p || unsigned_comparison_p)
        !          8975:              && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          8976:              && (i = exact_log2 ((INTVAL (XEXP (op0, 1))
        !          8977:                                   & GET_MODE_MASK (mode))
        !          8978:                                  + 1)) >= 0
        !          8979:              && const_op >> i == 0
        !          8980:              && (tmode = mode_for_size (i, MODE_INT, 1)) != BLKmode)
        !          8981:            {
        !          8982:              op0 = gen_lowpart_for_combine (tmode, XEXP (op0, 0));
        !          8983:              continue;
        !          8984:            }
        !          8985:          break;
        !          8986: 
        !          8987:        case ASHIFT:
        !          8988:        case LSHIFT:
        !          8989:          /* If we have (compare (xshift FOO N) (const_int C)) and
        !          8990:             the high order N bits of FOO (N+1 if an inequality comparison)
        !          8991:             are known to be zero, we can do this by comparing FOO with C
        !          8992:             shifted right N bits so long as the low-order N bits of C are
        !          8993:             zero.  */
        !          8994:          if (GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          8995:              && INTVAL (XEXP (op0, 1)) >= 0
        !          8996:              && ((INTVAL (XEXP (op0, 1)) + ! equality_comparison_p)
        !          8997:                  < HOST_BITS_PER_WIDE_INT)
        !          8998:              && ((const_op
        !          8999:                   & (((HOST_WIDE_INT) 1 << INTVAL (XEXP (op0, 1))) - 1)) == 0)
        !          9000:              && mode_width <= HOST_BITS_PER_WIDE_INT
        !          9001:              && (nonzero_bits (XEXP (op0, 0), mode)
        !          9002:                  & ~ (mask >> (INTVAL (XEXP (op0, 1))
        !          9003:                                + ! equality_comparison_p))) == 0)
        !          9004:            {
        !          9005:              const_op >>= INTVAL (XEXP (op0, 1));
        !          9006:              op1 = GEN_INT (const_op);
        !          9007:              op0 = XEXP (op0, 0);
        !          9008:              continue;
        !          9009:            }
        !          9010: 
        !          9011:          /* If we are doing a sign bit comparison, it means we are testing
        !          9012:             a particular bit.  Convert it to the appropriate AND.  */
        !          9013:          if (sign_bit_comparison_p && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          9014:              && mode_width <= HOST_BITS_PER_WIDE_INT)
        !          9015:            {
        !          9016:              op0 = simplify_and_const_int (NULL_RTX, mode, XEXP (op0, 0),
        !          9017:                                            ((HOST_WIDE_INT) 1
        !          9018:                                             << (mode_width - 1
        !          9019:                                                 - INTVAL (XEXP (op0, 1)))));
        !          9020:              code = (code == LT ? NE : EQ);
        !          9021:              continue;
        !          9022:            }
        !          9023: 
        !          9024:          /* If this an equality comparison with zero and we are shifting
        !          9025:             the low bit to the sign bit, we can convert this to an AND of the
        !          9026:             low-order bit.  */
        !          9027:          if (const_op == 0 && equality_comparison_p
        !          9028:              && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          9029:              && INTVAL (XEXP (op0, 1)) == mode_width - 1)
        !          9030:            {
        !          9031:              op0 = simplify_and_const_int (NULL_RTX, mode, XEXP (op0, 0),
        !          9032:                                            (HOST_WIDE_INT) 1);
        !          9033:              continue;
        !          9034:            }
        !          9035:          break;
        !          9036: 
        !          9037:        case ASHIFTRT:
        !          9038:          /* If this is an equality comparison with zero, we can do this
        !          9039:             as a logical shift, which might be much simpler.  */
        !          9040:          if (equality_comparison_p && const_op == 0
        !          9041:              && GET_CODE (XEXP (op0, 1)) == CONST_INT)
        !          9042:            {
        !          9043:              op0 = simplify_shift_const (NULL_RTX, LSHIFTRT, mode,
        !          9044:                                          XEXP (op0, 0),
        !          9045:                                          INTVAL (XEXP (op0, 1)));
        !          9046:              continue;
        !          9047:            }
        !          9048: 
        !          9049:          /* If OP0 is a sign extension and CODE is not an unsigned comparison,
        !          9050:             do the comparison in a narrower mode.  */
        !          9051:          if (! unsigned_comparison_p
        !          9052:              && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          9053:              && GET_CODE (XEXP (op0, 0)) == ASHIFT
        !          9054:              && XEXP (op0, 1) == XEXP (XEXP (op0, 0), 1)
        !          9055:              && (tmode = mode_for_size (mode_width - INTVAL (XEXP (op0, 1)),
        !          9056:                                         MODE_INT, 1)) != BLKmode
        !          9057:              && ((unsigned HOST_WIDE_INT) const_op <= GET_MODE_MASK (tmode)
        !          9058:                  || ((unsigned HOST_WIDE_INT) - const_op
        !          9059:                      <= GET_MODE_MASK (tmode))))
        !          9060:            {
        !          9061:              op0 = gen_lowpart_for_combine (tmode, XEXP (XEXP (op0, 0), 0));
        !          9062:              continue;
        !          9063:            }
        !          9064: 
        !          9065:          /* ... fall through ... */
        !          9066:        case LSHIFTRT:
        !          9067:          /* If we have (compare (xshiftrt FOO N) (const_int C)) and
        !          9068:             the low order N bits of FOO are known to be zero, we can do this
        !          9069:             by comparing FOO with C shifted left N bits so long as no
        !          9070:             overflow occurs.  */
        !          9071:          if (GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          9072:              && INTVAL (XEXP (op0, 1)) >= 0
        !          9073:              && INTVAL (XEXP (op0, 1)) < HOST_BITS_PER_WIDE_INT
        !          9074:              && mode_width <= HOST_BITS_PER_WIDE_INT
        !          9075:              && (nonzero_bits (XEXP (op0, 0), mode)
        !          9076:                  & (((HOST_WIDE_INT) 1 << INTVAL (XEXP (op0, 1))) - 1)) == 0
        !          9077:              && (const_op == 0
        !          9078:                  || (floor_log2 (const_op) + INTVAL (XEXP (op0, 1))
        !          9079:                      < mode_width)))
        !          9080:            {
        !          9081:              const_op <<= INTVAL (XEXP (op0, 1));
        !          9082:              op1 = GEN_INT (const_op);
        !          9083:              op0 = XEXP (op0, 0);
        !          9084:              continue;
        !          9085:            }
        !          9086: 
        !          9087:          /* If we are using this shift to extract just the sign bit, we
        !          9088:             can replace this with an LT or GE comparison.  */
        !          9089:          if (const_op == 0
        !          9090:              && (equality_comparison_p || sign_bit_comparison_p)
        !          9091:              && GET_CODE (XEXP (op0, 1)) == CONST_INT
        !          9092:              && INTVAL (XEXP (op0, 1)) == mode_width - 1)
        !          9093:            {
        !          9094:              op0 = XEXP (op0, 0);
        !          9095:              code = (code == NE || code == GT ? LT : GE);
        !          9096:              continue;
        !          9097:            }
        !          9098:          break;
        !          9099:        }
        !          9100: 
        !          9101:       break;
        !          9102:     }
        !          9103: 
        !          9104:   /* Now make any compound operations involved in this comparison.  Then,
        !          9105:      check for an outmost SUBREG on OP0 that isn't doing anything or is
        !          9106:      paradoxical.  The latter case can only occur when it is known that the
        !          9107:      "extra" bits will be zero.  Therefore, it is safe to remove the SUBREG.
        !          9108:      We can never remove a SUBREG for a non-equality comparison because the
        !          9109:      sign bit is in a different place in the underlying object.  */
        !          9110: 
        !          9111:   op0 = make_compound_operation (op0, op1 == const0_rtx ? COMPARE : SET);
        !          9112:   op1 = make_compound_operation (op1, SET);
        !          9113: 
        !          9114:   if (GET_CODE (op0) == SUBREG && subreg_lowpart_p (op0)
        !          9115:       && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
        !          9116:       && (code == NE || code == EQ)
        !          9117:       && ((GET_MODE_SIZE (GET_MODE (op0))
        !          9118:           > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))))
        !          9119:     {
        !          9120:       op0 = SUBREG_REG (op0);
        !          9121:       op1 = gen_lowpart_for_combine (GET_MODE (op0), op1);
        !          9122:     }
        !          9123: 
        !          9124:   else if (GET_CODE (op0) == SUBREG && subreg_lowpart_p (op0)
        !          9125:           && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
        !          9126:           && (code == NE || code == EQ)
        !          9127:           && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
        !          9128:               <= HOST_BITS_PER_WIDE_INT)
        !          9129:           && (nonzero_bits (SUBREG_REG (op0), GET_MODE (SUBREG_REG (op0)))
        !          9130:               & ~ GET_MODE_MASK (GET_MODE (op0))) == 0
        !          9131:           && (tem = gen_lowpart_for_combine (GET_MODE (SUBREG_REG (op0)),
        !          9132:                                              op1),
        !          9133:               (nonzero_bits (tem, GET_MODE (SUBREG_REG (op0)))
        !          9134:                & ~ GET_MODE_MASK (GET_MODE (op0))) == 0))
        !          9135:     op0 = SUBREG_REG (op0), op1 = tem;
        !          9136: 
        !          9137:   /* We now do the opposite procedure: Some machines don't have compare
        !          9138:      insns in all modes.  If OP0's mode is an integer mode smaller than a
        !          9139:      word and we can't do a compare in that mode, see if there is a larger
        !          9140:      mode for which we can do the compare.  There are a number of cases in
        !          9141:      which we can use the wider mode.  */
        !          9142: 
        !          9143:   mode = GET_MODE (op0);
        !          9144:   if (mode != VOIDmode && GET_MODE_CLASS (mode) == MODE_INT
        !          9145:       && GET_MODE_SIZE (mode) < UNITS_PER_WORD
        !          9146:       && cmp_optab->handlers[(int) mode].insn_code == CODE_FOR_nothing)
        !          9147:     for (tmode = GET_MODE_WIDER_MODE (mode);
        !          9148:         (tmode != VOIDmode
        !          9149:          && GET_MODE_BITSIZE (tmode) <= HOST_BITS_PER_WIDE_INT);
        !          9150:         tmode = GET_MODE_WIDER_MODE (tmode))
        !          9151:       if (cmp_optab->handlers[(int) tmode].insn_code != CODE_FOR_nothing)
        !          9152:        {
        !          9153:          /* If the only nonzero bits in OP0 and OP1 are those in the
        !          9154:             narrower mode and this is an equality or unsigned comparison,
        !          9155:             we can use the wider mode.  Similarly for sign-extended
        !          9156:             values and equality or signed comparisons.  */
        !          9157:          if (((code == EQ || code == NE
        !          9158:                || code == GEU || code == GTU || code == LEU || code == LTU)
        !          9159:               && (nonzero_bits (op0, tmode) & ~ GET_MODE_MASK (mode)) == 0
        !          9160:               && (nonzero_bits (op1, tmode) & ~ GET_MODE_MASK (mode)) == 0)
        !          9161:              || ((code == EQ || code == NE
        !          9162:                   || code == GE || code == GT || code == LE || code == LT)
        !          9163:                  && (num_sign_bit_copies (op0, tmode)
        !          9164:                      > GET_MODE_BITSIZE (tmode) - GET_MODE_BITSIZE (mode))
        !          9165:                  && (num_sign_bit_copies (op1, tmode)
        !          9166:                      > GET_MODE_BITSIZE (tmode) - GET_MODE_BITSIZE (mode))))
        !          9167:            {
        !          9168:              op0 = gen_lowpart_for_combine (tmode, op0);
        !          9169:              op1 = gen_lowpart_for_combine (tmode, op1);
        !          9170:              break;
        !          9171:            }
        !          9172: 
        !          9173:          /* If this is a test for negative, we can make an explicit
        !          9174:             test of the sign bit.  */
        !          9175: 
        !          9176:          if (op1 == const0_rtx && (code == LT || code == GE)
        !          9177:              && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
        !          9178:            {
        !          9179:              op0 = gen_binary (AND, tmode,
        !          9180:                                gen_lowpart_for_combine (tmode, op0),
        !          9181:                                GEN_INT ((HOST_WIDE_INT) 1
        !          9182:                                         << (GET_MODE_BITSIZE (mode) - 1)));
        !          9183:              code = (code == LT) ? NE : EQ;
        !          9184:              break;
        !          9185:            }
        !          9186:        }
        !          9187: 
        !          9188:   *pop0 = op0;
        !          9189:   *pop1 = op1;
        !          9190: 
        !          9191:   return code;
        !          9192: }
        !          9193: 
        !          9194: /* Return 1 if we know that X, a comparison operation, is not operating
        !          9195:    on a floating-point value or is EQ or NE, meaning that we can safely
        !          9196:    reverse it.  */
        !          9197: 
        !          9198: static int
        !          9199: reversible_comparison_p (x)
        !          9200:      rtx x;
        !          9201: {
        !          9202:   if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
        !          9203:       || GET_CODE (x) == NE || GET_CODE (x) == EQ)
        !          9204:     return 1;
        !          9205: 
        !          9206:   switch (GET_MODE_CLASS (GET_MODE (XEXP (x, 0))))
        !          9207:     {
        !          9208:     case MODE_INT:
        !          9209:     case MODE_PARTIAL_INT:
        !          9210:     case MODE_COMPLEX_INT:
        !          9211:       return 1;
        !          9212: 
        !          9213:     case MODE_CC:
        !          9214:       x = get_last_value (XEXP (x, 0));
        !          9215:       return (x && GET_CODE (x) == COMPARE
        !          9216:              && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0))));
        !          9217:     }
        !          9218: 
        !          9219:   return 0;
        !          9220: }
        !          9221: 
        !          9222: /* Utility function for following routine.  Called when X is part of a value
        !          9223:    being stored into reg_last_set_value.  Sets reg_last_set_table_tick
        !          9224:    for each register mentioned.  Similar to mention_regs in cse.c  */
        !          9225: 
        !          9226: static void
        !          9227: update_table_tick (x)
        !          9228:      rtx x;
        !          9229: {
        !          9230:   register enum rtx_code code = GET_CODE (x);
        !          9231:   register char *fmt = GET_RTX_FORMAT (code);
        !          9232:   register int i;
        !          9233: 
        !          9234:   if (code == REG)
        !          9235:     {
        !          9236:       int regno = REGNO (x);
        !          9237:       int endregno = regno + (regno < FIRST_PSEUDO_REGISTER
        !          9238:                              ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
        !          9239: 
        !          9240:       for (i = regno; i < endregno; i++)
        !          9241:        reg_last_set_table_tick[i] = label_tick;
        !          9242: 
        !          9243:       return;
        !          9244:     }
        !          9245:   
        !          9246:   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
        !          9247:     /* Note that we can't have an "E" in values stored; see
        !          9248:        get_last_value_validate.  */
        !          9249:     if (fmt[i] == 'e')
        !          9250:       update_table_tick (XEXP (x, i));
        !          9251: }
        !          9252: 
        !          9253: /* Record that REG is set to VALUE in insn INSN.  If VALUE is zero, we
        !          9254:    are saying that the register is clobbered and we no longer know its
        !          9255:    value.  If INSN is zero, don't update reg_last_set; this is only permitted
        !          9256:    with VALUE also zero and is used to invalidate the register.  */
        !          9257: 
        !          9258: static void
        !          9259: record_value_for_reg (reg, insn, value)
        !          9260:      rtx reg;
        !          9261:      rtx insn;
        !          9262:      rtx value;
        !          9263: {
        !          9264:   int regno = REGNO (reg);
        !          9265:   int endregno = regno + (regno < FIRST_PSEUDO_REGISTER
        !          9266:                          ? HARD_REGNO_NREGS (regno, GET_MODE (reg)) : 1);
        !          9267:   int i;
        !          9268: 
        !          9269:   /* If VALUE contains REG and we have a previous value for REG, substitute
        !          9270:      the previous value.  */
        !          9271:   if (value && insn && reg_overlap_mentioned_p (reg, value))
        !          9272:     {
        !          9273:       rtx tem;
        !          9274: 
        !          9275:       /* Set things up so get_last_value is allowed to see anything set up to
        !          9276:         our insn.  */
        !          9277:       subst_low_cuid = INSN_CUID (insn);
        !          9278:       tem = get_last_value (reg);      
        !          9279: 
        !          9280:       if (tem)
        !          9281:        value = replace_rtx (copy_rtx (value), reg, tem);
        !          9282:     }
        !          9283: 
        !          9284:   /* For each register modified, show we don't know its value, that
        !          9285:      we don't know about its bitwise content, that its value has been
        !          9286:      updated, and that we don't know the location of the death of the
        !          9287:      register.  */
        !          9288:   for (i = regno; i < endregno; i ++)
        !          9289:     {
        !          9290:       if (insn)
        !          9291:        reg_last_set[i] = insn;
        !          9292:       reg_last_set_value[i] = 0;
        !          9293:       reg_last_set_mode[i] = 0;
        !          9294:       reg_last_set_nonzero_bits[i] = 0;
        !          9295:       reg_last_set_sign_bit_copies[i] = 0;
        !          9296:       reg_last_death[i] = 0;
        !          9297:     }
        !          9298: 
        !          9299:   /* Mark registers that are being referenced in this value.  */
        !          9300:   if (value)
        !          9301:     update_table_tick (value);
        !          9302: 
        !          9303:   /* Now update the status of each register being set.
        !          9304:      If someone is using this register in this block, set this register
        !          9305:      to invalid since we will get confused between the two lives in this
        !          9306:      basic block.  This makes using this register always invalid.  In cse, we
        !          9307:      scan the table to invalidate all entries using this register, but this
        !          9308:      is too much work for us.  */
        !          9309: 
        !          9310:   for (i = regno; i < endregno; i++)
        !          9311:     {
        !          9312:       reg_last_set_label[i] = label_tick;
        !          9313:       if (value && reg_last_set_table_tick[i] == label_tick)
        !          9314:        reg_last_set_invalid[i] = 1;
        !          9315:       else
        !          9316:        reg_last_set_invalid[i] = 0;
        !          9317:     }
        !          9318: 
        !          9319:   /* The value being assigned might refer to X (like in "x++;").  In that
        !          9320:      case, we must replace it with (clobber (const_int 0)) to prevent
        !          9321:      infinite loops.  */
        !          9322:   if (value && ! get_last_value_validate (&value,
        !          9323:                                          reg_last_set_label[regno], 0))
        !          9324:     {
        !          9325:       value = copy_rtx (value);
        !          9326:       if (! get_last_value_validate (&value, reg_last_set_label[regno], 1))
        !          9327:        value = 0;
        !          9328:     }
        !          9329: 
        !          9330:   /* For the main register being modified, update the value, the mode, the
        !          9331:      nonzero bits, and the number of sign bit copies.  */
        !          9332: 
        !          9333:   reg_last_set_value[regno] = value;
        !          9334: 
        !          9335:   if (value)
        !          9336:     {
        !          9337:       subst_low_cuid = INSN_CUID (insn);
        !          9338:       reg_last_set_mode[regno] = GET_MODE (reg);
        !          9339:       reg_last_set_nonzero_bits[regno] = nonzero_bits (value, GET_MODE (reg));
        !          9340:       reg_last_set_sign_bit_copies[regno]
        !          9341:        = num_sign_bit_copies (value, GET_MODE (reg));
        !          9342:     }
        !          9343: }
        !          9344: 
        !          9345: /* Used for communication between the following two routines.  */
        !          9346: static rtx record_dead_insn;
        !          9347: 
        !          9348: /* Called via note_stores from record_dead_and_set_regs to handle one
        !          9349:    SET or CLOBBER in an insn.  */
        !          9350: 
        !          9351: static void
        !          9352: record_dead_and_set_regs_1 (dest, setter)
        !          9353:      rtx dest, setter;
        !          9354: {
        !          9355:   if (GET_CODE (dest) == REG)
        !          9356:     {
        !          9357:       /* If we are setting the whole register, we know its value.  Otherwise
        !          9358:         show that we don't know the value.  We can handle SUBREG in
        !          9359:         some cases.  */
        !          9360:       if (GET_CODE (setter) == SET && dest == SET_DEST (setter))
        !          9361:        record_value_for_reg (dest, record_dead_insn, SET_SRC (setter));
        !          9362:       else if (GET_CODE (setter) == SET
        !          9363:               && GET_CODE (SET_DEST (setter)) == SUBREG
        !          9364:               && SUBREG_REG (SET_DEST (setter)) == dest
        !          9365:               && subreg_lowpart_p (SET_DEST (setter)))
        !          9366:        record_value_for_reg (dest, record_dead_insn,
        !          9367:                              gen_lowpart_for_combine (GET_MODE (dest),
        !          9368:                                                       SET_SRC (setter)));
        !          9369:       else
        !          9370:        record_value_for_reg (dest, record_dead_insn, NULL_RTX);
        !          9371:     }
        !          9372:   else if (GET_CODE (dest) == MEM
        !          9373:           /* Ignore pushes, they clobber nothing.  */
        !          9374:           && ! push_operand (dest, GET_MODE (dest)))
        !          9375:     mem_last_set = INSN_CUID (record_dead_insn);
        !          9376: }
        !          9377: 
        !          9378: /* Update the records of when each REG was most recently set or killed
        !          9379:    for the things done by INSN.  This is the last thing done in processing
        !          9380:    INSN in the combiner loop.
        !          9381: 
        !          9382:    We update reg_last_set, reg_last_set_value, reg_last_set_mode,
        !          9383:    reg_last_set_nonzero_bits, reg_last_set_sign_bit_copies, reg_last_death,
        !          9384:    and also the similar information mem_last_set (which insn most recently
        !          9385:    modified memory) and last_call_cuid (which insn was the most recent
        !          9386:    subroutine call).  */
        !          9387: 
        !          9388: static void
        !          9389: record_dead_and_set_regs (insn)
        !          9390:      rtx insn;
        !          9391: {
        !          9392:   register rtx link;
        !          9393:   int i;
        !          9394: 
        !          9395:   for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
        !          9396:     {
        !          9397:       if (REG_NOTE_KIND (link) == REG_DEAD
        !          9398:          && GET_CODE (XEXP (link, 0)) == REG)
        !          9399:        {
        !          9400:          int regno = REGNO (XEXP (link, 0));
        !          9401:          int endregno
        !          9402:            = regno + (regno < FIRST_PSEUDO_REGISTER
        !          9403:                       ? HARD_REGNO_NREGS (regno, GET_MODE (XEXP (link, 0)))
        !          9404:                       : 1);
        !          9405: 
        !          9406:          for (i = regno; i < endregno; i++)
        !          9407:            reg_last_death[i] = insn;
        !          9408:        }
        !          9409:       else if (REG_NOTE_KIND (link) == REG_INC)
        !          9410:        record_value_for_reg (XEXP (link, 0), insn, NULL_RTX);
        !          9411:     }
        !          9412: 
        !          9413:   if (GET_CODE (insn) == CALL_INSN)
        !          9414:     {
        !          9415:       for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
        !          9416:        if (call_used_regs[i])
        !          9417:          {
        !          9418:            reg_last_set_value[i] = 0;
        !          9419:            reg_last_set_mode[i] = 0;
        !          9420:            reg_last_set_nonzero_bits[i] = 0;
        !          9421:            reg_last_set_sign_bit_copies[i] = 0;
        !          9422:            reg_last_death[i] = 0;
        !          9423:          }
        !          9424: 
        !          9425:       last_call_cuid = mem_last_set = INSN_CUID (insn);
        !          9426:     }
        !          9427: 
        !          9428:   record_dead_insn = insn;
        !          9429:   note_stores (PATTERN (insn), record_dead_and_set_regs_1);
        !          9430: }
        !          9431: 
        !          9432: /* Utility routine for the following function.  Verify that all the registers
        !          9433:    mentioned in *LOC are valid when *LOC was part of a value set when
        !          9434:    label_tick == TICK.  Return 0 if some are not.
        !          9435: 
        !          9436:    If REPLACE is non-zero, replace the invalid reference with
        !          9437:    (clobber (const_int 0)) and return 1.  This replacement is useful because
        !          9438:    we often can get useful information about the form of a value (e.g., if
        !          9439:    it was produced by a shift that always produces -1 or 0) even though
        !          9440:    we don't know exactly what registers it was produced from.  */
        !          9441: 
        !          9442: static int
        !          9443: get_last_value_validate (loc, tick, replace)
        !          9444:      rtx *loc;
        !          9445:      int tick;
        !          9446:      int replace;
        !          9447: {
        !          9448:   rtx x = *loc;
        !          9449:   char *fmt = GET_RTX_FORMAT (GET_CODE (x));
        !          9450:   int len = GET_RTX_LENGTH (GET_CODE (x));
        !          9451:   int i;
        !          9452: 
        !          9453:   if (GET_CODE (x) == REG)
        !          9454:     {
        !          9455:       int regno = REGNO (x);
        !          9456:       int endregno = regno + (regno < FIRST_PSEUDO_REGISTER
        !          9457:                              ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
        !          9458:       int j;
        !          9459: 
        !          9460:       for (j = regno; j < endregno; j++)
        !          9461:        if (reg_last_set_invalid[j]
        !          9462:            /* If this is a pseudo-register that was only set once, it is
        !          9463:               always valid.  */
        !          9464:            || (! (regno >= FIRST_PSEUDO_REGISTER && reg_n_sets[regno] == 1)
        !          9465:                && reg_last_set_label[j] > tick))
        !          9466:          {
        !          9467:            if (replace)
        !          9468:              *loc = gen_rtx (CLOBBER, GET_MODE (x), const0_rtx);
        !          9469:            return replace;
        !          9470:          }
        !          9471: 
        !          9472:       return 1;
        !          9473:     }
        !          9474: 
        !          9475:   for (i = 0; i < len; i++)
        !          9476:     if ((fmt[i] == 'e'
        !          9477:         && get_last_value_validate (&XEXP (x, i), tick, replace) == 0)
        !          9478:        /* Don't bother with these.  They shouldn't occur anyway.  */
        !          9479:        || fmt[i] == 'E')
        !          9480:       return 0;
        !          9481: 
        !          9482:   /* If we haven't found a reason for it to be invalid, it is valid.  */
        !          9483:   return 1;
        !          9484: }
        !          9485: 
        !          9486: /* Get the last value assigned to X, if known.  Some registers
        !          9487:    in the value may be replaced with (clobber (const_int 0)) if their value
        !          9488:    is known longer known reliably.  */
        !          9489: 
        !          9490: static rtx
        !          9491: get_last_value (x)
        !          9492:      rtx x;
        !          9493: {
        !          9494:   int regno;
        !          9495:   rtx value;
        !          9496: 
        !          9497:   /* If this is a non-paradoxical SUBREG, get the value of its operand and
        !          9498:      then convert it to the desired mode.  If this is a paradoxical SUBREG,
        !          9499:      we cannot predict what values the "extra" bits might have. */
        !          9500:   if (GET_CODE (x) == SUBREG
        !          9501:       && subreg_lowpart_p (x)
        !          9502:       && (GET_MODE_SIZE (GET_MODE (x))
        !          9503:          <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
        !          9504:       && (value = get_last_value (SUBREG_REG (x))) != 0)
        !          9505:     return gen_lowpart_for_combine (GET_MODE (x), value);
        !          9506: 
        !          9507:   if (GET_CODE (x) != REG)
        !          9508:     return 0;
        !          9509: 
        !          9510:   regno = REGNO (x);
        !          9511:   value = reg_last_set_value[regno];
        !          9512: 
        !          9513:   /* If we don't have a value or if it isn't for this basic block, return 0. */
        !          9514: 
        !          9515:   if (value == 0
        !          9516:       || (reg_n_sets[regno] != 1
        !          9517:          && reg_last_set_label[regno] != label_tick))
        !          9518:     return 0;
        !          9519: 
        !          9520:   /* If the value was set in a later insn that the ones we are processing,
        !          9521:      we can't use it even if the register was only set once, but make a quick
        !          9522:      check to see if the previous insn set it to something.  This is commonly
        !          9523:      the case when the same pseudo is used by repeated insns.  */
        !          9524: 
        !          9525:   if (INSN_CUID (reg_last_set[regno]) >= subst_low_cuid)
        !          9526:     {
        !          9527:       rtx insn, set;
        !          9528: 
        !          9529:       /* If there is an insn that is supposed to be immediately
        !          9530:         in front of subst_insn, use it.  */
        !          9531:       if (subst_prev_insn != 0)
        !          9532:        insn = subst_prev_insn;
        !          9533:       else
        !          9534:        for (insn = prev_nonnote_insn (subst_insn);
        !          9535:             insn && INSN_CUID (insn) >= subst_low_cuid;
        !          9536:             insn = prev_nonnote_insn (insn))
        !          9537:          ;
        !          9538: 
        !          9539:       if (insn
        !          9540:          && (set = single_set (insn)) != 0
        !          9541:          && rtx_equal_p (SET_DEST (set), x))
        !          9542:        {
        !          9543:          value = SET_SRC (set);
        !          9544: 
        !          9545:          /* Make sure that VALUE doesn't reference X.  Replace any
        !          9546:             expliit references with a CLOBBER.  If there are any remaining
        !          9547:             references (rare), don't use the value.  */
        !          9548: 
        !          9549:          if (reg_mentioned_p (x, value))
        !          9550:            value = replace_rtx (copy_rtx (value), x,
        !          9551:                                 gen_rtx (CLOBBER, GET_MODE (x), const0_rtx));
        !          9552: 
        !          9553:          if (reg_overlap_mentioned_p (x, value))
        !          9554:            return 0;
        !          9555:        }
        !          9556:       else
        !          9557:        return 0;
        !          9558:     }
        !          9559: 
        !          9560:   /* If the value has all its registers valid, return it.  */
        !          9561:   if (get_last_value_validate (&value, reg_last_set_label[regno], 0))
        !          9562:     return value;
        !          9563: 
        !          9564:   /* Otherwise, make a copy and replace any invalid register with
        !          9565:      (clobber (const_int 0)).  If that fails for some reason, return 0.  */
        !          9566: 
        !          9567:   value = copy_rtx (value);
        !          9568:   if (get_last_value_validate (&value, reg_last_set_label[regno], 1))
        !          9569:     return value;
        !          9570: 
        !          9571:   return 0;
        !          9572: }
        !          9573: 
        !          9574: /* Return nonzero if expression X refers to a REG or to memory
        !          9575:    that is set in an instruction more recent than FROM_CUID.  */
        !          9576: 
        !          9577: static int
        !          9578: use_crosses_set_p (x, from_cuid)
        !          9579:      register rtx x;
        !          9580:      int from_cuid;
        !          9581: {
        !          9582:   register char *fmt;
        !          9583:   register int i;
        !          9584:   register enum rtx_code code = GET_CODE (x);
        !          9585: 
        !          9586:   if (code == REG)
        !          9587:     {
        !          9588:       register int regno = REGNO (x);
        !          9589:       int endreg = regno + (regno < FIRST_PSEUDO_REGISTER
        !          9590:                            ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
        !          9591:       
        !          9592: #ifdef PUSH_ROUNDING
        !          9593:       /* Don't allow uses of the stack pointer to be moved,
        !          9594:         because we don't know whether the move crosses a push insn.  */
        !          9595:       if (regno == STACK_POINTER_REGNUM)
        !          9596:        return 1;
        !          9597: #endif
        !          9598:       for (;regno < endreg; regno++)
        !          9599:        if (reg_last_set[regno]
        !          9600:            && INSN_CUID (reg_last_set[regno]) > from_cuid)
        !          9601:          return 1;
        !          9602:       return 0;
        !          9603:     }
        !          9604: 
        !          9605:   if (code == MEM && mem_last_set > from_cuid)
        !          9606:     return 1;
        !          9607: 
        !          9608:   fmt = GET_RTX_FORMAT (code);
        !          9609: 
        !          9610:   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
        !          9611:     {
        !          9612:       if (fmt[i] == 'E')
        !          9613:        {
        !          9614:          register int j;
        !          9615:          for (j = XVECLEN (x, i) - 1; j >= 0; j--)
        !          9616:            if (use_crosses_set_p (XVECEXP (x, i, j), from_cuid))
        !          9617:              return 1;
        !          9618:        }
        !          9619:       else if (fmt[i] == 'e'
        !          9620:               && use_crosses_set_p (XEXP (x, i), from_cuid))
        !          9621:        return 1;
        !          9622:     }
        !          9623:   return 0;
        !          9624: }
        !          9625: 
        !          9626: /* Define three variables used for communication between the following
        !          9627:    routines.  */
        !          9628: 
        !          9629: static int reg_dead_regno, reg_dead_endregno;
        !          9630: static int reg_dead_flag;
        !          9631: 
        !          9632: /* Function called via note_stores from reg_dead_at_p.
        !          9633: 
        !          9634:    If DEST is within [reg_dead_rengno, reg_dead_endregno), set 
        !          9635:    reg_dead_flag to 1 if X is a CLOBBER and to -1 it is a SET.  */
        !          9636: 
        !          9637: static void
        !          9638: reg_dead_at_p_1 (dest, x)
        !          9639:      rtx dest;
        !          9640:      rtx x;
        !          9641: {
        !          9642:   int regno, endregno;
        !          9643: 
        !          9644:   if (GET_CODE (dest) != REG)
        !          9645:     return;
        !          9646: 
        !          9647:   regno = REGNO (dest);
        !          9648:   endregno = regno + (regno < FIRST_PSEUDO_REGISTER 
        !          9649:                      ? HARD_REGNO_NREGS (regno, GET_MODE (dest)) : 1);
        !          9650: 
        !          9651:   if (reg_dead_endregno > regno && reg_dead_regno < endregno)
        !          9652:     reg_dead_flag = (GET_CODE (x) == CLOBBER) ? 1 : -1;
        !          9653: }
        !          9654: 
        !          9655: /* Return non-zero if REG is known to be dead at INSN.
        !          9656: 
        !          9657:    We scan backwards from INSN.  If we hit a REG_DEAD note or a CLOBBER
        !          9658:    referencing REG, it is dead.  If we hit a SET referencing REG, it is
        !          9659:    live.  Otherwise, see if it is live or dead at the start of the basic
        !          9660:    block we are in.  */
        !          9661: 
        !          9662: static int
        !          9663: reg_dead_at_p (reg, insn)
        !          9664:      rtx reg;
        !          9665:      rtx insn;
        !          9666: {
        !          9667:   int block, i;
        !          9668: 
        !          9669:   /* Set variables for reg_dead_at_p_1.  */
        !          9670:   reg_dead_regno = REGNO (reg);
        !          9671:   reg_dead_endregno = reg_dead_regno + (reg_dead_regno < FIRST_PSEUDO_REGISTER
        !          9672:                                        ? HARD_REGNO_NREGS (reg_dead_regno,
        !          9673:                                                            GET_MODE (reg))
        !          9674:                                        : 1);
        !          9675: 
        !          9676:   reg_dead_flag = 0;
        !          9677: 
        !          9678:   /* Scan backwards until we find a REG_DEAD note, SET, CLOBBER, label, or
        !          9679:      beginning of function.  */
        !          9680:   for (; insn && GET_CODE (insn) != CODE_LABEL;
        !          9681:        insn = prev_nonnote_insn (insn))
        !          9682:     {
        !          9683:       note_stores (PATTERN (insn), reg_dead_at_p_1);
        !          9684:       if (reg_dead_flag)
        !          9685:        return reg_dead_flag == 1 ? 1 : 0;
        !          9686: 
        !          9687:       if (find_regno_note (insn, REG_DEAD, reg_dead_regno))
        !          9688:        return 1;
        !          9689:     }
        !          9690: 
        !          9691:   /* Get the basic block number that we were in.  */
        !          9692:   if (insn == 0)
        !          9693:     block = 0;
        !          9694:   else
        !          9695:     {
        !          9696:       for (block = 0; block < n_basic_blocks; block++)
        !          9697:        if (insn == basic_block_head[block])
        !          9698:          break;
        !          9699: 
        !          9700:       if (block == n_basic_blocks)
        !          9701:        return 0;
        !          9702:     }
        !          9703: 
        !          9704:   for (i = reg_dead_regno; i < reg_dead_endregno; i++)
        !          9705:     if (basic_block_live_at_start[block][i / REGSET_ELT_BITS]
        !          9706:        & ((REGSET_ELT_TYPE) 1 << (i % REGSET_ELT_BITS)))
        !          9707:       return 0;
        !          9708: 
        !          9709:   return 1;
        !          9710: }
        !          9711: 
        !          9712: /* Remove register number REGNO from the dead registers list of INSN.
        !          9713: 
        !          9714:    Return the note used to record the death, if there was one.  */
        !          9715: 
        !          9716: rtx
        !          9717: remove_death (regno, insn)
        !          9718:      int regno;
        !          9719:      rtx insn;
        !          9720: {
        !          9721:   register rtx note = find_regno_note (insn, REG_DEAD, regno);
        !          9722: 
        !          9723:   if (note)
        !          9724:     {
        !          9725:       reg_n_deaths[regno]--;
        !          9726:       remove_note (insn, note);
        !          9727:     }
        !          9728: 
        !          9729:   return note;
        !          9730: }
        !          9731: 
        !          9732: /* For each register (hardware or pseudo) used within expression X, if its
        !          9733:    death is in an instruction with cuid between FROM_CUID (inclusive) and
        !          9734:    TO_INSN (exclusive), put a REG_DEAD note for that register in the
        !          9735:    list headed by PNOTES. 
        !          9736: 
        !          9737:    This is done when X is being merged by combination into TO_INSN.  These
        !          9738:    notes will then be distributed as needed.  */
        !          9739: 
        !          9740: static void
        !          9741: move_deaths (x, from_cuid, to_insn, pnotes)
        !          9742:      rtx x;
        !          9743:      int from_cuid;
        !          9744:      rtx to_insn;
        !          9745:      rtx *pnotes;
        !          9746: {
        !          9747:   register char *fmt;
        !          9748:   register int len, i;
        !          9749:   register enum rtx_code code = GET_CODE (x);
        !          9750: 
        !          9751:   if (code == REG)
        !          9752:     {
        !          9753:       register int regno = REGNO (x);
        !          9754:       register rtx where_dead = reg_last_death[regno];
        !          9755: 
        !          9756:       if (where_dead && INSN_CUID (where_dead) >= from_cuid
        !          9757:          && INSN_CUID (where_dead) < INSN_CUID (to_insn))
        !          9758:        {
        !          9759:          rtx note = remove_death (regno, where_dead);
        !          9760: 
        !          9761:          /* It is possible for the call above to return 0.  This can occur
        !          9762:             when reg_last_death points to I2 or I1 that we combined with.
        !          9763:             In that case make a new note.
        !          9764: 
        !          9765:             We must also check for the case where X is a hard register
        !          9766:             and NOTE is a death note for a range of hard registers
        !          9767:             including X.  In that case, we must put REG_DEAD notes for
        !          9768:             the remaining registers in place of NOTE.  */
        !          9769: 
        !          9770:          if (note != 0 && regno < FIRST_PSEUDO_REGISTER
        !          9771:              && (GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
        !          9772:                  != GET_MODE_SIZE (GET_MODE (x))))
        !          9773:            {
        !          9774:              int deadregno = REGNO (XEXP (note, 0));
        !          9775:              int deadend
        !          9776:                = (deadregno + HARD_REGNO_NREGS (deadregno,
        !          9777:                                                 GET_MODE (XEXP (note, 0))));
        !          9778:              int ourend = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
        !          9779:              int i;
        !          9780: 
        !          9781:              for (i = deadregno; i < deadend; i++)
        !          9782:                if (i < regno || i >= ourend)
        !          9783:                  REG_NOTES (where_dead)
        !          9784:                    = gen_rtx (EXPR_LIST, REG_DEAD,
        !          9785:                               gen_rtx (REG, word_mode, i),
        !          9786:                               REG_NOTES (where_dead));
        !          9787:            }
        !          9788: 
        !          9789:          if (note != 0 && GET_MODE (XEXP (note, 0)) == GET_MODE (x))
        !          9790:            {
        !          9791:              XEXP (note, 1) = *pnotes;
        !          9792:              *pnotes = note;
        !          9793:            }
        !          9794:          else
        !          9795:            *pnotes = gen_rtx (EXPR_LIST, REG_DEAD, x, *pnotes);
        !          9796: 
        !          9797:          reg_n_deaths[regno]++;
        !          9798:        }
        !          9799: 
        !          9800:       return;
        !          9801:     }
        !          9802: 
        !          9803:   else if (GET_CODE (x) == SET)
        !          9804:     {
        !          9805:       rtx dest = SET_DEST (x);
        !          9806: 
        !          9807:       move_deaths (SET_SRC (x), from_cuid, to_insn, pnotes);
        !          9808: 
        !          9809:       /* In the case of a ZERO_EXTRACT, a STRICT_LOW_PART, or a SUBREG
        !          9810:         that accesses one word of a multi-word item, some
        !          9811:         piece of everything register in the expression is used by
        !          9812:         this insn, so remove any old death.  */
        !          9813: 
        !          9814:       if (GET_CODE (dest) == ZERO_EXTRACT
        !          9815:          || GET_CODE (dest) == STRICT_LOW_PART
        !          9816:          || (GET_CODE (dest) == SUBREG
        !          9817:              && (((GET_MODE_SIZE (GET_MODE (dest))
        !          9818:                    + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
        !          9819:                  == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
        !          9820:                       + UNITS_PER_WORD - 1) / UNITS_PER_WORD))))
        !          9821:        {
        !          9822:          move_deaths (dest, from_cuid, to_insn, pnotes);
        !          9823:          return;
        !          9824:        }
        !          9825: 
        !          9826:       /* If this is some other SUBREG, we know it replaces the entire
        !          9827:         value, so use that as the destination.  */
        !          9828:       if (GET_CODE (dest) == SUBREG)
        !          9829:        dest = SUBREG_REG (dest);
        !          9830: 
        !          9831:       /* If this is a MEM, adjust deaths of anything used in the address.
        !          9832:         For a REG (the only other possibility), the entire value is
        !          9833:         being replaced so the old value is not used in this insn.  */
        !          9834: 
        !          9835:       if (GET_CODE (dest) == MEM)
        !          9836:        move_deaths (XEXP (dest, 0), from_cuid, to_insn, pnotes);
        !          9837:       return;
        !          9838:     }
        !          9839: 
        !          9840:   else if (GET_CODE (x) == CLOBBER)
        !          9841:     return;
        !          9842: 
        !          9843:   len = GET_RTX_LENGTH (code);
        !          9844:   fmt = GET_RTX_FORMAT (code);
        !          9845: 
        !          9846:   for (i = 0; i < len; i++)
        !          9847:     {
        !          9848:       if (fmt[i] == 'E')
        !          9849:        {
        !          9850:          register int j;
        !          9851:          for (j = XVECLEN (x, i) - 1; j >= 0; j--)
        !          9852:            move_deaths (XVECEXP (x, i, j), from_cuid, to_insn, pnotes);
        !          9853:        }
        !          9854:       else if (fmt[i] == 'e')
        !          9855:        move_deaths (XEXP (x, i), from_cuid, to_insn, pnotes);
        !          9856:     }
        !          9857: }
        !          9858: 
        !          9859: /* Return 1 if X is the target of a bit-field assignment in BODY, the
        !          9860:    pattern of an insn.  X must be a REG.  */
        !          9861: 
        !          9862: static int
        !          9863: reg_bitfield_target_p (x, body)
        !          9864:      rtx x;
        !          9865:      rtx body;
        !          9866: {
        !          9867:   int i;
        !          9868: 
        !          9869:   if (GET_CODE (body) == SET)
        !          9870:     {
        !          9871:       rtx dest = SET_DEST (body);
        !          9872:       rtx target;
        !          9873:       int regno, tregno, endregno, endtregno;
        !          9874: 
        !          9875:       if (GET_CODE (dest) == ZERO_EXTRACT)
        !          9876:        target = XEXP (dest, 0);
        !          9877:       else if (GET_CODE (dest) == STRICT_LOW_PART)
        !          9878:        target = SUBREG_REG (XEXP (dest, 0));
        !          9879:       else
        !          9880:        return 0;
        !          9881: 
        !          9882:       if (GET_CODE (target) == SUBREG)
        !          9883:        target = SUBREG_REG (target);
        !          9884: 
        !          9885:       if (GET_CODE (target) != REG)
        !          9886:        return 0;
        !          9887: 
        !          9888:       tregno = REGNO (target), regno = REGNO (x);
        !          9889:       if (tregno >= FIRST_PSEUDO_REGISTER || regno >= FIRST_PSEUDO_REGISTER)
        !          9890:        return target == x;
        !          9891: 
        !          9892:       endtregno = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (target));
        !          9893:       endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
        !          9894: 
        !          9895:       return endregno > tregno && regno < endtregno;
        !          9896:     }
        !          9897: 
        !          9898:   else if (GET_CODE (body) == PARALLEL)
        !          9899:     for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
        !          9900:       if (reg_bitfield_target_p (x, XVECEXP (body, 0, i)))
        !          9901:        return 1;
        !          9902: 
        !          9903:   return 0;
        !          9904: }      
        !          9905: 
        !          9906: /* Given a chain of REG_NOTES originally from FROM_INSN, try to place them
        !          9907:    as appropriate.  I3 and I2 are the insns resulting from the combination
        !          9908:    insns including FROM (I2 may be zero).
        !          9909: 
        !          9910:    ELIM_I2 and ELIM_I1 are either zero or registers that we know will
        !          9911:    not need REG_DEAD notes because they are being substituted for.  This
        !          9912:    saves searching in the most common cases.
        !          9913: 
        !          9914:    Each note in the list is either ignored or placed on some insns, depending
        !          9915:    on the type of note.  */
        !          9916: 
        !          9917: static void
        !          9918: distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1)
        !          9919:      rtx notes;
        !          9920:      rtx from_insn;
        !          9921:      rtx i3, i2;
        !          9922:      rtx elim_i2, elim_i1;
        !          9923: {
        !          9924:   rtx note, next_note;
        !          9925:   rtx tem;
        !          9926: 
        !          9927:   for (note = notes; note; note = next_note)
        !          9928:     {
        !          9929:       rtx place = 0, place2 = 0;
        !          9930: 
        !          9931:       /* If this NOTE references a pseudo register, ensure it references
        !          9932:         the latest copy of that register.  */
        !          9933:       if (XEXP (note, 0) && GET_CODE (XEXP (note, 0)) == REG
        !          9934:          && REGNO (XEXP (note, 0)) >= FIRST_PSEUDO_REGISTER)
        !          9935:        XEXP (note, 0) = regno_reg_rtx[REGNO (XEXP (note, 0))];
        !          9936: 
        !          9937:       next_note = XEXP (note, 1);
        !          9938:       switch (REG_NOTE_KIND (note))
        !          9939:        {
        !          9940:        case REG_UNUSED:
        !          9941:          /* If this note is from any insn other than i3, then we have no
        !          9942:             use for it, and must ignore it.
        !          9943: 
        !          9944:             Any clobbers for i3 may still exist, and so we must process
        !          9945:             REG_UNUSED notes from that insn.
        !          9946: 
        !          9947:             Any clobbers from i2 or i1 can only exist if they were added by
        !          9948:             recog_for_combine.  In that case, recog_for_combine created the
        !          9949:             necessary REG_UNUSED notes.  Trying to keep any original
        !          9950:             REG_UNUSED notes from these insns can cause incorrect output
        !          9951:             if it is for the same register as the original i3 dest.
        !          9952:             In that case, we will notice that the register is set in i3,
        !          9953:             and then add a REG_UNUSED note for the destination of i3, which
        !          9954:             is wrong.  */
        !          9955:          if (from_insn != i3)
        !          9956:            break;
        !          9957: 
        !          9958:          /* If this register is set or clobbered in I3, put the note there
        !          9959:             unless there is one already.  */
        !          9960:          else if (reg_set_p (XEXP (note, 0), PATTERN (i3)))
        !          9961:            {
        !          9962:              if (! (GET_CODE (XEXP (note, 0)) == REG
        !          9963:                     ? find_regno_note (i3, REG_UNUSED, REGNO (XEXP (note, 0)))
        !          9964:                     : find_reg_note (i3, REG_UNUSED, XEXP (note, 0))))
        !          9965:                place = i3;
        !          9966:            }
        !          9967:          /* Otherwise, if this register is used by I3, then this register
        !          9968:             now dies here, so we must put a REG_DEAD note here unless there
        !          9969:             is one already.  */
        !          9970:          else if (reg_referenced_p (XEXP (note, 0), PATTERN (i3))
        !          9971:                   && ! (GET_CODE (XEXP (note, 0)) == REG
        !          9972:                         ? find_regno_note (i3, REG_DEAD, REGNO (XEXP (note, 0)))
        !          9973:                         : find_reg_note (i3, REG_DEAD, XEXP (note, 0))))
        !          9974:            {
        !          9975:              PUT_REG_NOTE_KIND (note, REG_DEAD);
        !          9976:              place = i3;
        !          9977:            }
        !          9978:          break;
        !          9979: 
        !          9980:        case REG_EQUAL:
        !          9981:        case REG_EQUIV:
        !          9982:        case REG_NONNEG:
        !          9983:          /* These notes say something about results of an insn.  We can
        !          9984:             only support them if they used to be on I3 in which case they
        !          9985:             remain on I3.  Otherwise they are ignored.
        !          9986: 
        !          9987:             If the note refers to an expression that is not a constant, we
        !          9988:             must also ignore the note since we cannot tell whether the
        !          9989:             equivalence is still true.  It might be possible to do
        !          9990:             slightly better than this (we only have a problem if I2DEST
        !          9991:             or I1DEST is present in the expression), but it doesn't
        !          9992:             seem worth the trouble.  */
        !          9993: 
        !          9994:          if (from_insn == i3
        !          9995:              && (XEXP (note, 0) == 0 || CONSTANT_P (XEXP (note, 0))))
        !          9996:            place = i3;
        !          9997:          break;
        !          9998: 
        !          9999:        case REG_INC:
        !          10000:        case REG_NO_CONFLICT:
        !          10001:        case REG_LABEL:
        !          10002:          /* These notes say something about how a register is used.  They must
        !          10003:             be present on any use of the register in I2 or I3.  */
        !          10004:          if (reg_mentioned_p (XEXP (note, 0), PATTERN (i3)))
        !          10005:            place = i3;
        !          10006: 
        !          10007:          if (i2 && reg_mentioned_p (XEXP (note, 0), PATTERN (i2)))
        !          10008:            {
        !          10009:              if (place)
        !          10010:                place2 = i2;
        !          10011:              else
        !          10012:                place = i2;
        !          10013:            }
        !          10014:          break;
        !          10015: 
        !          10016:        case REG_WAS_0:
        !          10017:          /* It is too much trouble to try to see if this note is still
        !          10018:             correct in all situations.  It is better to simply delete it.  */
        !          10019:          break;
        !          10020: 
        !          10021:        case REG_RETVAL:
        !          10022:          /* If the insn previously containing this note still exists,
        !          10023:             put it back where it was.  Otherwise move it to the previous
        !          10024:             insn.  Adjust the corresponding REG_LIBCALL note.  */
        !          10025:          if (GET_CODE (from_insn) != NOTE)
        !          10026:            place = from_insn;
        !          10027:          else
        !          10028:            {
        !          10029:              tem = find_reg_note (XEXP (note, 0), REG_LIBCALL, NULL_RTX);
        !          10030:              place = prev_real_insn (from_insn);
        !          10031:              if (tem && place)
        !          10032:                XEXP (tem, 0) = place;
        !          10033:            }
        !          10034:          break;
        !          10035: 
        !          10036:        case REG_LIBCALL:
        !          10037:          /* This is handled similarly to REG_RETVAL.  */
        !          10038:          if (GET_CODE (from_insn) != NOTE)
        !          10039:            place = from_insn;
        !          10040:          else
        !          10041:            {
        !          10042:              tem = find_reg_note (XEXP (note, 0), REG_RETVAL, NULL_RTX);
        !          10043:              place = next_real_insn (from_insn);
        !          10044:              if (tem && place)
        !          10045:                XEXP (tem, 0) = place;
        !          10046:            }
        !          10047:          break;
        !          10048: 
        !          10049:        case REG_DEAD:
        !          10050:          /* If the register is used as an input in I3, it dies there.
        !          10051:             Similarly for I2, if it is non-zero and adjacent to I3.
        !          10052: 
        !          10053:             If the register is not used as an input in either I3 or I2
        !          10054:             and it is not one of the registers we were supposed to eliminate,
        !          10055:             there are two possibilities.  We might have a non-adjacent I2
        !          10056:             or we might have somehow eliminated an additional register
        !          10057:             from a computation.  For example, we might have had A & B where
        !          10058:             we discover that B will always be zero.  In this case we will
        !          10059:             eliminate the reference to A.
        !          10060: 
        !          10061:             In both cases, we must search to see if we can find a previous
        !          10062:             use of A and put the death note there.  */
        !          10063: 
        !          10064:          if (reg_referenced_p (XEXP (note, 0), PATTERN (i3)))
        !          10065:            place = i3;
        !          10066:          else if (i2 != 0 && next_nonnote_insn (i2) == i3
        !          10067:                   && reg_referenced_p (XEXP (note, 0), PATTERN (i2)))
        !          10068:            place = i2;
        !          10069: 
        !          10070:          if (XEXP (note, 0) == elim_i2 || XEXP (note, 0) == elim_i1)
        !          10071:            break;
        !          10072: 
        !          10073:          /* If the register is used in both I2 and I3 and it dies in I3, 
        !          10074:             we might have added another reference to it.  If reg_n_refs
        !          10075:             was 2, bump it to 3.  This has to be correct since the 
        !          10076:             register must have been set somewhere.  The reason this is
        !          10077:             done is because local-alloc.c treats 2 references as a 
        !          10078:             special case.  */
        !          10079: 
        !          10080:          if (place == i3 && i2 != 0 && GET_CODE (XEXP (note, 0)) == REG
        !          10081:              && reg_n_refs[REGNO (XEXP (note, 0))]== 2
        !          10082:              && reg_referenced_p (XEXP (note, 0), PATTERN (i2)))
        !          10083:            reg_n_refs[REGNO (XEXP (note, 0))] = 3;
        !          10084: 
        !          10085:          if (place == 0)
        !          10086:            for (tem = prev_nonnote_insn (i3);
        !          10087:                 tem && (GET_CODE (tem) == INSN
        !          10088:                         || GET_CODE (tem) == CALL_INSN);
        !          10089:                 tem = prev_nonnote_insn (tem))
        !          10090:              {
        !          10091:                /* If the register is being set at TEM, see if that is all
        !          10092:                   TEM is doing.  If so, delete TEM.  Otherwise, make this
        !          10093:                   into a REG_UNUSED note instead.  */
        !          10094:                if (reg_set_p (XEXP (note, 0), PATTERN (tem)))
        !          10095:                  {
        !          10096:                    rtx set = single_set (tem);
        !          10097: 
        !          10098:                    /* Verify that it was the set, and not a clobber that
        !          10099:                       modified the register.  */
        !          10100: 
        !          10101:                    if (set != 0 && ! side_effects_p (SET_SRC (set))
        !          10102:                        && rtx_equal_p (XEXP (note, 0), SET_DEST (set)))
        !          10103:                      {
        !          10104:                        /* Move the notes and links of TEM elsewhere.
        !          10105:                           This might delete other dead insns recursively. 
        !          10106:                           First set the pattern to something that won't use
        !          10107:                           any register.  */
        !          10108: 
        !          10109:                        PATTERN (tem) = pc_rtx;
        !          10110: 
        !          10111:                        distribute_notes (REG_NOTES (tem), tem, tem,
        !          10112:                                          NULL_RTX, NULL_RTX, NULL_RTX);
        !          10113:                        distribute_links (LOG_LINKS (tem));
        !          10114: 
        !          10115:                        PUT_CODE (tem, NOTE);
        !          10116:                        NOTE_LINE_NUMBER (tem) = NOTE_INSN_DELETED;
        !          10117:                        NOTE_SOURCE_FILE (tem) = 0;
        !          10118:                      }
        !          10119:                    else
        !          10120:                      {
        !          10121:                        PUT_REG_NOTE_KIND (note, REG_UNUSED);
        !          10122: 
        !          10123:                        /*  If there isn't already a REG_UNUSED note, put one
        !          10124:                            here.  */
        !          10125:                        if (! find_regno_note (tem, REG_UNUSED,
        !          10126:                                               REGNO (XEXP (note, 0))))
        !          10127:                          place = tem;
        !          10128:                        break;
        !          10129:                      }
        !          10130:                  }
        !          10131:                else if (reg_referenced_p (XEXP (note, 0), PATTERN (tem)))
        !          10132:                  {
        !          10133:                    place = tem;
        !          10134:                    break;
        !          10135:                  }
        !          10136:              }
        !          10137: 
        !          10138:          /* If the register is set or already dead at PLACE, we needn't do
        !          10139:             anything with this note if it is still a REG_DEAD note.  
        !          10140: 
        !          10141:             Note that we cannot use just `dead_or_set_p' here since we can
        !          10142:             convert an assignment to a register into a bit-field assignment.
        !          10143:             Therefore, we must also omit the note if the register is the 
        !          10144:             target of a bitfield assignment.  */
        !          10145:             
        !          10146:          if (place && REG_NOTE_KIND (note) == REG_DEAD)
        !          10147:            {
        !          10148:              int regno = REGNO (XEXP (note, 0));
        !          10149: 
        !          10150:              if (dead_or_set_p (place, XEXP (note, 0))
        !          10151:                  || reg_bitfield_target_p (XEXP (note, 0), PATTERN (place)))
        !          10152:                {
        !          10153:                  /* Unless the register previously died in PLACE, clear
        !          10154:                     reg_last_death.  [I no longer understand why this is
        !          10155:                     being done.] */
        !          10156:                  if (reg_last_death[regno] != place)
        !          10157:                    reg_last_death[regno] = 0;
        !          10158:                  place = 0;
        !          10159:                }
        !          10160:              else
        !          10161:                reg_last_death[regno] = place;
        !          10162: 
        !          10163:              /* If this is a death note for a hard reg that is occupying
        !          10164:                 multiple registers, ensure that we are still using all
        !          10165:                 parts of the object.  If we find a piece of the object
        !          10166:                 that is unused, we must add a USE for that piece before
        !          10167:                 PLACE and put the appropriate REG_DEAD note on it.
        !          10168: 
        !          10169:                 An alternative would be to put a REG_UNUSED for the pieces
        !          10170:                 on the insn that set the register, but that can't be done if
        !          10171:                 it is not in the same block.  It is simpler, though less
        !          10172:                 efficient, to add the USE insns.  */
        !          10173: 
        !          10174:              if (place && regno < FIRST_PSEUDO_REGISTER
        !          10175:                  && HARD_REGNO_NREGS (regno, GET_MODE (XEXP (note, 0))) > 1)
        !          10176:                {
        !          10177:                  int endregno
        !          10178:                    = regno + HARD_REGNO_NREGS (regno,
        !          10179:                                                GET_MODE (XEXP (note, 0)));
        !          10180:                  int all_used = 1;
        !          10181:                  int i;
        !          10182: 
        !          10183:                  for (i = regno; i < endregno; i++)
        !          10184:                    if (! refers_to_regno_p (i, i + 1, PATTERN (place), 0))
        !          10185:                      {
        !          10186:                        rtx piece = gen_rtx (REG, word_mode, i);
        !          10187:                        rtx p;
        !          10188: 
        !          10189:                        /* See if we already placed a USE note for this
        !          10190:                           register in front of PLACE.  */
        !          10191:                        for (p = place;
        !          10192:                             GET_CODE (PREV_INSN (p)) == INSN
        !          10193:                             && GET_CODE (PATTERN (PREV_INSN (p))) == USE;
        !          10194:                             p = PREV_INSN (p))
        !          10195:                          if (rtx_equal_p (piece,
        !          10196:                                           XEXP (PATTERN (PREV_INSN (p)), 0)))
        !          10197:                            {
        !          10198:                              p = 0;
        !          10199:                              break;
        !          10200:                            }
        !          10201: 
        !          10202:                        if (p)
        !          10203:                          {
        !          10204:                            rtx use_insn
        !          10205:                              = emit_insn_before (gen_rtx (USE, VOIDmode,
        !          10206:                                                           piece),
        !          10207:                                                  p);
        !          10208:                            REG_NOTES (use_insn)
        !          10209:                              = gen_rtx (EXPR_LIST, REG_DEAD, piece,
        !          10210:                                         REG_NOTES (use_insn));
        !          10211:                          }
        !          10212: 
        !          10213:                        all_used = 0;
        !          10214:                      }
        !          10215: 
        !          10216:                  /* Check for the case where the register dying partially
        !          10217:                     overlaps the register set by this insn.  */
        !          10218:                  if (all_used)
        !          10219:                    for (i = regno; i < endregno; i++)
        !          10220:                      if (dead_or_set_regno_p (place, i))
        !          10221:                          {
        !          10222:                            all_used = 0;
        !          10223:                            break;
        !          10224:                          }
        !          10225: 
        !          10226:                  if (! all_used)
        !          10227:                    {
        !          10228:                      /* Put only REG_DEAD notes for pieces that are
        !          10229:                         still used and that are not already dead or set.  */
        !          10230: 
        !          10231:                      for (i = regno; i < endregno; i++)
        !          10232:                        {
        !          10233:                          rtx piece = gen_rtx (REG, word_mode, i);
        !          10234: 
        !          10235:                          if (reg_referenced_p (piece, PATTERN (place))
        !          10236:                              && ! dead_or_set_p (place, piece)
        !          10237:                              && ! reg_bitfield_target_p (piece,
        !          10238:                                                          PATTERN (place)))
        !          10239:                            REG_NOTES (place) = gen_rtx (EXPR_LIST, REG_DEAD,
        !          10240:                                                         piece,
        !          10241:                                                         REG_NOTES (place));
        !          10242:                        }
        !          10243: 
        !          10244:                      place = 0;
        !          10245:                    }
        !          10246:                }
        !          10247:            }
        !          10248:          break;
        !          10249: 
        !          10250:        default:
        !          10251:          /* Any other notes should not be present at this point in the
        !          10252:             compilation.  */
        !          10253:          abort ();
        !          10254:        }
        !          10255: 
        !          10256:       if (place)
        !          10257:        {
        !          10258:          XEXP (note, 1) = REG_NOTES (place);
        !          10259:          REG_NOTES (place) = note;
        !          10260:        }
        !          10261:       else if ((REG_NOTE_KIND (note) == REG_DEAD
        !          10262:                || REG_NOTE_KIND (note) == REG_UNUSED)
        !          10263:               && GET_CODE (XEXP (note, 0)) == REG)
        !          10264:        reg_n_deaths[REGNO (XEXP (note, 0))]--;
        !          10265: 
        !          10266:       if (place2)
        !          10267:        {
        !          10268:          if ((REG_NOTE_KIND (note) == REG_DEAD
        !          10269:               || REG_NOTE_KIND (note) == REG_UNUSED)
        !          10270:              && GET_CODE (XEXP (note, 0)) == REG)
        !          10271:            reg_n_deaths[REGNO (XEXP (note, 0))]++;
        !          10272: 
        !          10273:          REG_NOTES (place2) = gen_rtx (GET_CODE (note), REG_NOTE_KIND (note),
        !          10274:                                        XEXP (note, 0), REG_NOTES (place2));
        !          10275:        }
        !          10276:     }
        !          10277: }
        !          10278: 
        !          10279: /* Similarly to above, distribute the LOG_LINKS that used to be present on
        !          10280:    I3, I2, and I1 to new locations.  This is also called in one case to
        !          10281:    add a link pointing at I3 when I3's destination is changed.  */
        !          10282: 
        !          10283: static void
        !          10284: distribute_links (links)
        !          10285:      rtx links;
        !          10286: {
        !          10287:   rtx link, next_link;
        !          10288: 
        !          10289:   for (link = links; link; link = next_link)
        !          10290:     {
        !          10291:       rtx place = 0;
        !          10292:       rtx insn;
        !          10293:       rtx set, reg;
        !          10294: 
        !          10295:       next_link = XEXP (link, 1);
        !          10296: 
        !          10297:       /* If the insn that this link points to is a NOTE or isn't a single
        !          10298:         set, ignore it.  In the latter case, it isn't clear what we
        !          10299:         can do other than ignore the link, since we can't tell which 
        !          10300:         register it was for.  Such links wouldn't be used by combine
        !          10301:         anyway.
        !          10302: 
        !          10303:         It is not possible for the destination of the target of the link to
        !          10304:         have been changed by combine.  The only potential of this is if we
        !          10305:         replace I3, I2, and I1 by I3 and I2.  But in that case the
        !          10306:         destination of I2 also remains unchanged.  */
        !          10307: 
        !          10308:       if (GET_CODE (XEXP (link, 0)) == NOTE
        !          10309:          || (set = single_set (XEXP (link, 0))) == 0)
        !          10310:        continue;
        !          10311: 
        !          10312:       reg = SET_DEST (set);
        !          10313:       while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT
        !          10314:             || GET_CODE (reg) == SIGN_EXTRACT
        !          10315:             || GET_CODE (reg) == STRICT_LOW_PART)
        !          10316:        reg = XEXP (reg, 0);
        !          10317: 
        !          10318:       /* A LOG_LINK is defined as being placed on the first insn that uses
        !          10319:         a register and points to the insn that sets the register.  Start
        !          10320:         searching at the next insn after the target of the link and stop
        !          10321:         when we reach a set of the register or the end of the basic block.
        !          10322: 
        !          10323:         Note that this correctly handles the link that used to point from
        !          10324:         I3 to I2.  Also note that not much searching is typically done here
        !          10325:         since most links don't point very far away.  */
        !          10326: 
        !          10327:       for (insn = NEXT_INSN (XEXP (link, 0));
        !          10328:           (insn && (this_basic_block == n_basic_blocks - 1
        !          10329:                     || basic_block_head[this_basic_block + 1] != insn));
        !          10330:           insn = NEXT_INSN (insn))
        !          10331:        if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
        !          10332:            && reg_overlap_mentioned_p (reg, PATTERN (insn)))
        !          10333:          {
        !          10334:            if (reg_referenced_p (reg, PATTERN (insn)))
        !          10335:              place = insn;
        !          10336:            break;
        !          10337:          }
        !          10338: 
        !          10339:       /* If we found a place to put the link, place it there unless there
        !          10340:         is already a link to the same insn as LINK at that point.  */
        !          10341: 
        !          10342:       if (place)
        !          10343:        {
        !          10344:          rtx link2;
        !          10345: 
        !          10346:          for (link2 = LOG_LINKS (place); link2; link2 = XEXP (link2, 1))
        !          10347:            if (XEXP (link2, 0) == XEXP (link, 0))
        !          10348:              break;
        !          10349: 
        !          10350:          if (link2 == 0)
        !          10351:            {
        !          10352:              XEXP (link, 1) = LOG_LINKS (place);
        !          10353:              LOG_LINKS (place) = link;
        !          10354:            }
        !          10355:        }
        !          10356:     }
        !          10357: }
        !          10358: 
        !          10359: void
        !          10360: dump_combine_stats (file)
        !          10361:      FILE *file;
        !          10362: {
        !          10363:   fprintf
        !          10364:     (file,
        !          10365:      ";; Combiner statistics: %d attempts, %d substitutions (%d requiring new space),\n;; %d successes.\n\n",
        !          10366:      combine_attempts, combine_merges, combine_extras, combine_successes);
        !          10367: }
        !          10368: 
        !          10369: void
        !          10370: dump_combine_total_stats (file)
        !          10371:      FILE *file;
        !          10372: {
        !          10373:   fprintf
        !          10374:     (file,
        !          10375:      "\n;; Combiner totals: %d attempts, %d substitutions (%d requiring new space),\n;; %d successes.\n",
        !          10376:      total_attempts, total_merges, total_extras, total_successes);
        !          10377: }