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1.1 root 1: /* Definitions of target machine for GNU compiler, for DEC Alpha.
2: Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3: Contributed by Richard Kenner ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21:
22: /* Names to predefine in the preprocessor for this target machine. */
23:
24: #define CPP_PREDEFINES "\
25: -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \
26: -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)"
27:
28: /* Write out the correct language type definition for the header files.
29: Unless we have assembler language, write out the symbols for C. */
30: #define CPP_SPEC "\
31: %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \
32: %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
33: %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
34: %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
35: %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
36: %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}"
37:
38: /* Set the spec to use for signed char. The default tests the above macro
39: but DEC's compiler can't handle the conditional in a "constant"
40: operand. */
41:
42: #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
43:
44: /* No point in running CPP on our assembler output. */
45: #define ASM_SPEC "-nocpp"
46:
47: /* Right now Alpha OSF/1 doesn't seem to have debugging libraries. */
48:
49: #define LIB_SPEC "%{p:-lprof1} -lc"
50:
51: /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are optimizing,
52: -O1 if we are not. Pass -non_shared or -call_shared as appropriate. */
53: #define LINK_SPEC \
54: "-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} %{!static:-call_shared}"
55:
56: /* Print subsidiary information on the compiler version in use. */
57: #define TARGET_VERSION
58:
59: /* Define the location for the startup file on OSF/1 for Alpha. */
60:
61: #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
62:
63: /* Run-time compilation parameters selecting different hardware subsets. */
64:
65: extern int target_flags;
66:
67: /* This means that floating-point support exists in the target implementation
68: of the Alpha architecture. This is usually the default. */
69:
70: #define TARGET_FP (target_flags & 1)
71:
72: /* This means that floating-point registers are allowed to be used. Note
73: that Alpha implementations without FP operations are required to
74: provide the FP registers. */
75:
76: #define TARGET_FPREGS (target_flags & 2)
77:
78: /* This means that gas is used to process the assembler file. */
79:
80: #define MASK_GAS 4
81: #define TARGET_GAS (target_flags & MASK_GAS)
82:
83: /* Macro to define tables used to set the flags.
84: This is a list in braces of pairs in braces,
85: each pair being { "NAME", VALUE }
86: where VALUE is the bits to set or minus the bits to clear.
87: An empty string NAME is used to identify the default VALUE. */
88:
89: #define TARGET_SWITCHES \
90: { {"no-soft-float", 1}, \
91: {"soft-float", -1}, \
92: {"fp-regs", 2}, \
93: {"no-fp-regs", -3}, \
94: {"alpha-as", -MASK_GAS}, \
95: {"gas", MASK_GAS}, \
96: {"", TARGET_DEFAULT} }
97:
98: #define TARGET_DEFAULT 3
99:
100: /* Define this macro to change register usage conditional on target flags.
101:
102: On the Alpha, we use this to disable the floating-point registers when
103: they don't exist. */
104:
105: #define CONDITIONAL_REGISTER_USAGE \
106: if (! TARGET_FPREGS) \
107: for (i = 32; i < 64; i++) \
108: fixed_regs[i] = call_used_regs[i] = 1;
109:
110: /* Define this to change the optimizations performed by default. */
111:
112: #define OPTIMIZATION_OPTIONS(LEVEL) \
113: { \
114: if ((LEVEL) > 0) \
115: { \
116: flag_force_addr = 1; \
117: flag_force_mem = 1; \
118: flag_omit_frame_pointer = 1; \
119: } \
120: }
121:
122: /* target machine storage layout */
123:
124: /* Define to enable software floating point emulation. */
125: #define REAL_ARITHMETIC
126:
127: /* Define the size of `int'. The default is the same as the word size. */
128: #define INT_TYPE_SIZE 32
129:
130: /* Define the size of `long long'. The default is the twice the word size. */
131: #define LONG_LONG_TYPE_SIZE 64
132:
133: /* The two floating-point formats we support are S-floating, which is
134: 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
135: and `long double' are T. */
136:
137: #define FLOAT_TYPE_SIZE 32
138: #define DOUBLE_TYPE_SIZE 64
139: #define LONG_DOUBLE_TYPE_SIZE 64
140:
141: #define WCHAR_TYPE "short unsigned int"
142: #define WCHAR_TYPE_SIZE 16
143:
144: /* Define this macro if it is advisable to hold scalars in registers
145: in a wider mode than that declared by the program. In such cases,
146: the value is constrained to be within the bounds of the declared
147: type, but kept valid in the wider mode. The signedness of the
148: extension may differ from that of the type.
149:
150: For Alpha, we always store objects in a full register. 32-bit objects
151: are always sign-extended, but smaller objects retain their signedness. */
152:
153: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
154: if (GET_MODE_CLASS (MODE) == MODE_INT \
155: && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
156: { \
157: if ((MODE) == SImode) \
158: (UNSIGNEDP) = 0; \
159: (MODE) = DImode; \
160: }
161:
162: /* Define this if function arguments should also be promoted using the above
163: procedure. */
164:
165: #define PROMOTE_FUNCTION_ARGS
166:
167: /* Likewise, if the function return value is promoted. */
168:
169: #define PROMOTE_FUNCTION_RETURN
170:
171: /* Define this if most significant bit is lowest numbered
172: in instructions that operate on numbered bit-fields.
173:
174: There are no such instructions on the Alpha, but the documentation
175: is little endian. */
176: #define BITS_BIG_ENDIAN 0
177:
178: /* Define this if most significant byte of a word is the lowest numbered.
179: This is false on the Alpha. */
180: #define BYTES_BIG_ENDIAN 0
181:
182: /* Define this if most significant word of a multiword number is lowest
183: numbered.
184:
185: For Alpha we can decide arbitrarily since there are no machine instructions
186: for them. Might as well be consistent with bytes. */
187: #define WORDS_BIG_ENDIAN 0
188:
189: /* number of bits in an addressable storage unit */
190: #define BITS_PER_UNIT 8
191:
192: /* Width in bits of a "word", which is the contents of a machine register.
193: Note that this is not necessarily the width of data type `int';
194: if using 16-bit ints on a 68000, this would still be 32.
195: But on a machine with 16-bit registers, this would be 16. */
196: #define BITS_PER_WORD 64
197:
198: /* Width of a word, in units (bytes). */
199: #define UNITS_PER_WORD 8
200:
201: /* Width in bits of a pointer.
202: See also the macro `Pmode' defined below. */
203: #define POINTER_SIZE 64
204:
205: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
206: #define PARM_BOUNDARY 64
207:
208: /* Boundary (in *bits*) on which stack pointer should be aligned. */
209: #define STACK_BOUNDARY 64
210:
211: /* Allocation boundary (in *bits*) for the code of a function. */
212: #define FUNCTION_BOUNDARY 64
213:
214: /* Alignment of field after `int : 0' in a structure. */
215: #define EMPTY_FIELD_BOUNDARY 64
216:
217: /* Every structure's size must be a multiple of this. */
218: #define STRUCTURE_SIZE_BOUNDARY 8
219:
220: /* A bitfield declared as `int' forces `int' alignment for the struct. */
221: #define PCC_BITFIELD_TYPE_MATTERS 1
222:
223: /* Align loop starts for optimal branching.
224:
225: ??? Kludge this and the next macro for the moment by not doing anything if
226: we don't optimize and also if we are writing ECOFF symbols to work around
227: a bug in DEC's assembler. */
228:
229: #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
230: if (optimize > 0 && write_symbols != SDB_DEBUG) \
231: ASM_OUTPUT_ALIGN (FILE, 5)
232:
233: /* This is how to align an instruction for optimal branching.
234: On Alpha we'll get better performance by aligning on a quadword
235: boundary. */
236:
237: #define ASM_OUTPUT_ALIGN_CODE(FILE) \
238: if (optimize > 0 && write_symbols != SDB_DEBUG) \
239: ASM_OUTPUT_ALIGN ((FILE), 4)
240:
241: /* No data type wants to be aligned rounder than this. */
242: #define BIGGEST_ALIGNMENT 64
243:
244: /* Make strings word-aligned so strcpy from constants will be faster. */
245: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
246: (TREE_CODE (EXP) == STRING_CST \
247: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
248:
249: /* Make arrays of chars word-aligned for the same reasons. */
250: #define DATA_ALIGNMENT(TYPE, ALIGN) \
251: (TREE_CODE (TYPE) == ARRAY_TYPE \
252: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
253: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
254:
255: /* Set this non-zero if move instructions will actually fail to work
256: when given unaligned data.
257:
258: Since we get an error message when we do one, call them invalid. */
259:
260: #define STRICT_ALIGNMENT 1
261:
262: /* Set this non-zero if unaligned move instructions are extremely slow.
263:
264: On the Alpha, they trap. */
265:
266: #define SLOW_UNALIGNED_ACCESS 1
267:
268: /* Standard register usage. */
269:
270: /* Number of actual hardware registers.
271: The hardware registers are assigned numbers for the compiler
272: from 0 to just below FIRST_PSEUDO_REGISTER.
273: All registers that the compiler knows about must be given numbers,
274: even those that are not normally considered general registers.
275:
276: We define all 32 integer registers, even though $31 is always zero,
277: and all 32 floating-point registers, even though $f31 is also
278: always zero. We do not bother defining the FP status register and
279: there are no other registers.
280:
281: Since $31 is always zero, we will use register number 31 as the
282: argument pointer. It will never appear in the generated code
283: because we will always be eliminating it in favor of the stack
284: poointer or frame pointer. */
285:
286: #define FIRST_PSEUDO_REGISTER 64
287:
288: /* 1 for registers that have pervasive standard uses
289: and are not available for the register allocator. */
290:
291: #define FIXED_REGISTERS \
292: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
293: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
294: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
295: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
296:
297: /* 1 for registers not available across function calls.
298: These must include the FIXED_REGISTERS and also any
299: registers that can be used without being saved.
300: The latter must include the registers where values are returned
301: and the register where structure-value addresses are passed.
302: Aside from that, you can include as many other registers as you like. */
303: #define CALL_USED_REGISTERS \
304: {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
305: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
306: 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
307: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
308:
309: /* List the order in which to allocate registers. Each register must be
310: listed once, even those in FIXED_REGISTERS.
311:
312: We allocate in the following order:
313: $f1 (nonsaved floating-point register)
314: $f10-$f15 (likewise)
315: $f22-$f30 (likewise)
316: $f21-$f16 (likewise, but input args)
317: $f0 (nonsaved, but return value)
318: $f2-$f9 (saved floating-point registers)
319: $1-$8 (nonsaved integer registers)
320: $22-$25 (likewise)
321: $28 (likewise)
322: $0 (likewise, but return value)
323: $21-$16 (likewise, but input args)
324: $27 (procedure value)
325: $9-$14 (saved integer registers)
326: $26 (return PC)
327: $15 (frame pointer)
328: $29 (global pointer)
329: $30, $31, $f31 (stack pointer and always zero/ap) */
330:
331: #define REG_ALLOC_ORDER \
332: {33, \
333: 42, 43, 44, 45, 46, 47, \
334: 54, 55, 56, 57, 58, 59, 60, 61, 62, \
335: 53, 52, 51, 50, 49, 48, \
336: 32, \
337: 34, 35, 36, 37, 38, 39, 40, 41, \
338: 1, 2, 3, 4, 5, 6, 7, 8, \
339: 22, 23, 24, 25, \
340: 28, \
341: 0, \
342: 21, 20, 19, 18, 17, 16, \
343: 27, \
344: 9, 10, 11, 12, 13, 14, \
345: 26, \
346: 15, \
347: 29, \
348: 30, 31, 63 }
349:
350: /* Return number of consecutive hard regs needed starting at reg REGNO
351: to hold something of mode MODE.
352: This is ordinarily the length in words of a value of mode MODE
353: but can be less for certain modes in special long registers. */
354:
355: #define HARD_REGNO_NREGS(REGNO, MODE) \
356: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
357:
358: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
359: On Alpha, the integer registers can hold any mode. The floating-point
360: registers can hold 32-bit and 64-bit integers as well, but not 16-bit
361: or 8-bit values. If we only allowed the larger integers into FP registers,
362: we'd have to say that QImode and SImode aren't tiable, which is a
363: pain. So say all registers can hold everything and see how that works. */
364:
365: #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
366:
367: /* Value is 1 if it is a good idea to tie two pseudo registers
368: when one has mode MODE1 and one has mode MODE2.
369: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
370: for any hard reg, then this must be 0 for correct output. */
371:
372: #define MODES_TIEABLE_P(MODE1, MODE2) 1
373:
374: /* Specify the registers used for certain standard purposes.
375: The values of these macros are register numbers. */
376:
377: /* Alpha pc isn't overloaded on a register that the compiler knows about. */
378: /* #define PC_REGNUM */
379:
380: /* Register to use for pushing function arguments. */
381: #define STACK_POINTER_REGNUM 30
382:
383: /* Base register for access to local variables of the function. */
384: #define FRAME_POINTER_REGNUM 15
385:
386: /* Value should be nonzero if functions must have frame pointers.
387: Zero means the frame pointer need not be set up (and parms
388: may be accessed via the stack pointer) in functions that seem suitable.
389: This is computed in `reload', in reload1.c. */
390: #define FRAME_POINTER_REQUIRED 0
391:
392: /* Base register for access to arguments of the function. */
393: #define ARG_POINTER_REGNUM 31
394:
395: /* Register in which static-chain is passed to a function.
396:
397: For the Alpha, this is based on an example; the calling sequence
398: doesn't seem to specify this. */
399: #define STATIC_CHAIN_REGNUM 1
400:
401: /* Register in which address to store a structure value
402: arrives in the function. On the Alpha, the address is passed
403: as a hidden argument. */
404: #define STRUCT_VALUE 0
405:
406: /* Define the classes of registers for register constraints in the
407: machine description. Also define ranges of constants.
408:
409: One of the classes must always be named ALL_REGS and include all hard regs.
410: If there is more than one class, another class must be named NO_REGS
411: and contain no registers.
412:
413: The name GENERAL_REGS must be the name of a class (or an alias for
414: another name such as ALL_REGS). This is the class of registers
415: that is allowed by "g" or "r" in a register constraint.
416: Also, registers outside this class are allocated only when
417: instructions express preferences for them.
418:
419: The classes must be numbered in nondecreasing order; that is,
420: a larger-numbered class must never be contained completely
421: in a smaller-numbered class.
422:
423: For any two classes, it is very desirable that there be another
424: class that represents their union. */
425:
426: enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
427: LIM_REG_CLASSES };
428:
429: #define N_REG_CLASSES (int) LIM_REG_CLASSES
430:
431: /* Give names of register classes as strings for dump file. */
432:
433: #define REG_CLASS_NAMES \
434: {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
435:
436: /* Define which registers fit in which classes.
437: This is an initializer for a vector of HARD_REG_SET
438: of length N_REG_CLASSES. */
439:
440: #define REG_CLASS_CONTENTS \
441: { {0, 0}, {~0, 0}, {0, ~0}, {~0, ~0} }
442:
443: /* The same information, inverted:
444: Return the class number of the smallest class containing
445: reg number REGNO. This could be a conditional expression
446: or could index an array. */
447:
448: #define REGNO_REG_CLASS(REGNO) ((REGNO) >= 32 ? FLOAT_REGS : GENERAL_REGS)
449:
450: /* The class value for index registers, and the one for base regs. */
451: #define INDEX_REG_CLASS NO_REGS
452: #define BASE_REG_CLASS GENERAL_REGS
453:
454: /* Get reg_class from a letter such as appears in the machine description. */
455:
456: #define REG_CLASS_FROM_LETTER(C) \
457: ((C) == 'f' ? FLOAT_REGS : NO_REGS)
458:
459: /* Define this macro to change register usage conditional on target flags. */
460: /* #define CONDITIONAL_REGISTER_USAGE */
461:
462: /* The letters I, J, K, L, M, N, O, and P in a register constraint string
463: can be used to stand for particular ranges of immediate operands.
464: This macro defines what the ranges are.
465: C is the letter, and VALUE is a constant value.
466: Return 1 if VALUE is in the range specified by C.
467:
468: For Alpha:
469: `I' is used for the range of constants most insns can contain.
470: `J' is the constant zero.
471: `K' is used for the constant in an LDA insn.
472: `L' is used for the constant in a LDAH insn.
473: `M' is used for the constants that can be AND'ed with using a ZAP insn.
474: `N' is used for complemented 8-bit constants.
475: `O' is used for negated 8-bit constants.
476: `P' is used for the constants 1, 2 and 3. */
477:
478: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
479: ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \
480: : (C) == 'J' ? (VALUE) == 0 \
481: : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
482: : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
483: && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0)) \
484: : (C) == 'M' ? zap_mask (VALUE) \
485: : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \
486: : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \
487: : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \
488: : 0)
489:
490: /* Similar, but for floating or large integer constants, and defining letters
491: G and H. Here VALUE is the CONST_DOUBLE rtx itself.
492:
493: For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
494: that is the operand of a ZAP insn. */
495:
496: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
497: ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
498: && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
499: : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \
500: && zap_mask (CONST_DOUBLE_LOW (VALUE)) \
501: && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \
502: : 0)
503:
504: /* Optional extra constraints for this machine.
505:
506: For the Alpha, `Q' means that this is a memory operand but not a
507: reference to an unaligned location. */
508:
509: #define EXTRA_CONSTRAINT(OP, C) \
510: ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \
511: : 0)
512:
513: /* Given an rtx X being reloaded into a reg required to be
514: in class CLASS, return the class of reg to actually use.
515: In general this is just CLASS; but on some machines
516: in some cases it is preferable to use a more restrictive class.
517:
518: On the Alpha, all constants except zero go into a floating-point
519: register via memory. */
520:
521: #define PREFERRED_RELOAD_CLASS(X, CLASS) \
522: (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \
523: ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \
524: : (CLASS))
525:
526: /* Loading and storing HImode or QImode values to and from memory
527: usually requires a scratch register. The exceptions are loading
528: QImode and HImode from an aligned address to a general register.
529: We also cannot load an unaligned address into an FP register. */
530:
531: #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
532: (((GET_CODE (IN) == MEM \
533: || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \
534: || (GET_CODE (IN) == SUBREG \
535: && (GET_CODE (SUBREG_REG (IN)) == MEM \
536: || (GET_CODE (SUBREG_REG (IN)) == REG \
537: && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \
538: && (((CLASS) == FLOAT_REGS \
539: && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \
540: || (((MODE) == QImode || (MODE) == HImode) \
541: && unaligned_memory_operand (IN, MODE)))) \
542: ? GENERAL_REGS \
543: : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \
544: && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \
545: : NO_REGS)
546:
547: #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
548: (((GET_CODE (OUT) == MEM \
549: || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \
550: || (GET_CODE (OUT) == SUBREG \
551: && (GET_CODE (SUBREG_REG (OUT)) == MEM \
552: || (GET_CODE (SUBREG_REG (OUT)) == REG \
553: && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \
554: && (((MODE) == HImode || (MODE) == QImode \
555: || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \
556: ? GENERAL_REGS \
557: : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \
558: && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \
559: : NO_REGS)
560:
561: /* If we are copying between general and FP registers, we need a memory
562: location. */
563:
564: #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2))
565:
566: /* Return the maximum number of consecutive registers
567: needed to represent mode MODE in a register of class CLASS. */
568:
569: #define CLASS_MAX_NREGS(CLASS, MODE) \
570: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
571:
572: /* Define the cost of moving between registers of various classes. Moving
573: between FLOAT_REGS and anything else except float regs is expensive.
574: In fact, we make it quite expensive because we really don't want to
575: do these moves unless it is clearly worth it. Optimizations may
576: reduce the impact of not being able to allocate a pseudo to a
577: hard register. */
578:
579: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
580: (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20)
581:
582: /* A C expressions returning the cost of moving data of MODE from a register to
583: or from memory.
584:
585: On the Alpha, bump this up a bit. */
586:
587: #define MEMORY_MOVE_COST(MODE) 6
588:
589: /* Provide the cost of a branch. Exact meaning under development. */
590: #define BRANCH_COST 5
591:
592: /* Adjust the cost of dependencies. */
593:
594: #define ADJUST_COST(INSN,LINK,DEP,COST) \
595: (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST)
596:
597: /* Stack layout; function entry, exit and calling. */
598:
599: /* Define this if pushing a word on the stack
600: makes the stack pointer a smaller address. */
601: #define STACK_GROWS_DOWNWARD
602:
603: /* Define this if the nominal address of the stack frame
604: is at the high-address end of the local variables;
605: that is, each additional local variable allocated
606: goes at a more negative offset in the frame. */
607: /* #define FRAME_GROWS_DOWNWARD */
608:
609: /* Offset within stack frame to start allocating local variables at.
610: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
611: first local allocated. Otherwise, it is the offset to the BEGINNING
612: of the first local allocated. */
613:
614: #define STARTING_FRAME_OFFSET current_function_outgoing_args_size
615:
616: /* If we generate an insn to push BYTES bytes,
617: this says how many the stack pointer really advances by.
618: On Alpha, don't define this because there are no push insns. */
619: /* #define PUSH_ROUNDING(BYTES) */
620:
621: /* Define this if the maximum size of all the outgoing args is to be
622: accumulated and pushed during the prologue. The amount can be
623: found in the variable current_function_outgoing_args_size. */
624: #define ACCUMULATE_OUTGOING_ARGS
625:
626: /* Offset of first parameter from the argument pointer register value. */
627:
628: #define FIRST_PARM_OFFSET(FNDECL) 0
629:
630: /* Definitions for register eliminations.
631:
632: We have two registers that can be eliminated on the Alpha. First, the
633: frame pointer register can often be eliminated in favor of the stack
634: pointer register. Secondly, the argument pointer register can always be
635: eliminated; it is replaced with either the stack or frame pointer. */
636:
637: /* This is an array of structures. Each structure initializes one pair
638: of eliminable registers. The "from" register number is given first,
639: followed by "to". Eliminations of the same "from" register are listed
640: in order of preference. */
641:
642: #define ELIMINABLE_REGS \
643: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
644: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
645: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
646:
647: /* Given FROM and TO register numbers, say whether this elimination is allowed.
648: Frame pointer elimination is automatically handled.
649:
650: All eliminations are valid since the cases where FP can't be
651: eliminated are already handled. */
652:
653: #define CAN_ELIMINATE(FROM, TO) 1
654:
655: /* Define the offset between two registers, one to be eliminated, and the other
656: its replacement, at the start of a routine. */
657: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
658: { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
659: (OFFSET) = 0; \
660: else \
661: { \
662: (OFFSET) = ((get_frame_size () + current_function_outgoing_args_size \
663: + current_function_pretend_args_size \
664: + alpha_sa_size () + 15) \
665: & ~ 15); \
666: if ((FROM) == ARG_POINTER_REGNUM) \
667: (OFFSET) -= current_function_pretend_args_size; \
668: } \
669: }
670:
671: /* Define this if stack space is still allocated for a parameter passed
672: in a register. */
673: /* #define REG_PARM_STACK_SPACE */
674:
675: /* Value is the number of bytes of arguments automatically
676: popped when returning from a subroutine call.
677: FUNTYPE is the data type of the function (as a tree),
678: or for a library call it is an identifier node for the subroutine name.
679: SIZE is the number of bytes of arguments passed on the stack. */
680:
681: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
682:
683: /* Define how to find the value returned by a function.
684: VALTYPE is the data type of the value (as a tree).
685: If the precise function being called is known, FUNC is its FUNCTION_DECL;
686: otherwise, FUNC is 0.
687:
688: On Alpha the value is found in $0 for integer functions and
689: $f0 for floating-point functions. */
690:
691: #define FUNCTION_VALUE(VALTYPE, FUNC) \
692: gen_rtx (REG, \
693: ((TREE_CODE (VALTYPE) == INTEGER_TYPE \
694: || TREE_CODE (VALTYPE) == ENUMERAL_TYPE \
695: || TREE_CODE (VALTYPE) == BOOLEAN_TYPE \
696: || TREE_CODE (VALTYPE) == CHAR_TYPE \
697: || TREE_CODE (VALTYPE) == POINTER_TYPE \
698: || TREE_CODE (VALTYPE) == OFFSET_TYPE) \
699: && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
700: ? word_mode : TYPE_MODE (VALTYPE), \
701: TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0)
702:
703: /* Define how to find the value returned by a library function
704: assuming the value has mode MODE. */
705:
706: #define LIBCALL_VALUE(MODE) \
707: gen_rtx (REG, MODE, \
708: TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0)
709:
710: /* The definition of this macro implies that there are cases where
711: a scalar value cannot be returned in registers.
712:
713: For the Alpha, any structure or union type is returned in memory, as
714: are integers whose size is larger than 64 bits. */
715:
716: #define RETURN_IN_MEMORY(TYPE) \
717: (TYPE_MODE (TYPE) == BLKmode \
718: || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
719:
720: /* 1 if N is a possible register number for a function value
721: as seen by the caller. */
722:
723: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32)
724:
725: /* 1 if N is a possible register number for function argument passing.
726: On Alpha, these are $16-$21 and $f16-$f21. */
727:
728: #define FUNCTION_ARG_REGNO_P(N) \
729: (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
730:
731: /* Define a data type for recording info about an argument list
732: during the scan of that argument list. This data type should
733: hold all necessary information about the function itself
734: and about the args processed so far, enough to enable macros
735: such as FUNCTION_ARG to determine where the next arg should go.
736:
737: On Alpha, this is a single integer, which is a number of words
738: of arguments scanned so far.
739: Thus 6 or more means all following args should go on the stack. */
740:
741: #define CUMULATIVE_ARGS int
742:
743: /* Initialize a variable CUM of type CUMULATIVE_ARGS
744: for a call to a function whose data type is FNTYPE.
745: For a library call, FNTYPE is 0. */
746:
747: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0
748:
749: /* Define intermediate macro to compute the size (in registers) of an argument
750: for the Alpha. */
751:
752: #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
753: ((MODE) != BLKmode \
754: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
755: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
756:
757: /* Update the data in CUM to advance over an argument
758: of mode MODE and data type TYPE.
759: (TYPE is null for libcalls where that information may not be available.) */
760:
761: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
762: if (MUST_PASS_IN_STACK (MODE, TYPE)) \
763: (CUM) = 6; \
764: else \
765: (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
766:
767: /* Determine where to put an argument to a function.
768: Value is zero to push the argument on the stack,
769: or a hard register in which to store the argument.
770:
771: MODE is the argument's machine mode.
772: TYPE is the data type of the argument (as a tree).
773: This is null for libcalls where that information may
774: not be available.
775: CUM is a variable of type CUMULATIVE_ARGS which gives info about
776: the preceding args and about the function being called.
777: NAMED is nonzero if this argument is a named parameter
778: (otherwise it is an extra parameter matching an ellipsis).
779:
780: On Alpha the first 6 words of args are normally in registers
781: and the rest are pushed. */
782:
783: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
784: ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
785: ? gen_rtx(REG, (MODE), \
786: (CUM) + 16 + (TARGET_FPREGS \
787: && GET_MODE_CLASS (MODE) == MODE_FLOAT) * 32) : 0)
788:
789: /* Specify the padding direction of arguments.
790:
791: On the Alpha, we must pad upwards in order to be able to pass args in
792: registers. */
793:
794: #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
795:
796: /* For an arg passed partly in registers and partly in memory,
797: this is the number of registers used.
798: For args passed entirely in registers or entirely in memory, zero. */
799:
800: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
801: ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
802: ? 6 - (CUM) : 0)
803:
804: /* Perform any needed actions needed for a function that is receiving a
805: variable number of arguments.
806:
807: CUM is as above.
808:
809: MODE and TYPE are the mode and type of the current parameter.
810:
811: PRETEND_SIZE is a variable that should be set to the amount of stack
812: that must be pushed by the prolog to pretend that our caller pushed
813: it.
814:
815: Normally, this macro will push all remaining incoming registers on the
816: stack and set PRETEND_SIZE to the length of the registers pushed.
817:
818: On the Alpha, we allocate space for all 12 arg registers, but only
819: push those that are remaining.
820:
821: However, if NO registers need to be saved, don't allocate any space.
822: This is not only because we won't need the space, but because AP includes
823: the current_pretend_args_size and we don't want to mess up any
824: ap-relative addresses already made.
825:
826: If we are not to use the floating-point registers, save the integer
827: registers where we would put the floating-point registers. This is
828: not the most efficient way to implement varargs with just one register
829: class, but it isn't worth doing anything more efficient in this rare
830: case. */
831:
832:
833: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
834: { if ((CUM) < 6) \
835: { \
836: if (! (NO_RTL)) \
837: { \
838: move_block_from_reg \
839: (16 + CUM, \
840: gen_rtx (MEM, BLKmode, \
841: plus_constant (virtual_incoming_args_rtx, \
842: ((CUM) + 6)* UNITS_PER_WORD)), \
843: 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
844: move_block_from_reg \
845: (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \
846: gen_rtx (MEM, BLKmode, \
847: plus_constant (virtual_incoming_args_rtx, \
848: (CUM) * UNITS_PER_WORD)), \
849: 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
850: } \
851: PRETEND_SIZE = 12 * UNITS_PER_WORD; \
852: } \
853: }
854:
855: /* Generate necessary RTL for __builtin_saveregs().
856: ARGLIST is the argument list; see expr.c. */
857: extern struct rtx_def *alpha_builtin_saveregs ();
858: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST)
859:
860: /* Define the information needed to generate branch and scc insns. This is
861: stored from the compare operation. Note that we can't use "rtx" here
862: since it hasn't been defined! */
863:
864: extern struct rtx_def *alpha_compare_op0, *alpha_compare_op1;
865: extern int alpha_compare_fp_p;
866:
867: /* This macro produces the initial definition of a function name. On the
868: Alpha, we need to save the function name for the prologue and epilogue. */
869:
870: extern char *alpha_function_name;
871:
872: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
873: { \
874: alpha_function_name = NAME; \
875: }
876:
877: /* This macro generates the assembly code for function entry.
878: FILE is a stdio stream to output the code to.
879: SIZE is an int: how many units of temporary storage to allocate.
880: Refer to the array `regs_ever_live' to determine which registers
881: to save; `regs_ever_live[I]' is nonzero if register number I
882: is ever used in the function. This macro is responsible for
883: knowing which registers should not be saved even if used. */
884:
885: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
886:
887: /* Output assembler code to FILE to increment profiler label # LABELNO
888: for profiling a function entry. */
889:
890: #define FUNCTION_PROFILER(FILE, LABELNO)
891:
892: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
893: the stack pointer does not matter. The value is tested only in
894: functions that have frame pointers.
895: No definition is equivalent to always zero. */
896:
897: #define EXIT_IGNORE_STACK 1
898:
899: /* This macro generates the assembly code for function exit,
900: on machines that need it. If FUNCTION_EPILOGUE is not defined
901: then individual return instructions are generated for each
902: return statement. Args are same as for FUNCTION_PROLOGUE.
903:
904: The function epilogue should not depend on the current stack pointer!
905: It should use the frame pointer only. This is mandatory because
906: of alloca; we also take advantage of it to omit stack adjustments
907: before returning. */
908:
909: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
910:
911:
912: /* Output assembler code for a block containing the constant parts
913: of a trampoline, leaving space for the variable parts.
914:
915: The trampoline should set the static chain pointer to value placed
916: into the trampoline and should branch to the specified routine.
917: Note that $27 has been set to the address of the trampoline, so we can
918: use it for addressability of the two data items. Trampolines are always
919: aligned to FUNCTION_BOUNDARY, which is 64 bits. */
920:
921: #define TRAMPOLINE_TEMPLATE(FILE) \
922: { \
923: fprintf (FILE, "\tldq $1,24($27)\n"); \
924: fprintf (FILE, "\tldq $27,16($27)\n"); \
925: fprintf (FILE, "\tjmp $31,($27),0\n"); \
926: fprintf (FILE, "\tnop\n"); \
927: fprintf (FILE, "\t.quad 0,0\n"); \
928: }
929:
930: /* Section in which to place the trampoline. On Alpha, instructions
931: may only be placed in a text segment. */
932:
933: #define TRAMPOLINE_SECTION text_section
934:
935: /* Length in units of the trampoline for entering a nested function. */
936:
937: #define TRAMPOLINE_SIZE 32
938:
939: /* Emit RTL insns to initialize the variable parts of a trampoline.
940: FNADDR is an RTX for the address of the function's pure code.
941: CXT is an RTX for the static chain value for the function. We assume
942: here that a function will be called many more times than its address
943: is taken (e.g., it might be passed to qsort), so we take the trouble
944: to initialize the "hint" field in the JMP insn. Note that the hint
945: field is PC (new) + 4 * bits 13:0. */
946:
947: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
948: { \
949: rtx _temp, _temp1, _addr; \
950: \
951: _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
952: emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \
953: _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
954: emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \
955: \
956: _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \
957: _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \
958: OPTAB_WIDEN); \
959: _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \
960: build_int_2 (2, 0), NULL_RTX, 1); \
961: _temp = expand_and (gen_lowpart (SImode, _temp), \
962: GEN_INT (0x3fff), 0); \
963: \
964: _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \
965: _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \
966: _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \
967: _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \
968: OPTAB_WIDEN); \
969: \
970: emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \
971: \
972: emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \
973: "__enable_execute_stack"), \
974: 0, VOIDmode, 1,_addr, Pmode); \
975: \
976: emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
977: gen_rtvec (1, const0_rtx), 0)); \
978: }
979:
980: /* Attempt to turn on access permissions for the stack. */
981:
982: #define TRANSFER_FROM_TRAMPOLINE \
983: \
984: void \
985: __enable_execute_stack (addr) \
986: void *addr; \
987: { \
988: long size = getpagesize (); \
989: long mask = ~(size-1); \
990: char *page = (char *) (((long) addr) & mask); \
991: char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
992: \
993: /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
994: if (mprotect (page, end - page, 7) < 0) \
995: perror ("mprotect of trampoline code"); \
996: }
997:
998: /* Addressing modes, and classification of registers for them. */
999:
1000: /* #define HAVE_POST_INCREMENT */
1001: /* #define HAVE_POST_DECREMENT */
1002:
1003: /* #define HAVE_PRE_DECREMENT */
1004: /* #define HAVE_PRE_INCREMENT */
1005:
1006: /* Macros to check register numbers against specific register classes. */
1007:
1008: /* These assume that REGNO is a hard or pseudo reg number.
1009: They give nonzero only if REGNO is a hard reg of the suitable class
1010: or a pseudo reg currently allocated to a suitable hard reg.
1011: Since they use reg_renumber, they are safe only once reg_renumber
1012: has been allocated, which happens in local-alloc.c. */
1013:
1014: #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1015: #define REGNO_OK_FOR_BASE_P(REGNO) \
1016: (((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1017:
1018: /* Maximum number of registers that can appear in a valid memory address. */
1019: #define MAX_REGS_PER_ADDRESS 1
1020:
1021: /* Recognize any constant value that is a valid address. For the Alpha,
1022: there are only constants none since we want to use LDA to load any
1023: symbolic addresses into registers. */
1024:
1025: #define CONSTANT_ADDRESS_P(X) \
1026: (GET_CODE (X) == CONST_INT \
1027: && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1028:
1029: /* Include all constant integers and constant doubles, but not
1030: floating-point, except for floating-point zero. */
1031:
1032: #define LEGITIMATE_CONSTANT_P(X) \
1033: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1034: || (X) == CONST0_RTX (GET_MODE (X)))
1035:
1036: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1037: and check its validity for a certain class.
1038: We have two alternate definitions for each of them.
1039: The usual definition accepts all pseudo regs; the other rejects
1040: them unless they have been allocated suitable hard regs.
1041: The symbol REG_OK_STRICT causes the latter definition to be used.
1042:
1043: Most source files want to accept pseudo regs in the hope that
1044: they will get allocated to the class that the insn wants them to be in.
1045: Source files for reload pass need to be strict.
1046: After reload, it makes no difference, since pseudo regs have
1047: been eliminated by then. */
1048:
1049: #ifndef REG_OK_STRICT
1050:
1051: /* Nonzero if X is a hard reg that can be used as an index
1052: or if it is a pseudo reg. */
1053: #define REG_OK_FOR_INDEX_P(X) 0
1054: /* Nonzero if X is a hard reg that can be used as a base reg
1055: or if it is a pseudo reg. */
1056: #define REG_OK_FOR_BASE_P(X) \
1057: (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1058:
1059: #else
1060:
1061: /* Nonzero if X is a hard reg that can be used as an index. */
1062: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1063: /* Nonzero if X is a hard reg that can be used as a base reg. */
1064: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1065:
1066: #endif
1067:
1068: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1069: that is a valid memory address for an instruction.
1070: The MODE argument is the machine mode for the MEM expression
1071: that wants to use this address.
1072:
1073: For Alpha, we have either a constant address or the sum of a register
1074: and a constant address, or just a register. For DImode, any of those
1075: forms can be surrounded with an AND that clear the low-order three bits;
1076: this is an "unaligned" access.
1077:
1078: We also allow a SYMBOL_REF that is the name of the current function as
1079: valid address. This is for CALL_INSNs. It cannot be used in any other
1080: context.
1081:
1082: First define the basic valid address. */
1083:
1084: #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \
1085: { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1086: goto ADDR; \
1087: if (CONSTANT_ADDRESS_P (X)) \
1088: goto ADDR; \
1089: if (GET_CODE (X) == PLUS \
1090: && REG_P (XEXP (X, 0)) \
1091: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1092: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1093: goto ADDR; \
1094: }
1095:
1096: /* Now accept the simple address, or, for DImode only, an AND of a simple
1097: address that turns off the low three bits. */
1098:
1099: extern char *current_function_name;
1100:
1101: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1102: { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \
1103: if ((MODE) == DImode \
1104: && GET_CODE (X) == AND \
1105: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1106: && INTVAL (XEXP (X, 1)) == -8) \
1107: GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \
1108: if ((MODE) == Pmode && GET_CODE (X) == SYMBOL_REF \
1109: && ! strcmp (XSTR (X, 0), current_function_name)) \
1110: goto ADDR; \
1111: }
1112:
1113: /* Try machine-dependent ways of modifying an illegitimate address
1114: to be legitimate. If we find one, return the new, valid address.
1115: This macro is used in only one place: `memory_address' in explow.c.
1116:
1117: OLDX is the address as it was before break_out_memory_refs was called.
1118: In some cases it is useful to look at this to decide what needs to be done.
1119:
1120: MODE and WIN are passed so that this macro can use
1121: GO_IF_LEGITIMATE_ADDRESS.
1122:
1123: It is always safe for this macro to do nothing. It exists to recognize
1124: opportunities to optimize the output.
1125:
1126: For the Alpha, there are three cases we handle:
1127:
1128: (1) If the address is (plus reg const_int) and the CONST_INT is not a
1129: valid offset, compute the high part of the constant and add it to the
1130: register. Then our address is (plus temp low-part-const).
1131: (2) If the address is (const (plus FOO const_int)), find the low-order
1132: part of the CONST_INT. Then load FOO plus any high-order part of the
1133: CONST_INT into a register. Our address is (plus reg low-part-const).
1134: This is done to reduce the number of GOT entries.
1135: (3) If we have a (plus reg const), emit the load as in (2), then add
1136: the two registers, and finally generate (plus reg low-part-const) as
1137: our address. */
1138:
1139: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1140: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1141: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1142: && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1143: { \
1144: HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
1145: HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1146: HOST_WIDE_INT highpart = val - lowpart; \
1147: rtx high = GEN_INT (highpart); \
1148: rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \
1149: high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \
1150: \
1151: (X) = plus_constant (temp, lowpart); \
1152: goto WIN; \
1153: } \
1154: else if (GET_CODE (X) == CONST \
1155: && GET_CODE (XEXP (X, 0)) == PLUS \
1156: && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \
1157: { \
1158: HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \
1159: HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1160: HOST_WIDE_INT highpart = val - lowpart; \
1161: rtx high = XEXP (XEXP (X, 0), 0); \
1162: \
1163: if (highpart) \
1164: high = plus_constant (high, highpart); \
1165: \
1166: (X) = plus_constant (force_reg (Pmode, high), lowpart); \
1167: goto WIN; \
1168: } \
1169: else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1170: && GET_CODE (XEXP (X, 1)) == CONST \
1171: && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \
1172: && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \
1173: { \
1174: HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \
1175: HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1176: HOST_WIDE_INT highpart = val - lowpart; \
1177: rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \
1178: \
1179: if (highpart) \
1180: high = plus_constant (high, highpart); \
1181: \
1182: high = expand_binop (Pmode, add_optab, XEXP (X, 0), \
1183: force_reg (Pmode, high), \
1184: high, 1, OPTAB_LIB_WIDEN); \
1185: (X) = plus_constant (high, lowpart); \
1186: goto WIN; \
1187: } \
1188: }
1189:
1190: /* Go to LABEL if ADDR (a legitimate address expression)
1191: has an effect that depends on the machine mode it is used for.
1192: On the Alpha this is true only for the unaligned modes. We can
1193: simplify this test since we know that the address must be valid. */
1194:
1195: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1196: { if (GET_CODE (ADDR) == AND) goto LABEL; }
1197:
1198: /* Compute the cost of an address. For the Alpha, all valid addresses are
1199: the same cost. */
1200:
1201: #define ADDRESS_COST(X) 0
1202:
1203: /* Define this if some processing needs to be done immediately before
1204: emitting code for an insn. */
1205:
1206: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1207:
1208: /* Specify the machine mode that this machine uses
1209: for the index in the tablejump instruction. */
1210: #define CASE_VECTOR_MODE SImode
1211:
1212: /* Define this if the tablejump instruction expects the table
1213: to contain offsets from the address of the table.
1214: Do not define this if the table should contain absolute addresses. */
1215: /* #define CASE_VECTOR_PC_RELATIVE */
1216:
1217: /* Specify the tree operation to be used to convert reals to integers. */
1218: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1219:
1220: /* This is the kind of divide that is easiest to do in the general case. */
1221: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1222:
1223: /* Define this as 1 if `char' should by default be signed; else as 0. */
1224: #define DEFAULT_SIGNED_CHAR 1
1225:
1226: /* This flag, if defined, says the same insns that convert to a signed fixnum
1227: also convert validly to an unsigned one.
1228:
1229: We actually lie a bit here as overflow conditions are different. But
1230: they aren't being checked anyway. */
1231:
1232: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1233:
1234: /* Max number of bytes we can move to or from memory
1235: in one reasonably fast instruction. */
1236:
1237: #define MOVE_MAX 8
1238:
1239: /* Largest number of bytes of an object that can be placed in a register.
1240: On the Alpha we have plenty of registers, so use TImode. */
1241: #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1242:
1243: /* Nonzero if access to memory by bytes is no faster than for words.
1244: Also non-zero if doing byte operations (specifically shifts) in registers
1245: is undesirable.
1246:
1247: On the Alpha, we want to not use the byte operation and instead use
1248: masking operations to access fields; these will save instructions. */
1249:
1250: #define SLOW_BYTE_ACCESS 1
1251:
1252: /* Define if operations between registers always perform the operation
1253: on the full register even if a narrower mode is specified. */
1254: #define WORD_REGISTER_OPERATIONS
1255:
1256: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1257: will either zero-extend or sign-extend. The value of this macro should
1258: be the code that says which one of the two operations is implicitly
1259: done, NIL if none. */
1260: #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
1261:
1262: /* Define if loading short immediate values into registers sign extends. */
1263: #define SHORT_IMMEDIATES_SIGN_EXTEND
1264:
1265: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1266: is done just by pretending it is already truncated. */
1267: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1268:
1269: /* We assume that the store-condition-codes instructions store 0 for false
1270: and some other value for true. This is the value stored for true. */
1271:
1272: #define STORE_FLAG_VALUE 1
1273:
1274: /* Define the value returned by a floating-point comparison instruction. */
1275:
1276: #define FLOAT_STORE_FLAG_VALUE 0.5
1277:
1278: /* Specify the machine mode that pointers have.
1279: After generation of rtl, the compiler makes no further distinction
1280: between pointers and any other objects of this machine mode. */
1281: #define Pmode DImode
1282:
1283: /* Mode of a function address in a call instruction (for indexing purposes). */
1284:
1285: #define FUNCTION_MODE Pmode
1286:
1287: /* Define this if addresses of constant functions
1288: shouldn't be put through pseudo regs where they can be cse'd.
1289: Desirable on machines where ordinary constants are expensive
1290: but a CALL with constant address is cheap.
1291:
1292: We define this on the Alpha so that gen_call and gen_call_value
1293: get to see the SYMBOL_REF (for the hint field of the jsr). It will
1294: then copy it into a register, thus actually letting the address be
1295: cse'ed. */
1296:
1297: #define NO_FUNCTION_CSE
1298:
1299: /* Define this to be nonzero if shift instructions ignore all but the low-order
1300: few bits. */
1301: #define SHIFT_COUNT_TRUNCATED 1
1302:
1303: /* Use atexit for static constructors/destructors, instead of defining
1304: our own exit function. */
1305: #define HAVE_ATEXIT
1306:
1307: /* Compute the cost of computing a constant rtl expression RTX
1308: whose rtx-code is CODE. The body of this macro is a portion
1309: of a switch statement. If the code is computed here,
1310: return it with a return statement. Otherwise, break from the switch.
1311:
1312: We only care about the cost if it is valid in an insn, so all constants
1313: are cheap. */
1314:
1315: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1316: case CONST_INT: \
1317: case CONST_DOUBLE: \
1318: return 0; \
1319: case CONST: \
1320: case SYMBOL_REF: \
1321: case LABEL_REF: \
1322: return 6; \
1323:
1324: /* Provide the costs of a rtl expression. This is in the body of a
1325: switch on CODE. */
1326:
1327: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1328: case PLUS: \
1329: case MINUS: \
1330: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1331: return COSTS_N_INSNS (6); \
1332: else if (GET_CODE (XEXP (X, 0)) == MULT \
1333: && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1334: return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1335: + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1336: break; \
1337: case MULT: \
1338: if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1339: return COSTS_N_INSNS (6); \
1340: else if (GET_CODE (XEXP (X, 1)) != CONST_INT \
1341: || exact_log2 (INTVAL (XEXP (X, 1))) < 0) \
1342: return COSTS_N_INSNS (21); \
1343: else if (const48_operand (XEXP (X, 1), VOIDmode)) \
1344: break; \
1345: return COSTS_N_INSNS (2); \
1346: case ASHIFT: \
1347: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1348: && INTVAL (XEXP (X, 1)) <= 3) \
1349: break; \
1350: /* ... fall through ... */ \
1351: case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \
1352: return COSTS_N_INSNS (2); \
1353: case DIV: \
1354: case UDIV: \
1355: case MOD: \
1356: case UMOD: \
1357: if (GET_MODE (X) == SFmode) \
1358: return COSTS_N_INSNS (34); \
1359: else if (GET_MODE (X) == DFmode) \
1360: return COSTS_N_INSNS (63); \
1361: else \
1362: return COSTS_N_INSNS (70); \
1363: case MEM: \
1364: return COSTS_N_INSNS (3);
1365:
1366: /* Control the assembler format that we output. */
1367:
1368: /* Output at beginning of assembler file. */
1369:
1370: #define ASM_FILE_START(FILE) \
1371: { \
1372: alpha_write_verstamp (FILE); \
1373: fprintf (FILE, "\t.set noreorder\n"); \
1374: fprintf (FILE, "\t.set noat\n"); \
1375: ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \
1376: }
1377:
1378: /* Output to assembler file text saying following lines
1379: may contain character constants, extra white space, comments, etc. */
1380:
1381: #define ASM_APP_ON ""
1382:
1383: /* Output to assembler file text saying following lines
1384: no longer contain unusual constructs. */
1385:
1386: #define ASM_APP_OFF ""
1387:
1388: #define TEXT_SECTION_ASM_OP ".text"
1389:
1390: /* Output before read-only data. */
1391:
1392: #define READONLY_DATA_SECTION_ASM_OP ".rdata"
1393:
1394: /* Output before writable data. */
1395:
1396: #define DATA_SECTION_ASM_OP ".data"
1397:
1398: /* Define an extra section for read-only data, a routine to enter it, and
1399: indicate that it is for read-only data. */
1400:
1401: #define EXTRA_SECTIONS readonly_data
1402:
1403: #define EXTRA_SECTION_FUNCTIONS \
1404: void \
1405: literal_section () \
1406: { \
1407: if (in_section != readonly_data) \
1408: { \
1409: fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1410: in_section = readonly_data; \
1411: } \
1412: } \
1413:
1414: #define READONLY_DATA_SECTION literal_section
1415:
1416: /* If we are referencing a function that is static or is known to be
1417: in this file, make the SYMBOL_REF special. We can use this to see
1418: indicate that we can branch to this function without setting PV or
1419: restoring GP. */
1420:
1421: #define ENCODE_SECTION_INFO(DECL) \
1422: if (TREE_CODE (DECL) == FUNCTION_DECL \
1423: && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \
1424: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1425:
1426: /* How to refer to registers in assembler output.
1427: This sequence is indexed by compiler's hard-register-number (see above). */
1428:
1429: #define REGISTER_NAMES \
1430: {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1431: "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1432: "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1433: "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1434: "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1435: "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1436: "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1437: "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31"}
1438:
1439: /* How to renumber registers for dbx and gdb. */
1440:
1441: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1442:
1443: /* This is how to output the definition of a user-level label named NAME,
1444: such as the label on a static function or variable NAME. */
1445:
1446: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1447: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1448:
1449: /* This is how to output a command to make the user-level label named NAME
1450: defined for reference from other files. */
1451:
1452: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1453: do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1454:
1455: /* This is how to output a reference to a user-level label named NAME.
1456: `assemble_name' uses this. */
1457:
1458: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1459: fprintf (FILE, "%s", NAME)
1460:
1461: /* This is how to output an internal numbered label where
1462: PREFIX is the class of label and NUM is the number within the class. */
1463:
1464: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1465: if ((PREFIX)[0] == 'L') \
1466: fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \
1467: else \
1468: fprintf (FILE, "%s%d:\n", PREFIX, NUM);
1469:
1470: /* This is how to output a label for a jump table. Arguments are the same as
1471: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1472: passed. */
1473:
1474: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1475: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1476:
1477: /* This is how to store into the string LABEL
1478: the symbol_ref name of an internal numbered label where
1479: PREFIX is the class of label and NUM is the number within the class.
1480: This is suitable for output with `assemble_name'. */
1481:
1482: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1483: if ((PREFIX)[0] == 'L') \
1484: sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \
1485: else \
1486: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1487:
1488: /* This is how to output an assembler line defining a `double' constant. */
1489:
1490: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1491: { \
1492: if (REAL_VALUE_ISINF (VALUE) \
1493: || REAL_VALUE_ISNAN (VALUE) \
1494: || REAL_VALUE_MINUS_ZERO (VALUE)) \
1495: { \
1496: long t[2]; \
1497: REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1498: fprintf (FILE, "\t.quad 0x%lx%08lx\n", \
1499: t[1] & 0xffffffff, t[0] & 0xffffffff); \
1500: } \
1501: else \
1502: { \
1503: char str[30]; \
1504: REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \
1505: fprintf (FILE, "\t.t_floating %s\n", str); \
1506: } \
1507: }
1508:
1509: /* This is how to output an assembler line defining a `float' constant. */
1510:
1511: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1512: { \
1513: if (REAL_VALUE_ISINF (VALUE) \
1514: || REAL_VALUE_ISNAN (VALUE) \
1515: || REAL_VALUE_MINUS_ZERO (VALUE)) \
1516: { \
1517: long t; \
1518: REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1519: fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
1520: } \
1521: else \
1522: { \
1523: char str[30]; \
1524: REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1525: fprintf (FILE, "\t.s_floating %s\n", str); \
1526: } \
1527: }
1528:
1529: /* This is how to output an assembler line defining an `int' constant. */
1530:
1531: #define ASM_OUTPUT_INT(FILE,VALUE) \
1532: fprintf (FILE, "\t.long %d\n", \
1533: (GET_CODE (VALUE) == CONST_INT \
1534: ? INTVAL (VALUE) & 0xffffffff : (abort (), 0)))
1535:
1536: /* This is how to output an assembler line defining a `long' constant. */
1537:
1538: #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
1539: ( fprintf (FILE, "\t.quad "), \
1540: output_addr_const (FILE, (VALUE)), \
1541: fprintf (FILE, "\n"))
1542:
1543: /* Likewise for `char' and `short' constants. */
1544:
1545: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1546: fprintf (FILE, "\t.word %d\n", \
1547: (GET_CODE (VALUE) == CONST_INT \
1548: ? INTVAL (VALUE) & 0xffff : (abort (), 0)))
1549:
1550: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1551: fprintf (FILE, "\t.byte %d\n", \
1552: (GET_CODE (VALUE) == CONST_INT \
1553: ? INTVAL (VALUE) & 0xff : (abort (), 0)))
1554:
1555: /* We use the default ASCII-output routine, except that we don't write more
1556: than 50 characters since the assembler doesn't support very long lines. */
1557:
1558: #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1559: do { \
1560: FILE *_hide_asm_out_file = (MYFILE); \
1561: unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1562: int _hide_thissize = (MYLENGTH); \
1563: int _size_so_far = 0; \
1564: { \
1565: FILE *asm_out_file = _hide_asm_out_file; \
1566: unsigned char *p = _hide_p; \
1567: int thissize = _hide_thissize; \
1568: int i; \
1569: fprintf (asm_out_file, "\t.ascii \""); \
1570: \
1571: for (i = 0; i < thissize; i++) \
1572: { \
1573: register int c = p[i]; \
1574: \
1575: if (_size_so_far ++ > 50 && i < thissize - 4) \
1576: _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1577: \
1578: if (c == '\"' || c == '\\') \
1579: putc ('\\', asm_out_file); \
1580: if (c >= ' ' && c < 0177) \
1581: putc (c, asm_out_file); \
1582: else \
1583: { \
1584: fprintf (asm_out_file, "\\%o", c); \
1585: /* After an octal-escape, if a digit follows, \
1586: terminate one string constant and start another. \
1587: The Vax assembler fails to stop reading the escape \
1588: after three digits, so this is the only way we \
1589: can get it to parse the data properly. */ \
1590: if (i < thissize - 1 \
1591: && p[i + 1] >= '0' && p[i + 1] <= '9') \
1592: fprintf (asm_out_file, "\"\n\t.ascii \""); \
1593: } \
1594: } \
1595: fprintf (asm_out_file, "\"\n"); \
1596: } \
1597: } \
1598: while (0)
1599: /* This is how to output an insn to push a register on the stack.
1600: It need not be very fast code. */
1601:
1602: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1603: fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1604: (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1605: (REGNO) & 31);
1606:
1607: /* This is how to output an insn to pop a register from the stack.
1608: It need not be very fast code. */
1609:
1610: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1611: fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1612: (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1613: (REGNO) & 31);
1614:
1615: /* This is how to output an assembler line for a numeric constant byte. */
1616:
1617: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1618: fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff)
1619:
1620: /* This is how to output an element of a case-vector that is absolute. */
1621:
1622: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1623: fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32)
1624:
1625: /* This is how to output an element of a case-vector that is relative.
1626: (Alpha does not use such vectors, but we must define this macro anyway.) */
1627:
1628: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort ()
1629:
1630: /* This is how to output an assembler line
1631: that says to advance the location counter
1632: to a multiple of 2**LOG bytes. */
1633:
1634: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1635: if ((LOG) != 0) \
1636: fprintf (FILE, "\t.align %d\n", LOG);
1637:
1638: /* This is how to advance the location counter by SIZE bytes. */
1639:
1640: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1641: fprintf (FILE, "\t.space %d\n", (SIZE))
1642:
1643: /* This says how to output an assembler line
1644: to define a global common symbol. */
1645:
1646: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1647: ( fputs ("\t.comm ", (FILE)), \
1648: assemble_name ((FILE), (NAME)), \
1649: fprintf ((FILE), ",%d\n", (SIZE)))
1650:
1651: /* This says how to output an assembler line
1652: to define a local common symbol. */
1653:
1654: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1655: ( fputs ("\t.lcomm ", (FILE)), \
1656: assemble_name ((FILE), (NAME)), \
1657: fprintf ((FILE), ",%d\n", (SIZE)))
1658:
1659: /* Store in OUTPUT a string (made with alloca) containing
1660: an assembler-name for a local static variable named NAME.
1661: LABELNO is an integer which is different for each call. */
1662:
1663: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1664: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1665: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1666:
1667: /* Define the parentheses used to group arithmetic operations
1668: in assembler code. */
1669:
1670: #define ASM_OPEN_PAREN "("
1671: #define ASM_CLOSE_PAREN ")"
1672:
1673: /* Define results of standard character escape sequences. */
1674: #define TARGET_BELL 007
1675: #define TARGET_BS 010
1676: #define TARGET_TAB 011
1677: #define TARGET_NEWLINE 012
1678: #define TARGET_VT 013
1679: #define TARGET_FF 014
1680: #define TARGET_CR 015
1681:
1682: /* Print operand X (an rtx) in assembler syntax to file FILE.
1683: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1684: For `%' followed by punctuation, CODE is the punctuation and X is null. */
1685:
1686: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1687:
1688: /* Determine which codes are valid without a following integer. These must
1689: not be alphabetic. */
1690:
1691: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1692:
1693: /* Print a memory address as an operand to reference that memory location. */
1694:
1695: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1696: { rtx addr = (ADDR); \
1697: int basereg = 31; \
1698: HOST_WIDE_INT offset = 0; \
1699: \
1700: if (GET_CODE (addr) == AND) \
1701: addr = XEXP (addr, 0); \
1702: \
1703: if (GET_CODE (addr) == REG) \
1704: basereg = REGNO (addr); \
1705: else if (GET_CODE (addr) == CONST_INT) \
1706: offset = INTVAL (addr); \
1707: else if (GET_CODE (addr) == PLUS \
1708: && GET_CODE (XEXP (addr, 0)) == REG \
1709: && GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1710: basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \
1711: else \
1712: abort (); \
1713: \
1714: fprintf (FILE, "%d($%d)", offset, basereg); \
1715: }
1716: /* Define the codes that are matched by predicates in alpha.c. */
1717:
1718: #define PREDICATE_CODES \
1719: {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1720: {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1721: {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1722: {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1723: {"add_operand", {SUBREG, REG, CONST_INT}}, \
1724: {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1725: {"const48_operand", {CONST_INT}}, \
1726: {"and_operand", {SUBREG, REG, CONST_INT}}, \
1727: {"mode_mask_operand", {CONST_INT}}, \
1728: {"mul8_operand", {CONST_INT}}, \
1729: {"mode_width_operand", {CONST_INT}}, \
1730: {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1731: {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1732: {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1733: {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
1734: {"fp0_operand", {CONST_DOUBLE}}, \
1735: {"current_file_function_operand", {SYMBOL_REF}}, \
1736: {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1737: SYMBOL_REF, CONST, LABEL_REF}}, \
1738: {"aligned_memory_operand", {MEM}}, \
1739: {"unaligned_memory_operand", {MEM}}, \
1740: {"any_memory_operand", {MEM}},
1741:
1742: /* Definitions for debugging. */
1743:
1744: #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
1745: #define DBX_DEBUGGING_INFO /* generate embedded stabs */
1746: #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
1747:
1748: #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1749: #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
1750: #endif
1751:
1752:
1753: /* Correct the offset of automatic variables and arguments. Note that
1754: the Alpha debug format wants all automatic variables and arguments
1755: to be in terms of two different offsets from the virtual frame pointer,
1756: which is the stack pointer before any adjustment in the function.
1757: The offset for the argument pointer is fixed for the native compiler,
1758: it is either zero (for the no arguments case) or large enough to hold
1759: all argument registers.
1760: The offset for the auto pointer is the fourth argument to the .frame
1761: directive (local_offset).
1762: To stay compatible with the native tools we use the same offsets
1763: from the virtual frame pointer and adjust the debugger arg/auto offsets
1764: accordingly. These debugger offsets are set up in output_prolog. */
1765:
1766: long alpha_arg_offset;
1767: long alpha_auto_offset;
1768: #define DEBUGGER_AUTO_OFFSET(X) \
1769: ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1770: #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1771:
1772:
1773: #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1774: alpha_output_lineno (STREAM, LINE)
1775: extern void alpha_output_lineno ();
1776:
1777: #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1778: alpha_output_filename (STREAM, NAME)
1779: extern void alpha_output_filename ();
1780:
1781:
1782: /* mips-tfile.c limits us to strings of one page. */
1783: #define DBX_CONTIN_LENGTH 4000
1784:
1785: /* By default, turn on GDB extensions. */
1786: #define DEFAULT_GDB_EXTENSIONS 1
1787:
1788: /* If we are smuggling stabs through the ALPHA ECOFF object
1789: format, put a comment in front of the .stab<x> operation so
1790: that the ALPHA assembler does not choke. The mips-tfile program
1791: will correctly put the stab into the object file. */
1792:
1793: #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
1794: #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
1795: #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
1796:
1797: /* Forward references to tags are allowed. */
1798: #define SDB_ALLOW_FORWARD_REFERENCES
1799:
1800: /* Unknown tags are also allowed. */
1801: #define SDB_ALLOW_UNKNOWN_REFERENCES
1802:
1803: #define PUT_SDB_DEF(a) \
1804: do { \
1805: fprintf (asm_out_file, "\t%s.def\t", \
1806: (TARGET_GAS) ? "" : "#"); \
1807: ASM_OUTPUT_LABELREF (asm_out_file, a); \
1808: fputc (';', asm_out_file); \
1809: } while (0)
1810:
1811: #define PUT_SDB_PLAIN_DEF(a) \
1812: do { \
1813: fprintf (asm_out_file, "\t%s.def\t.%s;", \
1814: (TARGET_GAS) ? "" : "#", (a)); \
1815: } while (0)
1816:
1817: #define PUT_SDB_TYPE(a) \
1818: do { \
1819: fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1820: } while (0)
1821:
1822: /* For block start and end, we create labels, so that
1823: later we can figure out where the correct offset is.
1824: The normal .ent/.end serve well enough for functions,
1825: so those are just commented out. */
1826:
1827: extern int sdb_label_count; /* block start/end next label # */
1828:
1829: #define PUT_SDB_BLOCK_START(LINE) \
1830: do { \
1831: fprintf (asm_out_file, \
1832: "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1833: sdb_label_count, \
1834: (TARGET_GAS) ? "" : "#", \
1835: sdb_label_count, \
1836: (LINE)); \
1837: sdb_label_count++; \
1838: } while (0)
1839:
1840: #define PUT_SDB_BLOCK_END(LINE) \
1841: do { \
1842: fprintf (asm_out_file, \
1843: "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1844: sdb_label_count, \
1845: (TARGET_GAS) ? "" : "#", \
1846: sdb_label_count, \
1847: (LINE)); \
1848: sdb_label_count++; \
1849: } while (0)
1850:
1851: #define PUT_SDB_FUNCTION_START(LINE)
1852:
1853: #define PUT_SDB_FUNCTION_END(LINE)
1854:
1855: #define PUT_SDB_EPILOGUE_END(NAME)
1856:
1857: /* Specify to run a post-processor, mips-tfile after the assembler
1858: has run to stuff the ecoff debug information into the object file.
1859: This is needed because the Alpha assembler provides no way
1860: of specifying such information in the assembly file. */
1861:
1862: #if (TARGET_DEFAULT & MASK_GAS) != 0
1863:
1864: #define ASM_FINAL_SPEC "\
1865: %{malpha-as: %{!mno-mips-tfile: \
1866: \n mips-tfile %{v*: -v} \
1867: %{K: -I %b.o~} \
1868: %{!K: %{save-temps: -I %b.o~}} \
1869: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
1870: %{.s:%i} %{!.s:%g.s}}}"
1871:
1872: #else
1873: #define ASM_FINAL_SPEC "\
1874: %{!mgas: %{!mno-mips-tfile: \
1875: \n mips-tfile %{v*: -v} \
1876: %{K: -I %b.o~} \
1877: %{!K: %{save-temps: -I %b.o~}} \
1878: %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
1879: %{.s:%i} %{!.s:%g.s}}}"
1880:
1881: #endif
1882:
1883: /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1884: mips-tdump.c to print them out.
1885:
1886: These must match the corresponding definitions in gdb/mipsread.c.
1887: Unfortunately, gcc and gdb do not currently share any directories. */
1888:
1889: #define CODE_MASK 0x8F300
1890: #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1891: #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1892: #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1893:
1894: /* Override some mips-tfile definitions. */
1895:
1896: #define SHASH_SIZE 511
1897: #define THASH_SIZE 55
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