![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to clipper.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Apple XNU] / GNUtools / cc / config / clipper|
Return to clipper.h CVS log | Up to [Apple XNU] / GNUtools / cc / config / clipper |
1.1 root 1: /* Definitions of target machine for GNU compiler. Clipper version.
2: Copyright (C) 1987, 1988, 1991, 1993 Free Software Foundation, Inc.
3:
4: Contributed by Holger Teutsch ([email protected])
5:
6: This file is part of GNU CC.
7:
8: GNU CC is free software; you can redistribute it and/or modify
9: it under the terms of the GNU General Public License as published by
10: the Free Software Foundation; either version 2, or (at your option)
11: any later version.
12:
13: GNU CC is distributed in the hope that it will be useful,
14: but WITHOUT ANY WARRANTY; without even the implied warranty of
15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16: GNU General Public License for more details.
17:
18: You should have received a copy of the GNU General Public License
19: along with GNU CC; see the file COPYING. If not, write to
20: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21:
22: extern struct rtx_def *clipper_builtin_saveregs ();
23: extern int clipper_frame_size ();
24:
25: /* Print subsidiary information on the compiler version in use. */
26:
27: #define TARGET_VERSION fprintf (stderr, " (clipper)");
28:
29: /* Run-time compilation parameters selecting different hardware subsets. */
30:
31: extern int target_flags;
32:
33: /* Macros used in the machine description to test the flags. */
34:
35: /* Macro to define tables used to set the flags.
36: This is a list in braces of pairs in braces,
37: each pair being { "NAME", VALUE }
38: where VALUE is the bits to set or minus the bits to clear.
39: An empty string NAME is used to identify the default VALUE. */
40:
41: #define TARGET_SWITCHES \
42: { { "c400", 1 }, \
43: { "c300", -1 }, \
44: { "", TARGET_DEFAULT} }
45:
46: #define TARGET_C400 1
47: #define TARGET_C300 0
48:
49: /* Default target_flags if no switches specified. */
50:
51: #ifndef TARGET_DEFAULT
52: #define TARGET_DEFAULT TARGET_C300
53: #endif
54:
55: /* Omit frame pointer at -O2. Inline functions at -O3. */
56:
57: #define OPTIMIZATION_OPTIONS(LEVEL) \
58: { \
59: if ((LEVEL) >= 2) \
60: { \
61: flag_omit_frame_pointer = 1; \
62: } \
63: if ((LEVEL) >= 3) \
64: flag_inline_functions = 1; \
65: }
66:
67: /* Target machine storage layout */
68:
69: /* Define this if most significant bit is lowest numbered
70: in instructions that operate on numbered bit-fields. */
71:
72: #define BITS_BIG_ENDIAN 0
73:
74: /* Define this if most significant byte of a word is the lowest numbered. */
75:
76: #define BYTES_BIG_ENDIAN 0
77:
78: /* Define this if most significant word of a multiword number is the lowest
79: numbered. */
80:
81: #define WORDS_BIG_ENDIAN 0
82:
83: /* Number of bits in an addressable storage unit */
84: #define BITS_PER_UNIT 8
85:
86: /* Width in bits of a "word", which is the contents of a machine register.
87: Note that this is not necessarily the width of data type `int';
88: if using 16-bit ints on a 68000, this would still be 32.
89: But on a machine with 16-bit registers, this would be 16. */
90: #define BITS_PER_WORD 32
91:
92: /* Width of a word, in units (bytes). */
93: #define UNITS_PER_WORD 4
94:
95: /* Width in bits of a pointer.
96: See also the macro `Pmode' defined below. */
97: #define POINTER_SIZE 32
98:
99: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
100: #define PARM_BOUNDARY 32
101:
102: /* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */
103: #define MAX_PARM_BOUNDARY 64
104:
105: /* Allocation boundary (in *bits*) for the code of a function. */
106: #define FUNCTION_BOUNDARY 128
107:
108: /* Alignment of field after `int : 0' in a structure. */
109: #define EMPTY_FIELD_BOUNDARY 32
110:
111: /* Every structure's size must be a multiple of this. */
112: #define STRUCTURE_SIZE_BOUNDARY 8
113:
114: /* A bitfield declared as `int' forces `int' alignment for the struct. */
115: #define PCC_BITFIELD_TYPE_MATTERS 1
116:
117: /* No data type wants to be aligned rounder than this. */
118: #define BIGGEST_ALIGNMENT 64
119:
120: /* No structure field wants to be aligned rounder than this. */
121: #define BIGGEST_FIELD_ALIGNMENT 64
122:
123: /* Make strcpy of constants fast. */
124: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
125: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
126:
127: /* Make arrays of chars word-aligned for the same reasons. */
128: #define DATA_ALIGNMENT(TYPE, ALIGN) \
129: (TREE_CODE (TYPE) == ARRAY_TYPE \
130: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
131: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
132:
133: /* Set this nonzero if move instructions will actually fail to work
134: when given unaligned data. */
135: #define STRICT_ALIGNMENT 1
136:
137: /* Let's keep the stack somewhat aligned. */
138: #define STACK_BOUNDARY 64
139:
140: /* Define this macro if it is advisible to hold scalars in registers
141: in a wider mode than that declared by the program. In such cases,
142: the value is constrained to be within the bounds of the declared
143: type, but kept valid in the wider mode. The signedness of the
144: extension may differ from that of the type.
145:
146: For Clipper, we always store objects in a full register. */
147:
148: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
149: if (GET_MODE_CLASS (MODE) == MODE_INT \
150: && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
151: { \
152: (UNSIGNEDP) = 0; \
153: (MODE) = SImode; \
154: }
155:
156:
157: /* Define this if function arguments should also be promoted using the above
158: procedure. */
159:
160: /* FIXME: do we loose compatibility to acc if we define this? */
161:
162: /* #define PROMOTE_FUNCTION_ARGS */
163:
164: /* Likewise, if the function return value is promoted. */
165:
166: /* #define PROMOTE_FUNCTION_RETURN */
167:
168:
169: /* Standard register usage. */
170:
171: /* Number of actual hardware registers.
172: The hardware registers are assigned numbers for the compiler
173: from 0 to just below FIRST_PSEUDO_REGISTER.
174: All registers that the compiler knows about must be given numbers,
175: even those that are not normally considered general registers. */
176: #define FIRST_PSEUDO_REGISTER 32
177:
178: /* 1 for registers that have pervasive standard uses
179: and are not available for the register allocator.
180: On the clipper, these are the FP and SP . */
181: #define FIXED_REGISTERS \
182: {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1,\
183: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1} /* Default: C300 */
184:
185: /* 1 for registers not available across function calls.
186: These must include the FIXED_REGISTERS and also any
187: registers that can be used without being saved.
188: The latter must include the registers where values are returned
189: and the register where structure-value addresses are passed.
190: Aside from that, you can include as many other registers as you like. */
191: #define CALL_USED_REGISTERS \
192: {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1,\
193: 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1} /* default: C300 */
194:
195: /* Zero or more C statements that may conditionally modify two
196: variables `fixed_regs' and `call_used_regs' (both of type `char
197: []') after they have been initialized from the two preceding
198: macros. A C400 has additional floating registers f8 -> f15 */
199:
200: #define CONDITIONAL_REGISTER_USAGE \
201: if (target_flags & TARGET_C400) \
202: { int i; \
203: for (i = 24; i < 32; i++) fixed_regs[i] = call_used_regs[i] = 0; }
204:
205: /* Return number of consecutive hard regs needed starting at reg REGNO
206: to hold something of mode MODE.
207: This is ordinarily the length in words of a value of mode MODE
208: but can be less for certain modes in special long registers.
209: On the clipper, fp registers are 64 bits. */
210:
211: #define HARD_REGNO_NREGS(REGNO, MODE) \
212: ((REGNO) >= 16 ? 1 \
213: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
214:
215: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
216: On the clipper 0-15 may hold any mode but DImode and DFmode must be even.
217: Registers 16-31 hold SFmode and DFmode */
218:
219: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
220: ((REGNO) < 16 \
221: ? ((MODE) != DImode && (MODE) != DFmode || ((REGNO) & 1) == 0) \
222: : ((MODE) == SFmode || (MODE) == DFmode))
223:
224: /* Value is 1 if it is a good idea to tie two pseudo registers
225: when one has mode MODE1 and one has mode MODE2.
226: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
227: for any hard reg, then this must be 0 for correct output. */
228: #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
229:
230: /* Specify the registers used for certain standard purposes.
231: The values of these macros are register numbers. */
232:
233: /* clipper has extra PC */
234: /* #define PC_REGNUM */
235:
236: /* Register to use for pushing function arguments. */
237: #define STACK_POINTER_REGNUM 15
238:
239: /* Base register for access to local variables of the function. */
240: #define FRAME_POINTER_REGNUM 14
241:
242: /* Value should be nonzero if functions must have frame pointers.
243: Zero means the frame pointer need not be set up (and parms
244: may be accessed via the stack pointer) in functions that seem suitable.
245: This is computed in `reload', in reload1.c. */
246: #define FRAME_POINTER_REQUIRED \
247: (! leaf_function_p ())
248:
249: /* Base register for access to arguments of the function. */
250: #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
251:
252: /* Register in which static-chain is passed to a function. */
253: #define STATIC_CHAIN_REGNUM 2
254:
255: /* Register in which address to store a structure value
256: is passed to a function. */
257: #define STRUCT_VALUE_REGNUM 0
258:
259: /* Define the classes of registers for register constraints in the
260: machine description. Also define ranges of constants.
261:
262: One of the classes must always be named ALL_REGS and include all hard regs.
263: If there is more than one class, another class must be named NO_REGS
264: and contain no registers.
265:
266: The name GENERAL_REGS must be the name of a class (or an alias for
267: another name such as ALL_REGS). This is the class of registers
268: that is allowed by "g" or "r" in a register constraint.
269: Also, registers outside this class are allocated only when
270: instructions express preferences for them.
271:
272: The classes must be numbered in nondecreasing order; that is,
273: a larger-numbered class must never be contained completely
274: in a smaller-numbered class.
275:
276: For any two classes, it is very desirable that there be another
277: class that represents their union. */
278:
279: /* The clipper has general and FP regs. */
280:
281: enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES};
282:
283: #define N_REG_CLASSES (int) LIM_REG_CLASSES
284:
285: /* Give names of register classes as strings for dump file. */
286:
287: #define REG_CLASS_NAMES \
288: {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
289:
290: /* Define which registers fit in which classes.
291: This is an initializer for a vector of HARD_REG_SET
292: of length N_REG_CLASSES. */
293:
294: #define REG_CLASS_CONTENTS {0, 0x0000ffff, 0xffff0000, 0xffffffff}
295:
296: /* The same information, inverted:
297: Return the class number of the smallest class containing
298: reg number REGNO. This could be a conditional expression
299: or could index an array. */
300:
301: #define REGNO_REG_CLASS(REGNO) ((REGNO) >= 16 ? FLOAT_REGS : GENERAL_REGS)
302:
303: /* The class value for index registers, and the one for base regs. */
304:
305: #define INDEX_REG_CLASS GENERAL_REGS
306: #define BASE_REG_CLASS GENERAL_REGS
307:
308: /* Get reg_class from a letter such as appears in the machine description. */
309:
310: #define REG_CLASS_FROM_LETTER(C) \
311: ((C) == 'r' ? GENERAL_REGS : ((C) == 'f' ? FLOAT_REGS: NO_REGS))
312:
313: /* The letters I, J, K, L and M in a register constraint string
314: can be used to stand for particular ranges of immediate operands.
315: This macro defines what the ranges are.
316: C is the letter, and VALUE is a constant value.
317: Return 1 if VALUE is in the range specified by C. */
318:
319: #define CONST_OK_FOR_LETTER_P(VALUE, C) 0
320:
321: /* Similar, but for floating constants, and defining letters G and H.
322: Here VALUE is the CONST_DOUBLE rtx itself. */
323:
324: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
325:
326: /* Optional extra constraints for this machine. */
327:
328: /* #define EXTRA_CONSTRAINT(OP, C) */
329:
330:
331: /* Given an rtx X being reloaded into a reg required to be
332: in class CLASS, return the class of reg to actually use.
333: In general this is just CLASS; but on some machines
334: in some cases it is preferable to use a more restrictive class. */
335:
336: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
337:
338: /* Return the maximum number of consecutive registers
339: needed to represent mode MODE in a register of class CLASS. */
340:
341: #define CLASS_MAX_NREGS(CLASS, MODE) \
342: ((CLASS) == FLOAT_REGS \
343: ? 1 \
344: : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
345:
346: /* Stack layout; function entry, exit and calling. */
347:
348: /* Define this if pushing a word on the stack
349: makes the stack pointer a smaller address. */
350: #define STACK_GROWS_DOWNWARD
351:
352: /* Define this if longjmp restores from saved registers
353: rather than from what setjmp saved. */
354: /* #define LONGJMP_RESTORE_FROM_STACK */
355:
356: /* Define this if the nominal address of the stack frame
357: is at the high-address end of the local variables;
358: that is, each additional local variable allocated
359: goes at a more negative offset in the frame. */
360: #define FRAME_GROWS_DOWNWARD
361:
362: /* Offset within stack frame to start allocating local variables at.
363: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
364: first local allocated. Otherwise, it is the offset to the BEGINNING
365: of the first local allocated. */
366: #define STARTING_FRAME_OFFSET 0
367:
368: /* Given an rtx for the address of a frame,
369: return an rtx for the address of the word in the frame
370: that holds the dynamic chain--the previous frame's address. */
371: #define DYNAMIC_CHAIN_ADDRESS(frame) (frame)
372:
373: /* If we generate an insn to push BYTES bytes,
374: this says how many the stack pointer really advances by. */
375:
376: /* #define PUSH_ROUNDING(BYTES) (BYTES) */
377:
378: /* Keep the stack pointer constant throughout the function. */
379: /* we can't set this for clipper as library calls may have 3 args and we pass
380: only 2 args in regs. */
381:
382: /* #define ACCUMULATE_OUTGOING_ARGS */
383:
384:
385: /* Offset of first parameter from the argument pointer register value.
386: size of PC + FP */
387:
388: #define FIRST_PARM_OFFSET(FNDECL) 8
389:
390: /* Value is the number of bytes of arguments automatically
391: popped when returning from a subroutine call.
392: FUNTYPE is the data type of the function (as a tree),
393: or for a library call it is an identifier node for the subroutine name.
394: SIZE is the number of bytes of arguments passed on the stack. */
395:
396: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
397:
398: /* Define how to find the value returned by a function.
399: VALTYPE is the data type of the value (as a tree).
400: If the precise function being called is known, FUNC is its FUNCTION_DECL;
401: otherwise, FUNC is 0. */
402:
403: #define FUNCTION_VALUE(VALTYPE, FUNC) \
404: gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
405: TYPE_MODE (VALTYPE) == DFmode) ? \
406: 16 : 0))
407:
408: /* Define how to find the value returned by a library function
409: assuming the value has mode MODE. */
410:
411: #define LIBCALL_VALUE(MODE) \
412: gen_rtx (REG, (MODE), ((MODE) == SFmode || (MODE) == DFmode ? 16 : 0))
413:
414:
415: /* 1 if N is a possible register number for a function value
416: as seen by the caller. */
417:
418: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 16)
419:
420: /* 1 if N is a possible register number for function argument passing. */
421:
422: #define FUNCTION_ARG_REGNO_P(N) \
423: ((N) == 0 || (N) == 1 || (N) == 16 || (N) == 17)
424:
425: /* Define this if PCC uses the nonreentrant convention for returning
426: structure and union values. */
427:
428: #define PCC_STATIC_STRUCT_RETURN
429:
430:
431: /* Define a data type for recording info about an argument list
432: during the scan of that argument list. This data type should
433: hold all necessary information about the function itself
434: and about the args processed so far, enough to enable macros
435: such as FUNCTION_ARG to determine where the next arg should go.
436:
437: Clipper uses 2 register 'slots' that pass arguments in r0/r1 or f0/f1.
438: An argument that must be passed in memory (struct... ) leaves that slot
439: free.
440: We pass 'long long' only in registers when both slots are free.
441: Returned structs must be allocated by the caller, the address is passed
442: in r0.
443:
444: struct ss {..}
445:
446: fun (i,j,k) i in r0, j in r1, k on stack
447: fun (s,j,k) s on stack, j in r1, k on stack
448: fun (i,s,k) i in r0, s on stack, k on stack
449: s1 = fun (i,s,k) &s1 in r0, i in r1, s on stack, k on stack
450:
451: We must keep enough information for varargs/stdargs.
452:
453: _clipper_cum_args is a struct of 2 integers, with
454: num = slots used
455: size = size of all stack args = offset to next arg without alignment
456:
457: If we use stdarg.h, size points to the first unnamed arg,
458: see va-clipper.h */
459:
460: struct _clipper_cum_args { int num; int size; };
461:
462: #define CUMULATIVE_ARGS struct _clipper_cum_args
463:
464: /* Initialize a variable CUM of type CUMULATIVE_ARGS
465: for a call to a function whose data type is FNTYPE.
466: For a library call, FNTYPE is 0.
467:
468: clipper passes the address of a struct in r0, set num = 1 in this case */
469:
470: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
471: ((CUM).num = ((FNTYPE) != 0 && aggregate_value_p (TREE_TYPE (FNTYPE))), \
472: (CUM).size = 0)
473:
474: /* internal helper : size of an argument */
475:
476: #define CLIPPER_ARG_SIZE(MODE, TYPE) \
477: ((MODE) != BLKmode \
478: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
479: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
480:
481: /* Update the data in CUM to advance over an argument
482: of mode MODE and data type TYPE.
483: (TYPE is null for libcalls where that information may not be available.) */
484:
485: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
486: do \
487: { \
488: int reg = 0; \
489: \
490: if ((CUM).num < 2 \
491: && (GET_MODE_CLASS(MODE)==MODE_INT || GET_MODE_CLASS(MODE)==MODE_FLOAT) \
492: && (GET_MODE_SIZE (MODE) <= 8) \
493: && ((MODE) != DImode || (CUM).num == 0)) \
494: { \
495: reg = 1; \
496: if ((MODE) == DImode) \
497: (CUM).num = 1; \
498: } \
499: \
500: (CUM).num++; \
501: \
502: if (! reg) \
503: { \
504: int align = FUNCTION_ARG_BOUNDARY (MODE, TYPE) / BITS_PER_UNIT; \
505: (CUM).size += align - 1; \
506: (CUM).size &= align - 1; \
507: (CUM).size += CLIPPER_ARG_SIZE (MODE, TYPE); \
508: } \
509: } while (0)
510:
511: /* Define where to put the arguments to a function.
512: Value is zero to push the argument on the stack,
513: or a hard register in which to store the argument.
514:
515: MODE is the argument's machine mode.
516: TYPE is the data type of the argument (as a tree).
517: This is null for libcalls where that information may
518: not be available.
519: CUM is a variable of type CUMULATIVE_ARGS which gives info about
520: the preceding args and about the function being called.
521: NAMED is nonzero if this argument is a named parameter
522: (otherwise it is an extra parameter matching an ellipsis).
523:
524: 2 args may go into regs. These must be MODE_INT or MODE_FLOAT but only
525: if they really fit into ONE register. The exception is a DImode arg
526: that occupies both register slots. */
527:
528: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
529: (((CUM).num < 2 \
530: && (GET_MODE_CLASS(MODE)==MODE_INT || GET_MODE_CLASS(MODE)==MODE_FLOAT) \
531: && (GET_MODE_SIZE (MODE) <= 8) \
532: && ((MODE) != DImode || (CUM).num == 0)) \
533: ? gen_rtx (REG, (MODE), \
534: GET_MODE_CLASS(MODE) == MODE_FLOAT ? (CUM).num+16 : (CUM).num) \
535: : 0)
536:
537: /* If defined, a C expression that gives the alignment boundary, in bits,
538: of an argument with the specified mode and type. If it is not defined,
539: `PARM_BOUNDARY' is used for all arguments. */
540:
541: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
542: (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_SIZE (MODE)) <= PARM_BOUNDARY \
543: ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
544:
545: /* For an arg passed partly in registers and partly in memory,
546: this is the number of registers used.
547: For args passed entirely in registers or entirely in memory, zero.
548: Clipper never passed args partially in regs/mem. */
549:
550: /* #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 */
551:
552: /* Generate necessary RTL for __builtin_saveregs().
553: ARGLIST is the argument list; see expr.c. */
554:
555: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) clipper_builtin_saveregs (ARGLIST)
556:
557: /* This macro generates the assembly code for function entry.
558: FILE is a stdio stream to output the code to.
559: SIZE is an int: how many units of temporary storage to allocate.
560: Refer to the array `regs_ever_live' to determine which registers
561: to save; `regs_ever_live[I]' is nonzero if register number I
562: is ever used in the function. This macro is responsible for
563: knowing which registers should not be saved even if used. */
564:
565: #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue (FILE,SIZE)
566:
567: /* Output assembler code to FILE to increment profiler label # LABELNO
568: for profiling a function entry. */
569:
570: #define FUNCTION_PROFILER(FILE, LABELNO) /* FIXME */
571:
572: /* Output assembler code to FILE to initialize this source file's
573: basic block profiling info, if that has not already been done. */
574:
575: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) /* FIXME */
576:
577: /* Output assembler code to FILE to increment the entry-count for
578: the BLOCKNO'th basic block in this source file. */
579:
580: #define BLOCK_PROFILER(FILE, BLOCKNO) /* FIXME */
581:
582: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
583: the stack pointer does not matter. The value is tested only in
584: functions that have frame pointers.
585: No definition is equivalent to always zero. */
586:
587: #define EXIT_IGNORE_STACK 1
588:
589: /* This macro generates the assembly code for function exit,
590: on machines that need it. If FUNCTION_EPILOGUE is not defined
591: then individual return instructions are generated for each
592: return statement. Args are same as for FUNCTION_PROLOGUE. */
593:
594: #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue(FILE,SIZE)
595:
596: /* Store in the variable DEPTH the initial difference between the
597: frame pointer reg contents and the stack pointer reg contents,
598: as of the start of the function body. This depends on the layout
599: of the fixed parts of the stack frame and on how registers are saved. */
600:
601: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
602: DEPTH = clipper_frame_size (get_frame_size ())
603:
604:
605: /* Output assembler code for a block containing the constant parts
606: of a trampoline, leaving space for the variable parts. */
607:
608: #define TRAMPOLINE_TEMPLATE(FILE) \
609: { \
610: fputs ("\tcall sp,.+4\n", FILE); \
611: fputs ("\tmovw (sp),r3\n", FILE); \
612: fputs ("\taddq $4,sp\n", FILE); \
613: fputs ("\tloadw 32(r3),r2\n", FILE); \
614: fputs ("\tloadw 36(r3),r3\n", FILE); \
615: fputs ("\tb (r3)\n", FILE); \
616: }
617:
618: /* Length in units of the trampoline for entering a nested function. */
619:
620: #define TRAMPOLINE_SIZE 44
621:
622: /* Alignment required for a trampoline. 128 is used to find the
623: beginning of a line in the instruction cache and to allow for
624: instruction cache lines of up to 128 bytes. */
625:
626: #define TRAMPOLINE_ALIGNMENT 128
627:
628: /* Section in which to place the trampoline. */
629:
630: #define TRAMPOLINE_SECTION text_section
631:
632: /* Emit RTL insns to initialize the variable parts of a trampoline.
633: FNADDR is an RTX for the address of the function's pure code.
634: CXT is an RTX for the static chain value for the function. */
635:
636: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
637: { \
638: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \
639: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \
640: }
641:
642: /* Addressing modes, and classification of registers for them. */
643:
644: /* #define HAVE_POST_DECREMENT */
645:
646: /* #define HAVE_PRE_INCREMENT */
647:
648: /* Macros to check register numbers against specific register classes. */
649:
650: /* These assume that REGNO is a hard or pseudo reg number.
651: They give nonzero only if REGNO is a hard reg of the suitable class
652: or a pseudo reg currently allocated to a suitable hard reg.
653: Since they use reg_renumber, they are safe only once reg_renumber
654: has been allocated, which happens in local-alloc.c. */
655:
656: #define REGNO_OK_FOR_INDEX_P(regno) \
657: ((regno) < 16 || (unsigned)reg_renumber[regno] < 16)
658: #define REGNO_OK_FOR_BASE_P(regno) \
659: ((regno) < 16 || (unsigned)reg_renumber[regno] < 16)
660:
661: /* Maximum number of registers that can appear in a valid memory address. */
662:
663: #define MAX_REGS_PER_ADDRESS 2
664:
665: /* 1 if X is an rtx for a constant that is a valid address. */
666:
667: #define CONSTANT_ADDRESS_P(X) \
668: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
669: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
670: || GET_CODE (X) == HIGH)
671:
672: /* Nonzero if the constant value X is a legitimate general operand.
673: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
674:
675: #define LEGITIMATE_CONSTANT_P(X) 1
676:
677: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
678: and check its validity for a certain class.
679: We have two alternate definitions for each of them.
680: The usual definition accepts all pseudo regs; the other rejects
681: them unless they have been allocated suitable hard regs.
682: The symbol REG_OK_STRICT causes the latter definition to be used.
683:
684: Most source files want to accept pseudo regs in the hope that
685: they will get allocated to the class that the insn wants them to be in.
686: Source files for reload pass need to be strict.
687: After reload, it makes no difference, since pseudo regs have
688: been eliminated by then. */
689:
690: /* clipper doesn't have true indexing */
691:
692: #ifndef REG_OK_STRICT
693:
694: /* Nonzero if X is a hard reg that can be used as an index
695: or if it is a pseudo reg. */
696:
697: #define REG_OK_FOR_INDEX_P(X) \
698: (REGNO (X) < 16 || REGNO(X) >= FIRST_PSEUDO_REGISTER)
699:
700: /* Nonzero if X is a hard reg that can be used as a base reg
701: or if it is a pseudo reg. */
702:
703: #define REG_OK_FOR_BASE_P(X) \
704: (REGNO (X) < 16 || REGNO(X) >= FIRST_PSEUDO_REGISTER)
705:
706: #else
707:
708: /* Nonzero if X is a hard reg that can be used as an index. */
709: #define REG_OK_FOR_INDEX_P(X) (REGNO(X) < 16)
710:
711: /* Nonzero if X is a hard reg that can be used as a base reg. */
712: #define REG_OK_FOR_BASE_P(X) (REGNO(X) < 16)
713:
714: #endif
715:
716: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
717: that is a valid memory address for an instruction.
718: The MODE argument is the machine mode for the MEM expression
719: that wants to use this address.
720:
721: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
722: except for CONSTANT_ADDRESS_P which is actually machine-independent. */
723:
724: /* Non-zero if X is an address which can be indirected. */
725:
726: #define INDIRECTABLE_CONSTANT_ADDRESS_P(X) 0
727:
728: #define INDIRECTABLE_ADDRESS_P(X) \
729: (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
730:
731: /* Go to ADDR if X is a valid address not using indexing.
732: (This much is the easy part.) */
733:
734: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
735: { if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
736: if (INDIRECTABLE_ADDRESS_P (X)) goto ADDR; }
737:
738: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
739: { register rtx xfoo = (X); \
740: GO_IF_NONINDEXED_ADDRESS (xfoo, ADDR); \
741: if (GET_CODE (xfoo) == PLUS) \
742: { register rtx xfoo0, xfoo1; \
743: xfoo0 = XEXP (xfoo, 0); \
744: xfoo1 = XEXP (xfoo, 1); \
745: /* handle reg + reg -> [r1](r0) */ \
746: if (INDIRECTABLE_ADDRESS_P (xfoo0) && INDIRECTABLE_ADDRESS_P (xfoo1)) \
747: goto ADDR; \
748: /* Handle <symbol>(reg) -> xxx(r0) */ \
749: if (INDIRECTABLE_ADDRESS_P (xfoo0) && CONSTANT_ADDRESS_P (xfoo1)) \
750: goto ADDR; \
751: if (INDIRECTABLE_ADDRESS_P (xfoo1) && CONSTANT_ADDRESS_P (xfoo0)) \
752: goto ADDR; }}
753:
754:
755: /* Try machine-dependent ways of modifying an illegitimate address
756: to be legitimate. If we find one, return the new, valid address.
757: This macro is used in only one place: `memory_address' in explow.c.
758:
759: OLDX is the address as it was before break_out_memory_refs was called.
760: In some cases it is useful to look at this to decide what needs to be done.
761:
762: MODE and WIN are passed so that this macro can use
763: GO_IF_LEGITIMATE_ADDRESS.
764:
765: It is always safe for this macro to do nothing. It exists to recognize
766: opportunities to optimize the output.
767:
768: For the clipper, nothing needs to be done. */
769:
770: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
771:
772: /* Go to LABEL if ADDR (a legitimate address expression)
773: has an effect that depends on the machine mode it is used for. */
774:
775: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
776:
777:
778: /* Specify the machine mode that this machine uses
779: for the index in the tablejump instruction. */
780: #define CASE_VECTOR_MODE SImode
781:
782: /* Define this if the case instruction expects the table
783: to contain offsets from the address of the table.
784: Do not define this if the table should contain absolute addresses. */
785: /* #define CASE_VECTOR_PC_RELATIVE */
786:
787: /* Define this if the case instruction drops through after the table
788: when the index is out of range. Don't define it if the case insn
789: jumps to the default label instead. */
790: /* #define CASE_DROPS_THROUGH */
791:
792: /* Define if operations between registers always perform the operation
793: on the full register even if a narrower mode is specified. */
794: #define WORD_REGISTER_OPERATIONS
795:
796: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
797: will either zero-extend or sign-extend. The value of this macro should
798: be the code that says which one of the two operations is implicitly
799: done, NIL if none. */
800: #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
801:
802: /* Specify the tree operation to be used to convert reals to integers. */
803: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
804:
805: /* This is the kind of divide that is easiest to do in the general case. */
806: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
807:
808: /* Define this as 1 if `char' should by default be signed; else as 0. */
809: #define DEFAULT_SIGNED_CHAR 1
810:
811: /* This flag, if defined, says the same insns that convert to a signed fixnum
812: also convert validly to an unsigned one. */
813: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
814:
815: /* Max number of bytes we can move from memory to memory
816: in one reasonably fast instruction. */
817: #define MOVE_MAX 4
818:
819: /* MOVE_RATIO is the number of move instructions that is better than a
820: block move. Make this large on clipper, since the block move is very
821: inefficient with small blocks, and the hard register needs of the
822: block move require much reload work. */
823:
824: #define MOVE_RATIO 20
825:
826: /* Define this if zero-extension is slow (more than one real instruction). */
827: /* #define SLOW_ZERO_EXTEND */
828:
829: /* Nonzero if access to memory by bytes is slow and undesirable. */
830: #define SLOW_BYTE_ACCESS 0
831:
832: /* Define if shifts truncate the shift count
833: which implies one can omit a sign-extension or zero-extension
834: of a shift count. */
835: /* #define SHIFT_COUNT_TRUNCATED */
836:
837: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
838: is done just by pretending it is already truncated. */
839: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
840:
841: /* Specify the machine mode that pointers have.
842: After generation of rtl, the compiler makes no further distinction
843: between pointers and any other objects of this machine mode. */
844: #define Pmode SImode
845:
846: /* A function address in a call instruction
847: is a byte address (for indexing purposes)
848: so give the MEM rtx a byte's mode. */
849: #define FUNCTION_MODE QImode
850:
851: /* This machine uses IEEE floats. */
852:
853: #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
854:
855: /* Check a `double' value for validity for a particular machine mode.
856: This is defined to avoid crashes outputting certain constants.
857: Since we output the number in hex, the assembler won't choke on it. */
858: /* #define CHECK_FLOAT_VALUE(MODE,VALUE) */
859:
860:
861: /* Compute the cost of computing a constant rtl expression RTX
862: whose rtx-code is CODE. The body of this macro is a portion
863: of a switch statement. If the code is computed here,
864: return it with a return statement. Otherwise, break from the switch. */
865:
866: /* On a Clipper, constants from 0..15 are cheap because they can use the
867: 'quick' mode. */
868:
869: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
870: case CONST_INT: \
871: if (0 <= INTVAL (RTX) && INTVAL(RTX) <= 15 ) return 0; \
872: return 1; \
873: case CONST: \
874: case LABEL_REF: \
875: case SYMBOL_REF: \
876: return 3; \
877: case CONST_DOUBLE: \
878: return 5;
879:
880: /* Provide the costs of a rtl expression. This is in the body of a
881: switch on CODE. */
882:
883: #define RTX_COSTS(X,CODE,OUTER_CODE) \
884: case MULT: \
885: return COSTS_N_INSNS (4); \
886: case DIV: \
887: case UDIV: \
888: case MOD: \
889: case UMOD: \
890: return COSTS_N_INSNS (40); \
891: case LSHIFT: \
892: case ASHIFT: \
893: case LSHIFTRT: \
894: case ASHIFTRT: \
895: return COSTS_N_INSNS (2); \
896: case SIGN_EXTEND: \
897: return (GET_CODE (XEXP (X,0)) == REG ? COSTS_N_INSNS (3) : 4);
898:
899: /* Specify the cost of a branch insn; roughly the number of extra insns that
900: should be added to avoid a branch */
901:
902: /* #define BRANCH_COST 0 */
903:
904:
905: /* Tell final.c how to eliminate redundant test instructions. */
906:
907: /* Here we define machine-dependent flags and fields in cc_status
908: (see `conditions.h'). No extra ones are needed for the clipper. */
909:
910: /* Store in cc_status the expressions
911: that the condition codes will describe
912: after execution of an instruction whose pattern is EXP.
913: Do not alter them if the instruction would not alter the cc's. */
914:
915: #define NOTICE_UPDATE_CC(EXP, INSN) \
916: { \
917: enum attr_cc cc = get_attr_cc (INSN); \
918: rtx dest = SET_DEST (EXP); \
919: switch (cc) \
920: { \
921: case CC_CHANGE0: \
922: if (GET_CODE (EXP) == PARALLEL) abort(); \
923: if (cc_status.value1 && rtx_equal_p (dest, cc_status.value1) || \
924: cc_status.value2 && rtx_equal_p (dest, cc_status.value2)) \
925: CC_STATUS_INIT; \
926: break; \
927: \
928: case CC_SET1: \
929: if (GET_CODE (EXP) == PARALLEL) abort(); \
930: cc_status.flags = 0; \
931: cc_status.value1 = dest; \
932: cc_status.value2 = 0; \
933: break; \
934: \
935: case CC_SET2: \
936: if (GET_CODE (EXP) == PARALLEL) abort(); \
937: cc_status.flags = 0; \
938: cc_status.value1 = dest; \
939: cc_status.value2 = SET_SRC (EXP); \
940: break; \
941: \
942: case CC_UNCHANGED: \
943: break; \
944: \
945: case CC_CLOBBER: \
946: CC_STATUS_INIT; \
947: break; \
948: \
949: default: \
950: abort (); \
951: } \
952: }
953:
954:
955: /* Control the assembler format that we output. */
956:
957: /* Output at beginning of assembler file. */
958:
959: #define ASM_FILE_START(FILE) fprintf (FILE, "#NO_APP\n");
960:
961: /* Output to assembler file text saying following lines
962: may contain character constants, extra white space, comments, etc. */
963:
964: #define ASM_APP_ON "#APP\n"
965:
966: /* Output to assembler file text saying following lines
967: no longer contain unusual constructs. */
968:
969: #define ASM_APP_OFF "#NO_APP\n"
970:
971: /* Output before read-only data. */
972:
973: #define TEXT_SECTION_ASM_OP ".text"
974:
975: /* Output before writable data. */
976:
977: #define DATA_SECTION_ASM_OP ".data"
978:
979: /* How to refer to registers in assembler output.
980: This sequence is indexed by compiler's hard-register-number (see above). */
981:
982: #define REGISTER_NAMES \
983: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \
984: "r9", "r10", "r11", "r12", "r13", "fp", "sp", \
985: "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", \
986: "f9", "f10", "f11", "f12", "f13", "f14", "f15" }
987:
988: /* How to renumber registers for dbx and gdb.
989: Clipper needs no change in the numeration. */
990:
991: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
992:
993:
994: /* This is how to output the definition of a user-level label named NAME,
995: such as the label on a static function or variable NAME. */
996:
997: #define ASM_OUTPUT_LABEL(FILE,NAME) \
998: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
999:
1000: /* This is how to output a command to make the user-level label named NAME
1001: defined for reference from other files. */
1002:
1003: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1004: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1005:
1006: /* This is how to output an assembler line defining an `int' constant. */
1007:
1008: #define ASM_OUTPUT_INT(FILE,VALUE) \
1009: ( fprintf (FILE, "\t.long "), \
1010: output_addr_const (FILE, (VALUE)), \
1011: fprintf (FILE, "\n"))
1012:
1013: /* Likewise for `char' and `short' constants. */
1014:
1015: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1016: ( fprintf (FILE, "\t.word "), \
1017: output_addr_const (FILE, (VALUE)), \
1018: fprintf (FILE, "\n"))
1019:
1020: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1021: ( fprintf (FILE, "\t.byte "), \
1022: output_addr_const (FILE, (VALUE)), \
1023: fprintf (FILE, "\n"))
1024:
1025: /* This is how to output an assembler line for a numeric constant byte. */
1026:
1027: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1028: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1029:
1030: /* This is how to output an insn to push a register on the stack.
1031: It need not be very fast code. */
1032:
1033: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1034: fprintf (FILE, "\tsubq $8,sp\n\t%s %s,(sp)\n", \
1035: (REGNO) < 16 ? "storw" : "stord", reg_names[REGNO])
1036:
1037: /* This is how to output an insn to pop a register from the stack.
1038: It need not be very fast code. */
1039:
1040: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1041: fprintf (FILE, "\t%s (sp),%s\n\t\addq $8,sp\n", \
1042: (REGNO) < 16 ? "loadw" : "loadd", reg_names[REGNO])
1043: /* This is how to output an element of a case-vector that is absolute */
1044:
1045: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1046: fprintf (FILE, "\t.long .L%d\n", VALUE)
1047:
1048: /* This is how to output an element of a case-vector that is relative. */
1049:
1050: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1051: fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
1052:
1053: /* This is how to output an assembler line
1054: that says to advance the location counter by SIZE bytes. */
1055:
1056: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1057: fprintf (FILE, "\t.space %u\n", (SIZE))
1058:
1059: /* This says how to output an assembler line
1060: to define a local common symbol. */
1061:
1062: #define ASM_OUTPUT_ALIGNED_LOCAL(FILE,NAME,SIZE,ALIGN) \
1063: ( data_section (), \
1064: fputs ("\t.bss\t", (FILE)), \
1065: assemble_name ((FILE), (NAME)), \
1066: fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN)/BITS_PER_UNIT))
1067:
1068: /* Store in OUTPUT a string (made with alloca) containing
1069: an assembler-name for a local static variable named NAME.
1070: LABELNO is an integer which is different for each call. */
1071:
1072: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1073: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1074: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1075:
1076: /* Define the parentheses used to group arithmetic operations
1077: in assembler code. */
1078:
1079: #define ASM_OPEN_PAREN "("
1080: #define ASM_CLOSE_PAREN ")"
1081:
1082: /* Define results of standard character escape sequences. */
1083: #define TARGET_BELL 007
1084: #define TARGET_BS 010
1085: #define TARGET_TAB 011
1086: #define TARGET_NEWLINE 012
1087: #define TARGET_VT 013
1088: #define TARGET_FF 014
1089: #define TARGET_CR 015
1090:
1091: /* Print an instruction operand X on file FILE.
1092: CODE is the code from the %-spec that requested printing this operand;
1093: if `%z3' was used to print operand 3, then CODE is 'z'.
1094:
1095: Clipper operand formatting codes:
1096:
1097: letter print
1098: C reverse branch condition
1099: */
1100:
1101: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1102: ((CODE) == 'C')
1103:
1104: #define PRINT_OPERAND(FILE, X, CODE) \
1105: { extern char *rev_cond_name (); \
1106: if (CODE == 'C') \
1107: fputs (rev_cond_name (X), FILE); \
1108: else if (GET_CODE (X) == REG) \
1109: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1110: else if (GET_CODE (X) == MEM) \
1111: output_address (XEXP (X, 0)); \
1112: else { putc ('$', FILE); output_addr_const (FILE, X); }}
1113:
1114: /* Print a memory operand whose address is X, on file FILE.
1115: This uses a function in output-clipper.c. */
1116:
1117: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1118: print_operand_address (FILE, ADDR)
1119:
1120: /* Define the codes that are matched by predicates in clipper.c */
1121:
1122: #define PREDICATE_CODES \
1123: {"int_reg_operand", {SUBREG, REG}}, \
1124: {"fp_reg_operand", {SUBREG, REG}},
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.