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1.1 ! root 1: /* Definitions of target machine for GNU compiler. Gmicro (TRON) version. ! 2: Ported by Masanobu Yuhara, Fujitsu Laboratories LTD. ! 3: ([email protected]) ! 4: ! 5: Copyright (C) 1987, 1988, 1989 Free Software Foundation, Inc. ! 6: ! 7: This file is part of GNU CC. ! 8: ! 9: GNU CC is free software; you can redistribute it and/or modify ! 10: it under the terms of the GNU General Public License as published by ! 11: the Free Software Foundation; either version 2, or (at your option) ! 12: any later version. ! 13: ! 14: GNU CC is distributed in the hope that it will be useful, ! 15: but WITHOUT ANY WARRANTY; without even the implied warranty of ! 16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ! 17: GNU General Public License for more details. ! 18: ! 19: Among other things, the copyright ! 20: notice and this notice must be preserved on all copies. ! 21: ! 22: You should have received a copy of the GNU General Public License ! 23: along with GNU CC; see the file COPYING. If not, write to ! 24: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. ! 25: */ ! 26: ! 27: ! 28: /* Note that some other tm.h files include this one and then override ! 29: many of the definitions that relate to assembler syntax. */ ! 30: ! 31: ! 32: /* Names to predefine in the preprocessor for this target machine. */ ! 33: ! 34: #define CPP_PREDEFINES "-Dgmicro -Acpu(tron) -Amachine(tron)" ! 35: ! 36: /* #define CPP_SPEC ** currently not defined **/ ! 37: ! 38: /* #define CC1_SPEC ** currently not defined **/ ! 39: ! 40: ! 41: /* Print subsidiary information on the compiler version in use. */ ! 42: /* ! 43: #define TARGET_VERSION fprintf (stderr, " (Gmicro syntax)"); ! 44: */ ! 45: ! 46: /* Run-time compilation parameters selecting different hardware subsets. */ ! 47: ! 48: extern int target_flags; ! 49: ! 50: /* Macros used in the machine description to test the flags. */ ! 51: ! 52: /* Compile for a Gmicro/300. */ ! 53: #define TARGET_G300 (target_flags & 1) ! 54: /* Compile for a Gmicro/200. */ ! 55: #define TARGET_G200 (target_flags & 2) ! 56: /* Compile for a Gmicro/100. */ ! 57: #define TARGET_G100 (target_flags & 4) ! 58: ! 59: /* Compile FPU insns for floating point (not library calls). */ ! 60: #define TARGET_FPU (target_flags & 8) ! 61: ! 62: /* Pop up arguments by called function. */ ! 63: #define TARGET_RTD (target_flags & 0x10) ! 64: ! 65: /* Compile passing first args in regs 0 and 1. ! 66: This exists only to test compiler features that will be needed for ! 67: RISC chips. It is not usable and is not intended to be usable on ! 68: this cpu ;-< */ ! 69: #define TARGET_REGPARM (target_flags & 0x20) ! 70: ! 71: #define TARGET_BITFIELD (target_flags & 0x40) ! 72: ! 73: #define TARGET_NEWRETURN (target_flags & 0x80) ! 74: ! 75: /* Do not expand __builtin_smov (strcpy) to multiple movs. ! 76: Use the smov instruction. */ ! 77: #define TARGET_FORCE_SMOV (target_flags & 0x100) ! 78: ! 79: /* default options are -m300, -mFPU, ! 80: with bitfield instructions added because it won't always work otherwise. ! 81: If there are versions of the gmicro that don't support bitfield instructions ! 82: then it will take some thinking to figure out how to make them work. */ ! 83: #define TARGET_DEFAULT 0x49 ! 84: ! 85: /* Macro to define tables used to set the flags. ! 86: This is a list in braces of pairs in braces, ! 87: each pair being { "NAME", VALUE } ! 88: where VALUE is the bits to set or minus the bits to clear. ! 89: An empty string NAME is used to identify the default VALUE. */ ! 90: ! 91: #define TARGET_SWITCHES \ ! 92: { { "g300", 1}, \ ! 93: { "g200", 2}, \ ! 94: { "g100", 4}, \ ! 95: { "fpu", 8}, \ ! 96: { "soft-float", -8}, \ ! 97: { "rtd", 0x10}, \ ! 98: { "no-rtd", -0x10}, \ ! 99: { "regparm", 0x20}, \ ! 100: { "no-regparm", -0x20}, \ ! 101: #if 0 /* Since we don't define PCC_BITFIELD_TYPE_MATTERS or use a large ! 102: STRUCTURE_SIZE_BOUNDARY, we must have bitfield instructions. */ ! 103: { "bitfield", 0x40}, \ ! 104: { "no-bitfield", -0x40}, \ ! 105: #endif ! 106: { "newreturn", 0x80}, \ ! 107: { "no-newreturn", -0x80}, \ ! 108: { "force-smov", 0x100}, \ ! 109: { "no-force-smov", -0x100}, \ ! 110: { "", TARGET_DEFAULT}} ! 111: ! 112: ! 113: /* Blow away G100 flag silently off TARGET_fpu (since we can't clear ! 114: any bits in TARGET_SWITCHES above) */ ! 115: #define OVERRIDE_OPTIONS \ ! 116: { \ ! 117: if (TARGET_G100) target_flags &= ~8; \ ! 118: } ! 119: ! 120: /* target machine storage layout */ ! 121: ! 122: /* Define this if most significant bit is lowest numbered ! 123: in instructions that operate on numbered bit-fields. ! 124: This is true for Gmicro insns. ! 125: We make it true always by avoiding using the single-bit insns ! 126: except in special cases with constant bit numbers. */ ! 127: #define BITS_BIG_ENDIAN 1 ! 128: ! 129: /* Define this if most significant byte of a word is the lowest numbered. */ ! 130: /* That is true on the Gmicro. */ ! 131: #define BYTES_BIG_ENDIAN 1 ! 132: ! 133: /* Define this if most significant word of a multiword number is the lowest ! 134: numbered. */ ! 135: /* For Gmicro we can decide arbitrarily ! 136: since there are no machine instructions for them. ????? */ ! 137: #define WORDS_BIG_ENDIAN 0 ! 138: ! 139: /* number of bits in an addressable storage unit */ ! 140: #define BITS_PER_UNIT 8 ! 141: ! 142: /* Width in bits of a "word", which is the contents of a machine register. */ ! 143: #define BITS_PER_WORD 32 ! 144: ! 145: /* Width of a word, in units (bytes). */ ! 146: #define UNITS_PER_WORD 4 ! 147: ! 148: /* Width in bits of a pointer. ! 149: See also the macro `Pmode' defined below. */ ! 150: #define POINTER_SIZE 32 ! 151: ! 152: /* Allocation boundary (in *bits*) for storing arguments in argument list. */ ! 153: #define PARM_BOUNDARY 32 ! 154: ! 155: /* Boundary (in *bits*) on which stack pointer should be aligned. */ ! 156: #define STACK_BOUNDARY 32 ! 157: ! 158: /* Allocation boundary (in *bits*) for the code of a function. */ ! 159: /* Instructions of the Gmicro should be on half-word boundary */ ! 160: /* But word boundary gets better performance */ ! 161: #define FUNCTION_BOUNDARY 32 ! 162: ! 163: /* Alignment of field after `int : 0' in a structure. */ ! 164: #define EMPTY_FIELD_BOUNDARY 32 ! 165: ! 166: /* No data type wants to be aligned rounder than this. */ ! 167: /* This is not necessarily 32 on the Gmicro */ ! 168: #define BIGGEST_ALIGNMENT 32 ! 169: ! 170: /* Set this non-zero if move instructions will actually fail to work ! 171: when given unaligned data. ! 172: Unaligned data is allowed on Gmicro, though the access is slow. */ ! 173: ! 174: #define STRICT_ALIGNMENT 1 ! 175: #define SLOW_UNALIGNED_ACCESS 1 ! 176: ! 177: /* Make strings word-aligned so strcpy from constants will be faster. */ ! 178: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ ! 179: (TREE_CODE (EXP) == STRING_CST \ ! 180: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) ! 181: ! 182: /* Make arrays of chars word-aligned for the same reasons. */ ! 183: #define DATA_ALIGNMENT(TYPE, ALIGN) \ ! 184: (TREE_CODE (TYPE) == ARRAY_TYPE \ ! 185: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ ! 186: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) ! 187: ! 188: /* Define number of bits in most basic integer type. ! 189: (If undefined, default is BITS_PER_WORD). */ ! 190: #define INT_TYPE_SIZE 32 ! 191: ! 192: /* #define PCC_BITFIELD_TYPE_MATTERS 1 ????? */ ! 193: ! 194: /* #define CHECK_FLOAT_VALUE (MODE, VALUE) ????? */ ! 195: ! 196: ! 197: /* Standard register usage. */ ! 198: ! 199: /* Number of actual hardware registers. ! 200: The hardware registers are assigned numbers for the compiler ! 201: from 0 to just below FIRST_PSEUDO_REGISTER. ! 202: All registers that the compiler knows about must be given numbers, ! 203: even those that are not normally considered general registers. ! 204: For the Gmicro, we give the general registers numbers 0-15, ! 205: and the FPU floating point registers numbers 16-31. */ ! 206: #define FIRST_PSEUDO_REGISTER 32 ! 207: ! 208: /* 1 for registers that have pervasive standard uses ! 209: and are not available for the register allocator. ! 210: On the Gmicro, the stack pointer and the frame pointer are ! 211: such registers. */ ! 212: /* frame pointer is not indicated as fixed, because fp may be used freely ! 213: when a frame is not built. */ ! 214: #define FIXED_REGISTERS \ ! 215: {0, 0, 0, 0, 0, 0, 0, 0, \ ! 216: 0, 0, 0, 0, 0, 0, 0, 1, \ ! 217: /* FPU registers. */ \ ! 218: 0, 0, 0, 0, 0, 0, 0, 0, \ ! 219: 0, 0, 0, 0, 0, 0, 0, 0, } ! 220: ! 221: /* 1 for registers not available across function calls. ! 222: These must include the FIXED_REGISTERS and also any ! 223: registers that can be used without being saved. ! 224: The latter must include the registers where values are returned ! 225: and the register where structure-value addresses are passed. ! 226: Aside from that, you can include as many other registers as you like. */ ! 227: #define CALL_USED_REGISTERS \ ! 228: {1, 1, 1, 1, 0, 0, 0, 0, \ ! 229: 0, 0, 0, 0, 0, 0, 0, 1, \ ! 230: /* FPU registers. */ \ ! 231: 1, 1, 1, 1, 0, 0, 0, 0, \ ! 232: 0, 0, 0, 0, 0, 0, 0, 0, } ! 233: ! 234: ! 235: /* Make sure everything's fine if we *don't* have a given processor. ! 236: This assumes that putting a register in fixed_regs will keep the ! 237: compilers mitt's completely off it. We don't bother to zero it out ! 238: of register classes. If TARGET_FPU is not set, ! 239: the compiler won't touch since no instructions that use these ! 240: registers will be valid. */ ! 241: /* This Macro is not defined now. ! 242: #define CONDITIONAL_REGISTER_USAGE */ ! 243: ! 244: /* The Gmicro has no overlapping register */ ! 245: /* #define OVERLAPPING_REGNO_P(REGNO) */ ! 246: ! 247: /* #define INSN_CLOBBERS_REGNO_P(INSN,REGNO) */ ! 248: /* #define PRESERVE_DEATH_INFO_REGNO_P(REGNO) */ ! 249: ! 250: /* Return number of consecutive hard regs needed starting at reg REGNO ! 251: to hold something of mode MODE. ! 252: This is ordinarily the length in words of a value of mode MODE ! 253: but can be less for certain modes in special long registers. ! 254: ! 255: On the Gmicro, ordinary registers hold 32 bits worth; ! 256: for the Gmicro/FPU registers, a single register is always enough for ! 257: anything that can be stored in them at all. */ ! 258: #define HARD_REGNO_NREGS(REGNO, MODE) \ ! 259: ((REGNO) >= 16 ? 1 \ ! 260: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) ! 261: ! 262: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. ! 263: On the Gmicro, the cpu registers can hold any mode but the FPU registers ! 264: can hold only SFmode or DFmode. And the FPU registers can't hold anything ! 265: if FPU use is disabled. */ ! 266: #define HARD_REGNO_MODE_OK(REGNO, MODE) \ ! 267: ((REGNO) < 16 \ ! 268: || ((REGNO) < 32 \ ! 269: ? TARGET_FPU && (GET_MODE_CLASS (MODE) == MODE_FLOAT || \ ! 270: GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ ! 271: : 0 )) ! 272: ! 273: /* Value is 1 if it is a good idea to tie two pseudo registers ! 274: when one has mode MODE1 and one has mode MODE2. ! 275: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, ! 276: for any hard reg, then this must be 0 for correct output. */ ! 277: #define MODES_TIEABLE_P(MODE1, MODE2) \ ! 278: (! TARGET_FPU \ ! 279: || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \ ! 280: GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ ! 281: == ((MODE2) == SFmode || (MODE2) == DFmode))) ! 282: ! 283: /* Specify the registers used for certain standard purposes. ! 284: The values of these macros are register numbers. */ ! 285: ! 286: /* Gmicro pc isn't overloaded on a register. */ ! 287: /* #define PC_REGNUM */ ! 288: ! 289: /* Register to use for pushing function arguments. */ ! 290: #define STACK_POINTER_REGNUM 15 ! 291: ! 292: /* Base register for access to local variables of the function. */ ! 293: #define FRAME_POINTER_REGNUM 14 ! 294: ! 295: /* Value should be nonzero if functions must have frame pointers. ! 296: Zero means the frame pointer need not be set up (and parms ! 297: may be accessed via the stack pointer) in functions that seem suitable. ! 298: This is computed in `reload', in reload1.c. */ ! 299: #define FRAME_POINTER_REQUIRED 0 ! 300: ! 301: /* Base register for access to arguments of the function. */ ! 302: /* The Gmicro does not have hardware ap. Fp is treated as ap */ ! 303: #define ARG_POINTER_REGNUM 14 ! 304: ! 305: /* Register in which static-chain is passed to a function. */ ! 306: #define STATIC_CHAIN_REGNUM 0 ! 307: ! 308: /* Register in which address to store a structure value ! 309: is passed to a function. */ ! 310: #define STRUCT_VALUE_REGNUM 1 ! 311: ! 312: /* Define the classes of registers for register constraints in the ! 313: machine description. Also define ranges of constants. ! 314: ! 315: One of the classes must always be named ALL_REGS and include all hard regs. ! 316: If there is more than one class, another class must be named NO_REGS ! 317: and contain no registers. ! 318: ! 319: The name GENERAL_REGS must be the name of a class (or an alias for ! 320: another name such as ALL_REGS). This is the class of registers ! 321: that is allowed by "g" or "r" in a register constraint. ! 322: Also, registers outside this class are allocated only when ! 323: instructions express preferences for them. ! 324: ! 325: The classes must be numbered in nondecreasing order; that is, ! 326: a larger-numbered class must never be contained completely ! 327: in a smaller-numbered class. ! 328: ! 329: For any two classes, it is very desirable that there be another ! 330: class that represents their union. */ ! 331: ! 332: /* The Gmicro has two kinds of registers, so four classes would be ! 333: a complete set. */ ! 334: ! 335: enum reg_class { NO_REGS, FPU_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES }; ! 336: ! 337: #define N_REG_CLASSES (int) LIM_REG_CLASSES ! 338: ! 339: /* Give names of register classes as strings for dump file. */ ! 340: ! 341: #define REG_CLASS_NAMES \ ! 342: { "NO_REGS", "FPU_REGS", "GENERAL_REGS", "ALL_REGS" } ! 343: ! 344: /* Define which registers fit in which classes. ! 345: This is an initializer for a vector of HARD_REG_SET ! 346: of length N_REG_CLASSES. */ ! 347: ! 348: #define REG_CLASS_CONTENTS \ ! 349: { \ ! 350: 0, /* NO_REGS */ \ ! 351: 0xffff0000, /* FPU_REGS */ \ ! 352: 0x0000ffff, /* GENERAL_REGS */ \ ! 353: 0xffffffff /* ALL_REGS */ \ ! 354: } ! 355: ! 356: /* The same information, inverted: ! 357: Return the class number of the smallest class containing ! 358: reg number REGNO. This could be a conditional expression ! 359: or could index an array. */ ! 360: ! 361: extern enum reg_class regno_reg_class[]; ! 362: #define REGNO_REG_CLASS(REGNO) ( (REGNO < 16) ? GENERAL_REGS : FPU_REGS ) ! 363: ! 364: /* The class value for index registers, and the one for base regs. */ ! 365: ! 366: #define INDEX_REG_CLASS GENERAL_REGS ! 367: #define BASE_REG_CLASS GENERAL_REGS ! 368: ! 369: /* Get reg_class from a letter such as appears in the machine description. ! 370: We do a trick here to modify the effective constraints on the ! 371: machine description; we zorch the constraint letters that aren't ! 372: appropriate for a specific target. This allows us to guarantee ! 373: that a specific kind of register will not be used for a given target ! 374: without fiddling with the register classes above. */ ! 375: ! 376: #define REG_CLASS_FROM_LETTER(C) \ ! 377: ((C) == 'r' ? GENERAL_REGS : \ ! 378: ((C) == 'f' ? (TARGET_FPU ? FPU_REGS : NO_REGS) : \ ! 379: NO_REGS)) ! 380: ! 381: /* The letters I, J, K, L and M in a register constraint string ! 382: can be used to stand for particular ranges of immediate operands. ! 383: This macro defines what the ranges are. ! 384: C is the letter, and VALUE is a constant value. ! 385: Return 1 if VALUE is in the range specified by C. ! 386: ! 387: For the Gmicro, all immediate value optimizations are done ! 388: by assembler, so no machine dependent definition is necessary ??? */ ! 389: ! 390: /* #define CONST_OK_FOR_LETTER_P(VALUE, C) ((C) == 'I') */ ! 391: #define CONST_OK_FOR_LETTER_P(VALUE, C) 0 ! 392: ! 393: /* ! 394: * The letters G defines all of the floating constants tha are *NOT* ! 395: * Gmicro-FPU constant. ! 396: */ ! 397: ! 398: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ ! 399: ((C) == 'F' || \ ! 400: (C) == 'G' && !(TARGET_FPU && standard_fpu_constant_p (VALUE))) ! 401: ! 402: /* Given an rtx X being reloaded into a reg required to be ! 403: in class CLASS, return the class of reg to actually use. ! 404: In general this is just CLASS; but on some machines ! 405: in some cases it is preferable to use a more restrictive class. */ ! 406: /* On the Gmicro series, there is no restriction on GENERAL_REGS, ! 407: so CLASS is returned. I do not know whether I should treat FPU_REGS ! 408: specially or not (at least, m68k does not). */ ! 409: ! 410: #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS ! 411: ! 412: /* Return the maximum number of consecutive registers ! 413: needed to represent mode MODE in a register of class CLASS. */ ! 414: /* On the Gmicro, this is the size of MODE in words, ! 415: except in the FPU regs, where a single reg is always enough. */ ! 416: #define CLASS_MAX_NREGS(CLASS, MODE) \ ! 417: ((CLASS) == FPU_REGS ? \ ! 418: 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) ! 419: ! 420: /* Stack layout; function entry, exit and calling. */ ! 421: ! 422: /* Define this if pushing a word on the stack ! 423: makes the stack pointer a smaller address. */ ! 424: #define STACK_GROWS_DOWNWARD ! 425: ! 426: /* Define this if the nominal address of the stack frame ! 427: is at the high-address end of the local variables; ! 428: that is, each additional local variable allocated ! 429: goes at a more negative offset in the frame. */ ! 430: #define FRAME_GROWS_DOWNWARD ! 431: ! 432: /* Offset within stack frame to start allocating local variables at. ! 433: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the ! 434: first local allocated. Otherwise, it is the offset to the BEGINNING ! 435: of the first local allocated. */ ! 436: /* On the Gmicro, FP points to the old FP and the first local variables are ! 437: at (FP - 4). */ ! 438: #define STARTING_FRAME_OFFSET 0 ! 439: ! 440: /* If we generate an insn to push BYTES bytes, ! 441: this says how many the stack pointer really advances by. */ ! 442: /* On the Gmicro, sp is decremented by the exact size of the operand */ ! 443: #define PUSH_ROUNDING(BYTES) (BYTES) ! 444: ! 445: /* Offset of first parameter from the argument pointer register value. */ ! 446: /* On the Gmicro, the first argument is found at (ap + 8) where ap is fp. */ ! 447: #define FIRST_PARM_OFFSET(FNDECL) 8 ! 448: ! 449: /* Value is the number of byte of arguments automatically ! 450: popped when returning from a subroutine call. ! 451: FUNTYPE is the data type of the function (as a tree), ! 452: or for a library call it is an identifier node for the subroutine name. ! 453: SIZE is the number of bytes of arguments passed on the stack. ! 454: ! 455: On the Gmicro, the EXITD insn may be used to pop them if the number ! 456: of args is fixed, but if the number is variable then the caller must pop ! 457: them all. The adjsp operand of the EXITD insn can't be used for library ! 458: calls now because the library is compiled with the standard compiler. ! 459: Use of adjsp operand is a selectable option, since it is incompatible with ! 460: standard Unix calling sequences. If the option is not selected, ! 461: the caller must always pop the args. ! 462: On the m68k this is an RTD option, so I use the same name ! 463: for the Gmicro. The option name may be changed in the future. */ ! 464: ! 465: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \ ! 466: ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \ ! 467: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \ ! 468: || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \ ! 469: = void_type_node))) \ ! 470: ? (SIZE) : 0) ! 471: ! 472: /* Define how to find the value returned by a function. ! 473: VALTYPE is the data type of the value (as a tree). ! 474: If the precise function being called is known, FUNC is its FUNCTION_DECL; ! 475: otherwise, FUNC is 0. */ ! 476: ! 477: /* On the Gmicro the floating return value is in fr0 not r0. */ ! 478: ! 479: #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) ! 480: ! 481: /* Define how to find the value returned by a library function ! 482: assuming the value has mode MODE. */ ! 483: ! 484: #define LIBCALL_VALUE(MODE) \ ! 485: (gen_rtx (REG, (MODE), \ ! 486: ((TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0))) ! 487: ! 488: ! 489: /* 1 if N is a possible register number for a function value. ! 490: On the Gmicro, r0 and fp0 are the possible registers. */ ! 491: ! 492: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 16) ! 493: ! 494: /* Define this if PCC uses the nonreentrant convention for returning ! 495: structure and union values. */ ! 496: ! 497: #define PCC_STATIC_STRUCT_RETURN ! 498: ! 499: /* 1 if N is a possible register number for function argument passing. ! 500: On the Gmicro, no registers are used in this way. */ ! 501: /* Really? For the performance improvement, registers should be used !! */ ! 502: ! 503: #define FUNCTION_ARG_REGNO_P(N) 0 ! 504: ! 505: /* Define a data type for recording info about an argument list ! 506: during the scan of that argument list. This data type should ! 507: hold all necessary information about the function itself ! 508: and about the args processed so far, enough to enable macros ! 509: such as FUNCTION_ARG to determine where the next arg should go. ! 510: ! 511: On the Gmicro, this is a single integer, which is a number of bytes ! 512: of arguments scanned so far. */ ! 513: ! 514: #define CUMULATIVE_ARGS int ! 515: ! 516: /* Initialize a variable CUM of type CUMULATIVE_ARGS ! 517: for a call to a function whose data type is FNTYPE. ! 518: For a library call, FNTYPE is 0. ! 519: ! 520: On the Gmicro, the offset starts at 0. */ ! 521: ! 522: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \ ! 523: ((CUM) = 0) ! 524: ! 525: /* Update the data in CUM to advance over an argument ! 526: of mode MODE and data type TYPE. ! 527: (TYPE is null for libcalls where that information may not be available.) */ ! 528: ! 529: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ ! 530: ((CUM) += ((MODE) != BLKmode \ ! 531: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ ! 532: : (int_size_in_bytes (TYPE) + 3) & ~3)) ! 533: ! 534: /* Define where to put the arguments to a function. ! 535: Value is zero to push the argument on the stack, ! 536: or a hard register in which to store the argument. ! 537: ! 538: MODE is the argument's machine mode. ! 539: TYPE is the data type of the argument (as a tree). ! 540: This is null for libcalls where that information may ! 541: not be available. ! 542: CUM is a variable of type CUMULATIVE_ARGS which gives info about ! 543: the preceding args and about the function being called. ! 544: NAMED is nonzero if this argument is a named parameter ! 545: (otherwise it is an extra parameter matching an ellipsis). */ ! 546: ! 547: /* On the Gmicro all args are pushed, except if -mregparm is specified ! 548: then the first two words of arguments are passed in d0, d1. ! 549: *NOTE* -mregparm does not work. ! 550: It exists only to test register calling conventions. */ ! 551: ! 552: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ! 553: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) ! 554: ! 555: /* For an arg passed partly in registers and partly in memory, ! 556: this is the number of registers used. ! 557: For args passed entirely in registers or entirely in memory, zero. */ ! 558: ! 559: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ ! 560: ((TARGET_REGPARM && (CUM) < 8 \ ! 561: && 8 < ((CUM) + ((MODE) == BLKmode \ ! 562: ? int_size_in_bytes (TYPE) \ ! 563: : GET_MODE_SIZE (MODE)))) \ ! 564: ? 2 - (CUM) / 4 : 0) ! 565: ! 566: /* The following macro is defined to output register list. ! 567: The LSB of Mask is the lowest number register. ! 568: Regoff is MY_GREG_OFF or MY_FREG_OFF. ! 569: Do NOT use <i> in File, Mask, Regoff !! ! 570: Should be changed from macros to functions. M.Yuhara */ ! 571: ! 572: #define MY_GREG_OFF 0 ! 573: #define MY_FREG_OFF 16 ! 574: ! 575: #define MY_PRINT_MASK(File, Mask, Regoff) \ ! 576: { \ ! 577: int i, first = -1; \ ! 578: if ((Mask) == 0) { \ ! 579: fprintf(File, "#0"); \ ! 580: } else { \ ! 581: fprintf(File, "("); \ ! 582: for (i = 0; i < 16; i++) { \ ! 583: if ( (Mask) & (1 << i) ) { \ ! 584: if (first < 0) { \ ! 585: if (first == -2) { \ ! 586: fprintf(File, ","); \ ! 587: } \ ! 588: first = i; \ ! 589: fprintf(File, "%s", reg_names[Regoff + i]); \ ! 590: } \ ! 591: } else if (first >= 0) { \ ! 592: if (i > first + 1) { \ ! 593: fprintf(File, "-%s", reg_names[Regoff + i - 1]); \ ! 594: } \ ! 595: first = -2; \ ! 596: } \ ! 597: } \ ! 598: if ( (first >= 0) && (first != 15) ) \ ! 599: fprintf(File, "-%s", reg_names[Regoff + 15]);\ ! 600: fprintf(File, ")"); \ ! 601: } \ ! 602: } ! 603: ! 604: ! 605: #define MY_PRINT_ONEREG_L(FILE,MASK) \ ! 606: { register int i; \ ! 607: for (i = 0; i < 16; i++) \ ! 608: if ( (1 << i) & (MASK)) { \ ! 609: fprintf(FILE, "%s", reg_names[i]); \ ! 610: (MASK) &= ~(1 << i); \ ! 611: break; \ ! 612: } \ ! 613: } ! 614: ! 615: ! 616: #define MY_PRINT_ONEREG_H(FILE,MASK) \ ! 617: { register int i; \ ! 618: for (i = 15; i >= 0; i--) \ ! 619: if ( (1 << i) & (MASK)) { \ ! 620: fprintf(FILE, "%s", reg_names[i]); \ ! 621: (MASK) &= ~(1 << i); \ ! 622: break; \ ! 623: } \ ! 624: } ! 625: ! 626: /* This macro generates the assembly code for function entry. ! 627: FILE is a stdio stream to output the code to. ! 628: SIZE is an int: how many units of temporary storage to allocate. ! 629: Refer to the array `regs_ever_live' to determine which registers ! 630: to save; `regs_ever_live[I]' is nonzero if register number I ! 631: is ever used in the function. This macro is responsible for ! 632: knowing which registers should not be saved even if used. */ ! 633: ! 634: /* The next macro needs much optimization !! ! 635: M.Yuhara */ ! 636: ! 637: #define FUNCTION_PROLOGUE(FILE, SIZE) \ ! 638: { register int regno; \ ! 639: register int mask = 0; \ ! 640: register int nregs = 0; \ ! 641: static char *reg_names[] = REGISTER_NAMES; \ ! 642: extern char call_used_regs[]; \ ! 643: int fsize = ((SIZE) + 3) & -4; \ ! 644: for (regno = 0; regno < 16; regno++) \ ! 645: if (regs_ever_live[regno] && !call_used_regs[regno]) { \ ! 646: mask |= (1 << regno); \ ! 647: nregs++; \ ! 648: } \ ! 649: if (frame_pointer_needed) { \ ! 650: mask &= ~(1 << FRAME_POINTER_REGNUM); \ ! 651: if (nregs > 4) { \ ! 652: fprintf(FILE, "\tenter.w #%d,", fsize); \ ! 653: MY_PRINT_MASK(FILE, mask, MY_GREG_OFF); \ ! 654: fprintf(FILE,"\n"); \ ! 655: } else { \ ! 656: fprintf(FILE, "\tmov.w fp,@-sp\n"); \ ! 657: fprintf(FILE, "\tmov.w sp,fp\n"); \ ! 658: if (fsize > 0) \ ! 659: myoutput_sp_adjust(FILE, "sub", fsize); \ ! 660: while (nregs--) { \ ! 661: fprintf(FILE, "\tmov.w "); \ ! 662: MY_PRINT_ONEREG_H(FILE, mask); \ ! 663: fprintf(FILE, ",@-sp\n"); \ ! 664: } \ ! 665: } \ ! 666: } else { \ ! 667: if (fsize > 0) \ ! 668: myoutput_sp_adjust(FILE, "sub", fsize); \ ! 669: if (mask != 0) { \ ! 670: if (nregs > 4) { \ ! 671: fprintf(FILE, "\tstm.w "); \ ! 672: MY_PRINT_MASK(FILE, mask, MY_GREG_OFF); \ ! 673: fprintf(FILE, ",@-sp\n"); \ ! 674: } else { \ ! 675: while (nregs--) { \ ! 676: fprintf(FILE, "\tmov.w "); \ ! 677: MY_PRINT_ONEREG_H(FILE, mask); \ ! 678: fprintf(FILE, ",@-sp\n"); \ ! 679: } \ ! 680: } \ ! 681: } \ ! 682: } \ ! 683: mask = 0; \ ! 684: for (regno = 16; regno < 32; regno++) \ ! 685: if (regs_ever_live[regno] && !call_used_regs[regno]) \ ! 686: mask |= 1 << (regno - 16); \ ! 687: if (mask != 0) { \ ! 688: fprintf(FILE, "\tfstm.w "); \ ! 689: MY_PRINT_MASK(FILE, mask, MY_FREG_OFF); \ ! 690: fprintf(FILE, ",@-sp\n", mask); \ ! 691: } \ ! 692: } ! 693: ! 694: ! 695: /* Output assembler code to FILE to increment profiler label # LABELNO ! 696: for profiling a function entry. */ ! 697: /* ??? M.Yuhara */ ! 698: ! 699: #define FUNCTION_PROFILER(FILE, LABELNO) \ ! 700: fprintf (FILE, "\tmova @LP%d,r0\n\tjsr mcount\n", (LABELNO)) ! 701: ! 702: /* Output assembler code to FILE to initialize this source file's ! 703: basic block profiling info, if that has not already been done. */ ! 704: ! 705: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \ ! 706: fprintf (FILE, "\tcmp #0,@LPBX0\n\tbne LPI%d\n\tpusha @LPBX0\n\tjsr ___bb_init_func\n\tadd #4,sp\nLPI%d:\n", \ ! 707: LABELNO, LABELNO); ! 708: ! 709: /* Output assembler code to FILE to increment the entry-count for ! 710: the BLOCKNO'th basic block in this source file. */ ! 711: ! 712: #define BLOCK_PROFILER(FILE, BLOCKNO) \ ! 713: fprintf (FILE, "\tadd #1,@(LPBX2+%d)\n", 4 * BLOCKNO) ! 714: ! 715: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, ! 716: the stack pointer does not matter. The value is tested only in ! 717: functions that have frame pointers. ! 718: No definition is equivalent to always zero. */ ! 719: ! 720: #define EXIT_IGNORE_STACK 1 ! 721: ! 722: /* This macro generates the assembly code for function exit, ! 723: on machines that need it. If FUNCTION_EPILOGUE is not defined ! 724: then individual return instructions are generated for each ! 725: return statement. Args are same as for FUNCTION_PROLOGUE. ! 726: ! 727: The function epilogue should not depend on the current stack pointer (when ! 728: frame_pinter_needed) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ ! 729: It should use the frame pointer only. This is mandatory because ! 730: of alloca; we also take advantage of it to omit stack adjustments ! 731: before returning. */ ! 732: ! 733: /* The Gmicro FPU seems to be unable to fldm/fstm double or single ! 734: floating. It only allows extended !! */ ! 735: /* Optimization is not enough, especially FREGs load !! M.Yuhara */ ! 736: ! 737: #define FUNCTION_EPILOGUE(FILE, SIZE) \ ! 738: { register int regno; \ ! 739: register int mask, fmask; \ ! 740: register int nregs, nfregs; \ ! 741: int offset, foffset; \ ! 742: extern char call_used_regs[]; \ ! 743: static char *reg_names[] = REGISTER_NAMES; \ ! 744: int fsize = ((SIZE) + 3) & -4; \ ! 745: FUNCTION_EXTRA_EPILOGUE (FILE, SIZE); \ ! 746: nfregs = 0; fmask = 0; \ ! 747: for (regno = 16; regno < 31; regno++) \ ! 748: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ ! 749: { nfregs++; fmask |= 1 << (regno - 16); } \ ! 750: foffset = nfregs * 12; \ ! 751: nregs = 0; mask = 0; \ ! 752: if (frame_pointer_needed) regs_ever_live[FRAME_POINTER_REGNUM] = 0; \ ! 753: for (regno = 0; regno < 16; regno++) \ ! 754: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ ! 755: { nregs++; mask |= 1 << regno; } \ ! 756: if (frame_pointer_needed) { \ ! 757: offset = nregs * 4 + fsize; \ ! 758: if (nfregs > 0) { \ ! 759: fprintf(FILE, "\tfldm.x @(%d,fp),", -(foffset + offset));\ ! 760: MY_PRINT_MASK(FILE, fmask, MY_FREG_OFF); \ ! 761: fprintf(FILE, "\n"); \ ! 762: } \ ! 763: if (nregs > 4 \ ! 764: || current_function_pops_args) { \ ! 765: fprintf(FILE, "\tmova @(%d,fp),sp\n", -offset); \ ! 766: fprintf(FILE, "\texitd "); \ ! 767: MY_PRINT_MASK(FILE, mask, MY_GREG_OFF); \ ! 768: fprintf(FILE, ",#%d\n", current_function_pops_args); \ ! 769: } else { \ ! 770: while (nregs--) { \ ! 771: fprintf(FILE, "\tmov:l.w @(%d,fp),", -offset); \ ! 772: MY_PRINT_ONEREG_L(FILE, mask); \ ! 773: fprintf(FILE, "\n"); \ ! 774: offset -= 4; \ ! 775: } \ ! 776: if (TARGET_NEWRETURN) { \ ! 777: fprintf(FILE, "\tmova.w @(4,fp),sp\n"); \ ! 778: fprintf(FILE, "\tmov:l.w @fp,fp\n"); \ ! 779: } else { \ ! 780: fprintf(FILE, "\tmov.w fp,sp\n"); \ ! 781: fprintf(FILE, "\tmov.w @sp+,fp\n"); \ ! 782: } \ ! 783: fprintf(FILE, "\trts\n"); \ ! 784: } \ ! 785: } else { \ ! 786: if (nfregs > 0) { \ ! 787: fprintf(FILE, "\tfldm.w @sp+,"); \ ! 788: MY_PRINT_MASK(FILE, fmask, MY_FREG_OFF); \ ! 789: fprintf(FILE, "\n"); \ ! 790: } \ ! 791: if (nregs > 4) { \ ! 792: fprintf(FILE, "\tldm.w @sp+,"); \ ! 793: MY_PRINT_MASK(FILE, mask, MY_GREG_OFF); \ ! 794: fprintf(FILE, "\n"); \ ! 795: } else { \ ! 796: while (nregs--) { \ ! 797: fprintf(FILE, "\tmov.w @sp+,"); \ ! 798: MY_PRINT_ONEREG_L(FILE,mask); \ ! 799: fprintf(FILE, "\n"); \ ! 800: } \ ! 801: } \ ! 802: if (current_function_pops_args) { \ ! 803: myoutput_sp_adjust(FILE, "add", \ ! 804: (fsize + 4 + current_function_pops_args)); \ ! 805: fprintf(FILE, "\tjmp @(%d,sp)\n", current_function_pops_args);\ ! 806: } else { \ ! 807: if (fsize > 0) \ ! 808: myoutput_sp_adjust(FILE, "add", fsize); \ ! 809: fprintf(FILE, "\trts\n"); \ ! 810: } \ ! 811: } \ ! 812: } ! 813: ! 814: /* This is a hook for other tm files to change. */ ! 815: #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) ! 816: ! 817: /* If the memory address ADDR is relative to the frame pointer, ! 818: correct it to be relative to the stack pointer instead. ! 819: This is for when we don't use a frame pointer. ! 820: ADDR should be a variable name. */ ! 821: ! 822: /* You have to change the next macro if you want to use more complex ! 823: addressing modes (such as double indirection and more than one ! 824: chain-addressing stages). */ ! 825: ! 826: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \ ! 827: { int offset = -1; \ ! 828: rtx regs = stack_pointer_rtx; \ ! 829: if (ADDR == frame_pointer_rtx) \ ! 830: offset = 0; \ ! 831: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \ ! 832: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ ! 833: offset = INTVAL (XEXP (ADDR, 1)); \ ! 834: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \ ! 835: { rtx other_reg = XEXP (ADDR, 1); \ ! 836: offset = 0; \ ! 837: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ ! 838: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \ ! 839: { rtx other_reg = XEXP (ADDR, 0); \ ! 840: offset = 0; \ ! 841: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ ! 842: else if (GET_CODE (ADDR) == PLUS \ ! 843: && GET_CODE (XEXP (ADDR, 0)) == PLUS \ ! 844: && XEXP (XEXP (ADDR, 0), 0) == frame_pointer_rtx \ ! 845: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ ! 846: { rtx other_reg = XEXP (XEXP (ADDR, 0), 1); \ ! 847: offset = INTVAL (XEXP (ADDR, 1)); \ ! 848: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ ! 849: else if (GET_CODE (ADDR) == PLUS \ ! 850: && GET_CODE (XEXP (ADDR, 0)) == PLUS \ ! 851: && XEXP (XEXP (ADDR, 0), 1) == frame_pointer_rtx \ ! 852: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ ! 853: { rtx other_reg = XEXP (XEXP (ADDR, 0), 0); \ ! 854: offset = INTVAL (XEXP (ADDR, 1)); \ ! 855: regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ ! 856: if (offset >= 0) \ ! 857: { int regno; \ ! 858: extern char call_used_regs[]; \ ! 859: for (regno = 16; regno < 32; regno++) \ ! 860: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ ! 861: offset += 12; \ ! 862: for (regno = 0; regno < 16; regno++) \ ! 863: if (regs_ever_live[regno] && ! call_used_regs[regno]) \ ! 864: offset += 4; \ ! 865: offset -= 4; \ ! 866: ADDR = plus_constant (regs, offset + (DEPTH)); } } ! 867: ! 868: /* Addressing modes, and classification of registers for them. */ ! 869: ! 870: /* #define HAVE_POST_INCREMENT */ ! 871: /* #define HAVE_POST_DECREMENT */ ! 872: ! 873: /* #define HAVE_PRE_DECREMENT */ ! 874: /* #define HAVE_PRE_INCREMENT */ ! 875: ! 876: /* Macros to check register numbers against specific register classes. */ ! 877: ! 878: /* These assume that REGNO is a hard or pseudo reg number. ! 879: They give nonzero only if REGNO is a hard reg of the suitable class ! 880: or a pseudo reg currently allocated to a suitable hard reg. ! 881: Since they use reg_renumber, they are safe only once reg_renumber ! 882: has been allocated, which happens in local-alloc.c. */ ! 883: ! 884: /* Gmicro */ ! 885: #define REGNO_OK_FOR_GREG_P(REGNO) \ ! 886: ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16) ! 887: #define REGNO_OK_FOR_FPU_P(REGNO) \ ! 888: (((REGNO) ^ 0x10) < 16 || (unsigned) (reg_renumber[REGNO] ^ 0x10) < 16) ! 889: ! 890: #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_GREG_P(REGNO) ! 891: #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_GREG_P(REGNO) ! 892: ! 893: /* Now macros that check whether X is a register and also, ! 894: strictly, whether it is in a specified class. ! 895: ! 896: These macros are specific to the Gmicro, and may be used only ! 897: in code for printing assembler insns and in conditions for ! 898: define_optimization. */ ! 899: ! 900: /* 1 if X is an fpu register. */ ! 901: ! 902: #define FPU_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPU_P (REGNO (X))) ! 903: ! 904: /* I used GREG_P in the gmicro.md file. */ ! 905: ! 906: #ifdef REG_OK_STRICT ! 907: #define GREG_P(X) (REG_P (X) && REGNO_OK_FOR_GREG_P (REGNO(X))) ! 908: #else ! 909: #define GREG_P(X) (REG_P (X) && ((REGNO (X) & ~0xf) != 0x10)) ! 910: #endif ! 911: ! 912: /* Maximum number of registers that can appear in a valid memory address. */ ! 913: ! 914: /* The Gmicro allows more registers in the chained addressing mode. ! 915: But I do not know gcc supports such an architecture. */ ! 916: ! 917: #define MAX_REGS_PER_ADDRESS 2 ! 918: ! 919: /* Recognize any constant value that is a valid address. */ ! 920: ! 921: #define CONSTANT_ADDRESS_P(X) \ ! 922: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ ! 923: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ ! 924: || GET_CODE (X) == HIGH) ! 925: ! 926: /* Nonzero if the constant value X is a legitimate general operand. ! 927: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ ! 928: ! 929: #define LEGITIMATE_CONSTANT_P(X) 1 ! 930: ! 931: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx ! 932: and check its validity for a certain class. ! 933: We have two alternate definitions for each of them. ! 934: The usual definition accepts all pseudo regs; the other rejects ! 935: them unless they have been allocated suitable hard regs. ! 936: The symbol REG_OK_STRICT causes the latter definition to be used. ! 937: ! 938: Most source files want to accept pseudo regs in the hope that ! 939: they will get allocated to the class that the insn wants them to be in. ! 940: Source files for reload pass need to be strict. ! 941: After reload, it makes no difference, since pseudo regs have ! 942: been eliminated by then. */ ! 943: ! 944: #ifndef REG_OK_STRICT ! 945: ! 946: /* Nonzero if X is a hard reg that can be used as an index ! 947: or if it is a pseudo reg. */ ! 948: #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) & ~0xf) != 0x10) ! 949: /* Nonzero if X is a hard reg that can be used as a base reg ! 950: or if it is a pseudo reg. */ ! 951: #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~0xf) != 0x10) ! 952: ! 953: #else ! 954: ! 955: /* Nonzero if X is a hard reg that can be used as an index. */ ! 956: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) ! 957: /* Nonzero if X is a hard reg that can be used as a base reg. */ ! 958: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) ! 959: ! 960: #endif ! 961: ! 962: /* The gcc uses the following effective address of the Gmicro. ! 963: (without using PC!!). ! 964: {@} ( {Rbase} + {Disp} + {Rindex * [1,2,4,8]} ) ! 965: where ! 966: @: memory indirection. ! 967: Rbase: Base Register = General Register. ! 968: Disp: Displacement (up to 32bits) ! 969: Rindex: Index Register = General Register. ! 970: [1,2,4,8]: Scale of Index. 1 or 2 or 4 or 8. ! 971: The inside of { } can be omitted. ! 972: This restricts the chained addressing up to 1 stage. */ ! 973: ! 974: ! 975: ! 976: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression ! 977: that is a valid memory address for an instruction. ! 978: The MODE argument is the machine mode for the MEM expression ! 979: that wants to use this address. ! 980: ! 981: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, ! 982: except for CONSTANT_ADDRESS_P which is actually machine-independent. */ ! 983: ! 984: #define REG_CODE_BASE_P(X) \ ! 985: (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) ! 986: ! 987: #define REG_CODE_INDEX_P(X) \ ! 988: (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) ! 989: ! 990: /* GET_CODE(X) must be PLUS. This macro does not check for PLUS! */ ! 991: #define BASE_PLUS_DISP_P(X) \ ! 992: ( REG_CODE_BASE_P (XEXP (X, 0)) \ ! 993: && CONSTANT_ADDRESS_P (XEXP (X, 1)) \ ! 994: || \ ! 995: REG_CODE_BASE_P (XEXP (X, 1)) \ ! 996: && CONSTANT_ADDRESS_P (XEXP (X, 0)) ) ! 997: ! 998: /* 1 if X is {0,Rbase} + {0,disp}. */ ! 999: #define BASED_ADDRESS_P(X) \ ! 1000: (CONSTANT_ADDRESS_P (X) \ ! 1001: || REG_CODE_BASE_P (X) \ ! 1002: || (GET_CODE (X) == PLUS) \ ! 1003: && BASE_PLUS_DISP_P (X)) ! 1004: ! 1005: /* 1 if X is 1 or 2 or 4 or 8. GET_CODE(X) must be CONST_INT. */ ! 1006: #define SCALE_OF_INDEX_P(X) \ ! 1007: ( INTVAL(X) == 4 \ ! 1008: || INTVAL(X) == 2 \ ! 1009: || INTVAL(X) == 8 \ ! 1010: || INTVAL(X) == 1 ) ! 1011: ! 1012: /* #define INDEX_TERM_P(X,MODE) */ ! 1013: #define INDEX_TERM_P(X) \ ! 1014: ( REG_CODE_INDEX_P(X) \ ! 1015: || (GET_CODE (X) == MULT \ ! 1016: && ( (xfoo0 = XEXP (X, 0)), (xfoo1 = XEXP(X, 1)), \ ! 1017: ( ( (GET_CODE (xfoo0) == CONST_INT) \ ! 1018: && SCALE_OF_INDEX_P (xfoo0) \ ! 1019: && REG_CODE_INDEX_P (xfoo1) ) \ ! 1020: || \ ! 1021: ( (GET_CODE (xfoo1) == CONST_INT) \ ! 1022: && SCALE_OF_INDEX_P (xfoo1) \ ! 1023: && REG_CODE_INDEX_P (xfoo0) ) )))) ! 1024: ! 1025: /* Assumes there are no cases such that X = (Ireg + Disp) + Disp */ ! 1026: #define BASE_DISP_INDEX_P(X) \ ! 1027: ( BASED_ADDRESS_P (X) \ ! 1028: || ( (GET_CODE (X) == PLUS) \ ! 1029: && ( ( (xboo0 = XEXP (X, 0)), (xboo1 = XEXP (X, 1)), \ ! 1030: (REG_CODE_BASE_P (xboo0) \ ! 1031: && (GET_CODE (xboo1) == PLUS) \ ! 1032: && ( ( CONSTANT_ADDRESS_P (XEXP (xboo1, 0)) \ ! 1033: && INDEX_TERM_P (XEXP (xboo1, 1)) ) \ ! 1034: || ( CONSTANT_ADDRESS_P (XEXP (xboo1, 1)) \ ! 1035: && INDEX_TERM_P (XEXP (xboo1, 0))) ))) \ ! 1036: || \ ! 1037: (CONSTANT_ADDRESS_P (xboo0) \ ! 1038: && (GET_CODE (xboo1) == PLUS) \ ! 1039: && ( ( REG_CODE_BASE_P (XEXP (xboo1, 0)) \ ! 1040: && INDEX_TERM_P (XEXP (xboo1, 1)) ) \ ! 1041: || ( REG_CODE_BASE_P (XEXP (xboo1, 1)) \ ! 1042: && INDEX_TERM_P (XEXP (xboo1, 0))) )) \ ! 1043: || \ ! 1044: (INDEX_TERM_P (xboo0) \ ! 1045: && ( ( (GET_CODE (xboo1) == PLUS) \ ! 1046: && ( ( REG_CODE_BASE_P (XEXP (xboo1, 0)) \ ! 1047: && CONSTANT_ADDRESS_P (XEXP (xboo1, 1)) ) \ ! 1048: || ( REG_CODE_BASE_P (XEXP (xboo1, 1)) \ ! 1049: && CONSTANT_ADDRESS_P (XEXP (xboo1, 0))) )) \ ! 1050: || \ ! 1051: (CONSTANT_ADDRESS_P (xboo1)) \ ! 1052: || \ ! 1053: (REG_CODE_BASE_P (xboo1)) ))))) ! 1054: ! 1055: /* ! 1056: If you want to allow double-indirection, ! 1057: you have to change the <fp-relative> => <sp-relative> conversion ! 1058: routine. M.Yuhara ! 1059: ! 1060: #ifdef REG_OK_STRICT ! 1061: #define DOUBLE_INDIRECTION(X,ADDR) {\ ! 1062: if (BASE_DISP_INDEX_P (XEXP (XEXP (X, 0), 0) )) goto ADDR; \ ! 1063: } ! 1064: #else ! 1065: #define DOUBLE_INDIRECTION(X,ADDR) { } ! 1066: #endif ! 1067: */ ! 1068: ! 1069: ! 1070: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) {\ ! 1071: register rtx xboo0, xboo1, xfoo0, xfoo1; \ ! 1072: if (GET_CODE (X) == MEM) { \ ! 1073: /* \ ! 1074: if (GET_CODE (XEXP (X,0)) == MEM) { \ ! 1075: DOUBLE_INDIRECTION(X,ADDR); \ ! 1076: } else { \ ! 1077: if (BASE_DISP_INDEX_P (XEXP (X, 0))) goto ADDR; \ ! 1078: } \ ! 1079: */ \ ! 1080: } else { \ ! 1081: if (BASE_DISP_INDEX_P (X)) goto ADDR; \ ! 1082: if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \ ! 1083: && REG_P (XEXP (X, 0)) \ ! 1084: && (REGNO (XEXP (X, 0)) == STACK_POINTER_REGNUM)) \ ! 1085: goto ADDR; \ ! 1086: } \ ! 1087: } ! 1088: ! 1089: ! 1090: /* Try machine-dependent ways of modifying an illegitimate address ! 1091: to be legitimate. If we find one, return the new, valid address. ! 1092: This macro is used in only one place: `memory_address' in explow.c. ! 1093: ! 1094: OLDX is the address as it was before break_out_memory_refs was called. ! 1095: In some cases it is useful to look at this to decide what needs to be done. ! 1096: ! 1097: MODE and WIN are passed so that this macro can use ! 1098: GO_IF_LEGITIMATE_ADDRESS. ! 1099: ! 1100: It is always safe for this macro to do nothing. It exists to recognize ! 1101: opportunities to optimize the output. ! 1102: ! 1103: For the Gmicro, nothing is done now. */ ! 1104: ! 1105: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} ! 1106: ! 1107: /* Go to LABEL if ADDR (a legitimate address expression) ! 1108: has an effect that depends on the machine mode it is used for. ! 1109: On the VAX, the predecrement and postincrement address depend thus ! 1110: (the amount of decrement or increment being the length of the operand) ! 1111: and all indexed address depend thus (because the index scale factor ! 1112: is the length of the operand). ! 1113: The Gmicro mimics the VAX now. Since ADDE is legitimate, it cannot ! 1114: include auto-inc/dec. */ ! 1115: ! 1116: /* Unnecessary ??? */ ! 1117: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ ! 1118: { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \ ! 1119: goto LABEL; } ! 1120: ! 1121: ! 1122: /* Specify the machine mode that this machine uses ! 1123: for the index in the tablejump instruction. */ ! 1124: /* #define CASE_VECTOR_MODE HImode */ ! 1125: #define CASE_VECTOR_MODE SImode ! 1126: ! 1127: /* Define this if the tablejump instruction expects the table ! 1128: to contain offsets from the address of the table. ! 1129: Do not define this if the table should contain absolute addresses. */ ! 1130: #define CASE_VECTOR_PC_RELATIVE ! 1131: ! 1132: /* Specify the tree operation to be used to convert reals to integers. */ ! 1133: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR ! 1134: ! 1135: /* This is the kind of divide that is easiest to do in the general case. */ ! 1136: #define EASY_DIV_EXPR TRUNC_DIV_EXPR ! 1137: ! 1138: /* Define this as 1 if `char' should by default be signed; else as 0. */ ! 1139: #define DEFAULT_SIGNED_CHAR 1 ! 1140: ! 1141: /* Max number of bytes we can move from memory to memory ! 1142: in one reasonably fast instruction. */ ! 1143: #define MOVE_MAX 4 ! 1144: ! 1145: /* Define this if zero-extension is slow (more than one real instruction). */ ! 1146: /* #define SLOW_ZERO_EXTEND */ ! 1147: ! 1148: /* Nonzero if access to memory by bytes is slow and undesirable. */ ! 1149: #define SLOW_BYTE_ACCESS 0 ! 1150: ! 1151: /* Define if shifts truncate the shift count ! 1152: which implies one can omit a sign-extension or zero-extension ! 1153: of a shift count. */ ! 1154: /* #define SHIFT_COUNT_TRUNCATED */ ! 1155: ! 1156: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits ! 1157: is done just by pretending it is already truncated. */ ! 1158: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 ! 1159: ! 1160: /* We assume that the store-condition-codes instructions store 0 for false ! 1161: and some other value for true. This is the value stored for true. */ ! 1162: ! 1163: /* #define STORE_FLAG_VALUE -1 */ ! 1164: ! 1165: /* When a prototype says `char' or `short', really pass an `int'. */ ! 1166: #define PROMOTE_PROTOTYPES ! 1167: ! 1168: /* Specify the machine mode that pointers have. ! 1169: After generation of rtl, the compiler makes no further distinction ! 1170: between pointers and any other objects of this machine mode. */ ! 1171: #define Pmode SImode ! 1172: ! 1173: /* A function address in a call instruction ! 1174: is a byte address (for indexing purposes) ! 1175: so give the MEM rtx a byte's mode. */ ! 1176: #define FUNCTION_MODE QImode ! 1177: ! 1178: /* Compute the cost of computing a constant rtl expression RTX ! 1179: whose rtx-code is CODE. The body of this macro is a portion ! 1180: of a switch statement. If the code is computed here, ! 1181: return it with a return statement. Otherwise, break from the switch. */ ! 1182: ! 1183: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ ! 1184: case CONST_INT: \ ! 1185: if ((unsigned) INTVAL (RTX) < 8) return 0; \ ! 1186: if ((unsigned) (INTVAL (RTX) + 0x80) < 0x100) return 1; \ ! 1187: if ((unsigned) (INTVAL (RTX) + 0x8000) < 0x10000) return 2; \ ! 1188: case CONST: \ ! 1189: case LABEL_REF: \ ! 1190: case SYMBOL_REF: \ ! 1191: return 3; \ ! 1192: case CONST_DOUBLE: \ ! 1193: return 5; ! 1194: ! 1195: /* Define subroutines to call to handle multiply and divide. ! 1196: The `*' prevents an underscore from being prepended by the compiler. */ ! 1197: /* Use libgcc on Gmicro */ ! 1198: /* #define UDIVSI3_LIBCALL "*udiv" */ ! 1199: /* #define UMODSI3_LIBCALL "*urem" */ ! 1200: ! 1201: ! 1202: /* Tell final.c how to eliminate redundant test instructions. */ ! 1203: ! 1204: /* Here we define machine-dependent flags and fields in cc_status ! 1205: (see `conditions.h'). */ ! 1206: ! 1207: /* Set if the cc value is actually in the FPU, so a floating point ! 1208: conditional branch must be output. */ ! 1209: #define CC_IN_FPU 04000 ! 1210: ! 1211: /* Store in cc_status the expressions ! 1212: that the condition codes will describe ! 1213: after execution of an instruction whose pattern is EXP. ! 1214: Do not alter them if the instruction would not alter the cc's. */ ! 1215: ! 1216: /* Since Gmicro's compare instructions depend on the branch condition, ! 1217: all branch should be kept. ! 1218: More work must be done to optimize condition code !! M.Yuhara */ ! 1219: ! 1220: #define NOTICE_UPDATE_CC(EXP, INSN) {CC_STATUS_INIT;} ! 1221: ! 1222: /* The skeleton of the next macro is taken from "vax.h". ! 1223: FPU-reg manipulation is added. M.Yuhara */ ! 1224: /* Now comment out. ! 1225: #define NOTICE_UPDATE_CC(EXP, INSN) { \ ! 1226: if (GET_CODE (EXP) == SET) { \ ! 1227: if ( !FPU_REG_P (XEXP (EXP, 0)) \ ! 1228: && (XEXP (EXP, 0) != cc0_rtx) \ ! 1229: && (FPU_REG_P (XEXP (EXP, 1)) \ ! 1230: || GET_CODE (XEXP (EXP, 1)) == FIX \ ! 1231: || GET_CODE (XEXP (EXP, 1)) == FLOAT_TRUNCATE \ ! 1232: || GET_CODE (XEXP (EXP, 1)) == FLOAT_EXTEND)) { \ ! 1233: CC_STATUS_INIT; \ ! 1234: } else if (GET_CODE (SET_SRC (EXP)) == CALL) { \ ! 1235: CC_STATUS_INIT; \ ! 1236: } else if (GET_CODE (SET_DEST (EXP)) != PC) { \ ! 1237: cc_status.flags = 0; \ ! 1238: cc_status.value1 = SET_DEST (EXP); \ ! 1239: cc_status.value2 = SET_SRC (EXP); \ ! 1240: } \ ! 1241: } else if (GET_CODE (EXP) == PARALLEL \ ! 1242: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET \ ! 1243: && GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) != PC) {\ ! 1244: cc_status.flags = 0; \ ! 1245: cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \ ! 1246: cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \ ! 1247: /* PARALLELs whose first element sets the PC are aob, sob VAX insns. \ ! 1248: They do change the cc's. So drop through and forget the cc's. * / \ ! 1249: } else CC_STATUS_INIT; \ ! 1250: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \ ! 1251: && cc_status.value2 \ ! 1252: && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \ ! 1253: cc_status.value2 = 0; \ ! 1254: if (cc_status.value1 && GET_CODE (cc_status.value1) == MEM \ ! 1255: && cc_status.value2 \ ! 1256: && GET_CODE (cc_status.value2) == MEM) \ ! 1257: cc_status.value2 = 0; \ ! 1258: if ( (cc_status.value1 && FPU_REG_P (cc_status.value1)) \ ! 1259: || (cc_status.value2 && FPU_REG_P (cc_status.value2))) \ ! 1260: cc_status.flags = CC_IN_FPU; \ ! 1261: } ! 1262: */ ! 1263: ! 1264: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ ! 1265: { if (cc_prev_status.flags & CC_IN_FPU) \ ! 1266: return FLOAT; \ ! 1267: if (cc_prev_status.flags & CC_NO_OVERFLOW) \ ! 1268: return NO_OV; \ ! 1269: return NORMAL; } ! 1270: ! 1271: /* Control the assembler format that we output. */ ! 1272: ! 1273: /* Output before read-only data. */ ! 1274: ! 1275: #define TEXT_SECTION_ASM_OP ".section text,code,align=4" ! 1276: ! 1277: /* Output before writable data. */ ! 1278: ! 1279: #define DATA_SECTION_ASM_OP ".section data,data,align=4" ! 1280: ! 1281: /* Output before uninitialized data. */ ! 1282: ! 1283: #define BSS_SECTION_ASM_OP ".section bss,data,align=4" ! 1284: ! 1285: #define EXTRA_SECTIONS in_bss ! 1286: ! 1287: #define EXTRA_SECTION_FUNCTIONS \ ! 1288: void \ ! 1289: bss_section () \ ! 1290: { \ ! 1291: if (in_section != in_bss) { \ ! 1292: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \ ! 1293: in_section = in_bss; \ ! 1294: } \ ! 1295: } ! 1296: ! 1297: /* Output at beginning of assembler file. ! 1298: It is not appropriate for this to print a list of the options used, ! 1299: since that's not the convention that we use. */ ! 1300: ! 1301: #define ASM_FILE_START(FILE) ! 1302: ! 1303: /* Output at the end of assembler file. */ ! 1304: ! 1305: #define ASM_FILE_END(FILE) fprintf (FILE, "\t.end\n"); ! 1306: ! 1307: ! 1308: /* Don't try to define `gcc_compiled.' since the assembler do not ! 1309: accept symbols with periods and GDB doesn't run on this machine anyway. */ ! 1310: #define ASM_IDENTIFY_GCC(FILE) ! 1311: ! 1312: ! 1313: /* Output to assembler file text saying following lines ! 1314: may contain character constants, extra white space, comments, etc. */ ! 1315: ! 1316: #define ASM_APP_ON "" ! 1317: /* #define ASM_APP_ON "#APP\n" */ ! 1318: ! 1319: /* Output to assembler file text saying following lines ! 1320: no longer contain unusual constructs. */ ! 1321: ! 1322: #define ASM_APP_OFF "" ! 1323: /* #define ASM_APP_OFF ";#NO_APP\n" */ ! 1324: ! 1325: /* How to refer to registers in assembler output. ! 1326: This sequence is indexed by compiler's hard-register-number (see above). */ ! 1327: ! 1328: #define REGISTER_NAMES \ ! 1329: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ ! 1330: "r8", "r9", "r10", "r11", "r12", "r13", "fp", "sp", \ ! 1331: "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \ ! 1332: "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15"} ! 1333: ! 1334: /* How to renumber registers for dbx and gdb. */ ! 1335: ! 1336: #define DBX_REGISTER_NUMBER(REGNO) (REGNO) ! 1337: ! 1338: /* Define this if gcc should produce debugging output for dbx in response ! 1339: to the -g flag. This does not work for the Gmicro now */ ! 1340: ! 1341: #define DBX_DEBUGGING_INFO ! 1342: ! 1343: /* This is how to output the definition of a user-level label named NAME, ! 1344: such as the label on a static function or variable NAME. */ ! 1345: ! 1346: #define ASM_OUTPUT_LABEL(FILE,NAME) { \ ! 1347: assemble_name (FILE, NAME); \ ! 1348: fputs (":\n", FILE); \ ! 1349: } ! 1350: ! 1351: /* This is how to output a command to make the user-level label named NAME ! 1352: defined for reference from other files. */ ! 1353: ! 1354: #define ASM_GLOBALIZE_LABEL(FILE,NAME) {\ ! 1355: fputs ("\t.global ", FILE); \ ! 1356: assemble_name (FILE, NAME); \ ! 1357: fputs ("\n", FILE); \ ! 1358: } ! 1359: ! 1360: /* This is how to output a command to make the external label named NAME ! 1361: which are not defined in the file to be referable */ ! 1362: /* ".import" does not work ??? */ ! 1363: ! 1364: #define ASM_OUTPUT_EXTERNAL(FILE,DECL,NAME) { \ ! 1365: fputs ("\t.global ", FILE); \ ! 1366: assemble_name (FILE, NAME); \ ! 1367: fputs ("\n", FILE); \ ! 1368: } ! 1369: ! 1370: ! 1371: /* This is how to output a reference to a user-level label named NAME. ! 1372: `assemble_name' uses this. */ ! 1373: ! 1374: #define ASM_OUTPUT_LABELREF(FILE,NAME) \ ! 1375: fprintf (FILE, "_%s", NAME) ! 1376: ! 1377: /* This is how to output an internal numbered label where ! 1378: PREFIX is the class of label and NUM is the number within the class. */ ! 1379: ! 1380: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ ! 1381: fprintf (FILE, "%s%d:\n", PREFIX, NUM) ! 1382: ! 1383: /* This is how to store into the string LABEL ! 1384: the symbol_ref name of an internal numbered label where ! 1385: PREFIX is the class of label and NUM is the number within the class. ! 1386: This is suitable for output with `assemble_name'. */ ! 1387: ! 1388: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ ! 1389: sprintf (LABEL, "*%s%d", PREFIX, NUM) ! 1390: ! 1391: /* This is how to output an assembler line defining a `double' constant. */ ! 1392: ! 1393: /* do {...} while(0) is necessary, because these macros are used as ! 1394: if (xxx) MACRO; else .... ! 1395: ^ ! 1396: */ ! 1397: ! 1398: ! 1399: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ ! 1400: do { union { double d; long l[2];} tem; \ ! 1401: tem.d = (VALUE); \ ! 1402: fprintf (FILE, "\t.fdata.d h'%x%08x.d\n", tem.l[0], tem.l[1]); \ ! 1403: } while(0) ! 1404: ! 1405: ! 1406: /* This is how to output an assembler line defining a `float' constant. */ ! 1407: ! 1408: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ ! 1409: do { union { float f; long l;} tem; \ ! 1410: tem.f = (VALUE); \ ! 1411: fprintf (FILE, "\t.fdata.s h'%x.s\n", tem.l); \ ! 1412: } while(0) ! 1413: ! 1414: /* This is how to output an assembler line defining an `int' constant. */ ! 1415: ! 1416: #define ASM_OUTPUT_INT(FILE,VALUE) \ ! 1417: ( fprintf (FILE, "\t.data.w "), \ ! 1418: output_addr_const (FILE, (VALUE)), \ ! 1419: fprintf (FILE, "\n")) ! 1420: ! 1421: /* Likewise for `char' and `short' constants. */ ! 1422: ! 1423: #define ASM_OUTPUT_SHORT(FILE,VALUE) \ ! 1424: ( fprintf (FILE, "\t.data.h "), \ ! 1425: output_addr_const (FILE, (VALUE)), \ ! 1426: fprintf (FILE, "\n")) ! 1427: ! 1428: #define ASM_OUTPUT_CHAR(FILE,VALUE) \ ! 1429: ( fprintf (FILE, "\t.data.b "), \ ! 1430: output_addr_const (FILE, (VALUE)), \ ! 1431: fprintf (FILE, "\n")) ! 1432: ! 1433: /* This is how to output an assembler line for a numeric constant byte. */ ! 1434: ! 1435: #define ASM_OUTPUT_BYTE(FILE,VALUE) \ ! 1436: fprintf (FILE, "\t.data.b h'%x\n", (VALUE)) ! 1437: ! 1438: #define ASM_OUTPUT_ASCII(FILE,P,SIZE) \ ! 1439: output_ascii ((FILE), (P), (SIZE)) ! 1440: ! 1441: /* This is how to output an insn to push a register on the stack. ! 1442: It need not be very fast code. */ ! 1443: ! 1444: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ ! 1445: fprintf (FILE, "\tmov %s,@-sp\n", reg_names[REGNO]) ! 1446: ! 1447: /* This is how to output an insn to pop a register from the stack. ! 1448: It need not be very fast code. */ ! 1449: ! 1450: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ ! 1451: fprintf (FILE, "\tmov @sp+,%s\n", reg_names[REGNO]) ! 1452: ! 1453: /* This is how to output an element of a case-vector that is absolute. ! 1454: (The Gmicro does not use such vectors, ! 1455: but we must define this macro anyway.) */ ! 1456: ! 1457: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ ! 1458: fprintf (FILE, "\t.data.w L%d\n", VALUE) ! 1459: ! 1460: ! 1461: /* This is how to output an element of a case-vector that is relative. */ ! 1462: ! 1463: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ ! 1464: fprintf (FILE, "\t.data.w L%d-L%d\n", VALUE, REL) ! 1465: ! 1466: ! 1467: /* This is how to output an assembler line ! 1468: that says to advance the location counter ! 1469: to a multiple of 2**LOG bytes. */ ! 1470: ! 1471: #define ASM_OUTPUT_ALIGN(FILE,LOG) \ ! 1472: fprintf (FILE, "\t.align %d\n", (1 << (LOG))); ! 1473: ! 1474: #define ASM_OUTPUT_SKIP(FILE,SIZE) \ ! 1475: fprintf (FILE, "\t.res.b %d\n", (SIZE)) ! 1476: ! 1477: /* This says how to output an assembler line ! 1478: to define a global common symbol. */ ! 1479: ! 1480: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ ! 1481: ( bss_section (), \ ! 1482: assemble_name ((FILE), (NAME)), \ ! 1483: fprintf ((FILE), ":\t.res.b %d\n", (ROUNDED)),\ ! 1484: fprintf ((FILE), "\t.export "), \ ! 1485: assemble_name ((FILE), (NAME)), \ ! 1486: fprintf ((FILE), "\n") ) ! 1487: ! 1488: /* This says how to output an assembler line ! 1489: to define a local common symbol. */ ! 1490: ! 1491: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ ! 1492: ( bss_section (), \ ! 1493: assemble_name ((FILE), (NAME)), \ ! 1494: fprintf ((FILE), ":\t.res.b %d\n", (ROUNDED))) ! 1495: ! 1496: /* Store in OUTPUT a string (made with alloca) containing ! 1497: an assembler-name for a local static variable named NAME. ! 1498: LABELNO is an integer which is different for each call. */ ! 1499: ! 1500: /* $__ is unique ????? M.Yuhara */ ! 1501: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ ! 1502: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ ! 1503: sprintf ((OUTPUT), "$__%s%d", (NAME), (LABELNO))) ! 1504: ! 1505: /* Define the parentheses used to group arithmetic operations ! 1506: in assembler code. */ ! 1507: ! 1508: #define ASM_OPEN_PAREN "(" ! 1509: #define ASM_CLOSE_PAREN ")" ! 1510: ! 1511: /* Define results of standard character escape sequences. */ ! 1512: #define TARGET_BELL 007 ! 1513: #define TARGET_BS 010 ! 1514: #define TARGET_TAB 011 ! 1515: #define TARGET_NEWLINE 012 ! 1516: #define TARGET_VT 013 ! 1517: #define TARGET_FF 014 ! 1518: #define TARGET_CR 015 ! 1519: ! 1520: /* Output a float value (represented as a C double) as an immediate operand. ! 1521: This macro is a Gmicro/68k-specific macro. */ ! 1522: ! 1523: #define ASM_OUTPUT_FLOAT_OPERAND(FILE,VALUE) \ ! 1524: do { union { float f; long l;} tem; \ ! 1525: tem.f = (VALUE); \ ! 1526: fprintf (FILE, "#h'%x.s", tem.l); \ ! 1527: } while(0) ! 1528: ! 1529: ! 1530: /* Output a double value (represented as a C double) as an immediate operand. ! 1531: This macro is a 68k-specific macro. */ ! 1532: #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \ ! 1533: do { union { double d; long l[2];} tem; \ ! 1534: tem.d = (VALUE); \ ! 1535: fprintf (FILE, "#h'%x%08x.d", tem.l[0], tem.l[1]); \ ! 1536: } while(0) ! 1537: ! 1538: /* Print operand X (an rtx) in assembler syntax to file FILE. ! 1539: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. ! 1540: For `%' followed by punctuation, CODE is the punctuation and X is null. ! 1541: ! 1542: On the Gmicro, we use several CODE characters: ! 1543: 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex) ! 1544: 'b' for branch target label. ! 1545: '-' for an operand pushing on the stack. ! 1546: '+' for an operand pushing on the stack. ! 1547: '#' for an immediate operand prefix ! 1548: */ ! 1549: ! 1550: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ ! 1551: ( (CODE) == '#' || (CODE) == '-' \ ! 1552: || (CODE) == '+' || (CODE) == '@' || (CODE) == '!') ! 1553: ! 1554: ! 1555: #define PRINT_OPERAND(FILE, X, CODE) \ ! 1556: { int i; \ ! 1557: static char *reg_name[] = REGISTER_NAMES; \ ! 1558: /* fprintf (stderr, "PRINT_OPERAND CODE=%c(0x%x), ", CODE, CODE);\ ! 1559: myprcode(GET_CODE(X)); */ \ ! 1560: if (CODE == '#') fprintf (FILE, "#"); \ ! 1561: else if (CODE == '-') fprintf (FILE, "@-sp"); \ ! 1562: else if (CODE == '+') fprintf (FILE, "@sp+"); \ ! 1563: else if (CODE == 's') fprintf (stderr, "err: PRINT_OPERAND <s>\n"); \ ! 1564: else if (CODE == '!') fprintf (stderr, "err: PRINT_OPERAND <!>\n"); \ ! 1565: else if (CODE == '.') fprintf (stderr, "err: PRINT_OPERAND <.>\n"); \ ! 1566: else if (CODE == 'b') { \ ! 1567: if (GET_CODE (X) == MEM) \ ! 1568: output_addr_const (FILE, XEXP (X, 0)); /* for bsr */ \ ! 1569: else \ ! 1570: output_addr_const (FILE, X); /* for bcc */ \ ! 1571: } \ ! 1572: else if (CODE == 'p') \ ! 1573: print_operand_address (FILE, X); \ ! 1574: else if (GET_CODE (X) == REG) \ ! 1575: fprintf (FILE, "%s", reg_name[REGNO (X)]); \ ! 1576: else if (GET_CODE (X) == MEM) \ ! 1577: output_address (XEXP (X, 0)); \ ! 1578: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \ ! 1579: { union { double d; int i[2]; } u; \ ! 1580: union { float f; int i; } u1; \ ! 1581: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \ ! 1582: u1.f = u.d; \ ! 1583: if (CODE == 'f') \ ! 1584: ASM_OUTPUT_FLOAT_OPERAND (FILE, u1.f); \ ! 1585: else \ ! 1586: fprintf (FILE, "#h'%x", u1.i); } \ ! 1587: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode) \ ! 1588: { union { double d; int i[2]; } u; \ ! 1589: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \ ! 1590: ASM_OUTPUT_DOUBLE_OPERAND (FILE, u.d); } \ ! 1591: else { putc ('#', FILE); \ ! 1592: output_addr_const (FILE, X); }} ! 1593: ! 1594: /* Note that this contains a kludge that knows that the only reason ! 1595: we have an address (plus (label_ref...) (reg...)) ! 1596: is in the insn before a tablejump, and we know that m68k.md ! 1597: generates a label LInnn: on such an insn. */ ! 1598: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ ! 1599: { print_operand_address (FILE, ADDR); } ! 1600: ! 1601: /* ! 1602: Local variables: ! 1603: version-control: t ! 1604: End: ! 1605: */
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