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1.1 root 1: /* Definitions of target machine for GNU compiler.
2: Hitachi H8/300 version generating coff
3: Copyright (C) 1992, 1993 Free Software Foundation, Inc.
4: Contributed by Steve Chamberlain ([email protected])
5:
6: This file is part of GNU CC.
7:
8: GNU CC is free software; you can redistribute it and/or modify
9: it under the terms of the GNU General Public License as published by
10: the Free Software Foundation; either version 2, or (at your option)
11: any later version.
12:
13: GNU CC is distributed in the hope that it will be useful,
14: but WITHOUT ANY WARRANTY; without even the implied warranty of
15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16: GNU General Public License for more details.
17:
18: You should have received a copy of the GNU General Public License
19: along with GNU CC; see the file COPYING. If not, write to
20: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21:
22: /* Names to predefine in the preprocessor for this target machine. */
23:
24: #define CPP_PREDEFINES "-D__H8300__ -D_DOUBLE_IS_32BITS -Acpu(h8300) -Amachine(h8300)"
25:
26: #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} "
27:
28: /* Print subsidiary information on the compiler version in use. */
29: #define TARGET_VERSION fprintf (stderr, " (Hitachi H8/300)");
30:
31: /* Run-time compilation parameters selecting different hardware subsets. */
32: int target_flags;
33:
34: /* Macros used in the machine description to test the flags. */
35:
36: /* Macro to define tables used to set the flags.
37: This is a list in braces of pairs in braces,
38: each pair being { "NAME", VALUE }
39: where VALUE is the bits to set or minus the bits to clear.
40: An empty string NAME is used to identify the default VALUE. */
41:
42: #define TARGET_SWITCHES \
43: { {"int32",8}, \
44: {"long16",16}, \
45: {"double64",32}, \
46: {"addresses",64 }, \
47: {"quickcall",128}, \
48: {"slowbyte",256}, \
49: {"noquick",512}, \
50: {"relax",1024}, \
51: { "", TARGET_DEFAULT}}
52:
53: #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
54: { \
55: obey_regdecls = 0; \
56: flag_omit_frame_pointer = (OPTIMIZE > 1); \
57: }
58:
59: #define OVERRIDE_OPTIONS \
60: { \
61: flag_no_function_cse = 1; \
62: }
63:
64: #define TARGET_INT32 (target_flags & 8)
65: #define TARGET_LONG16 (target_flags & 16)
66: #define TARGET_DOUBLE32 (!(target_flags & 32))
67: #define TARGET_ADDRESSES (target_flags & 64)
68: #define TARGET_QUICKCALL (target_flags & 128)
69: #define TARGET_SLOWBYTE (target_flags & 256)
70: #define TARGET_NOQUICK (target_flags & 512)
71:
72: /* Default target_flags if no switches specified. */
73: #ifndef TARGET_DEFAULT
74: #define TARGET_DEFAULT 0
75: #endif
76:
77: #define TARGET_NO_IMPORT (target_flags & MASK_NO_IMPORT)
78:
79: /* Target machine storage layout. */
80:
81: /* Define this if most significant bit is lowest numbered
82: in instructions that operate on numbered bit-fields.
83: This is not true on the H8/300. */
84: #define BITS_BIG_ENDIAN 0
85:
86: /* Define this if most significant byte of a word is the lowest numbered. */
87: /* That is true on the H8/300. */
88: #define BYTES_BIG_ENDIAN 1
89:
90: /* Define this if most significant word of a multiword number is lowest
91: numbered.
92:
93: This is true on an H8/300 (actually we can make it up, but we choose to
94: be consistent. */
95: #define WORDS_BIG_ENDIAN 1
96:
97: /* Number of bits in an addressable storage unit */
98: #define BITS_PER_UNIT 8
99:
100: #define UNITS_PER_PTR 2
101:
102: /* Width in bits of a "word", which is the contents of a machine register.
103: Note that this is not necessarily the width of data type `int';
104: if using 16-bit ints on a 68000, this would still be 32.
105: But on a machine with 16-bit registers, this would be 16. */
106: #define BITS_PER_WORD 16
107: #define MAX_BITS_PER_WORD 16
108:
109: /* Width of a word, in units (bytes). */
110: #define UNITS_PER_WORD 2
111:
112: /* Width in bits of a pointer.
113: See also the macro `Pmode' defined below. */
114: #define POINTER_SIZE 16
115:
116: #define SHORT_TYPE_SIZE 16
117: #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
118: #define LONG_TYPE_SIZE 32
119: #define LONG_LONG_TYPE_SIZE 32
120: #define DOUBLE_TYPE_SIZE (TARGET_DOUBLE32 ? 32 : 64)
121: #define FLOAT_TYPE_SIZE 32
122: #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
123:
124: #define MAX_FIXED_MODE_SIZE 32
125:
126: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
127: #define PARM_BOUNDARY 16
128:
129: /* Allocation boundary (in *bits*) for the code of a function. */
130: #define FUNCTION_BOUNDARY 16
131:
132: /* Alignment of field after `int : 0' in a structure. */
133: #define EMPTY_FIELD_BOUNDARY (16)
134:
135: /* Every structure's size must be a multiple of this. */
136: #define STRUCTURE_SIZE_BOUNDARY 16
137:
138: /* A bitfield declared as `int' forces `int' alignment for the struct. */
139: #define PCC_BITFIELD_TYPE_MATTERS 0
140:
141: /* No data type wants to be aligned rounder than this. */
142: #define BIGGEST_ALIGNMENT 16
143:
144: /* No structure field wants to be aligned rounder than this. */
145: #define BIGGEST_FIELD_ALIGNMENT 16
146:
147: /* The stack goes in 16 bit lumps. */
148: #define STACK_BOUNDARY 16
149:
150: /* Define this if move instructions will actually fail to work
151: when given unaligned data. */
152: #define STRICT_ALIGNMENT 1
153:
154: /* Standard register usage. */
155:
156: /* Number of actual hardware registers.
157: The hardware registers are assigned numbers for the compiler
158: from 0 to just below FIRST_PSEUDO_REGISTER.
159:
160: All registers that the compiler knows about must be given numbers,
161: even those that are not normally considered general registers.
162:
163: Reg 8 does not correspond to any hardware register, but instead
164: appears in the RTL as an argument pointer prior to reload, and is
165: eliminated during reloading in favor of either the stack or frame
166: pointer. */
167: #define FIRST_PSEUDO_REGISTER 9
168:
169: /* 1 for registers that have pervasive standard uses
170: and are not available for the register allocator.
171:
172: r7 is the stack pointer, r8 is the arg pointer. */
173: #define FIXED_REGISTERS \
174: { 0,0,0,0, 0,0,0,1, 1 }
175:
176: /* 1 for registers not available across function calls.
177: These must include the FIXED_REGISTERS and also any
178: registers that can be used without being saved.
179: The latter must include the registers where values are returned
180: and the register where structure-value addresses are passed.
181: Aside from that, you can include as many other registers as you
182: like.
183:
184: The H8/300 destroys r0, r1, r4 and r5. */
185:
186: #define CALL_USED_REGISTERS \
187: {1,1,0,0, 1,1,0,1, 1 }
188:
189: /* This is the order in which to allocate registers
190: normally. */
191: #define REG_ALLOC_ORDER { 0, 1, 4, 5, 2, 3, 6, 7, 8 }
192:
193: /* Return number of consecutive hard regs needed starting at reg REGNO
194: to hold something of mode MODE.
195:
196: This is ordinarily the length in words of a value of mode MODE
197: but can be less for certain modes in special long registers. */
198: #define HARD_REGNO_NREGS(REGNO, MODE) \
199: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
200:
201: /* Value is 1 if hard register REGNO can hold a value of machine-mode
202: MODE.
203:
204: If an even reg, then anything goes. Otherwise the mode must be QI
205: or HI. */
206: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
207: ((((REGNO) & 1) == 0) || (MODE == HImode) || (MODE == QImode))
208:
209: /* Value is 1 if it is a good idea to tie two pseudo registers
210: when one has mode MODE1 and one has mode MODE2.
211: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
212: for any hard reg, then this must be 0 for correct output. */
213: #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
214:
215: /* Specify the registers used for certain standard purposes.
216: The values of these macros are register numbers. */
217:
218: /* H8/300 pc is not overloaded on a register. */
219: /*#define PC_REGNUM 15*/
220:
221: /* Register to use for pushing function arguments. */
222: #define STACK_POINTER_REGNUM 7
223:
224: /* Base register for access to local variables of the function. */
225: #define FRAME_POINTER_REGNUM 6
226:
227: /* Value should be nonzero if functions must have frame pointers.
228: Zero means the frame pointer need not be set up (and parms
229: may be accessed via the stack pointer) in functions that seem suitable.
230: This is computed in `reload', in reload1.c. */
231: #define FRAME_POINTER_REQUIRED 0
232:
233: /* Base register for access to arguments of the function. */
234: #define ARG_POINTER_REGNUM 8
235:
236: /* Register in which static-chain is passed to a function. */
237: #define STATIC_CHAIN_REGNUM 0
238:
239: /* Define the classes of registers for register constraints in the
240: machine description. Also define ranges of constants.
241:
242: One of the classes must always be named ALL_REGS and include all hard regs.
243: If there is more than one class, another class must be named NO_REGS
244: and contain no registers.
245:
246: The name GENERAL_REGS must be the name of a class (or an alias for
247: another name such as ALL_REGS). This is the class of registers
248: that is allowed by "g" or "r" in a register constraint.
249: Also, registers outside this class are allocated only when
250: instructions express preferences for them.
251:
252: The classes must be numbered in nondecreasing order; that is,
253: a larger-numbered class must never be contained completely
254: in a smaller-numbered class.
255:
256: For any two classes, it is very desirable that there be another
257: class that represents their union. */
258:
259: /* The H8/300 has only one kind of register, but we mustn't do byte by
260: byte operations on the sp, so we keep it as a different class. */
261:
262: enum reg_class { NO_REGS, LONG_REGS, GENERAL_REGS, SP_REG, ALL_REGS, LIM_REG_CLASSES };
263:
264: #define N_REG_CLASSES (int) LIM_REG_CLASSES
265:
266: /* Give names of register classes as strings for dump file. */
267:
268: #define REG_CLASS_NAMES \
269: {"NO_REGS", "LONG_REGS", "GENERAL_REGS", "SP_REG", "ALL_REGS", "LIM_REGS"}
270:
271: /* Define which registers fit in which classes.
272: This is an initializer for a vector of HARD_REG_SET
273: of length N_REG_CLASSES. */
274:
275: #define REG_CLASS_CONTENTS \
276: { 0, /* No regs */ \
277: 0x7f, /* LONG_REGS */ \
278: 0x7f, /* GENERAL_REGS */ \
279: 0x80, /* SP_REG */ \
280: 0xff, /* ALL_REGS */ \
281: }
282:
283: /* The same information, inverted:
284: Return the class number of the smallest class containing
285: reg number REGNO. This could be a conditional expression
286: or could index an array. */
287:
288: #define REGNO_REG_CLASS(REGNO) \
289: ((REGNO) >= STACK_POINTER_REGNUM \
290: ? ((REGNO) >= FRAME_POINTER_REGNUM \
291: ? SP_REG \
292: : GENERAL_REGS) \
293: : LONG_REGS)
294:
295: /* The class value for index registers, and the one for base regs. */
296:
297: #define INDEX_REG_CLASS NO_REGS
298: #define BASE_REG_CLASS GENERAL_REGS
299:
300: /* Get reg_class from a letter such as appears in the machine description. */
301:
302: #define REG_CLASS_FROM_LETTER(C) \
303: ((C) == 'a' ? SP_REG : (((C) == 'l') ? LONG_REGS : NO_REGS))
304:
305: /* The letters I, J, K, L, M, N, O, P in a register constraint string
306: can be used to stand for particular ranges of immediate operands.
307: This macro defines what the ranges are.
308: C is the letter, and VALUE is a constant value.
309: Return 1 if VALUE is in the range specified by C. */
310:
311: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
312: ((C) == 'I' ? (VALUE) == 0 : \
313: (C) == 'J' ? (((VALUE) & 0xff00) == 0) : \
314: (C) == 'K' ? ((VALUE) == 1 || (VALUE) == 2) : \
315: (C) == 'L' ? ((VALUE) == -1 || (VALUE) == -2) : \
316: (C) == 'M' ? ((VALUE) == 3 || (VALUE) == 4) : \
317: (C) == 'N' ? ((VALUE) == -3 || (VALUE) == -4) : \
318: (C) == 'O' ? (potg8 (VALUE)) : \
319: (C) == 'P' ? (potl8 (VALUE)) : \
320: 0)
321:
322: /* Similar, but for floating constants, and defining letters G and H.
323: Here VALUE is the CONST_DOUBLE rtx itself.
324:
325: `G' is a floating-point zero. */
326:
327: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
328: ((C) == 'G' ? ((VALUE) == CONST0_RTX (DFmode) \
329: || (VALUE) == CONST0_RTX (DFmode)) \
330: : 0)
331:
332: /* Extra constraints - 'U' if for an operand valid for a bset
333: destination; i.e. a register or register indirect target. */
334: #define EXTRA_CONSTRAINT(OP, C) \
335: (((C) == 'U') \
336: ? ((GET_CODE (OP) == REG) \
337: || ((GET_CODE (OP) == MEM) \
338: && GET_CODE (XEXP (OP, 0)) == REG)) \
339: : 0)
340:
341: /* Given an rtx X being reloaded into a reg required to be
342: in class CLASS, return the class of reg to actually use.
343: In general this is just CLASS; but on some machines
344: in some cases it is preferable to use a more restrictive class. */
345: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
346:
347: /* Return the maximum number of consecutive registers
348: needed to represent mode MODE in a register of class CLASS. */
349:
350: /* On the H8, this is the size of MODE in words,
351: except in the FP regs, where a single reg is always enough. */
352: #define CLASS_MAX_NREGS(CLASS, MODE) \
353: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
354:
355: /* Any SI register to register move may need to be reloaded,
356: so define REGISTER_MOVE_COST to be > 2 so that reload never
357: shortcuts. */
358: #define REGISTER_MOVE_COST(CLASS1, CLASS2) 3
359:
360: /* Stack layout; function entry, exit and calling. */
361:
362: /* Define this if pushing a word on the stack
363: makes the stack pointer a smaller address. */
364: #define STACK_GROWS_DOWNWARD
365:
366: /* Define this if the nominal address of the stack frame
367: is at the high-address end of the local variables;
368: that is, each additional local variable allocated
369: goes at a more negative offset in the frame. */
370: #define FRAME_GROWS_DOWNWARD
371:
372: /* Offset within stack frame to start allocating local variables at.
373: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
374: first local allocated. Otherwise, it is the offset to the BEGINNING
375: of the first local allocated. */
376: #define STARTING_FRAME_OFFSET 0
377:
378: /* If we generate an insn to push BYTES bytes,
379: this says how many the stack pointer really advances by.
380:
381: On the H8/300, @-sp really pushes a byte if you ask it to - but that's
382: dangerous, so we claim that it always pushes a word, then we catch
383: the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output. */
384: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
385:
386: /* Offset of first parameter from the argument pointer register value. */
387:
388: /* Is equal to the size of the saved fp + pc, even if an fp isn't
389: saved since the value is used before we know. */
390: #define FIRST_PARM_OFFSET(FNDECL) 0
391:
392: /* Value is the number of bytes of arguments automatically
393: popped when returning from a subroutine call.
394: FUNTYPE is the data type of the function (as a tree),
395: or for a library call it is an identifier node for the subroutine name.
396: SIZE is the number of bytes of arguments passed on the stack.
397:
398: On the H8/300 the return does not pop anything. */
399: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
400:
401: /* Definitions for register eliminations.
402:
403: This is an array of structures. Each structure initializes one pair
404: of eliminable registers. The "from" register number is given first,
405: followed by "to". Eliminations of the same "from" register are listed
406: in order of preference.
407:
408: We have two registers that can be eliminated on the i386. First, the
409: frame pointer register can often be eliminated in favor of the stack
410: pointer register. Secondly, the argument pointer register can always be
411: eliminated; it is replaced with either the stack or frame pointer. */
412: #define ELIMINABLE_REGS \
413: {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
414: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
415: { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
416:
417: #define CAN_ELIMINATE(FROM, TO) \
418: ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
419: ? ! frame_pointer_needed \
420: : 1)
421:
422: /* Define the offset between two registers, one to be eliminated, and the other
423: its replacement, at the start of a routine. */
424: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) OFFSET = io (FROM,TO)
425:
426: /* Define how to find the value returned by a function.
427: VALTYPE is the data type of the value (as a tree).
428: If the precise function being called is known, FUNC is its FUNCTION_DECL;
429: otherwise, FUNC is 0.
430:
431: On the H8/300 the return value is in R0/R1. */
432: #define FUNCTION_VALUE(VALTYPE, FUNC) \
433: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
434:
435: /* Define how to find the value returned by a library function
436: assuming the value has mode MODE. */
437:
438: /* On the H8/300 the return value is in R0/R1. */
439: #define LIBCALL_VALUE(MODE) \
440: gen_rtx (REG, MODE, 0)
441:
442: /* 1 if N is a possible register number for a function value.
443: On the H8/300, R0 is the only register thus used. */
444: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
445:
446: /* Define this if PCC uses the nonreentrant convention for returning
447: structure and union values. */
448: #define PCC_STATIC_STRUCT_RETURN
449:
450: /* 1 if N is a possible register number for function argument passing.
451: On the H8/300, no registers are used in this way. */
452: #define FUNCTION_ARG_REGNO_P(N) 0
453:
454: /* Register in which address to store a structure value
455: is passed to a function. */
456: #define STRUCT_VALUE 0
457: #define STRUCT_VALUE_REGNUM 0
458: #define STRUCT_VALUE_INCOMING 0
459:
460: /* Return true if X should be returned in memory. */
461: #define RETURN_IN_MEMORY(X) \
462: (TYPE_MODE (X) == BLKmode || GET_MODE_SIZE (TYPE_MODE (X)) > 4)
463:
464: /* Don't default to pcc-struct-return, because we have already specified
465: exactly how to return structures in the RETURN_IN_MEMORY macro. */
466: #define DEFAULT_PCC_STRUCT_RETURN 0
467:
468: /* When defined, the compiler allows registers explicitly used in the
469: rtl to be used as spill registers but prevents the compiler from
470: extending the lifetime of these registers. */
471: #define SMALL_REGISTER_CLASSES
472:
473: /* Define a data type for recording info about an argument list
474: during the scan of that argument list. This data type should
475: Hold all necessary information about the function itself
476: and about the args processed so far, enough to enable macros
477: such as FUNCTION_ARG to determine where the next arg should go.
478:
479: On the H8/300, this is a two item struct, the first is the number of bytes
480: scanned so far, the second the name of any libcall. */
481:
482: #define CUMULATIVE_ARGS struct cum_arg
483: struct cum_arg { int nbytes; struct rtx_def* libcall; };
484:
485: /* Initialize a variable CUM of type CUMULATIVE_ARGS
486: for a call to a function whose data type is FNTYPE.
487: For a library call, FNTYPE is 0.
488:
489: On the H8/300, the offset starts at 0. */
490: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
491: ((CUM).nbytes = 0, (CUM).libcall = LIBNAME)
492:
493: /* Update the data in CUM to advance over an argument
494: of mode MODE and data type TYPE.
495:
496: All sizes rounded up to even bytes. */
497:
498: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
499: ((CUM).nbytes += ((MODE) != BLKmode \
500: ? (GET_MODE_SIZE (MODE) + 1) & ~1 \
501: : (int_size_in_bytes (TYPE) + 1) & ~1))
502:
503: /* Define where to put the arguments to a function.
504: Value is zero to push the argument on the stack,
505: or a hard register in which to store the argument.
506:
507: MODE is the argument's machine mode.
508: TYPE is the data type of the argument (as a tree).
509: This is null for libcalls where that information may
510: not be available.
511: CUM is a variable of type CUMULATIVE_ARGS which gives info about
512: the preceding args and about the function being called.
513: NAMED is nonzero if this argument is a named parameter
514: (otherwise it is an extra parameter matching an ellipsis). */
515:
516: /* On the H8/300 all normal args are pushed, we pass args to named
517: functions in registers. */
518:
519: extern struct rtx_def *function_arg();
520: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
521: function_arg (&CUM, MODE, TYPE, NAMED)
522:
523: /* This macro generates the assembly code for function entry.
524: FILE is a stdio stream to output the code to.
525: SIZE is an int: how many units of temporary storage to allocate.
526: Refer to the array `regs_ever_live' to determine which registers
527: to save; `regs_ever_live[I]' is nonzero if register number I
528: is ever used in the function. This macro is responsible for
529: knowing which registers should not be saved even if used. */
530:
531: #define FUNCTION_PROLOGUE(FILE, SIZE) \
532: function_prologue (FILE, SIZE)
533:
534: /* Output assembler code to FILE to increment profiler label # LABELNO
535: for profiling a function entry. */
536:
537: #define FUNCTION_PROFILER(FILE, LABELNO) \
538: fprintf (FILE, "\t; not implemented\n", (LABELNO));
539:
540: /* Output assembler code to FILE to initialize this source file's
541: basic block profiling info, if that has not already been done. */
542:
543: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
544: fprintf (FILE, "\t; not implemented \n", LABELNO, LABELNO);
545:
546: /* Output assembler code to FILE to increment the entry-count for
547: the BLOCKNO'th basic block in this source file. */
548:
549: #define BLOCK_PROFILER(FILE, BLOCKNO) \
550: fprintf (FILE, "\t; not implemented\n");
551:
552: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
553: the stack pointer does not matter. The value is tested only in
554: functions that have frame pointers.
555: No definition is equivalent to always zero. */
556:
557: #define EXIT_IGNORE_STACK 0
558:
559: /* This macro generates the assembly code for function exit,
560: on machines that need it. If FUNCTION_EPILOGUE is not defined
561: then individual return instructions are generated for each
562: return statement. Args are same as for FUNCTION_PROLOGUE. */
563:
564: #define FUNCTION_EPILOGUE(FILE, SIZE) \
565: function_epilogue (FILE, SIZE)
566:
567: /* Output assembler code for a block containing the constant parts
568: of a trampoline, leaving space for the variable parts. */
569:
570: #define TRAMPOLINE_TEMPLATE(FILE) \
571: fprintf (FILE, " trampolines not implemented\n");
572:
573: /* Length in units of the trampoline for entering a nested function. */
574:
575: #define TRAMPOLINE_SIZE 15
576:
577: /* Emit RTL insns to initialize the variable parts of a trampoline.
578: FNADDR is an RTX for the address of the function's pure code.
579: CXT is an RTX for the static chain value for the function. */
580:
581: /* We copy the register-mask from the function's pure code
582: to the start of the trampoline. */
583: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
584: { \
585: emit_move_insn (gen_rtx (MEM, HImode, TRAMP), \
586: gen_rtx (MEM, HImode, FNADDR)); \
587: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), CXT);\
588: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 11)), \
589: plus_constant (FNADDR, 2)); \
590: }
591:
592: /* Addressing modes, and classification of registers for them.
593: Although the H8/300 has pre decrement destinations and post
594: increment sources on moves, they are not general enough to be much
595: use to gcc */
596:
597: /*#define HAVE_POST_INCREMENT*/
598: /*#define HAVE_POST_DECREMENT */
599:
600: /*#define HAVE_PRE_DECREMENT*/
601: /*#define HAVE_PRE_INCREMENT */
602:
603: /* Macros to check register numbers against specific register classes. */
604:
605: /* These assume that REGNO is a hard or pseudo reg number.
606: They give nonzero only if REGNO is a hard reg of the suitable class
607: or a pseudo reg currently allocated to a suitable hard reg.
608: Since they use reg_renumber, they are safe only once reg_renumber
609: has been allocated, which happens in local-alloc.c. */
610:
611: #define REGNO_OK_FOR_INDEX_P(regno) 0
612:
613: #define REGNO_OK_FOR_BASE_P(regno) \
614: ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
615:
616: /* Maximum number of registers that can appear in a valid memory address. */
617:
618: #define MAX_REGS_PER_ADDRESS 1
619:
620: /* 1 if X is an rtx for a constant that is a valid address. */
621:
622: #define CONSTANT_ADDRESS_P(X) \
623: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
624: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
625: || GET_CODE (X) == HIGH)
626:
627: /* Nonzero if the constant value X is a legitimate general operand.
628: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
629:
630: #define LEGITIMATE_CONSTANT_P(X) (GET_CODE (X) != CONST_DOUBLE)
631:
632: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
633: and check its validity for a certain class.
634: We have two alternate definitions for each of them.
635: The usual definition accepts all pseudo regs; the other rejects
636: them unless they have been allocated suitable hard regs.
637: The symbol REG_OK_STRICT causes the latter definition to be used.
638:
639: Most source files want to accept pseudo regs in the hope that
640: they will get allocated to the class that the insn wants them to be in.
641: Source files for reload pass need to be strict.
642: After reload, it makes no difference, since pseudo regs have
643: been eliminated by then. */
644:
645: #ifndef REG_OK_STRICT
646:
647: /* Nonzero if X is a hard reg that can be used as an index
648: or if it is a pseudo reg. */
649: #define REG_OK_FOR_INDEX_P(X) 0
650: /* Nonzero if X is a hard reg that can be used as a base reg
651: or if it is a pseudo reg. */
652: #define REG_OK_FOR_BASE_P(X) 1
653:
654: #define REG_OK_FOR_INDEX_P_STRICT(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
655: #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))
656:
657: #else
658:
659: /* Nonzero if X is a hard reg that can be used as an index. */
660: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
661: /* Nonzero if X is a hard reg that can be used as a base reg. */
662: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
663:
664: #endif
665:
666: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
667: that is a valid memory address for an instruction.
668: The MODE argument is the machine mode for the MEM expression
669: that wants to use this address.
670:
671: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
672: except for CONSTANT_ADDRESS_P which is actually
673: machine-independent.
674:
675:
676: On the H8/300, a legitimate address has the form
677: REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */
678:
679: /* Accept either REG or SUBREG where a register is valid. */
680:
681: #define RTX_OK_FOR_BASE_P(X) \
682: ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
683: || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
684: && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
685:
686: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
687: if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \
688: if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
689: if (GET_CODE (X) == PLUS \
690: && CONSTANT_ADDRESS_P (XEXP (X, 1)) \
691: && RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR;
692:
693: /* Try machine-dependent ways of modifying an illegitimate address
694: to be legitimate. If we find one, return the new, valid address.
695: This macro is used in only one place: `memory_address' in explow.c.
696:
697: OLDX is the address as it was before break_out_memory_refs was called.
698: In some cases it is useful to look at this to decide what needs to be done.
699:
700: MODE and WIN are passed so that this macro can use
701: GO_IF_LEGITIMATE_ADDRESS.
702:
703: It is always safe for this macro to do nothing. It exists to recognize
704: opportunities to optimize the output.
705:
706: For the H8/300, don't do anything. */
707:
708: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
709:
710: /* Go to LABEL if ADDR (a legitimate address expression)
711: has an effect that depends on the machine mode it is used for.
712:
713: On the H8/300, the predecrement and postincrement address depend thus
714: (the amount of decrement or increment being the length of the operand)
715: and all indexed address depend thus (because the index scale factor
716: is the length of the operand). */
717:
718: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
719: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL;
720:
721: /* Specify the machine mode that this machine uses
722: for the index in the tablejump instruction. */
723: #define CASE_VECTOR_MODE HImode
724:
725: /* Define this if the case instruction expects the table
726: to contain offsets from the address of the table.
727: Do not define this if the table should contain absolute addresses. */
728: /*#define CASE_VECTOR_PC_RELATIVE*/
729:
730: /* Define this if the case instruction drops through after the table
731: when the index is out of range. Don't define it if the case insn
732: jumps to the default label instead. */
733: #define CASE_DROPS_THROUGH
734:
735: /* Specify the tree operation to be used to convert reals to integers. */
736: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
737:
738: /* This is the kind of divide that is easiest to do in the general case. */
739: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
740:
741: /* Define this as 1 if `char' should by default be signed; else as 0.
742:
743: On the H8/300, sign extension is expensive, so we'll say that chars
744: are unsigned. */
745: #define DEFAULT_SIGNED_CHAR 0
746:
747: /* This flag, if defined, says the same insns that convert to a signed fixnum
748: also convert validly to an unsigned one. */
749: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
750:
751: /* Max number of bytes we can move from memory to memory
752: in one reasonably fast instruction. */
753: #define MOVE_MAX 2
754:
755: /* Define this if zero-extension is slow (more than one real instruction). */
756: /* #define SLOW_ZERO_EXTEND */
757:
758: /* Nonzero if access to memory by bytes is slow and undesirable. */
759: #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
760:
761: /* Define if shifts truncate the shift count
762: which implies one can omit a sign-extension or zero-extension
763: of a shift count. */
764: /* #define SHIFT_COUNT_TRUNCATED */
765:
766: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
767: is done just by pretending it is already truncated. */
768: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
769:
770: /* Specify the machine mode that pointers have.
771: After generation of rtl, the compiler makes no further distinction
772: between pointers and any other objects of this machine mode. */
773: #define Pmode HImode
774:
775: #define SIZE_TYPE "unsigned int"
776: #define PTRDIFF_TYPE "int"
777:
778: /* A function address in a call instruction
779: is a byte address (for indexing purposes)
780: so give the MEM rtx a byte's mode. */
781: #define FUNCTION_MODE QImode
782:
783: /* Compute the cost of computing a constant rtl expression RTX
784: whose rtx-code is CODE. The body of this macro is a portion
785: of a switch statement. If the code is computed here,
786: return it with a return statement. Otherwise, break from the switch. */
787:
788: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
789: case CONST_INT: \
790: switch (INTVAL (RTX)) \
791: { \
792: case 0: \
793: case 1: \
794: case 2: \
795: case -1: \
796: case -2: \
797: return 0; \
798: default: \
799: return 1; \
800: } \
801: case CONST: \
802: case LABEL_REF: \
803: case SYMBOL_REF: \
804: return 3; \
805: case CONST_DOUBLE: \
806: return 20;
807:
808: #define BRANCH_COST 2
809:
810: /* Provide the costs of a rtl expression. This is in the body of a
811: switch on CODE. */
812:
813: #define RTX_COSTS(RTX,CODE,OUTER_CODE) \
814: case MOD: \
815: case DIV: \
816: return 60; \
817: case MULT: \
818: return 20; \
819: case LSHIFT: \
820: case ASHIFT: \
821: case ASHIFTRT: \
822: case LSHIFTRT: \
823: case ROTATE: \
824: case ROTATERT: \
825: if (GET_MODE (RTX) == HImode) \
826: return 2; \
827: return 10; \
828:
829: /* Tell final.c how to eliminate redundant test instructions. */
830:
831: /* Store in cc_status the expressions that the condition codes will describe
832: after execution of an instruction whose pattern is EXP. Do not
833: alter them if the instruction would not alter the cc's. */
834:
835: #define NOTICE_UPDATE_CC(EXP, INSN) \
836: switch (get_attr_cc (INSN)) \
837: { \
838: case CC_NONE: \
839: /* Insn does not affect the CC at all. */ \
840: break; \
841: case CC_NONE_0HIT: \
842: /* Insn does not change the CC, but the 0'th operand has been \
843: changed. */ \
844: if (cc_status.value1 != 0 \
845: && reg_overlap_mentioned_p (recog_operand[0], cc_status.value1))\
846: cc_status.value1 = 0; \
847: \
848: if (cc_status.value2 != 0 \
849: && reg_overlap_mentioned_p (recog_operand[0], cc_status.value2))\
850: cc_status.value2 = 0; \
851: break; \
852: case CC_SET: \
853: /* Insn sets CC to recog_operand[0], but overflow is impossible. */\
854: CC_STATUS_INIT; \
855: cc_status.flags |= CC_NO_OVERFLOW; \
856: cc_status.value1 = recog_operand[0]; \
857: break; \
858: case CC_COMPARE: \
859: /* The insn is a compare instruction. */ \
860: CC_STATUS_INIT; \
861: cc_status.value1 = recog_operand[0]; \
862: cc_status.value1 = recog_operand[1]; \
863: break; \
864: case CC_WHOOPS: \
865: case CC_CLOBBER: \
866: /* Insn clobbers CC. */ \
867: CC_STATUS_INIT; \
868: break; \
869: } \
870:
871: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
872: { \
873: if (cc_status.flags & CC_NO_OVERFLOW) \
874: return NO_OV; \
875: return NORMAL; \
876: }
877:
878: /* Control the assembler format that we output. */
879:
880: #define ASM_IDENTIFY_GCC /* nothing */
881:
882: /* Output at beginning of assembler file. */
883: #define ASM_FILE_START(FILE) \
884: { \
885: fprintf (FILE, ";\tGCC For the Hitachi H8/300\n"); \
886: if (optimize) \
887: fprintf (FILE, "; -O%d\n", optimize); \
888: fprintf (FILE, "\n\n"); \
889: output_file_directive (FILE, main_input_filename); \
890: }
891:
892: #define ASM_FILE_END(FILE) \
893: fprintf (FILE, "\t.end\n");
894:
895: /* Output to assembler file text saying following lines
896: may contain character constants, extra white space, comments, etc. */
897:
898: #define ASM_APP_ON "; #APP\n"
899:
900: /* Output to assembler file text saying following lines
901: no longer contain unusual constructs. */
902:
903: #define ASM_APP_OFF "; #NO_APP\n"
904:
905: #define FILE_ASM_OP "\t.file\n"
906: #define IDENT_ASM_OP "\t.ident\n"
907:
908: /* Output before read-only data. */
909:
910: #define TEXT_SECTION_ASM_OP "\t.section .text"
911: #define DATA_SECTION_ASM_OP "\t.section .data"
912: #define BSS_SECTION_ASM_OP "\t.section .bss"
913:
914: #define EXTRA_SECTIONS in_user
915:
916: #define EXTRA_SECTION_FUNCTIONS \
917: void \
918: user_section (name) \
919: char *name; \
920: { \
921: fprintf (asm_out_file, "\t.section\t%s\n", name); \
922: in_section = in_user; \
923: }
924:
925: #define MAX_TEXT_ALIGN 16
926:
927: /* How to refer to registers in assembler output.
928: This sequence is indexed by compiler's hard-register-number (see above). */
929:
930: #define REGISTER_NAMES \
931: { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ap"}
932:
933: /* How to renumber registers for dbx and gdb.
934: H8/300 needs no change in the numeration. */
935:
936: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
937:
938: /* This is how to output the definition of a user-level label named NAME,
939: such as the label on a static function or variable NAME. */
940: #define SDB_DEBUGGING_INFO
941: #define SDB_DELIM "\n"
942:
943: #define ASM_OUTPUT_LABEL(FILE,NAME) \
944: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
945:
946: /*#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) */
947:
948: /* This is how to output a command to make the user-level label named NAME
949: defined for reference from other files. */
950: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
951: do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
952:
953: /*#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
954: ASM_OUTPUT_LABEL(FILE, NAME); */
955:
956: /* This is how to output a reference to a user-level label named NAME. */
957: #define ASM_OUTPUT_LABELREF(FILE, NAME) \
958: asm_output_labelref (FILE, NAME)
959:
960: /* This is how to output an internal numbered label where
961: PREFIX is the class of label and NUM is the number within the class. */
962:
963: #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
964: fprintf (FILE, ".%s%d:\n", PREFIX, NUM)
965:
966: /* This is how to store into the string LABEL
967: the symbol_ref name of an internal numbered label where
968: PREFIX is the class of label and NUM is the number within the class.
969: This is suitable for output with `assemble_name'. */
970:
971: #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
972: sprintf (LABEL, "*.%s%d", PREFIX, NUM)
973:
974: /* This is how to output an assembler line defining a `double' constant.
975: It is .dfloat or .gfloat, depending. */
976:
977: /*#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
978: fprintf (FILE, "\t.double %.20e\n", (VALUE))*/
979:
980: /* This is how to output an assembler line defining a `float' constant. */
981: #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
982: fprintf (FILE, "\t.float %.20e\n", \
983: ((VALUE) > 1e30 ? 1e30 \
984: : ((VALUE) < -1e30) ? -1e30 : (double) ((float) VALUE)));
985:
986: /* This is how to output an assembler line defining an `int' constant. */
987: #define ASM_OUTPUT_INT(FILE, VALUE) \
988: ( fprintf (FILE, "\t.long "), \
989: output_addr_const (FILE, (VALUE)), \
990: fprintf (FILE, "\n"))
991:
992: /* Likewise for `char' and `short' constants. */
993: #define ASM_OUTPUT_CHAR(FILE, VALUE) \
994: ( fprintf (FILE, "\t.byte "), \
995: output_addr_const (FILE, (VALUE)), \
996: fprintf (FILE, "\n"))
997:
998: #define ASM_OUTPUT_SHORT(FILE, VALUE) \
999: ( fprintf (FILE, "\t.word "), \
1000: output_addr_const (FILE, (VALUE)), \
1001: fprintf (FILE, "\n"))
1002:
1003: /* This is how to output an assembler line for a numeric constant byte. */
1004: #define ASM_OUTPUT_BYTE(FILE, VALUE) \
1005: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1006:
1007: /* This is how to output an insn to push a register on the stack.
1008: It need not be very fast code. */
1009: #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1010: fprintf (FILE, "\tpush %s\n", reg_names[REGNO])
1011:
1012: /* This is how to output an insn to pop a register from the stack.
1013: It need not be very fast code. */
1014: #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1015: fprintf (FILE, "\tpop\t%s\n", reg_names[REGNO])
1016:
1017: /* This is how to output an element of a case-vector that is absolute. */
1018: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1019: asm_fprintf (FILE, "\t.word .L%d\n", VALUE)
1020:
1021: /* This is how to output an element of a case-vector that is relative. */
1022: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1023: fprintf (FILE, "\t.word.w .L%d-.L%d\n", VALUE, REL)
1024:
1025: /* This is how to output an assembler line
1026: that says to advance the location counter
1027: to a multiple of 2**LOG bytes. */
1028: #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1029: if ((LOG) != 0) \
1030: fprintf (FILE, "\t.align %d\n", 1 << (LOG))
1031:
1032: /* This is how to output an assembler line
1033: that says to advance the location counter by SIZE bytes. */
1034: #define ASM_OUTPUT_IDENT(FILE, NAME) \
1035: fprintf (FILE, "%s\t \"%s\"\n", IDENT_ASM_OP, NAME)
1036:
1037: #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1038: fprintf (FILE, "\t.space %d\n", (SIZE))
1039:
1040: /* This says how to output an assembler line
1041: to define a global common symbol. */
1042: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1043: ( fputs ("\t.comm ", (FILE)), \
1044: assemble_name ((FILE), (NAME)), \
1045: fprintf ((FILE), ",%d\n", (SIZE)))
1046:
1047: /* This says how to output an assembler line
1048: to define a local common symbol. */
1049: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1050: ( fputs ("\t.lcomm ", (FILE)), \
1051: assemble_name ((FILE), (NAME)), \
1052: fprintf ((FILE), ",%d\n", (SIZE)))
1053:
1054: /* Store in OUTPUT a string (made with alloca) containing
1055: an assembler-name for a local static variable named NAME.
1056: LABELNO is an integer which is different for each call. */
1057:
1058: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1059: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1060: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1061:
1062: /* Define the parentheses used to group arithmetic operations
1063: in assembler code. */
1064:
1065: #define ASM_OPEN_PAREN "("
1066: #define ASM_CLOSE_PAREN ")"
1067:
1068: /* Define results of standard character escape sequences. */
1069: #define TARGET_BELL 007
1070: #define TARGET_BS 010
1071: #define TARGET_TAB 011
1072: #define TARGET_NEWLINE 012
1073: #define TARGET_VT 013
1074: #define TARGET_FF 014
1075: #define TARGET_CR 015
1076:
1077: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1078: ((CODE) == '#')
1079:
1080: #define PRINT_OPERAND(FILE, X, CODE) \
1081: print_operand (FILE, X, CODE)
1082:
1083: /* Print a memory operand whose address is X, on file FILE.
1084: This uses a function in h8300.c. */
1085:
1086: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1087: print_operand_address (FILE, ADDR)
1088:
1089: #define HANDLE_PRAGMA(FILE) handle_pragma (FILE)
1090:
1091: #define FINAL_PRESCAN_INSN(insn, operand, nop) \
1092: final_prescan_insn (insn, operand, nop)
1093:
1094: /* Define this macro if GNU CC should generate calls to the System V
1095: (and ANSI C) library functions `memcpy' and `memset' rather than
1096: the BSD functions `bcopy' and `bzero'. */
1097: #define TARGET_MEM_FUNCTIONS 1
1098:
1099: /* Define subroutines to call to handle various operations not
1100: supported in the hardware */
1101:
1102: #define DIVHI3_LIBCALL "__divhi3"
1103: #define UDIVHI3_LIBCALL "__udivhi3"
1104: #define MULHI3_LIBCALL "__mulhi3"
1105: #define MODHI3_LIBCALL "__modhi3"
1106: #define UMODHI3_LIBCALL "__umodhi3"
1107: #define ADDSI3_LIBCALL "__addsi3"
1108: #define SUBSI3_LIBCALL "__subsi3"
1109:
1110: #define MOVE_RATIO 3
1111:
1112: #if 0
1113: /* This stuff doesn't work currently. */
1114: #undef SELECT_SECTION
1115: #define SELECT_SECTION(DECL,RELOC) select_section(DECL, RELOC)
1116: #define SELECT_FUNCTION_SECTION(a,b) SELECT_SECTION(a,b)
1117: #endif
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