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1.1 root 1: /* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
2: Copyright (C) 1987, 1988, 1993 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm.h files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24:
25: /* Names to predefine in the preprocessor for this target machine. */
26:
27: /* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES. */
28:
29: /* Print subsidiary information on the compiler version in use. */
30: #ifdef MOTOROLA
31: #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");
32: #else
33: #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");
34: #endif
35:
36: /* Define SUPPORT_SUN_FPA to include support for generating code for
37: the Sun Floating Point Accelerator, an optional product for Sun 3
38: machines. By default, it is not defined. Avoid defining it unless
39: you need to output code for the Sun3+FPA architecture, as it has the
40: effect of slowing down the register set operations in hard-reg-set.h
41: (total number of registers will exceed number of bits in a long,
42: if defined, causing the set operations to expand to loops).
43: SUPPORT_SUN_FPA is typically defined in sun3.h. */
44:
45: /* Run-time compilation parameters selecting different hardware subsets. */
46:
47: extern int target_flags;
48:
49: /* Macros used in the machine description to test the flags. */
50:
51: /* Compile for a 68020 (not a 68000 or 68010). */
52: #define TARGET_68020 (target_flags & 1)
53:
54: /* Compile 68881 insns for floating point (not library calls). */
55: #define TARGET_68881 (target_flags & 2)
56:
57: /* Compile using 68020 bitfield insns. */
58: #define TARGET_BITFIELD (target_flags & 4)
59:
60: /* Compile using rtd insn calling sequence.
61: This will not work unless you use prototypes at least
62: for all functions that can take varying numbers of args. */
63: #define TARGET_RTD (target_flags & 8)
64:
65: /* Compile passing first two args in regs 0 and 1.
66: This exists only to test compiler features that will
67: be needed for RISC chips. It is not usable
68: and is not intended to be usable on this cpu. */
69: #define TARGET_REGPARM (target_flags & 020)
70:
71: /* Compile with 16-bit `int'. */
72: #define TARGET_SHORT (target_flags & 040)
73:
74: /* Compile with special insns for Sun FPA. */
75: #ifdef SUPPORT_SUN_FPA
76: #define TARGET_FPA (target_flags & 0100)
77: #else
78: #define TARGET_FPA 0
79: #endif
80:
81: /* Compile (actually, link) for Sun SKY board. */
82: #define TARGET_SKY (target_flags & 0200)
83:
84: /* Optimize for 68040, but still allow execution on 68020
85: (-m68020-40 or -m68040).
86: The 68040 will execute all 68030 and 68881/2 instructions, but some
87: of them must be emulated in software by the OS. When TARGET_68040 is
88: turned on, these instructions won't be used. This code will still
89: run on a 68030 and 68881/2. */
90: #define TARGET_68040 (target_flags & 01400)
91:
92: /* Use the 68040-only fp instructions (-m68040). */
93: #define TARGET_68040_ONLY (target_flags & 01000)
94:
95: /* Macro to define tables used to set the flags.
96: This is a list in braces of pairs in braces,
97: each pair being { "NAME", VALUE }
98: where VALUE is the bits to set or minus the bits to clear.
99: An empty string NAME is used to identify the default VALUE. */
100:
101: #define TARGET_SWITCHES \
102: { { "68020", -01400}, \
103: { "c68020", -01400}, \
104: { "68020", 5}, \
105: { "c68020", 5}, \
106: { "68881", 2}, \
107: { "bitfield", 4}, \
108: { "68000", -01405}, \
109: { "c68000", -01405}, \
110: { "soft-float", -01102}, \
111: { "nobitfield", -4}, \
112: { "rtd", 8}, \
113: { "nortd", -8}, \
114: { "short", 040}, \
115: { "noshort", -040}, \
116: { "fpa", 0100}, \
117: { "nofpa", -0100}, \
118: { "sky", 0200}, \
119: { "nosky", -0200}, \
120: { "68020-40", 0407}, \
121: { "68030", -01400}, \
122: { "68030", 5}, \
123: { "68040", 01007}, \
124: { "68851", 0}, /* Affects *_SPEC and/or GAS. */ \
125: { "no-68851", 0}, /* Affects *_SPEC and/or GAS. */ \
126: { "68302", 0}, /* Affects *_SPEC and/or GAS. */ \
127: { "no-68302", 0}, /* Affects *_SPEC and/or GAS. */ \
128: { "68332", 0}, /* Affects *_SPEC and/or GAS. */ \
129: { "no-68332", 0}, /* Affects *_SPEC and/or GAS. */ \
130: SUBTARGET_SWITCHES \
131: { "", TARGET_DEFAULT}}
132: /* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */
133:
134: /* This is meant to be redefined in the host dependent files */
135: #define SUBTARGET_SWITCHES
136:
137: #ifdef SUPPORT_SUN_FPA
138: /* Blow away 68881 flag silently on TARGET_FPA (since we can't clear
139: any bits in TARGET_SWITCHES above) */
140: #define OVERRIDE_OPTIONS \
141: { \
142: if (TARGET_FPA) target_flags &= ~2; \
143: if (! TARGET_68020 && flag_pic == 2) \
144: error("-fPIC is not currently supported on the 68000 or 68010\n"); \
145: SUBTARGET_OVERRIDE_OPTIONS \
146: }
147: #else
148: #define OVERRIDE_OPTIONS \
149: { \
150: if (! TARGET_68020 && flag_pic == 2) \
151: error("-fPIC is not currently supported on the 68000 or 68010\n"); \
152: SUBTARGET_OVERRIDE_OPTIONS \
153: }
154: #endif /* defined SUPPORT_SUN_FPA */
155:
156: /* This is meant to be redefined in the host dependent files */
157: #define SUBTARGET_OVERRIDE_OPTIONS
158:
159: /* target machine storage layout */
160:
161: /* Define for XFmode extended real floating point support.
162: This will automatically cause REAL_ARITHMETIC to be defined. */
163: #define LONG_DOUBLE_TYPE_SIZE 96
164:
165: /* Define if you don't want extended real, but do want to use the
166: software floating point emulator for REAL_ARITHMETIC and
167: decimal <-> binary conversion. */
168: /* #define REAL_ARITHMETIC */
169:
170: /* Define this if most significant bit is lowest numbered
171: in instructions that operate on numbered bit-fields.
172: This is true for 68020 insns such as bfins and bfexts.
173: We make it true always by avoiding using the single-bit insns
174: except in special cases with constant bit numbers. */
175: #define BITS_BIG_ENDIAN 1
176:
177: /* Define this if most significant byte of a word is the lowest numbered. */
178: /* That is true on the 68000. */
179: #define BYTES_BIG_ENDIAN 1
180:
181: /* Define this if most significant word of a multiword number is the lowest
182: numbered. */
183: /* For 68000 we can decide arbitrarily
184: since there are no machine instructions for them.
185: So let's be consistent. */
186: #define WORDS_BIG_ENDIAN 1
187:
188: /* number of bits in an addressable storage unit */
189: #define BITS_PER_UNIT 8
190:
191: /* Width in bits of a "word", which is the contents of a machine register.
192: Note that this is not necessarily the width of data type `int';
193: if using 16-bit ints on a 68000, this would still be 32.
194: But on a machine with 16-bit registers, this would be 16. */
195: #define BITS_PER_WORD 32
196:
197: /* Width of a word, in units (bytes). */
198: #define UNITS_PER_WORD 4
199:
200: /* Width in bits of a pointer.
201: See also the macro `Pmode' defined below. */
202: #define POINTER_SIZE 32
203:
204: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
205: #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
206:
207: /* Boundary (in *bits*) on which stack pointer should be aligned. */
208: #define STACK_BOUNDARY 16
209:
210: /* Allocation boundary (in *bits*) for the code of a function. */
211: #define FUNCTION_BOUNDARY 16
212:
213: /* Alignment of field after `int : 0' in a structure. */
214: #define EMPTY_FIELD_BOUNDARY 16
215:
216: /* No data type wants to be aligned rounder than this. */
217: #define BIGGEST_ALIGNMENT 16
218:
219: /* Set this nonzero if move instructions will actually fail to work
220: when given unaligned data. */
221: #define STRICT_ALIGNMENT 1
222:
223: #define SELECT_RTX_SECTION(MODE, X) \
224: { \
225: if (!flag_pic) \
226: readonly_data_section(); \
227: else if (LEGITIMATE_PIC_OPERAND_P (X)) \
228: readonly_data_section(); \
229: else \
230: data_section(); \
231: }
232:
233: /* Define number of bits in most basic integer type.
234: (If undefined, default is BITS_PER_WORD). */
235:
236: #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
237:
238: /* Define these to avoid dependence on meaning of `int'.
239: Note that WCHAR_TYPE_SIZE is used in cexp.y,
240: where TARGET_SHORT is not available. */
241:
242: #define WCHAR_TYPE "long int"
243: #define WCHAR_TYPE_SIZE 32
244:
245: /* Standard register usage. */
246:
247: /* Number of actual hardware registers.
248: The hardware registers are assigned numbers for the compiler
249: from 0 to just below FIRST_PSEUDO_REGISTER.
250: All registers that the compiler knows about must be given numbers,
251: even those that are not normally considered general registers.
252: For the 68000, we give the data registers numbers 0-7,
253: the address registers numbers 010-017,
254: and the 68881 floating point registers numbers 020-027. */
255: #ifndef SUPPORT_SUN_FPA
256: #define FIRST_PSEUDO_REGISTER 24
257: #else
258: #define FIRST_PSEUDO_REGISTER 56
259: #endif
260:
261: /* This defines the register which is used to hold the offset table for PIC. */
262: #define PIC_OFFSET_TABLE_REGNUM 13
263:
264: /* Used to output a (use pic_offset_table_rtx) so that we
265: always save/restore a5 in functions that use PIC relocation
266: at *any* time during the compilation process. */
267: #define FINALIZE_PIC finalize_pic()
268:
269: #ifndef SUPPORT_SUN_FPA
270:
271: /* 1 for registers that have pervasive standard uses
272: and are not available for the register allocator.
273: On the 68000, only the stack pointer is such. */
274:
275: #define FIXED_REGISTERS \
276: {/* Data registers. */ \
277: 0, 0, 0, 0, 0, 0, 0, 0, \
278: \
279: /* Address registers. */ \
280: 0, 0, 0, 0, 0, 0, 0, 1, \
281: \
282: /* Floating point registers \
283: (if available). */ \
284: 0, 0, 0, 0, 0, 0, 0, 0 }
285:
286: /* 1 for registers not available across function calls.
287: These must include the FIXED_REGISTERS and also any
288: registers that can be used without being saved.
289: The latter must include the registers where values are returned
290: and the register where structure-value addresses are passed.
291: Aside from that, you can include as many other registers as you like. */
292: #define CALL_USED_REGISTERS \
293: {1, 1, 0, 0, 0, 0, 0, 0, \
294: 1, 1, 0, 0, 0, 0, 0, 1, \
295: 1, 1, 0, 0, 0, 0, 0, 0 }
296:
297: #else /* SUPPORT_SUN_FPA */
298:
299: /* 1 for registers that have pervasive standard uses
300: and are not available for the register allocator.
301: On the 68000, only the stack pointer is such. */
302:
303: /* fpa0 is also reserved so that it can be used to move shit back and
304: forth between high fpa regs and everything else. */
305:
306: #define FIXED_REGISTERS \
307: {/* Data registers. */ \
308: 0, 0, 0, 0, 0, 0, 0, 0, \
309: \
310: /* Address registers. */ \
311: 0, 0, 0, 0, 0, 0, 0, 1, \
312: \
313: /* Floating point registers \
314: (if available). */ \
315: 0, 0, 0, 0, 0, 0, 0, 0, \
316: \
317: /* Sun3 FPA registers. */ \
318: 1, 0, 0, 0, 0, 0, 0, 0, \
319: 0, 0, 0, 0, 0, 0, 0, 0, \
320: 0, 0, 0, 0, 0, 0, 0, 0, \
321: 0, 0, 0, 0, 0, 0, 0, 0 }
322:
323: /* 1 for registers not available across function calls.
324: These must include the FIXED_REGISTERS and also any
325: registers that can be used without being saved.
326: The latter must include the registers where values are returned
327: and the register where structure-value addresses are passed.
328: Aside from that, you can include as many other registers as you like. */
329: #define CALL_USED_REGISTERS \
330: {1, 1, 0, 0, 0, 0, 0, 0, \
331: 1, 1, 0, 0, 0, 0, 0, 1, \
332: 1, 1, 0, 0, 0, 0, 0, 0, \
333: /* FPA registers. */ \
334: 1, 1, 1, 1, 0, 0, 0, 0, \
335: 0, 0, 0, 0, 0, 0, 0, 0, \
336: 0, 0, 0, 0, 0, 0, 0, 0, \
337: 0, 0, 0, 0, 0, 0, 0, 0 }
338:
339: #endif /* defined SUPPORT_SUN_FPA */
340:
341:
342: /* Make sure everything's fine if we *don't* have a given processor.
343: This assumes that putting a register in fixed_regs will keep the
344: compiler's mitts completely off it. We don't bother to zero it out
345: of register classes. If neither TARGET_FPA or TARGET_68881 is set,
346: the compiler won't touch since no instructions that use these
347: registers will be valid.
348:
349: Reserve PIC_OFFSET_TABLE_REGNUM (a5) for doing PIC relocation if
350: position independent code is being generated by making it a
351: fixed register */
352:
353: #ifndef SUPPORT_SUN_FPA
354:
355: #define CONDITIONAL_REGISTER_USAGE \
356: { \
357: if (flag_pic) \
358: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
359: }
360:
361: #else /* defined SUPPORT_SUN_FPA */
362:
363: #define CONDITIONAL_REGISTER_USAGE \
364: { \
365: int i; \
366: HARD_REG_SET x; \
367: if (!TARGET_FPA) \
368: { \
369: COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \
370: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
371: if (TEST_HARD_REG_BIT (x, i)) \
372: fixed_regs[i] = call_used_regs[i] = 1; \
373: } \
374: if (TARGET_FPA) \
375: { \
376: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
377: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
378: if (TEST_HARD_REG_BIT (x, i)) \
379: fixed_regs[i] = call_used_regs[i] = 1; \
380: } \
381: if (flag_pic) \
382: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
383: }
384:
385: #endif /* defined SUPPORT_SUN_FPA */
386:
387: /* Return number of consecutive hard regs needed starting at reg REGNO
388: to hold something of mode MODE.
389: This is ordinarily the length in words of a value of mode MODE
390: but can be less for certain modes in special long registers.
391:
392: On the 68000, ordinary registers hold 32 bits worth;
393: for the 68881 registers, a single register is always enough for
394: anything that can be stored in them at all. */
395: #define HARD_REGNO_NREGS(REGNO, MODE) \
396: ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \
397: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
398:
399: #ifndef SUPPORT_SUN_FPA
400:
401: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
402: On the 68000, the cpu registers can hold any mode but the 68881 registers
403: can hold only SFmode or DFmode. The 68881 registers can't hold anything
404: if 68881 use is disabled. */
405:
406: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
407: (((REGNO) < 16) \
408: || ((REGNO) < 24 \
409: && TARGET_68881 \
410: && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
411: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)))
412:
413: #else /* defined SUPPORT_SUN_FPA */
414:
415: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
416: On the 68000, the cpu registers can hold any mode but the 68881 registers
417: can hold only SFmode or DFmode. And the 68881 registers can't hold anything
418: if 68881 use is disabled. However, the Sun FPA register can
419: (apparently) hold whatever you feel like putting in them.
420: If using the fpa, don't put a double in d7/a0. */
421:
422: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
423: (((REGNO) < 16 \
424: && !(TARGET_FPA \
425: && GET_MODE_CLASS ((MODE)) != MODE_INT \
426: && GET_MODE_UNIT_SIZE ((MODE)) > 4 \
427: && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \
428: && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \
429: || ((REGNO) < 24 \
430: ? TARGET_68881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
431: || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
432: : ((REGNO) < 56 ? TARGET_FPA : 0)))
433:
434: #endif /* defined SUPPORT_SUN_FPA */
435:
436: /* Value is 1 if it is a good idea to tie two pseudo registers
437: when one has mode MODE1 and one has mode MODE2.
438: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
439: for any hard reg, then this must be 0 for correct output. */
440: #define MODES_TIEABLE_P(MODE1, MODE2) \
441: (! TARGET_68881 \
442: || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
443: || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
444: == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
445: || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)))
446:
447: /* Specify the registers used for certain standard purposes.
448: The values of these macros are register numbers. */
449:
450: /* m68000 pc isn't overloaded on a register. */
451: /* #define PC_REGNUM */
452:
453: /* Register to use for pushing function arguments. */
454: #define STACK_POINTER_REGNUM 15
455:
456: /* Base register for access to local variables of the function. */
457: #define FRAME_POINTER_REGNUM 14
458:
459: /* Value should be nonzero if functions must have frame pointers.
460: Zero means the frame pointer need not be set up (and parms
461: may be accessed via the stack pointer) in functions that seem suitable.
462: This is computed in `reload', in reload1.c. */
463: #define FRAME_POINTER_REQUIRED 0
464:
465: /* Base register for access to arguments of the function. */
466: #define ARG_POINTER_REGNUM 14
467:
468: /* Register in which static-chain is passed to a function. */
469: #define STATIC_CHAIN_REGNUM 8
470:
471: /* Register in which address to store a structure value
472: is passed to a function. */
473: #define STRUCT_VALUE_REGNUM 9
474:
475: /* Define the classes of registers for register constraints in the
476: machine description. Also define ranges of constants.
477:
478: One of the classes must always be named ALL_REGS and include all hard regs.
479: If there is more than one class, another class must be named NO_REGS
480: and contain no registers.
481:
482: The name GENERAL_REGS must be the name of a class (or an alias for
483: another name such as ALL_REGS). This is the class of registers
484: that is allowed by "g" or "r" in a register constraint.
485: Also, registers outside this class are allocated only when
486: instructions express preferences for them.
487:
488: The classes must be numbered in nondecreasing order; that is,
489: a larger-numbered class must never be contained completely
490: in a smaller-numbered class.
491:
492: For any two classes, it is very desirable that there be another
493: class that represents their union. */
494:
495: /* The 68000 has three kinds of registers, so eight classes would be
496: a complete set. One of them is not needed. */
497:
498: #ifndef SUPPORT_SUN_FPA
499:
500: enum reg_class {
501: NO_REGS, DATA_REGS,
502: ADDR_REGS, FP_REGS,
503: GENERAL_REGS, DATA_OR_FP_REGS,
504: ADDR_OR_FP_REGS, ALL_REGS,
505: LIM_REG_CLASSES };
506:
507: #define N_REG_CLASSES (int) LIM_REG_CLASSES
508:
509: /* Give names of register classes as strings for dump file. */
510:
511: #define REG_CLASS_NAMES \
512: { "NO_REGS", "DATA_REGS", \
513: "ADDR_REGS", "FP_REGS", \
514: "GENERAL_REGS", "DATA_OR_FP_REGS", \
515: "ADDR_OR_FP_REGS", "ALL_REGS" }
516:
517: /* Define which registers fit in which classes.
518: This is an initializer for a vector of HARD_REG_SET
519: of length N_REG_CLASSES. */
520:
521: #define REG_CLASS_CONTENTS \
522: { \
523: 0x00000000, /* NO_REGS */ \
524: 0x000000ff, /* DATA_REGS */ \
525: 0x0000ff00, /* ADDR_REGS */ \
526: 0x00ff0000, /* FP_REGS */ \
527: 0x0000ffff, /* GENERAL_REGS */ \
528: 0x00ff00ff, /* DATA_OR_FP_REGS */ \
529: 0x00ffff00, /* ADDR_OR_FP_REGS */ \
530: 0x00ffffff, /* ALL_REGS */ \
531: }
532:
533: /* The same information, inverted:
534: Return the class number of the smallest class containing
535: reg number REGNO. This could be a conditional expression
536: or could index an array. */
537:
538: #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1)
539:
540: #else /* defined SUPPORT_SUN_FPA */
541:
542: /*
543: * Notes on final choices:
544: *
545: * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything
546: * else.
547: * 2) Removed all unions that involve address registers with
548: * floating point registers (left in unions of address and data with
549: * floating point).
550: * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS.
551: * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS.
552: * 4) Left in everything else.
553: */
554: enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS,
555: FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS,
556: DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS,
557: GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS,
558: LIM_REG_CLASSES };
559:
560: #define N_REG_CLASSES (int) LIM_REG_CLASSES
561:
562: /* Give names of register classes as strings for dump file. */
563:
564: #define REG_CLASS_NAMES \
565: { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \
566: "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \
567: "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \
568: "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" }
569:
570: /* Define which registers fit in which classes.
571: This is an initializer for a vector of HARD_REG_SET
572: of length N_REG_CLASSES. */
573:
574: #define REG_CLASS_CONTENTS \
575: { \
576: {0, 0}, /* NO_REGS */ \
577: {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \
578: {0xff000000, 0x00ffffff}, /* FPA_REGS */ \
579: {0x00ff0000, 0x00000000}, /* FP_REGS */ \
580: {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \
581: {0x000000ff, 0x00000000}, /* DATA_REGS */ \
582: {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \
583: {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \
584: {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\
585: {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \
586: {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \
587: {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\
588: {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\
589: {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \
590: }
591:
592: /* The same information, inverted:
593: Return the class number of the smallest class containing
594: reg number REGNO. This could be a conditional expression
595: or could index an array. */
596:
597: extern enum reg_class regno_reg_class[];
598: #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3])
599:
600: #endif /* SUPPORT_SUN_FPA */
601:
602: /* The class value for index registers, and the one for base regs. */
603:
604: #define INDEX_REG_CLASS GENERAL_REGS
605: #define BASE_REG_CLASS ADDR_REGS
606:
607: /* Get reg_class from a letter such as appears in the machine description.
608: We do a trick here to modify the effective constraints on the
609: machine description; we zorch the constraint letters that aren't
610: appropriate for a specific target. This allows us to guarantee
611: that a specific kind of register will not be used for a given target
612: without fiddling with the register classes above. */
613:
614: #ifndef SUPPORT_SUN_FPA
615:
616: #define REG_CLASS_FROM_LETTER(C) \
617: ((C) == 'a' ? ADDR_REGS : \
618: ((C) == 'd' ? DATA_REGS : \
619: ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
620: NO_REGS) : \
621: NO_REGS)))
622:
623: #else /* defined SUPPORT_SUN_FPA */
624:
625: #define REG_CLASS_FROM_LETTER(C) \
626: ((C) == 'a' ? ADDR_REGS : \
627: ((C) == 'd' ? DATA_REGS : \
628: ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
629: NO_REGS) : \
630: ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \
631: NO_REGS) : \
632: ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \
633: NO_REGS) : \
634: NO_REGS)))))
635:
636: #endif /* defined SUPPORT_SUN_FPA */
637:
638: /* The letters I, J, K, L and M in a register constraint string
639: can be used to stand for particular ranges of immediate operands.
640: This macro defines what the ranges are.
641: C is the letter, and VALUE is a constant value.
642: Return 1 if VALUE is in the range specified by C.
643:
644: For the 68000, `I' is used for the range 1 to 8
645: allowed as immediate shift counts and in addq.
646: `J' is used for the range of signed numbers that fit in 16 bits.
647: `K' is for numbers that moveq can't handle.
648: `L' is for range -8 to -1, range of values that can be added with subq. */
649:
650: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
651: ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
652: (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
653: (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
654: (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0)
655:
656: /*
657: * A small bit of explanation:
658: * "G" defines all of the floating constants that are *NOT* 68881
659: * constants. this is so 68881 constants get reloaded and the
660: * fpmovecr is used. "H" defines *only* the class of constants that
661: * the fpa can use, because these can be gotten at in any fpa
662: * instruction and there is no need to force reloads.
663: */
664: #ifndef SUPPORT_SUN_FPA
665: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
666: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )
667: #else /* defined SUPPORT_SUN_FPA */
668: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
669: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \
670: (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0)
671: #endif /* defined SUPPORT_SUN_FPA */
672:
673: /* Given an rtx X being reloaded into a reg required to be
674: in class CLASS, return the class of reg to actually use.
675: In general this is just CLASS; but on some machines
676: in some cases it is preferable to use a more restrictive class.
677: On the 68000 series, use a data reg if possible when the
678: value is a constant in the range where moveq could be used
679: and we ensure that QImodes are reloaded into data regs.
680: Also, if a floating constant needs reloading, put it in memory
681: if possible. */
682:
683: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
684: ((GET_CODE (X) == CONST_INT \
685: && (unsigned) (INTVAL (X) + 0x80) < 0x100 \
686: && (CLASS) != ADDR_REGS) \
687: ? DATA_REGS \
688: : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \
689: ? DATA_REGS \
690: : (GET_CODE (X) == CONST_DOUBLE \
691: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
692: ? NO_REGS \
693: : (CLASS))
694:
695: /* Return the maximum number of consecutive registers
696: needed to represent mode MODE in a register of class CLASS. */
697: /* On the 68000, this is the size of MODE in words,
698: except in the FP regs, where a single reg is always enough. */
699: #ifndef SUPPORT_SUN_FPA
700:
701: #define CLASS_MAX_NREGS(CLASS, MODE) \
702: ((CLASS) == FP_REGS ? 1 \
703: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
704:
705: /* Moves between fp regs and other regs are two insns. */
706: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
707: (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
708: || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
709: ? 4 : 2)
710:
711: #else /* defined SUPPORT_SUN_FPA */
712:
713: #define CLASS_MAX_NREGS(CLASS, MODE) \
714: ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \
715: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
716:
717: /* Moves between fp regs and other regs are two insns. */
718: /* Likewise for high fpa regs and other regs. */
719: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
720: ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
721: || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
722: || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \
723: || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \
724: ? 4 : 2)
725:
726: #endif /* define SUPPORT_SUN_FPA */
727:
728: /* Stack layout; function entry, exit and calling. */
729:
730: /* Define this if pushing a word on the stack
731: makes the stack pointer a smaller address. */
732: #define STACK_GROWS_DOWNWARD
733:
734: /* Nonzero if we need to generate stack-probe insns.
735: On most systems they are not needed.
736: When they are needed, define this as the stack offset to probe at. */
737: #define NEED_PROBE 0
738:
739: /* Define this if the nominal address of the stack frame
740: is at the high-address end of the local variables;
741: that is, each additional local variable allocated
742: goes at a more negative offset in the frame. */
743: #define FRAME_GROWS_DOWNWARD
744:
745: /* Offset within stack frame to start allocating local variables at.
746: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
747: first local allocated. Otherwise, it is the offset to the BEGINNING
748: of the first local allocated. */
749: #define STARTING_FRAME_OFFSET 0
750:
751: /* If we generate an insn to push BYTES bytes,
752: this says how many the stack pointer really advances by.
753: On the 68000, sp@- in a byte insn really pushes a word. */
754: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
755:
756: /* Offset of first parameter from the argument pointer register value. */
757: #define FIRST_PARM_OFFSET(FNDECL) 8
758:
759: /* Value is the number of byte of arguments automatically
760: popped when returning from a subroutine call.
761: FUNTYPE is the data type of the function (as a tree),
762: or for a library call it is an identifier node for the subroutine name.
763: SIZE is the number of bytes of arguments passed on the stack.
764:
765: On the 68000, the RTS insn cannot pop anything.
766: On the 68010, the RTD insn may be used to pop them if the number
767: of args is fixed, but if the number is variable then the caller
768: must pop them all. RTD can't be used for library calls now
769: because the library is compiled with the Unix compiler.
770: Use of RTD is a selectable option, since it is incompatible with
771: standard Unix calling sequences. If the option is not selected,
772: the caller must always pop the args. */
773:
774: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
775: ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
776: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
777: || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
778: == void_type_node))) \
779: ? (SIZE) : 0)
780:
781: /* Define how to find the value returned by a function.
782: VALTYPE is the data type of the value (as a tree).
783: If the precise function being called is known, FUNC is its FUNCTION_DECL;
784: otherwise, FUNC is 0. */
785:
786: /* On the 68000 the return value is in D0 regardless. */
787:
788: #define FUNCTION_VALUE(VALTYPE, FUNC) \
789: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
790:
791: /* Define how to find the value returned by a library function
792: assuming the value has mode MODE. */
793:
794: /* On the 68000 the return value is in D0 regardless. */
795:
796: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
797:
798: /* 1 if N is a possible register number for a function value.
799: On the 68000, d0 is the only register thus used. */
800:
801: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
802:
803: /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for
804: more than one register. */
805:
806: #define NEEDS_UNTYPED_CALL 0
807:
808: /* Define this if PCC uses the nonreentrant convention for returning
809: structure and union values. */
810:
811: #define PCC_STATIC_STRUCT_RETURN
812:
813: /* 1 if N is a possible register number for function argument passing.
814: On the 68000, no registers are used in this way. */
815:
816: #define FUNCTION_ARG_REGNO_P(N) 0
817:
818: /* Define a data type for recording info about an argument list
819: during the scan of that argument list. This data type should
820: hold all necessary information about the function itself
821: and about the args processed so far, enough to enable macros
822: such as FUNCTION_ARG to determine where the next arg should go.
823:
824: On the m68k, this is a single integer, which is a number of bytes
825: of arguments scanned so far. */
826:
827: #define CUMULATIVE_ARGS int
828:
829: /* Initialize a variable CUM of type CUMULATIVE_ARGS
830: for a call to a function whose data type is FNTYPE.
831: For a library call, FNTYPE is 0.
832:
833: On the m68k, the offset starts at 0. */
834:
835: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
836: ((CUM) = 0)
837:
838: /* Update the data in CUM to advance over an argument
839: of mode MODE and data type TYPE.
840: (TYPE is null for libcalls where that information may not be available.) */
841:
842: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
843: ((CUM) += ((MODE) != BLKmode \
844: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
845: : (int_size_in_bytes (TYPE) + 3) & ~3))
846:
847: /* Define where to put the arguments to a function.
848: Value is zero to push the argument on the stack,
849: or a hard register in which to store the argument.
850:
851: MODE is the argument's machine mode.
852: TYPE is the data type of the argument (as a tree).
853: This is null for libcalls where that information may
854: not be available.
855: CUM is a variable of type CUMULATIVE_ARGS which gives info about
856: the preceding args and about the function being called.
857: NAMED is nonzero if this argument is a named parameter
858: (otherwise it is an extra parameter matching an ellipsis). */
859:
860: /* On the 68000 all args are pushed, except if -mregparm is specified
861: then the first two words of arguments are passed in d0, d1.
862: *NOTE* -mregparm does not work.
863: It exists only to test register calling conventions. */
864:
865: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
866: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
867:
868: /* For an arg passed partly in registers and partly in memory,
869: this is the number of registers used.
870: For args passed entirely in registers or entirely in memory, zero. */
871:
872: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
873: ((TARGET_REGPARM && (CUM) < 8 \
874: && 8 < ((CUM) + ((MODE) == BLKmode \
875: ? int_size_in_bytes (TYPE) \
876: : GET_MODE_SIZE (MODE)))) \
877: ? 2 - (CUM) / 4 : 0)
878:
879: /* Generate the assembly code for function entry. */
880: #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue(FILE, SIZE)
881:
882: /* Output assembler code to FILE to increment profiler label # LABELNO
883: for profiling a function entry. */
884:
885: #define FUNCTION_PROFILER(FILE, LABELNO) \
886: asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO))
887:
888: /* Output assembler code to FILE to initialize this source file's
889: basic block profiling info, if that has not already been done. */
890:
891: #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
892: asm_fprintf (FILE, "\ttstl %LLPBX0\n\tbne %LLPI%d\n\tpea %LLPBX0\n\tjsr %U__bb_init_func\n\taddql %I4,%Rsp\n%LLPI%d:\n", \
893: LABELNO, LABELNO);
894:
895: /* Output assembler code to FILE to increment the entry-count for
896: the BLOCKNO'th basic block in this source file. */
897:
898: #define BLOCK_PROFILER(FILE, BLOCKNO) \
899: asm_fprintf (FILE, "\taddql %I1,%LLPBX2+%d\n", 4 * BLOCKNO)
900:
901: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
902: the stack pointer does not matter. The value is tested only in
903: functions that have frame pointers.
904: No definition is equivalent to always zero. */
905:
906: #define EXIT_IGNORE_STACK 1
907:
908: /* Generate the assembly code for function exit. */
909: #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue (FILE, SIZE)
910:
911: /* This is a hook for other tm files to change. */
912: /* #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) */
913:
914: /* Determine if the epilogue should be output as RTL.
915: You should override this if you define FUNCTION_EXTRA_EPILOGUE. */
916: #define USE_RETURN_INSN use_return_insn ()
917:
918: /* Store in the variable DEPTH the initial difference between the
919: frame pointer reg contents and the stack pointer reg contents,
920: as of the start of the function body. This depends on the layout
921: of the fixed parts of the stack frame and on how registers are saved.
922:
923: On the 68k, if we have a frame, we must add one word to its length
924: to allow for the place that a6 is stored when we do have a frame pointer.
925: Otherwise, we would need to compute the offset from the frame pointer
926: of a local variable as a function of frame_pointer_needed, which
927: is hard. */
928:
929: #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
930: { int regno; \
931: int offset = -4; \
932: for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
933: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
934: offset += 12; \
935: for (regno = 0; regno < 16; regno++) \
936: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
937: offset += 4; \
938: (DEPTH) = (offset + ((get_frame_size () + 3) & -4) \
939: + (get_frame_size () == 0 ? 0 : 4)); \
940: }
941:
942: /* Output assembler code for a block containing the constant parts
943: of a trampoline, leaving space for the variable parts. */
944:
945: /* On the 68k, the trampoline looks like this:
946: mov @#.,a0
947: jsr @#___trampoline
948: jsr @#___trampoline
949: .long STATIC
950: .long FUNCTION
951: The reason for having three jsr insns is so that an entire line
952: of the instruction cache is filled in a predictable way
953: that will always be the same.
954:
955: We always use the assembler label ___trampoline
956: regardless of whether the system adds underscores. */
957:
958: #define TRAMPOLINE_TEMPLATE(FILE) \
959: { \
960: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x207c)); \
961: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
962: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
963: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \
964: ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\
965: ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \
966: ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\
967: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
968: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
969: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
970: ASM_OUTPUT_SHORT (FILE, const0_rtx); \
971: }
972:
973: /* Length in units of the trampoline for entering a nested function. */
974:
975: #define TRAMPOLINE_SIZE 26
976:
977: /* Alignment required for a trampoline. 16 is used to find the
978: beginning of a line in the instruction cache. */
979:
980: #define TRAMPOLINE_ALIGN 16
981:
982: /* Emit RTL insns to initialize the variable parts of a trampoline.
983: FNADDR is an RTX for the address of the function's pure code.
984: CXT is an RTX for the static chain value for the function. */
985:
986: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
987: { \
988: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), TRAMP); \
989: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 18)), CXT); \
990: emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 22)), FNADDR); \
991: }
992:
993: /* This is the library routine that is used
994: to transfer control from the trampoline
995: to the actual nested function. */
996:
997: /* A colon is used with no explicit operands
998: to cause the template string to be scanned for %-constructs. */
999: /* The function name __transfer_from_trampoline is not actually used.
1000: The function definition just permits use of "asm with operands"
1001: (though the operand list is empty). */
1002: #define TRANSFER_FROM_TRAMPOLINE \
1003: void \
1004: __transfer_from_trampoline () \
1005: { \
1006: register char *a0 asm ("%a0"); \
1007: asm (GLOBAL_ASM_OP " ___trampoline"); \
1008: asm ("___trampoline:"); \
1009: asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \
1010: asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \
1011: asm ("rts":); \
1012: }
1013:
1014: /* Addressing modes, and classification of registers for them. */
1015:
1016: #define HAVE_POST_INCREMENT
1017: /* #define HAVE_POST_DECREMENT */
1018:
1019: #define HAVE_PRE_DECREMENT
1020: /* #define HAVE_PRE_INCREMENT */
1021:
1022: /* Macros to check register numbers against specific register classes. */
1023:
1024: /* These assume that REGNO is a hard or pseudo reg number.
1025: They give nonzero only if REGNO is a hard reg of the suitable class
1026: or a pseudo reg currently allocated to a suitable hard reg.
1027: Since they use reg_renumber, they are safe only once reg_renumber
1028: has been allocated, which happens in local-alloc.c. */
1029:
1030: #define REGNO_OK_FOR_INDEX_P(REGNO) \
1031: ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
1032: #define REGNO_OK_FOR_BASE_P(REGNO) \
1033: (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
1034: #define REGNO_OK_FOR_DATA_P(REGNO) \
1035: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
1036: #define REGNO_OK_FOR_FP_P(REGNO) \
1037: (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
1038: #ifdef SUPPORT_SUN_FPA
1039: #define REGNO_OK_FOR_FPA_P(REGNO) \
1040: (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56))
1041: #endif
1042:
1043: /* Now macros that check whether X is a register and also,
1044: strictly, whether it is in a specified class.
1045:
1046: These macros are specific to the 68000, and may be used only
1047: in code for printing assembler insns and in conditions for
1048: define_optimization. */
1049:
1050: /* 1 if X is a data register. */
1051:
1052: #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1053:
1054: /* 1 if X is an fp register. */
1055:
1056: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1057:
1058: /* 1 if X is an address register */
1059:
1060: #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1061:
1062: #ifdef SUPPORT_SUN_FPA
1063: /* 1 if X is a register in the Sun FPA. */
1064: #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X)))
1065: #else
1066: /* Answer must be no if we don't have an FPA. */
1067: #define FPA_REG_P(X) 0
1068: #endif
1069:
1070: /* Maximum number of registers that can appear in a valid memory address. */
1071:
1072: #define MAX_REGS_PER_ADDRESS 2
1073:
1074: /* Recognize any constant value that is a valid address. */
1075:
1076: #define CONSTANT_ADDRESS_P(X) \
1077: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1078: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1079: || GET_CODE (X) == HIGH)
1080:
1081: /* Nonzero if the constant value X is a legitimate general operand.
1082: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1083:
1084: #define LEGITIMATE_CONSTANT_P(X) 1
1085:
1086: /* Nonzero if the constant value X is a legitimate general operand
1087: when generating PIC code. It is given that flag_pic is on and
1088: that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1089:
1090: #define LEGITIMATE_PIC_OPERAND_P(X) \
1091: (! symbolic_operand (X, VOIDmode) || machopic_operand_p (X))
1092:
1093: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1094: and check its validity for a certain class.
1095: We have two alternate definitions for each of them.
1096: The usual definition accepts all pseudo regs; the other rejects
1097: them unless they have been allocated suitable hard regs.
1098: The symbol REG_OK_STRICT causes the latter definition to be used.
1099:
1100: Most source files want to accept pseudo regs in the hope that
1101: they will get allocated to the class that the insn wants them to be in.
1102: Source files for reload pass need to be strict.
1103: After reload, it makes no difference, since pseudo regs have
1104: been eliminated by then. */
1105:
1106: #ifndef REG_OK_STRICT
1107:
1108: /* Nonzero if X is a hard reg that can be used as an index
1109: or if it is a pseudo reg. */
1110: #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
1111: /* Nonzero if X is a hard reg that can be used as a base reg
1112: or if it is a pseudo reg. */
1113: #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
1114:
1115: #else
1116:
1117: /* Nonzero if X is a hard reg that can be used as an index. */
1118: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1119: /* Nonzero if X is a hard reg that can be used as a base reg. */
1120: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1121:
1122: #endif
1123:
1124: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1125: that is a valid memory address for an instruction.
1126: The MODE argument is the machine mode for the MEM expression
1127: that wants to use this address.
1128:
1129: When generating PIC, an address involving a SYMBOL_REF is legitimate
1130: if and only if it is the sum of pic_offset_table_rtx and the SYMBOL_REF.
1131: We use LEGITIMATE_PIC_OPERAND_P to throw out the illegitimate addresses,
1132: and we explicitly check for the sum of pic_offset_table_rtx and a SYMBOL_REF.
1133:
1134: Likewise for a LABEL_REF when generating PIC.
1135:
1136: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
1137:
1138: /* Allow SUBREG everywhere we allow REG. This results in better code. It
1139: also makes function inlining work when inline functions are called with
1140: arguments that are SUBREGs. */
1141:
1142: #define LEGITIMATE_BASE_REG_P(X) \
1143: ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1144: || (GET_CODE (X) == SUBREG \
1145: && GET_CODE (SUBREG_REG (X)) == REG \
1146: && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1147:
1148: #define INDIRECTABLE_1_ADDRESS_P(X) \
1149: ((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
1150: || LEGITIMATE_BASE_REG_P (X) \
1151: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
1152: && LEGITIMATE_BASE_REG_P (XEXP (X, 0))) \
1153: || (GET_CODE (X) == PLUS \
1154: && LEGITIMATE_BASE_REG_P (XEXP (X, 0)) \
1155: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1156: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000) \
1157: || (GET_CODE (X) == PLUS \
1158: && LEGITIMATE_BASE_REG_P (XEXP (X, 0)) \
1159: && GET_CODE (XEXP (X, 1)) == CONST \
1160: && GET_CODE (XEXP (XEXP (X, 1), 0)) == CONST_INT \
1161: && ((unsigned) INTVAL (XEXP (XEXP (X, 1), 0)) + 0x8000) < 0x10000) \
1162: || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1163: && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \
1164: || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1165: && flag_pic && GET_CODE (XEXP (X, 1)) == CONST) \
1166: || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1167: && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) \
1168:
1169: #if 0
1170: /* This should replace the last two (non-pic) lines
1171: except that Sun's assembler does not seem to handle such operands. */
1172: && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \
1173: : (GET_CODE (XEXP (X, 1)) == CONST_INT \
1174: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))))
1175: #endif
1176:
1177:
1178: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
1179: { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
1180:
1181: /* Only labels on dispatch tables are valid for indexing from. */
1182: #define GO_IF_INDEXABLE_BASE(X, ADDR) \
1183: { rtx temp; \
1184: if (GET_CODE (X) == LABEL_REF \
1185: && (temp = next_nonnote_insn (XEXP (X, 0))) != 0 \
1186: && GET_CODE (temp) == JUMP_INSN \
1187: && (GET_CODE (PATTERN (temp)) == ADDR_VEC \
1188: || GET_CODE (PATTERN (temp)) == ADDR_DIFF_VEC)) \
1189: goto ADDR; \
1190: if (LEGITIMATE_BASE_REG_P (X)) goto ADDR; }
1191:
1192: #define GO_IF_INDEXING(X, ADDR) \
1193: { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
1194: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
1195: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
1196: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
1197:
1198: #define GO_IF_INDEXED_ADDRESS(X, ADDR) \
1199: { GO_IF_INDEXING (X, ADDR); \
1200: if (GET_CODE (X) == PLUS) \
1201: { if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1202: && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \
1203: { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
1204: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
1205: && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \
1206: { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } \
1207: if (GET_CODE (XEXP (X, 1)) == CONST \
1208: && GET_CODE (XEXP (XEXP (X, 1), 0)) == CONST_INT \
1209: && (unsigned) INTVAL (XEXP (XEXP (X, 1), 0)) + 0x80 < 0x100) \
1210: { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
1211: if (GET_CODE (XEXP (X, 0)) == CONST \
1212: && GET_CODE (XEXP (XEXP (X, 0), 0)) == CONST_INT \
1213: && (unsigned) INTVAL (XEXP (XEXP (X, 0), 0)) + 0x80 < 0x100) \
1214: { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
1215:
1216: #define LEGITIMATE_INDEX_REG_P(X) \
1217: ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1218: || (GET_CODE (X) == SIGN_EXTEND \
1219: && GET_CODE (XEXP (X, 0)) == REG \
1220: && GET_MODE (XEXP (X, 0)) == HImode \
1221: && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
1222: || (GET_CODE (X) == SUBREG \
1223: && GET_CODE (SUBREG_REG (X)) == REG \
1224: && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1225:
1226: #define LEGITIMATE_INDEX_P(X) \
1227: (LEGITIMATE_INDEX_REG_P (X) \
1228: || (TARGET_68020 && GET_CODE (X) == MULT \
1229: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
1230: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1231: && (INTVAL (XEXP (X, 1)) == 2 \
1232: || INTVAL (XEXP (X, 1)) == 4 \
1233: || INTVAL (XEXP (X, 1)) == 8)))
1234:
1235: /* If pic, we accept INDEX+LABEL, which is what do_tablejump makes. */
1236: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1237: { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
1238: GO_IF_INDEXED_ADDRESS (X, ADDR); \
1239: if (flag_pic && MODE == CASE_VECTOR_MODE && GET_CODE (X) == PLUS \
1240: && LEGITIMATE_INDEX_P (XEXP (X, 0)) \
1241: && GET_CODE (XEXP (X, 1)) == LABEL_REF) \
1242: goto ADDR; }
1243:
1244: /* Don't call memory_address_noforce for the address to fetch
1245: the switch offset. This address is ok as it stands (see above),
1246: but memory_address_noforce would alter it. */
1247: #define PIC_CASE_VECTOR_ADDRESS(index) index
1248:
1249: /* Try machine-dependent ways of modifying an illegitimate address
1250: to be legitimate. If we find one, return the new, valid address.
1251: This macro is used in only one place: `memory_address' in explow.c.
1252:
1253: OLDX is the address as it was before break_out_memory_refs was called.
1254: In some cases it is useful to look at this to decide what needs to be done.
1255:
1256: MODE and WIN are passed so that this macro can use
1257: GO_IF_LEGITIMATE_ADDRESS.
1258:
1259: It is always safe for this macro to do nothing. It exists to recognize
1260: opportunities to optimize the output.
1261:
1262: For the 68000, we handle X+REG by loading X into a register R and
1263: using R+REG. R will go in an address reg and indexing will be used.
1264: However, if REG is a broken-out memory address or multiplication,
1265: nothing needs to be done because REG can certainly go in an address reg. */
1266:
1267: #define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
1268: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1269: { register int ch = (X) != (OLDX); \
1270: if (GET_CODE (X) == PLUS) \
1271: { int copied = 0; \
1272: if (GET_CODE (XEXP (X, 0)) == MULT) \
1273: { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \
1274: if (GET_CODE (XEXP (X, 1)) == MULT) \
1275: { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \
1276: if (ch && GET_CODE (XEXP (X, 1)) == REG \
1277: && GET_CODE (XEXP (X, 0)) == REG) \
1278: goto WIN; \
1279: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1280: if (GET_CODE (XEXP (X, 0)) == REG \
1281: || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
1282: && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1283: && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
1284: { register rtx temp = gen_reg_rtx (Pmode); \
1285: register rtx val = force_operand (XEXP (X, 1), 0); \
1286: emit_move_insn (temp, val); \
1287: COPY_ONCE (X); \
1288: XEXP (X, 1) = temp; \
1289: goto WIN; } \
1290: else if (GET_CODE (XEXP (X, 1)) == REG \
1291: || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
1292: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1293: && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
1294: { register rtx temp = gen_reg_rtx (Pmode); \
1295: register rtx val = force_operand (XEXP (X, 0), 0); \
1296: emit_move_insn (temp, val); \
1297: COPY_ONCE (X); \
1298: XEXP (X, 0) = temp; \
1299: goto WIN; }}}
1300:
1301: /* Go to LABEL if ADDR (a legitimate address expression)
1302: has an effect that depends on the machine mode it is used for.
1303: On the 68000, only predecrement and postincrement address depend thus
1304: (the amount of decrement or increment being the length of the operand). */
1305:
1306: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1307: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
1308:
1309: /* Specify the machine mode that this machine uses
1310: for the index in the tablejump instruction. */
1311: #define CASE_VECTOR_MODE HImode
1312:
1313: /* Define this if the tablejump instruction expects the table
1314: to contain offsets from the address of the table.
1315: Do not define this if the table should contain absolute addresses. */
1316: #define CASE_VECTOR_PC_RELATIVE
1317:
1318: /* Specify the tree operation to be used to convert reals to integers. */
1319: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1320:
1321: /* This is the kind of divide that is easiest to do in the general case. */
1322: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1323:
1324: /* Define this as 1 if `char' should by default be signed; else as 0. */
1325: #define DEFAULT_SIGNED_CHAR 1
1326:
1327: /* Don't cse the address of the function being compiled. */
1328: #define NO_RECURSIVE_FUNCTION_CSE
1329:
1330: /* Max number of bytes we can move from memory to memory
1331: in one reasonably fast instruction. */
1332: #define MOVE_MAX 4
1333:
1334: /* Define this if zero-extension is slow (more than one real instruction). */
1335: #define SLOW_ZERO_EXTEND
1336:
1337: /* Nonzero if access to memory by bytes is slow and undesirable. */
1338: #define SLOW_BYTE_ACCESS 0
1339:
1340: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1341: is done just by pretending it is already truncated. */
1342: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1343:
1344: /* We assume that the store-condition-codes instructions store 0 for false
1345: and some other value for true. This is the value stored for true. */
1346:
1347: #define STORE_FLAG_VALUE -1
1348:
1349: /* When a prototype says `char' or `short', really pass an `int'. */
1350: #define PROMOTE_PROTOTYPES
1351:
1352: /* Specify the machine mode that pointers have.
1353: After generation of rtl, the compiler makes no further distinction
1354: between pointers and any other objects of this machine mode. */
1355: #define Pmode SImode
1356:
1357: /* A function address in a call instruction
1358: is a byte address (for indexing purposes)
1359: so give the MEM rtx a byte's mode. */
1360: #define FUNCTION_MODE QImode
1361:
1362: /* Compute the cost of computing a constant rtl expression RTX
1363: whose rtx-code is CODE. The body of this macro is a portion
1364: of a switch statement. If the code is computed here,
1365: return it with a return statement. Otherwise, break from the switch. */
1366:
1367: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1368: case CONST_INT: \
1369: /* Constant zero is super cheap due to clr instruction. */ \
1370: if (RTX == const0_rtx) return 0; \
1371: /* Constants between -128 and 127 are cheap due to moveq */ \
1372: if (INTVAL (RTX) >= -128 && INTVAL (RTX) <= 127) return 1; \
1373: /* Constants between -136 and 254 are easily generated */ \
1374: /* by intelligent uses of moveq, add[q], and subq */ \
1375: if ((OUTER_CODE) == SET && INTVAL (RTX) >= -136 \
1376: && INTVAL (RTX) <= 254) return 2; \
1377: case CONST: \
1378: case LABEL_REF: \
1379: case SYMBOL_REF: \
1380: return 3; \
1381: case CONST_DOUBLE: \
1382: return 5;
1383:
1384: /* Compute the cost of various arithmetic operations.
1385: These are vaguely right for a 68020. */
1386: /* The costs for long multiply have been adjusted to
1387: work properly in synth_mult on the 68020,
1388: relative to an average of the time for add and the time for shift,
1389: taking away a little more because sometimes move insns are needed. */
1390: #define MULL_COST (TARGET_68040 ? 5 : 13)
1391: #define MULW_COST (TARGET_68040 ? 3 : 8)
1392:
1393: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1394: case PLUS: \
1395: /* An lea costs about three times as much as a simple add. */ \
1396: if (GET_MODE (X) == SImode \
1397: && GET_CODE (XEXP (X, 0)) == REG \
1398: && GET_CODE (XEXP (X, 1)) == MULT \
1399: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1400: && GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT \
1401: && (INTVAL (XEXP (XEXP (X, 1), 1)) == 2 \
1402: || INTVAL (XEXP (XEXP (X, 1), 1)) == 4 \
1403: || INTVAL (XEXP (XEXP (X, 1), 1)) == 8)) \
1404: return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \
1405: break; \
1406: case ASHIFT: \
1407: case ASHIFTRT: \
1408: case LSHIFT: \
1409: case LSHIFTRT: \
1410: /* A shift by a big integer takes an extra instruction. */ \
1411: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1412: && (INTVAL (XEXP (X, 1)) == 16)) \
1413: return COSTS_N_INSNS (2); /* clrw;swap */ \
1414: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1415: && !(INTVAL (XEXP (X, 1)) > 0 \
1416: && INTVAL (XEXP (X, 1)) <= 8)) \
1417: return COSTS_N_INSNS (3); /* lsr #i,dn */ \
1418: break; \
1419: case MULT: \
1420: if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1421: return COSTS_N_INSNS (MULW_COST); \
1422: else \
1423: return COSTS_N_INSNS (MULL_COST); \
1424: case DIV: \
1425: case UDIV: \
1426: case MOD: \
1427: case UMOD: \
1428: if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1429: return COSTS_N_INSNS (27); /* div.w */ \
1430: return COSTS_N_INSNS (43); /* div.l */
1431:
1432: /* Tell final.c how to eliminate redundant test instructions. */
1433:
1434: /* Here we define machine-dependent flags and fields in cc_status
1435: (see `conditions.h'). */
1436:
1437: /* Set if the cc value is actually in the 68881, so a floating point
1438: conditional branch must be output. */
1439: #define CC_IN_68881 04000
1440:
1441: /* Store in cc_status the expressions that the condition codes will
1442: describe after execution of an instruction whose pattern is EXP.
1443: Do not alter them if the instruction would not alter the cc's. */
1444:
1445: /* On the 68000, all the insns to store in an address register fail to
1446: set the cc's. However, in some cases these instructions can make it
1447: possibly invalid to use the saved cc's. In those cases we clear out
1448: some or all of the saved cc's so they won't be used. */
1449:
1450: #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN)
1451:
1452: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1453: { if (cc_prev_status.flags & CC_IN_68881) \
1454: return FLOAT; \
1455: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1456: return NO_OV; \
1457: return NORMAL; }
1458:
1459: /* Control the assembler format that we output. */
1460:
1461: /* Output at beginning of assembler file. */
1462:
1463: #define ASM_FILE_START(FILE) \
1464: fprintf (FILE, "#NO_APP\n");
1465:
1466: /* Output to assembler file text saying following lines
1467: may contain character constants, extra white space, comments, etc. */
1468:
1469: #define ASM_APP_ON "#APP\n"
1470:
1471: /* Output to assembler file text saying following lines
1472: no longer contain unusual constructs. */
1473:
1474: #define ASM_APP_OFF "#NO_APP\n"
1475:
1476: /* Output before read-only data. */
1477:
1478: #define TEXT_SECTION_ASM_OP ".text"
1479:
1480: /* Output before writable data. */
1481:
1482: #define DATA_SECTION_ASM_OP ".data"
1483:
1484: /* Here are four prefixes that are used by asm_fprintf to
1485: facilitate customization for alternate assembler syntaxes.
1486: Machines with no likelihood of an alternate syntax need not
1487: define these and need not use asm_fprintf. */
1488:
1489: /* The prefix for register names. Note that REGISTER_NAMES
1490: is supposed to include this prefix. */
1491:
1492: #define REGISTER_PREFIX ""
1493:
1494: /* The prefix for local labels. You should be able to define this as
1495: an empty string, or any arbitrary string (such as ".", ".L%", etc)
1496: without having to make any other changes to account for the specific
1497: definition. Note it is a string literal, not interpreted by printf
1498: and friends. */
1499:
1500: #define LOCAL_LABEL_PREFIX ""
1501:
1502: /* The prefix to add to user-visible assembler symbols. */
1503:
1504: #define USER_LABEL_PREFIX "_"
1505:
1506: /* The prefix for immediate operands. */
1507:
1508: #define IMMEDIATE_PREFIX "#"
1509:
1510: /* How to refer to registers in assembler output.
1511: This sequence is indexed by compiler's hard-register-number (see above). */
1512:
1513: #ifndef SUPPORT_SUN_FPA
1514:
1515: #define REGISTER_NAMES \
1516: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1517: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1518: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" }
1519:
1520: #else /* SUPPORTED_SUN_FPA */
1521:
1522: #define REGISTER_NAMES \
1523: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1524: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1525: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
1526: "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \
1527: "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \
1528: "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \
1529: "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" }
1530:
1531: #endif /* defined SUPPORT_SUN_FPA */
1532:
1533: /* How to renumber registers for dbx and gdb.
1534: On the Sun-3, the floating point registers have numbers
1535: 18 to 25, not 16 to 23 as they do in the compiler. */
1536:
1537: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
1538:
1539: /* This is how to output the definition of a user-level label named NAME,
1540: such as the label on a static function or variable NAME. */
1541:
1542: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1543: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1544:
1545: /* This is how to output a command to make the user-level label named NAME
1546: defined for reference from other files. */
1547:
1548: #define GLOBAL_ASM_OP ".globl"
1549: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1550: do { fprintf (FILE, "%s ", GLOBAL_ASM_OP); \
1551: assemble_name (FILE, NAME); \
1552: fputs ("\n", FILE);} while (0)
1553:
1554: /* This is how to output a reference to a user-level label named NAME.
1555: `assemble_name' uses this. */
1556:
1557: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1558: asm_fprintf (FILE, "%0U%s", NAME)
1559:
1560: /* This is how to output an internal numbered label where
1561: PREFIX is the class of label and NUM is the number within the class. */
1562:
1563: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1564: asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM)
1565:
1566: /* This is how to store into the string LABEL
1567: the symbol_ref name of an internal numbered label where
1568: PREFIX is the class of label and NUM is the number within the class.
1569: This is suitable for output with `assemble_name'. */
1570:
1571: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1572: sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
1573:
1574: /* This is how to output a `long double' extended real constant. */
1575:
1576: #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1577: do { long l[3]; \
1578: REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1579: if (sizeof (int) == sizeof (long)) \
1580: fprintf (FILE, "\t.long 0x%x,0x%x,0x%x\n", l[0], l[1], l[2]); \
1581: else \
1582: fprintf (FILE, "\t.long 0x%lx,0x%lx,0x%lx\n", l[0], l[1], l[2]); \
1583: } while (0)
1584:
1585: /* This is how to output an assembler line defining a `double' constant. */
1586:
1587: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1588: do { char dstr[30]; \
1589: REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1590: fprintf (FILE, "\t.double 0r%s\n", dstr); \
1591: } while (0)
1592:
1593: /* This is how to output an assembler line defining a `float' constant. */
1594:
1595: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1596: do { long l; \
1597: REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1598: if (sizeof (int) == sizeof (long)) \
1599: fprintf (FILE, "\t.long 0x%x\n", l); \
1600: else \
1601: fprintf (FILE, "\t.long 0x%lx\n", l); \
1602: } while (0)
1603:
1604: /* This is how to output an assembler line defining an `int' constant. */
1605:
1606: #define ASM_OUTPUT_INT(FILE,VALUE) \
1607: ( fprintf (FILE, "\t.long "), \
1608: output_addr_const (FILE, (VALUE)), \
1609: fprintf (FILE, "\n"))
1610:
1611: /* Likewise for `char' and `short' constants. */
1612:
1613: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1614: ( fprintf (FILE, "\t.word "), \
1615: output_addr_const (FILE, (VALUE)), \
1616: fprintf (FILE, "\n"))
1617:
1618: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1619: ( fprintf (FILE, "\t.byte "), \
1620: output_addr_const (FILE, (VALUE)), \
1621: fprintf (FILE, "\n"))
1622:
1623: /* This is how to output an assembler line for a numeric constant byte. */
1624:
1625: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1626: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1627:
1628: /* This is how to output an insn to push a register on the stack.
1629: It need not be very fast code. */
1630:
1631: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1632: asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO])
1633:
1634: /* This is how to output an insn to pop a register from the stack.
1635: It need not be very fast code. */
1636:
1637: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1638: asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO])
1639:
1640: /* This is how to output an element of a case-vector that is absolute.
1641: (The 68000 does not use such vectors,
1642: but we must define this macro anyway.) */
1643:
1644: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1645: asm_fprintf (FILE, "\t.long %LL%d\n", VALUE)
1646:
1647: /* This is how to output an element of a case-vector that is relative. */
1648:
1649: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1650: asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL)
1651:
1652: /* This is how to output an assembler line
1653: that says to advance the location counter
1654: to a multiple of 2**LOG bytes. */
1655:
1656: /* We don't have a way to align to more than a two-byte boundary, so do the
1657: best we can and don't complain. */
1658: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1659: if ((LOG) >= 1) \
1660: fprintf (FILE, "\t.even\n");
1661:
1662: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1663: fprintf (FILE, "\t.skip %u\n", (SIZE))
1664:
1665: /* This says how to output an assembler line
1666: to define a global common symbol. */
1667:
1668: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1669: ( fputs (".comm ", (FILE)), \
1670: assemble_name ((FILE), (NAME)), \
1671: fprintf ((FILE), ",%u\n", (ROUNDED)))
1672:
1673: /* This says how to output an assembler line
1674: to define a local common symbol. */
1675:
1676: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1677: ( fputs (".lcomm ", (FILE)), \
1678: assemble_name ((FILE), (NAME)), \
1679: fprintf ((FILE), ",%u\n", (ROUNDED)))
1680:
1681: /* Store in OUTPUT a string (made with alloca) containing
1682: an assembler-name for a local static variable named NAME.
1683: LABELNO is an integer which is different for each call. */
1684:
1685: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1686: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1687: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1688:
1689: /* Define the parentheses used to group arithmetic operations
1690: in assembler code. */
1691:
1692: #define ASM_OPEN_PAREN "("
1693: #define ASM_CLOSE_PAREN ")"
1694:
1695: /* Define results of standard character escape sequences. */
1696: #define TARGET_BELL 007
1697: #define TARGET_BS 010
1698: #define TARGET_TAB 011
1699: #define TARGET_NEWLINE 012
1700: #define TARGET_VT 013
1701: #define TARGET_FF 014
1702: #define TARGET_CR 015
1703:
1704: /* Output a float value (represented as a C double) as an immediate operand.
1705: This macro is a 68k-specific macro. */
1706:
1707: #define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
1708: do { \
1709: if (CODE == 'f') \
1710: { \
1711: char dstr[30]; \
1712: REAL_VALUE_TO_DECIMAL (VALUE, "%.9g", dstr); \
1713: asm_fprintf ((FILE), "%I0r%s", dstr); \
1714: } \
1715: else \
1716: { \
1717: long l; \
1718: REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1719: if (sizeof (int) == sizeof (long)) \
1720: asm_fprintf ((FILE), "%I0x%x", l); \
1721: else \
1722: asm_fprintf ((FILE), "%I0x%lx", l); \
1723: } \
1724: } while (0)
1725:
1726: /* Output a double value (represented as a C double) as an immediate operand.
1727: This macro is a 68k-specific macro. */
1728: #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
1729: do { char dstr[30]; \
1730: REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1731: asm_fprintf (FILE, "%I0r%s", dstr); \
1732: } while (0)
1733:
1734: /* Note, long double immediate operands are not actually
1735: generated by m68k.md. */
1736: #define ASM_OUTPUT_LONG_DOUBLE_OPERAND(FILE,VALUE) \
1737: do { char dstr[30]; \
1738: REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1739: asm_fprintf (FILE, "%I0r%s", dstr); \
1740: } while (0)
1741:
1742: /* Print operand X (an rtx) in assembler syntax to file FILE.
1743: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1744: For `%' followed by punctuation, CODE is the punctuation and X is null.
1745:
1746: On the 68000, we use several CODE characters:
1747: '.' for dot needed in Motorola-style opcode names.
1748: '-' for an operand pushing on the stack:
1749: sp@-, -(sp) or -(%sp) depending on the style of syntax.
1750: '+' for an operand pushing on the stack:
1751: sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
1752: '@' for a reference to the top word on the stack:
1753: sp@, (sp) or (%sp) depending on the style of syntax.
1754: '#' for an immediate operand prefix (# in MIT and Motorola syntax
1755: but & in SGS syntax).
1756: '!' for the fpcr register (used in some float-to-fixed conversions).
1757: '$' for the letter `s' in an op code, but only on the 68040.
1758: '&' for the letter `d' in an op code, but only on the 68040.
1759: '/' for register prefix needed by longlong.h.
1760:
1761: 'b' for byte insn (no effect, on the Sun; this is for the ISI).
1762: 'd' to force memory addressing to be absolute, not relative.
1763: 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
1764: 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather
1765: than directly). Second part of 'y' below.
1766: 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex),
1767: or print pair of registers as rx:ry.
1768: 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
1769: CONST_DOUBLE's as SunFPA constant RAM registers if
1770: possible, so it should not be used except for the SunFPA. */
1771:
1772: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1773: ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
1774: || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \
1775: || (CODE) == '$' || (CODE) == '&' || (CODE) == '/')
1776:
1777: /* A C compound statement to output to stdio stream STREAM the
1778: assembler syntax for an instruction operand X. X is an RTL
1779: expression.
1780:
1781: CODE is a value that can be used to specify one of several ways
1782: of printing the operand. It is used when identical operands
1783: must be printed differently depending on the context. CODE
1784: comes from the `%' specification that was used to request
1785: printing of the operand. If the specification was just `%DIGIT'
1786: then CODE is 0; if the specification was `%LTR DIGIT' then CODE
1787: is the ASCII code for LTR.
1788:
1789: If X is a register, this macro should print the register's name.
1790: The names can be found in an array `reg_names' whose type is
1791: `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
1792:
1793: When the machine description has a specification `%PUNCT' (a `%'
1794: followed by a punctuation character), this macro is called with
1795: a null pointer for X and the punctuation character for CODE.
1796:
1797: See m68k.c for the m68k specific codes. */
1798:
1799: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1800:
1801: /* A C compound statement to output to stdio stream STREAM the
1802: assembler syntax for an instruction operand that is a memory
1803: reference whose address is ADDR. ADDR is an RTL expression.
1804:
1805: On some machines, the syntax for a symbolic address depends on
1806: the section that the address refers to. On these machines,
1807: define the macro `ENCODE_SECTION_INFO' to store the information
1808: into the `symbol_ref', and then check for it here. */
1809:
1810: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1811:
1812:
1813: /* Definitions for generating bytecode */
1814:
1815: /* Just so it's known this target is supported by the bytecode generator.
1816: If this define isn't found anywhere in the target config files, then
1817: dummy stubs are supplied by bytecode.h, and any attempt to use
1818: -fbytecode will result in an error message. */
1819:
1820: #define TARGET_SUPPORTS_BYTECODE
1821:
1822: /* Minimal segment alignment within sections is 8 units. */
1823: #define MACHINE_SEG_ALIGN 3
1824:
1825: /* Integer alignment is two units. */
1826: #define INT_ALIGN 2
1827:
1828: /* Pointer alignment is eight units. */
1829: #define PTR_ALIGN 3
1830:
1831: /* Global symbols begin with `_' */
1832: #define NAMES_HAVE_UNDERSCORES
1833:
1834: /* BC_xxx below are similar to their ASM_xxx counterparts above. */
1835: #define BC_GLOBALIZE_LABEL(FP, NAME) bc_globalize_label(NAME)
1836:
1837: #define BC_OUTPUT_COMMON(FP, NAME, SIZE, ROUNDED) \
1838: do { bc_emit_common(NAME, ROUNDED); bc_globalize_label(NAME); } while (0)
1839:
1840: #define BC_OUTPUT_LOCAL(FP, NAME, SIZE, ROUNDED) \
1841: bc_emit_common(NAME, ROUNDED)
1842:
1843: #define BC_OUTPUT_ALIGN(FP, ALIGN) bc_align(ALIGN)
1844:
1845: #define BC_OUTPUT_LABEL(FP, NAME) bc_emit_labeldef(NAME)
1846:
1847: #define BC_OUTPUT_SKIP(FP, SIZE) bc_emit_skip(SIZE)
1848:
1849: #define BC_OUTPUT_LABELREF(FP, NAME) \
1850: do { \
1851: char *foo = (char *) xmalloc(strlen(NAME) + 2); \
1852: strcpy(foo, "_"); \
1853: strcat(foo, NAME); \
1854: bc_emit_labelref (foo); \
1855: free (foo); \
1856: } while (0)
1857:
1858: #define BC_OUTPUT_FLOAT(FP, VAL) \
1859: do { \
1860: float F = VAL; \
1861: bc_emit ((char *) &F, sizeof F); \
1862: } while (0)
1863:
1864: #define BC_OUTPUT_DOUBLE(FP, VAL) \
1865: do { \
1866: double D = VAL; \
1867: bc_emit ((char *) &D, sizeof D); \
1868: } while (0)
1869:
1870: #define BC_OUTPUT_BYTE(FP, VAL) \
1871: do { \
1872: char C = VAL; \
1873: bc_emit (&C, 1); \
1874: } while (0)
1875:
1876:
1877: #define BC_OUTPUT_FILE ASM_OUTPUT_FILE
1878: #define BC_OUTPUT_ASCII ASM_OUTPUT_ASCII
1879: #define BC_OUTPUT_IDENT ASM_OUTPUT_IDENT
1880:
1881: /* Same as XSTR, but for bytecode */
1882: #define BCXSTR(RTX) ((RTX)->bc_label)
1883:
1884:
1885: /* Flush bytecode buffer onto file */
1886: #define BC_WRITE_FILE(FP) \
1887: { \
1888: fprintf (FP, ".text\n"); \
1889: bc_seg_write (bc_text_seg, FP); \
1890: fprintf(FP, "\n.data\n"); \
1891: bc_seg_write (bc_data_seg, FP); \
1892: bc_sym_write (FP); /* do .globl, .bss, etc. */ \
1893: }
1894:
1895: /* Write one symbol */
1896: #define BC_WRITE_SEGSYM(SEGSYM, FP) \
1897: { \
1898: prsym (FP, (SEGSYM)->sym->name); \
1899: fprintf (FP, ":\n"); \
1900: }
1901:
1902:
1903: /* Write one reloc entry */
1904: #define BC_WRITE_RELOC_ENTRY(SEGRELOC, FP, OFFSET) \
1905: { \
1906: fprintf (FP, "\t.long "); \
1907: prsym (FP, (SEGRELOC)->sym->name); \
1908: fprintf (FP, " + %d\n", OFFSET); \
1909: }
1910:
1911: /* Start new line of bytecodes */
1912: #define BC_START_BYTECODE_LINE(FP) \
1913: { \
1914: fprintf (FP, "\t.byte"); \
1915: }
1916:
1917: /* Write one bytecode */
1918: #define BC_WRITE_BYTECODE(SEP, VAL, FP) \
1919: { \
1920: fprintf (FP, "%c0x%02X", (SEP), (VAL) & 0xff); \
1921: }
1922:
1923: /* Write one bytecode RTL entry */
1924: #define BC_WRITE_RTL(R, FP) \
1925: { \
1926: fprintf (FP, "%s+%d/0x%08X\n", (R)->label, (R)->offset, (R)->bc_label); \
1927: }
1928:
1929:
1930: /* Emit function entry trampoline */
1931: #define BC_EMIT_TRAMPOLINE(TRAMPSEG, CALLINFO) \
1932: { \
1933: short insn; \
1934: \
1935: /* Push a reference to the callinfo structure. */ \
1936: insn = 0x4879; /* pea xxx.L */ \
1937: seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
1938: seg_refsym (TRAMPSEG, CALLINFO, 0); \
1939: \
1940: /* Call __interp, pop arguments, and return. */ \
1941: insn = 0x4eb9; /* jsr xxx.L */ \
1942: seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
1943: seg_refsym (TRAMPSEG, "__callint", 0); \
1944: insn = 0x588f; /* addql #4, sp */ \
1945: seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
1946: insn = 0x4e75; /* rts */ \
1947: seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
1948: }
1949:
1950:
1951:
1952: #if 0
1953: #define VALIDATE_STACK() if (stack_depth < 0) abort ();
1954: #else
1955: #if 0
1956: #define VALIDATE_STACK() \
1957: fprintf (stderr, " %%%d%%", stack_depth);
1958: #endif
1959: #endif
1960:
1961: /* Define functions defined in aux-output.c and used in templates. */
1962:
1963: extern char *output_move_double ();
1964: extern char *output_move_const_single ();
1965: extern char *output_move_const_double ();
1966: extern char *output_btst ();
1967:
1968:
1969: /* Floating point precision control.
1970:
1971: Define this to a nonzero value if a fppc pass should be performed
1972: by default. -fno-fppc can then be used to turn off the extra pass.
1973: For m68k, this pass assures full ieee compliance for floating point
1974: SF and DF operations, by setting the proper rounding mode to that of
1975: the insn (either single or double), and not extended as it will
1976: usually be. */
1977:
1978: /* #define DEFAULT_FPPC */
1979:
1980: /* These are the same order as the fppc attribute. */
1981: #define FPPC_STATES SINGLE, DOUBLE, CONFLICT
1982:
1983: /* Record the last insn that needs to have the precision control set to
1984: single precision. */
1985: #define FPPC_INFO rtx
1986:
1987: #define FPPC_INFO_INIT(INFO, FIRST) \
1988: (INFO) = 0;
1989:
1990: #define FPPC_CLASSIFY_INSN(INSN) \
1991: (recog_memoized (INSN) < 0 \
1992: ? NONE \
1993: : (enum fppc_state) ((int) get_attr_fppc (INSN) - FPPC_SINGLE + SINGLE))
1994:
1995: /* A transition to SINGLE records INSN as the last insn needing single
1996: precision. If the previous state wasn't SINGLE, make it so. Otherwise,
1997: a transition from SINGLE (to something else) switches the precision
1998: control after the last insn. */
1999:
2000: #define FPPC_SET_STATE(FROM_STATE, TO_STATE, INSN, INFO)\
2001: { \
2002: if (TO_STATE == SINGLE) \
2003: { \
2004: if (FROM_STATE != SINGLE) \
2005: emit_insn_before (gen_fppc_switch (), INSN); \
2006: (INFO) = INSN; \
2007: } \
2008: else if (FROM_STATE == SINGLE) \
2009: { \
2010: emit_insn_after (gen_fppc_switch (), INFO); \
2011: (INFO) = 0; \
2012: } \
2013: }
2014:
2015:
2016: /*
2017: Local variables:
2018: version-control: t
2019: End:
2020: */
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