![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to fsf-pa.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Apple XNU] / GNUtools / cc / config / pa|
Return to fsf-pa.h CVS log | Up to [Apple XNU] / GNUtools / cc / config / pa |
1.1 root 1: /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2: Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4: and Tim Moore ([email protected]) of the Center for
5: Software Science at the University of Utah.
6:
7: This file is part of GNU CC.
8:
9: GNU CC is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 1, or (at your option)
12: any later version.
13:
14: GNU CC is distributed in the hope that it will be useful,
15: but WITHOUT ANY WARRANTY; without even the implied warranty of
16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: GNU General Public License for more details.
18:
19: You should have received a copy of the GNU General Public License
20: along with GNU CC; see the file COPYING. If not, write to
21: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22:
23: enum cmp_type /* comparison type */
24: {
25: CMP_SI, /* compare integers */
26: CMP_SF, /* compare single precision floats */
27: CMP_DF, /* compare double precision floats */
28: CMP_MAX /* max comparison type */
29: };
30:
31: /* Print subsidiary information on the compiler version in use. */
32:
33: #define TARGET_VERSION fprintf (stderr, " (hppa)");
34:
35: /* Run-time compilation parameters selecting different hardware subsets. */
36:
37: extern int target_flags;
38:
39: /* compile code for HP-PA 1.1 ("Snake") */
40:
41: #define TARGET_SNAKE (target_flags & 1)
42:
43: /* Disable all FP registers (they all become fixed). This may be necessary
44: for compiling kernels which perform lazy context switching of FP regs.
45: Note if you use this option and try to perform floating point operations
46: the compiler will abort! */
47:
48: #define TARGET_DISABLE_FPREGS (target_flags & 2)
49:
50: /* Allow unconditional jumps in the delay slots of call instructions. */
51: #define TARGET_JUMP_IN_DELAY (target_flags & 8)
52:
53: /* Force all function calls to indirect addressing via a register. This
54: avoids lossage when the function is very far away from the current PC.
55:
56: ??? What about simple jumps, they can suffer from the same problem.
57: Would require significant surgery in pa.md. */
58:
59: #define TARGET_LONG_CALLS (target_flags & 16)
60:
61: /* Disable indexed addressing modes. */
62:
63: #define TARGET_DISABLE_INDEXING (target_flags & 32)
64:
65: /* Emit code which follows the new portable runtime calling conventions
66: HP wants everyone to use for ELF objects. If at all possible you want
67: to avoid this since it's a performance loss for non-prototyped code. */
68:
69: #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
70:
71: /* Emit directives only understood by GAS. This allows parameter
72: relocations to work for static functions. There is no way
73: to make them work the HP assembler at this time. */
74:
75: #define TARGET_GAS (target_flags & 128)
76:
77: /* Macro to define tables used to set the flags.
78: This is a list in braces of pairs in braces,
79: each pair being { "NAME", VALUE }
80: where VALUE is the bits to set or minus the bits to clear.
81: An empty string NAME is used to identify the default VALUE. */
82:
83: #define TARGET_SWITCHES \
84: {{"snake", 1}, \
85: {"nosnake", -1}, \
86: {"pa-risc-1-0", -1}, \
87: {"pa-risc-1-1", 1}, \
88: {"disable-fpregs", 2}, \
89: {"no-disable-fpregs", 2}, \
90: {"jump-in-delay", 8}, \
91: {"no-jump-in-delay", -8}, \
92: {"long-calls", 16}, \
93: {"no-long-calls", -16}, \
94: {"disable-indexing", 32}, \
95: {"no-disable-indexing", -32},\
96: {"portable-runtime", 64}, \
97: {"no-portable-runtime", -64},\
98: {"gas", 128}, \
99: {"no-gas", -128}, \
100: { "", TARGET_DEFAULT}}
101:
102: #ifndef TARGET_DEFAULT
103: #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
104: #endif
105:
106: #define DBX_DEBUGGING_INFO
107: #define DEFAULT_GDB_EXTENSIONS 1
108:
109: /* This is the way other stabs-in-XXX tools do things. We will be
110: compatable. */
111: #define DBX_BLOCKS_FUNCTION_RELATIVE 1
112:
113: /* Likewise for linenos.
114:
115: We make the first line stab special to avoid adding several
116: gross hacks to GAS. */
117: #undef ASM_OUTPUT_SOURCE_LINE
118: #define ASM_OUTPUT_SOURCE_LINE(file, line) \
119: { static int sym_lineno = 1; \
120: static tree last_function_decl = NULL; \
121: if (current_function_decl == last_function_decl) \
122: fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
123: line, sym_lineno, \
124: XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
125: sym_lineno); \
126: else \
127: fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
128: last_function_decl = current_function_decl; \
129: sym_lineno += 1; }
130:
131: /* But, to make this work, we have to output the stabs for the function
132: name *first*... */
133: #define DBX_FUNCTION_FIRST
134:
135: /* Only lables should ever begin in colunm zero. */
136: #define ASM_STABS_OP "\t.stabs"
137: #define ASM_STABN_OP "\t.stabn"
138:
139: #if (TARGET_DEFAULT & 1) == 0
140: #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
141: %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
142: #else
143: #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}}"
144: #endif
145:
146: /* Defines for a K&R CC */
147:
148: #define CC1_SPEC "%{pg:} %{p:}"
149:
150: #define LINK_SPEC "-u main"
151:
152: /* Allow $ in identifiers. */
153: #define DOLLARS_IN_IDENTIFIERS 2
154:
155: /* Make gcc agree with <machine/ansi.h> */
156:
157: #define SIZE_TYPE "unsigned int"
158: #define PTRDIFF_TYPE "int"
159: #define WCHAR_TYPE "unsigned int"
160: #define WCHAR_TYPE_SIZE 32
161:
162: /* Sometimes certain combinations of command options do not make sense
163: on a particular target machine. You can define a macro
164: `OVERRIDE_OPTIONS' to take account of this. This macro, if
165: defined, is executed once just after all the command options have
166: been parsed.
167:
168: On the PA, it is used to explicitly warn the user that -fpic and -fPIC
169: do not work. */
170:
171: #define OVERRIDE_OPTIONS \
172: { \
173: if (flag_pic != 0) \
174: warning ("-fpic and -fPIC are not supported on the PA."); \
175: }
176:
177: /* Show we can debug even without a frame pointer. */
178: #define CAN_DEBUG_WITHOUT_FP
179:
180: /* Names to predefine in the preprocessor for this target machine. */
181:
182: #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
183:
184: /* target machine storage layout */
185:
186: /* Define this if most significant bit is lowest numbered
187: in instructions that operate on numbered bit-fields. */
188: #define BITS_BIG_ENDIAN 1
189:
190: /* Define this if most significant byte of a word is the lowest numbered. */
191: /* That is true on the HP-PA. */
192: #define BYTES_BIG_ENDIAN 1
193:
194: /* Define this if most significant word of a multiword number is lowest
195: numbered. */
196: /* For the HP-PA we can decide arbitrarily
197: since there are no machine instructions for them. */
198: #define WORDS_BIG_ENDIAN 1
199:
200: /* number of bits in an addressable storage unit */
201: #define BITS_PER_UNIT 8
202:
203: /* Width in bits of a "word", which is the contents of a machine register.
204: Note that this is not necessarily the width of data type `int';
205: if using 16-bit ints on a 68000, this would still be 32.
206: But on a machine with 16-bit registers, this would be 16. */
207: #define BITS_PER_WORD 32
208:
209: /* Width of a word, in units (bytes). */
210: #define UNITS_PER_WORD 4
211:
212: /* Width in bits of a pointer.
213: See also the macro `Pmode' defined below. */
214: #define POINTER_SIZE 32
215:
216: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
217: #define PARM_BOUNDARY 32
218:
219: /* Largest alignment required for any stack parameter, in bits.
220: Don't define this if it is equal to PARM_BOUNDARY */
221: #define MAX_PARM_BOUNDARY 64
222:
223: /* Boundary (in *bits*) on which stack pointer should be aligned. */
224: #define STACK_BOUNDARY 512
225:
226: /* Allocation boundary (in *bits*) for the code of a function. */
227: #define FUNCTION_BOUNDARY 32
228:
229: /* Alignment of field after `int : 0' in a structure. */
230: #define EMPTY_FIELD_BOUNDARY 32
231:
232: /* Every structure's size must be a multiple of this. */
233: #define STRUCTURE_SIZE_BOUNDARY 8
234:
235: /* A bitfield declared as `int' forces `int' alignment for the struct. */
236: #define PCC_BITFIELD_TYPE_MATTERS 1
237:
238: /* No data type wants to be aligned rounder than this. */
239: #define BIGGEST_ALIGNMENT 64
240:
241: /* The .align directive in the HP assembler allows up to a 32 alignment. */
242: #define MAX_OFILE_ALIGNMENT 32768
243:
244: /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
245: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
246: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
247:
248: /* Make arrays of chars word-aligned for the same reasons. */
249: #define DATA_ALIGNMENT(TYPE, ALIGN) \
250: (TREE_CODE (TYPE) == ARRAY_TYPE \
251: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
252: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
253:
254:
255: /* Set this nonzero if move instructions will actually fail to work
256: when given unaligned data. */
257: #define STRICT_ALIGNMENT 1
258:
259: /* Generate calls to memcpy, memcmp and memset. */
260: #define TARGET_MEM_FUNCTIONS
261:
262: /* Standard register usage. */
263:
264: /* Number of actual hardware registers.
265: The hardware registers are assigned numbers for the compiler
266: from 0 to just below FIRST_PSEUDO_REGISTER.
267: All registers that the compiler knows about must be given numbers,
268: even those that are not normally considered general registers.
269:
270: HP-PA 1.0 has 32 fullword registers and 16 floating point
271: registers. The floating point registers hold either word or double
272: word values.
273:
274: 16 additional registers are reserved.
275:
276: HP-PA 1.1 has 32 fullword registers and 32 floating point
277: registers. However, the floating point registers behave
278: differently: the left and right halves of registers are addressable
279: as 32 bit registers. So, we will set things up like the 68k which
280: has different fp units: define separate register sets for the 1.0
281: and 1.1 fp units. */
282:
283: #define FIRST_PSEUDO_REGISTER 101 /* 32 + 12 1.0 regs + 56 1.1 regs + */
284: /* 1 shift reg */
285:
286: /* 1 for registers that have pervasive standard uses
287: and are not available for the register allocator.
288:
289: On the HP-PA, these are:
290: Reg 0 = 0 (hardware). However, 0 is used for condition code,
291: so is not fixed.
292: Reg 1 = ADDIL target/Temporary (hardware).
293: Reg 2 = Return Pointer
294: Reg 3 = Frame Pointer
295: Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
296: Reg 4-18 = Preserved Registers
297: Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
298: Reg 20-22 = Temporary Registers
299: Reg 23-26 = Temporary/Parameter Registers
300: Reg 27 = Global Data Pointer (hp)
301: Reg 28 = Temporary/???/Return Value register
302: Reg 29 = Temporary/Static Chain/Return Value register
303: Reg 30 = stack pointer
304: Reg 31 = Temporary/Millicode Return Pointer (hp)
305:
306: Freg 0-3 = Status Registers -- Not known to the compiler.
307: Freg 4-7 = Arguments/Return Value
308: Freg 8-11 = Temporary Registers
309: Freg 12-15 = Preserved Registers
310:
311: Freg 16-31 = Reserved
312:
313: On the Snake, fp regs are
314:
315: Freg 0-3 = Status Registers -- Not known to the compiler.
316: Freg 4L-7R = Arguments/Return Value
317: Freg 8L-11R = Temporary Registers
318: Freg 12L-21R = Preserved Registers
319: Freg 22L-31R = Temporary Registers
320:
321: */
322:
323: #define FIXED_REGISTERS \
324: {0, 0, 0, 0, 0, 0, 0, 0, \
325: 0, 0, 0, 0, 0, 0, 0, 0, \
326: 0, 0, 0, 0, 0, 0, 0, 0, \
327: 0, 0, 0, 1, 0, 0, 1, 0, \
328: /* 1.0 fp registers */ \
329: 0, 0, 0, 0, \
330: 0, 0, 0, 0, 0, 0, 0, 0, \
331: /* 1.1 fp registers */ \
332: 0, 0, 0, 0, 0, 0, 0, 0, \
333: 0, 0, 0, 0, 0, 0, 0, 0, \
334: 0, 0, 0, 0, 0, 0, 0, 0, \
335: 0, 0, 0, 0, 0, 0, 0, 0, \
336: 0, 0, 0, 0, 0, 0, 0, 0, \
337: 0, 0, 0, 0, 0, 0, 0, 0, \
338: 0, 0, 0, 0, 0, 0, 0, 0, \
339: 0}
340:
341: /* 1 for registers not available across function calls.
342: These must include the FIXED_REGISTERS and also any
343: registers that can be used without being saved.
344: The latter must include the registers where values are returned
345: and the register where structure-value addresses are passed.
346: Aside from that, you can include as many other registers as you like. */
347: #define CALL_USED_REGISTERS \
348: {1, 1, 1, 0, 0, 0, 0, 0, \
349: 0, 0, 0, 0, 0, 0, 0, 0, \
350: 0, 0, 0, 1, 1, 1, 1, 1, \
351: 1, 1, 1, 1, 1, 1, 1, 1, \
352: /* 1.0 fp registers */ \
353: 1, 1, 1, 1, \
354: 1, 1, 1, 1, 0, 0, 0, 0, \
355: /* 1.1 fp registers */ \
356: 1, 1, 1, 1, 1, 1, 1, 1, \
357: 1, 1, 1, 1, 1, 1, 1, 1, \
358: 0, 0, 0, 0, 0, 0, 0, 0, \
359: 0, 0, 0, 0, 0, 0, 0, 0, \
360: 0, 0, 0, 0, 1, 1, 1, 1, \
361: 1, 1, 1, 1, 1, 1, 1, 1, \
362: 1, 1, 1, 1, 1, 1, 1, 1, \
363: 1}
364:
365: /* Make sure everything's fine if we *don't* have a given processor.
366: This assumes that putting a register in fixed_regs will keep the
367: compiler's mitts completely off it. We don't bother to zero it out
368: of register classes. */
369:
370: #define CONDITIONAL_REGISTER_USAGE \
371: { \
372: int i; \
373: HARD_REG_SET x; \
374: if (!TARGET_SNAKE) \
375: { \
376: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
377: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
378: if (TEST_HARD_REG_BIT (x, i)) \
379: fixed_regs[i] = call_used_regs[i] = 1; \
380: } \
381: else if (TARGET_DISABLE_FPREGS) \
382: { \
383: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]);\
384: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
385: if (TEST_HARD_REG_BIT (x, i)) \
386: fixed_regs[i] = call_used_regs[i] = 1; \
387: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
388: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
389: if (TEST_HARD_REG_BIT (x, i)) \
390: fixed_regs[i] = call_used_regs[i] = 1; \
391: } \
392: else \
393: { \
394: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
395: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
396: if (TEST_HARD_REG_BIT (x, i)) \
397: fixed_regs[i] = call_used_regs[i] = 1; \
398: } \
399: /* This makes cse think PIC_OFFSET_TABLE_REGNUM is not clobbered
400: in calls. \
401: if (flag_pic) \
402: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; */ \
403: }
404:
405: /* Allocated the call used registers first. This should minimize
406: the number of registers that need to be saved (as call used
407: registers will generally not be allocated across a call).
408:
409: Experimentation has shown slightly better results by allocating
410: FP registers first. */
411:
412: #define REG_ALLOC_ORDER \
413: /* 1.0 caller-saved fp regs. */ \
414: {36, 37, 38, 39, 32, 33, 34, 35, \
415: /* 1.1 caller-saved fp regs. */ \
416: 52, 53, 54, 55, 56, 57, 58, 59, \
417: 80, 81, 82, 83, 84, 85, 86, 87, \
418: 88, 89, 90, 91, 92, 93, 94, 95, \
419: 96, 97, 98, 99, \
420: 44, 45, 46, 47, 48, 49, 50, 51, \
421: /* caller-saved general regs. */ \
422: 19, 20, 21, 22, 23, 24, 25, 26, \
423: 27, 28, 29, 31, 2, \
424: /* 1.0 callee-saved fp regs. */ \
425: 40, 41, 42, 43, \
426: /* 1.1 callee-saved fp regs. */ \
427: 60, 61, 62, 63, 64, 65, 66, 67, \
428: 68, 69, 70, 71, 72, 73, 74, 75, \
429: 76, 77, 78, 79, \
430: /* callee-saved general regs. */ \
431: 3, 4, 5, 6, 7, 8, 9, 10, \
432: 11, 12, 13, 14, 15, 16, 17, 18, \
433: /* special registers. */ \
434: 1, 30, 0, 100}
435:
436:
437: /* Return number of consecutive hard regs needed starting at reg REGNO
438: to hold something of mode MODE.
439: This is ordinarily the length in words of a value of mode MODE
440: but can be less for certain modes in special long registers.
441:
442: On the HP-PA, ordinary registers hold 32 bits worth;
443: The floating point registers are 64 bits wide. Snake fp regs are 32
444: bits wide */
445: #define HARD_REGNO_NREGS(REGNO, MODE) \
446: (((REGNO) < 32 || (REGNO) >= 44) \
447: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
448:
449: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
450: On the HP-PA, the cpu registers can hold any mode. We
451: force this to be an even register is it cannot hold the full mode. */
452: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
453: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
454: : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
455: : (REGNO) < 44 ? (GET_MODE_SIZE (MODE) <= 4 \
456: || (GET_MODE_SIZE (MODE) > 4 \
457: && GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
458: : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
459: : 1))
460:
461: /* Value is 1 if it is a good idea to tie two pseudo registers
462: when one has mode MODE1 and one has mode MODE2.
463: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
464: for any hard reg, then this must be 0 for correct output. */
465: #define MODES_TIEABLE_P(MODE1, MODE2) \
466: (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
467:
468: /* Specify the registers used for certain standard purposes.
469: The values of these macros are register numbers. */
470:
471: /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
472: /* #define PC_REGNUM */
473:
474: /* Register to use for pushing function arguments. */
475: #define STACK_POINTER_REGNUM 30
476:
477: /* Base register for access to local variables of the function. */
478: #define FRAME_POINTER_REGNUM 3
479:
480: /* Value should be nonzero if functions must have frame pointers. */
481: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
482:
483:
484: /* C statement to store the difference between the frame pointer
485: and the stack pointer values immediately after the function prologue.
486:
487: Note, we always pretend that this is a leaf function because if
488: it's not, there's no point in trying to eliminate the
489: frame pointer. If it is a leaf function, we guessed right! */
490: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
491: do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
492:
493: /* Base register for access to arguments of the function. */
494: #define ARG_POINTER_REGNUM 3
495:
496: /* Register in which static-chain is passed to a function. */
497: /* ??? */
498: #define STATIC_CHAIN_REGNUM 29
499:
500: /* Register which holds offset table for position-independent
501: data references. */
502:
503: #define PIC_OFFSET_TABLE_REGNUM 19
504:
505: #define FINALIZE_PIC finalize_pic ()
506:
507: /* SOM ABI says that objects larger than 64 bits are returned in memory. */
508: #define RETURN_IN_MEMORY(TYPE) \
509: (TYPE_MODE (TYPE) == BLKmode || int_size_in_bytes (TYPE) > 8)
510:
511: /* Register in which address to store a structure value
512: is passed to a function. */
513: #define STRUCT_VALUE_REGNUM 28
514:
515: /* Define the classes of registers for register constraints in the
516: machine description. Also define ranges of constants.
517:
518: One of the classes must always be named ALL_REGS and include all hard regs.
519: If there is more than one class, another class must be named NO_REGS
520: and contain no registers.
521:
522: The name GENERAL_REGS must be the name of a class (or an alias for
523: another name such as ALL_REGS). This is the class of registers
524: that is allowed by "g" or "r" in a register constraint.
525: Also, registers outside this class are allocated only when
526: instructions express preferences for them.
527:
528: The classes must be numbered in nondecreasing order; that is,
529: a larger-numbered class must never be contained completely
530: in a smaller-numbered class.
531:
532: For any two classes, it is very desirable that there be another
533: class that represents their union. */
534:
535: /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
536: 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
537: fmpyadd and fmpysub are restricted.
538:
539: FP_OR_SNAKE_FP_REGS is for reload_{in,out}di only and isn't used
540: anywhere else. */
541:
542: enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
543: HI_SNAKE_FP_REGS, SNAKE_FP_REGS, GENERAL_OR_SNAKE_FP_REGS,
544: FP_OR_SNAKE_FP_REGS, NON_SHIFT_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
545:
546: #define N_REG_CLASSES (int) LIM_REG_CLASSES
547:
548: /* Give names of register classes as strings for dump file. */
549:
550: #define REG_CLASS_NAMES \
551: { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\
552: "HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\
553: "FP_OR_SNAKE_FP_REGS", "NON_SHIFT_REGS", "SHIFT_REGS", "ALL_REGS"}
554:
555: /* Define which registers fit in which classes.
556: This is an initializer for a vector of HARD_REG_SET
557: of length N_REG_CLASSES. Register 0, the "condition code" register,
558: is in no class. */
559:
560: #define REG_CLASS_CONTENTS \
561: { {0, 0, 0, 0}, /* NO_REGS */ \
562: {0x2, 0, 0, 0}, /* R1_REGS */ \
563: {-2, 0, 0, 0}, /* GENERAL_REGS */ \
564: {0, 0xfff, 0, 0}, /* FP_REGS */ \
565: {-2, 0xfff, 0, 0}, /* GENERAL_OR_FP_REGS */\
566: {0, 0, 0xfffffff0, 0xf}, /* HI_SNAKE_FP_REGS */ \
567: {0, 0xfffff000, ~0, 0xf}, /* SNAKE_FP_REGS */ \
568: {-2, 0xfffff000, ~0, 0xf}, /* GENERAL_OR_SNAKE_FP_REGS */\
569: {0, ~0, ~0, 0xf}, /* FP_OR_SNAKE_FP_REGS */\
570: {-2, ~0, ~0, ~0x10}, /* NON_SHIFT_REGS */ \
571: {0, 0, 0, 0x10}, /* SHIFT_REGS */ \
572: {-2, ~0, ~0, 0x1f}} /* ALL_REGS */
573:
574: /* The same information, inverted:
575: Return the class number of the smallest class containing
576: reg number REGNO. This could be a conditional expression
577: or could index an array. */
578:
579: #define REGNO_REG_CLASS(REGNO) \
580: ((REGNO) == 0 ? NO_REGS \
581: : (REGNO) == 1 ? R1_REGS \
582: : (REGNO) < 32 ? GENERAL_REGS \
583: : (REGNO) < 44 ? FP_REGS \
584: : (REGNO) < 68 ? SNAKE_FP_REGS \
585: : (REGNO) < 100 ? HI_SNAKE_FP_REGS \
586: : SHIFT_REGS)
587:
588: /* The class value for index registers, and the one for base regs. */
589: #define INDEX_REG_CLASS GENERAL_REGS
590: #define BASE_REG_CLASS GENERAL_REGS
591:
592: #define FP_REG_CLASS_P(CLASS) \
593: (CLASS == FP_REGS || CLASS == SNAKE_FP_REGS || CLASS == HI_SNAKE_FP_REGS)
594:
595: /* Get reg_class from a letter such as appears in the machine description.
596: Note 'Z' is not the same as 'r' since SHIFT_REGS is not part of
597: GENERAL_REGS. */
598:
599: #define REG_CLASS_FROM_LETTER(C) \
600: ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
601: ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
602: ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) : \
603: ((C) == 'q' ? SHIFT_REGS : \
604: ((C) == 'a' ? R1_REGS : \
605: ((C) == 'z' ? FP_OR_SNAKE_FP_REGS : \
606: ((C) == 'Z' ? ALL_REGS : NO_REGS)))))))
607:
608: /* The letters I, J, K, L and M in a register constraint string
609: can be used to stand for particular ranges of immediate operands.
610: This macro defines what the ranges are.
611: C is the letter, and VALUE is a constant value.
612: Return 1 if VALUE is in the range specified by C.
613:
614: `I' is used for the 11 bit constants.
615: `J' is used for the 14 bit constants.
616: `K' is used for values that can be moved with a zdepi insn.
617: `L' is used for the 5 bit constants.
618: `M' is used for 0.
619: `N' is used for values with the least significant 11 bits equal to zero.
620: `O' is used for numbers n such that n+1 is a power of 2.
621: */
622:
623: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
624: ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
625: : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
626: : (C) == 'K' ? zdepi_cint_p (VALUE) \
627: : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
628: : (C) == 'M' ? (VALUE) == 0 \
629: : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
630: : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
631: : (C) == 'P' ? and_mask_p (VALUE) \
632: : 0)
633:
634: /* Similar, but for floating or large integer constants, and defining letters
635: G and H. Here VALUE is the CONST_DOUBLE rtx itself.
636:
637: For PA, `G' is the floating-point constant zero. `H' is undefined. */
638:
639: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
640: ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
641: && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
642: : 0)
643:
644: /* Given an rtx X being reloaded into a reg required to be
645: in class CLASS, return the class of reg to actually use.
646: In general this is just CLASS; but on some machines
647: in some cases it is preferable to use a more restrictive class. */
648: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
649:
650: /* Return the register class of a scratch register needed to copy IN into
651: or out of a register in CLASS in MODE. If it can be done directly,
652: NO_REGS is returned. */
653:
654: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
655: secondary_reload_class (CLASS, MODE, IN)
656:
657: /* On the PA it is not possible to directly move data between
658: GENERAL_REGS and FP_REGS. */
659: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
660: ((FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2)) \
661: || (! FP_REG_CLASS_P (CLASS1) && FP_REG_CLASS_P (CLASS2)))
662:
663: /* Return the stack location to use for secondary memory needed reloads. */
664: #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
665: gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
666:
667: /* Return the maximum number of consecutive registers
668: needed to represent mode MODE in a register of class CLASS. */
669: #define CLASS_MAX_NREGS(CLASS, MODE) \
670: ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
671:
672: /* Stack layout; function entry, exit and calling. */
673:
674: /* Define this if pushing a word on the stack
675: makes the stack pointer a smaller address. */
676: /* #define STACK_GROWS_DOWNWARD */
677:
678: /* Believe it or not. */
679: #define ARGS_GROW_DOWNWARD
680:
681: /* Define this if the nominal address of the stack frame
682: is at the high-address end of the local variables;
683: that is, each additional local variable allocated
684: goes at a more negative offset in the frame. */
685: /* #define FRAME_GROWS_DOWNWARD */
686:
687: /* Offset within stack frame to start allocating local variables at.
688: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
689: first local allocated. Otherwise, it is the offset to the BEGINNING
690: of the first local allocated. */
691: #define STARTING_FRAME_OFFSET 8
692:
693: /* If we generate an insn to push BYTES bytes,
694: this says how many the stack pointer really advances by.
695: On the HP-PA, don't define this because there are no push insns. */
696: /* #define PUSH_ROUNDING(BYTES) */
697:
698: /* Offset of first parameter from the argument pointer register value.
699: This value will be negated because the arguments grow down.
700: Also note that on STACK_GROWS_UPWARD machines (such as this one)
701: this is the distance from the frame pointer to the end of the first
702: argument, not it's beginning. To get the real offset of the first
703: argument, the size of the argument must be added.
704:
705: ??? Have to check on this.*/
706:
707: #define FIRST_PARM_OFFSET(FNDECL) -32
708:
709: /* Absolute value of offset from top-of-stack address to location to store the
710: function parameter if it can't go in a register.
711: Addresses for following parameters are computed relative to this one. */
712: #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
713:
714:
715: /* When a parameter is passed in a register, stack space is still
716: allocated for it. */
717: #define REG_PARM_STACK_SPACE(DECL) 16
718:
719: /* Define this if the above stack space is to be considered part of the
720: space allocated by the caller. */
721: #define OUTGOING_REG_PARM_STACK_SPACE
722:
723: /* Keep the stack pointer constant throughout the function.
724: This is both an optimization and a necessity: longjmp
725: doesn't behave itself when the stack pointer moves within
726: the function! */
727: #define ACCUMULATE_OUTGOING_ARGS
728:
729: /* The weird HPPA calling conventions require a minimum of 48 bytes on
730: the stack: 16 bytes for register saves, and 32 bytes for magic.
731: This is the difference between the logical top of stack and the
732: actual sp. */
733: #define STACK_POINTER_OFFSET -32
734:
735: #define STACK_DYNAMIC_OFFSET(FNDECL) \
736: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
737:
738: /* Value is 1 if returning from a function call automatically
739: pops the arguments described by the number-of-args field in the call.
740: FUNTYPE is the data type of the function (as a tree),
741: or for a library call it is an identifier node for the subroutine name. */
742:
743: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
744:
745: /* Define how to find the value returned by a function.
746: VALTYPE is the data type of the value (as a tree).
747: If the precise function being called is known, FUNC is its FUNCTION_DECL;
748: otherwise, FUNC is 0. */
749:
750: /* On the HP-PA the value is found in register(s) 28(-29), unless
751: the mode is SF or DF. Then the value is returned in fr4 (32, ) */
752:
753:
754: #define FUNCTION_VALUE(VALTYPE, FUNC) \
755: gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode || \
756: TYPE_MODE (VALTYPE) == DFmode) ? \
757: (TARGET_SNAKE ? 44 : 32) : 28))
758:
759: /* Define how to find the value returned by a library function
760: assuming the value has mode MODE. */
761:
762: #define LIBCALL_VALUE(MODE) \
763: gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
764: (TARGET_SNAKE ? 44 : 32) : 28))
765:
766: /* 1 if N is a possible register number for a function value
767: as seen by the caller. */
768:
769: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == (TARGET_SNAKE ? 44 : 32))
770:
771: /* 1 if N is a possible register number for function argument passing. */
772:
773: #define FUNCTION_ARG_REGNO_P(N) \
774: (((N) >= 23 && (N) <= 26) \
775: || ((N) >= 32 && (N) <= 35 && ! TARGET_SNAKE) \
776: || ((N) >= 44 && (N) <= 51 && TARGET_SNAKE))
777:
778: /* Define a data type for recording info about an argument list
779: during the scan of that argument list. This data type should
780: hold all necessary information about the function itself
781: and about the args processed so far, enough to enable macros
782: such as FUNCTION_ARG to determine where the next arg should go.
783:
784: On the HP-PA, this is a single integer, which is a number of words
785: of arguments scanned so far (including the invisible argument,
786: if any, which holds the structure-value-address).
787: Thus 4 or more means all following args should go on the stack. */
788:
789: struct hppa_args {int words, nargs_prototype; };
790:
791: #define CUMULATIVE_ARGS struct hppa_args
792:
793: /* Initialize a variable CUM of type CUMULATIVE_ARGS
794: for a call to a function whose data type is FNTYPE.
795: For a library call, FNTYPE is 0. */
796:
797: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
798: (CUM).words = 0, \
799: (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
800: ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
801: + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
802: || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
803: : 0)
804:
805:
806:
807: /* Similar, but when scanning the definition of a procedure. We always
808: set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
809:
810: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
811: (CUM).words = 0, \
812: (CUM).nargs_prototype = 1000
813:
814: /* Figure out the size in words of the function argument. */
815:
816: #define FUNCTION_ARG_SIZE(MODE, TYPE) \
817: ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
818:
819: /* Update the data in CUM to advance over an argument
820: of mode MODE and data type TYPE.
821: (TYPE is null for libcalls where that information may not be available.) */
822:
823: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
824: { (CUM).nargs_prototype--; \
825: ((((CUM).words & 01) && (TYPE) != 0 \
826: && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
827: && (CUM).words++), \
828: (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
829: }
830:
831: /* Determine where to put an argument to a function.
832: Value is zero to push the argument on the stack,
833: or a hard register in which to store the argument.
834:
835: MODE is the argument's machine mode.
836: TYPE is the data type of the argument (as a tree).
837: This is null for libcalls where that information may
838: not be available.
839: CUM is a variable of type CUMULATIVE_ARGS which gives info about
840: the preceding args and about the function being called.
841: NAMED is nonzero if this argument is a named parameter
842: (otherwise it is an extra parameter matching an ellipsis).
843:
844: On the HP-PA the first four words of args are normally in registers
845: and the rest are pushed. But any arg that won't entirely fit in regs
846: is pushed.
847:
848: Arguments passed in registers are either 1 or 2 words long.
849:
850: The caller must make a distinction between calls to explicitly named
851: functions and calls through pointers to functions -- the conventions
852: are different! Calls through pointers to functions only use general
853: registers for the first four argument words.
854:
855: Of course all this is different for the portable runtime model
856: HP wants everyone to use for ELF. Ugh. Here's a quick description
857: of how it's supposed to work.
858:
859: 1) callee side remains unchanged. It expects integer args to be
860: in the integer registers, float args in the float registers and
861: unnamed args in integer registers.
862:
863: 2) caller side now depends on if the function being called has
864: a prototype in scope (rather than if it's being called indirectly).
865:
866: 2a) If there is a prototype in scope, then arguments are passed
867: according to their type (ints in integer registers, floats in float
868: registers, unnamed args in integer registers.
869:
870: 2b) If there is no prototype in scope, then floating point arguments
871: are passed in both integer and float registers. egad.
872:
873: FYI: The portable parameter passing conventions are almost exactly like
874: the standard parameter passing conventions on the RS6000. That's why
875: you'll see lots of similar code in rs6000.h. */
876:
877: #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
878:
879: /* Do not expect to understand this without reading it several times. I'm
880: tempted to try and simply it, but I worry about breaking something. */
881:
882: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
883: (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
884: ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
885: || !FLOAT_MODE_P (MODE) || (CUM).nargs_prototype > 0) \
886: ? gen_rtx (REG, (MODE), \
887: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
888: ? (((!current_call_is_indirect || TARGET_PORTABLE_RUNTIME) \
889: && (MODE) == DFmode) \
890: ? ((CUM).words \
891: ? (TARGET_SNAKE ? 50 : 35) \
892: : (TARGET_SNAKE ? 46 : 33)) \
893: : ((CUM).words ? 23 : 25)) \
894: : (((!current_call_is_indirect || TARGET_PORTABLE_RUNTIME) \
895: && (MODE) == SFmode) \
896: ? (TARGET_SNAKE \
897: ? 44 + 2 * (CUM).words \
898: : 32 + (CUM).words) \
899: : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
900: (TYPE))))))\
901: /* We are calling a non-prototyped function with floating point \
902: arguments using the portable conventions. */ \
903: : gen_rtx (EXPR_LIST, VOIDmode, \
904: gen_rtx (REG, (MODE), \
905: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
906: ? ((CUM).words \
907: ? (TARGET_SNAKE ? 50 : 35) \
908: : (TARGET_SNAKE ? 46 : 33)) \
909: : (TARGET_SNAKE \
910: ? 44 + 2 * (CUM).words \
911: : 32 + (CUM).words))), \
912: gen_rtx (REG, (MODE), \
913: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
914: ? ((CUM).words ? 23 : 25) \
915: : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
916: (TYPE)))))) \
917: /* Pass this parameter in the stack. */ \
918: : 0)
919:
920: /* For an arg passed partly in registers and partly in memory,
921: this is the number of registers used.
922: For args passed entirely in registers or entirely in memory, zero. */
923:
924: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
925:
926: /* If defined, a C expression that gives the alignment boundary, in
927: bits, of an argument with the specified mode and type. If it is
928: not defined, `PARM_BOUNDARY' is used for all arguments. */
929:
930: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
931: (((TYPE) != 0) \
932: ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
933: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
934: ? PARM_BOUNDARY \
935: : GET_MODE_ALIGNMENT(MODE)))
936:
937: /* Arguments larger than eight bytes are passed by invisible reference */
938:
939: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
940: ((TYPE) && int_size_in_bytes (TYPE) > 8)
941:
942: extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
943: extern enum cmp_type hppa_branch_type;
944:
945: /* Output the label for a function definition. */
946: #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
947: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
948: do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
949: fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
950: #else
951: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
952: do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
953: fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
954: #endif
955:
956: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
957: do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
958: tree tree_type = TREE_TYPE (DECL); \
959: tree parm; \
960: int i; \
961: if (TREE_PUBLIC (DECL) || TARGET_GAS) \
962: { extern int current_function_varargs; \
963: if (TREE_PUBLIC (DECL)) \
964: { \
965: fputs ("\t.EXPORT ", FILE); \
966: assemble_name (FILE, NAME); \
967: fputs (",ENTRY,PRIV_LEV=3", FILE); \
968: } \
969: else \
970: { \
971: fputs ("\t.PARAM ", FILE); \
972: assemble_name (FILE, NAME); \
973: } \
974: if (TARGET_PORTABLE_RUNTIME) \
975: { \
976: fputs ("ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
977: fputs ("RTNVAL=NO\n", FILE); \
978: break; \
979: } \
980: for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
981: parm = TREE_CHAIN (parm)) \
982: { \
983: if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
984: fprintf (FILE, ",ARGW%d=FR", i++); \
985: else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
986: { \
987: if (i <= 2) \
988: { \
989: if (i == 1) i++; \
990: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
991: } \
992: else \
993: break; \
994: } \
995: else \
996: { \
997: int arg_size = \
998: FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
999: DECL_ARG_TYPE (parm)); \
1000: if (arg_size == 2 && i <= 2) \
1001: { \
1002: if (i == 1) i++; \
1003: fprintf (FILE, ",ARGW%d=GR", i++); \
1004: fprintf (FILE, ",ARGW%d=GR", i++); \
1005: } \
1006: else if (arg_size == 1) \
1007: fprintf (FILE, ",ARGW%d=GR", i++); \
1008: else \
1009: i += arg_size; \
1010: } \
1011: } \
1012: /* anonymous args */ \
1013: if ((TYPE_ARG_TYPES (tree_type) != 0 \
1014: && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1015: != void_type_node)) \
1016: || current_function_varargs) \
1017: { \
1018: for (; i < 4; i++) \
1019: fprintf (FILE, ",ARGW%d=GR", i); \
1020: } \
1021: if (TYPE_MODE (fntype) == DFmode) \
1022: fprintf (FILE, ",RTNVAL=FR"); \
1023: else if (TYPE_MODE (fntype) == SFmode) \
1024: fprintf (FILE, ",RTNVAL=FU"); \
1025: else if (fntype != void_type_node) \
1026: fprintf (FILE, ",RTNVAL=GR"); \
1027: fputs ("\n", FILE); \
1028: }} while (0)
1029:
1030: /* This macro generates the assembly code for function entry.
1031: FILE is a stdio stream to output the code to.
1032: SIZE is an int: how many units of temporary storage to allocate.
1033: Refer to the array `regs_ever_live' to determine which registers
1034: to save; `regs_ever_live[I]' is nonzero if register number I
1035: is ever used in the function. This macro is responsible for
1036: knowing which registers should not be saved even if used. */
1037:
1038: /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1039: of memory. If any fpu reg is used in the function, we allocate
1040: such a block here, at the bottom of the frame, just in case it's needed.
1041:
1042: If this function is a leaf procedure, then we may choose not
1043: to do a "save" insn. The decision about whether or not
1044: to do this is made in regclass.c. */
1045:
1046: #define FUNCTION_PROLOGUE(FILE, SIZE) \
1047: output_function_prologue (FILE, SIZE)
1048:
1049: /* Output assembler code to FILE to increment profiler label # LABELNO
1050: for profiling a function entry.
1051:
1052: Because HPUX _mcount is so different, we actually emit the
1053: profiling code in function_prologue. This just stores LABELNO for
1054: that. */
1055:
1056: #define PROFILE_BEFORE_PROLOGUE
1057: #define FUNCTION_PROFILER(FILE, LABELNO) \
1058: { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1059:
1060: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1061: the stack pointer does not matter. The value is tested only in
1062: functions that have frame pointers.
1063: No definition is equivalent to always zero. */
1064:
1065: extern int may_call_alloca;
1066: extern int current_function_pretend_args_size;
1067:
1068: #define EXIT_IGNORE_STACK \
1069: (get_frame_size () != 0 \
1070: || current_function_calls_alloca || current_function_outgoing_args_size)
1071:
1072:
1073: /* This macro generates the assembly code for function exit,
1074: on machines that need it. If FUNCTION_EPILOGUE is not defined
1075: then individual return instructions are generated for each
1076: return statement. Args are same as for FUNCTION_PROLOGUE.
1077:
1078: The function epilogue should not depend on the current stack pointer!
1079: It should use the frame pointer only. This is mandatory because
1080: of alloca; we also take advantage of it to omit stack adjustments
1081: before returning. */
1082:
1083: /* This declaration is needed due to traditional/ANSI
1084: incompatibilities which cannot be #ifdefed away
1085: because they occur inside of macros. Sigh. */
1086: extern union tree_node *current_function_decl;
1087:
1088: #define FUNCTION_EPILOGUE(FILE, SIZE) \
1089: output_function_epilogue (FILE, SIZE)
1090:
1091: /* Output assembler code for a block containing the constant parts
1092: of a trampoline, leaving space for the variable parts.\
1093:
1094: The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1095: and then branches to the specified routine.
1096:
1097: This code template is copied from text segment to stack location
1098: and then patched with INITIALIZE_TRAMPOLINE to contain
1099: valid values, and then entered as a subroutine.
1100:
1101: It is best to keep this as small as possible to avoid having to
1102: flush multiple lines in the cache. */
1103:
1104: #define TRAMPOLINE_TEMPLATE(FILE) \
1105: { \
1106: fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1107: fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1108: fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1109: fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1110: fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1111: fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1112: fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1113: fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1114: fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1115: fprintf (FILE, "\t.word 0\n"); \
1116: fprintf (FILE, "\t.word 0\n"); \
1117: }
1118:
1119: /* Length in units of the trampoline for entering a nested function.
1120:
1121: Flush the cache entries corresponding to the first and last addresses
1122: of the trampoline. This is necessary as the trampoline may cross two
1123: cache lines.
1124:
1125: If the code part of the trampoline ever grows to > 32 bytes, then it
1126: will become necessary to hack on the cacheflush pattern in pa.md. */
1127:
1128: #define TRAMPOLINE_SIZE (11 * 4)
1129:
1130: /* Emit RTL insns to initialize the variable parts of a trampoline.
1131: FNADDR is an RTX for the address of the function's pure code.
1132: CXT is an RTX for the static chain value for the function.
1133:
1134: Move the function address to the trampoline template at offset 12.
1135: Move the static chain value to trampoline template at offset 16. */
1136:
1137: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1138: { \
1139: rtx start_addr, end_addr; \
1140: \
1141: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1142: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1143: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1144: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1145: /* fdc and fic only use registers for the address to flush, \
1146: they do not accept integer displacements. */ \
1147: start_addr = force_reg (SImode, (TRAMP)); \
1148: end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1149: emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1150: end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1151: emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1152: gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1153: }
1154:
1155: /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1156: reference the 4 integer arg registers and 4 fp arg registers.
1157: Ordinarily they are not call used registers, but they are for
1158: _builtin_saveregs, so we must make this explicit. */
1159:
1160: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1161:
1162:
1163: /* Addressing modes, and classification of registers for them. */
1164:
1165: #define HAVE_POST_INCREMENT
1166: #define HAVE_POST_DECREMENT
1167:
1168: #define HAVE_PRE_DECREMENT
1169: #define HAVE_PRE_INCREMENT
1170:
1171: /* Macros to check register numbers against specific register classes. */
1172:
1173: /* These assume that REGNO is a hard or pseudo reg number.
1174: They give nonzero only if REGNO is a hard reg of the suitable class
1175: or a pseudo reg currently allocated to a suitable hard reg.
1176: Since they use reg_renumber, they are safe only once reg_renumber
1177: has been allocated, which happens in local-alloc.c. */
1178:
1179: #define REGNO_OK_FOR_INDEX_P(REGNO) \
1180: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1181: #define REGNO_OK_FOR_BASE_P(REGNO) \
1182: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1183: #define REGNO_OK_FOR_FP_P(REGNO) \
1184: (((REGNO) >= 32 && (REGNO) <= 99)\
1185: || (reg_renumber[REGNO] >= 32 && reg_renumber[REGNO] <= 99))
1186:
1187: /* Now macros that check whether X is a register and also,
1188: strictly, whether it is in a specified class.
1189:
1190: These macros are specific to the the HP-PA, and may be used only
1191: in code for printing assembler insns and in conditions for
1192: define_optimization. */
1193:
1194: /* 1 if X is an fp register. */
1195:
1196: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1197:
1198: /* Maximum number of registers that can appear in a valid memory address. */
1199:
1200: #define MAX_REGS_PER_ADDRESS 2
1201:
1202: /* Recognize any constant value that is a valid address except
1203: for symbolic addresses. We get better CSE by rejecting them
1204: here and allowing hppa_legitimize_address to break them up. We
1205: use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1206:
1207: #define CONSTANT_ADDRESS_P(X) \
1208: ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1209: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1210: || GET_CODE (X) == HIGH) \
1211: && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1212:
1213: /* Include all constant integers and constant doubles, but not
1214: floating-point, except for floating-point zero. */
1215:
1216: #define LEGITIMATE_CONSTANT_P(X) \
1217: (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1218: || (X) == CONST0_RTX (GET_MODE (X)))
1219:
1220: /* Subroutine for EXTRA_CONSTRAINT.
1221:
1222: Return 1 iff OP is a pseudo which did not get a hard register and
1223: we are running the reload pass. */
1224:
1225: #define IS_RELOADING_PSEUDO_P(OP) \
1226: ((reload_in_progress \
1227: && GET_CODE (OP) == REG \
1228: && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1229: && reg_renumber [REGNO (OP)] < 0))
1230:
1231: /* Optional extra constraints for this machine. Borrowed from sparc.h.
1232:
1233: For the HPPA, `Q' means that this is a memory operand but not a
1234: symbolic memory operand. Note that an unassigned pseudo register
1235: is such a memory operand. Needed because reload will generate
1236: these things in insns and then not re-recognize the insns, causing
1237: constrain_operands to fail.
1238:
1239: Also note `Q' accepts any memory operand during the reload pass.
1240: This includes out-of-range displacements in reg+d addressing.
1241: This makes for better code. (??? For 2.5 address this issue).
1242:
1243: `R' is unused.
1244:
1245: `S' is unused.
1246:
1247: `T' is for fp loads and stores. */
1248: #define EXTRA_CONSTRAINT(OP, C) \
1249: ((C) == 'Q' ? \
1250: (IS_RELOADING_PSEUDO_P (OP) \
1251: || (GET_CODE (OP) == MEM \
1252: && reload_in_progress) \
1253: || (GET_CODE (OP) == MEM \
1254: && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1255: && ! symbolic_memory_operand (OP, VOIDmode))) \
1256: : ((C) == 'T' ? \
1257: (GET_CODE (OP) == MEM \
1258: /* Using DFmode forces only short displacements \
1259: to be recognized as valid in reg+d addresses. */\
1260: && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1261:
1262: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1263: and check its validity for a certain class.
1264: We have two alternate definitions for each of them.
1265: The usual definition accepts all pseudo regs; the other rejects
1266: them unless they have been allocated suitable hard regs.
1267: The symbol REG_OK_STRICT causes the latter definition to be used.
1268:
1269: Most source files want to accept pseudo regs in the hope that
1270: they will get allocated to the class that the insn wants them to be in.
1271: Source files for reload pass need to be strict.
1272: After reload, it makes no difference, since pseudo regs have
1273: been eliminated by then. */
1274:
1275: #ifndef REG_OK_STRICT
1276:
1277: /* Nonzero if X is a hard reg that can be used as an index
1278: or if it is a pseudo reg. */
1279: #define REG_OK_FOR_INDEX_P(X) \
1280: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1281: /* Nonzero if X is a hard reg that can be used as a base reg
1282: or if it is a pseudo reg. */
1283: #define REG_OK_FOR_BASE_P(X) \
1284: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1285:
1286: #else
1287:
1288: /* Nonzero if X is a hard reg that can be used as an index. */
1289: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1290: /* Nonzero if X is a hard reg that can be used as a base reg. */
1291: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1292:
1293: #endif
1294:
1295: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1296: that is a valid memory address for an instruction.
1297: The MODE argument is the machine mode for the MEM expression
1298: that wants to use this address.
1299:
1300: On the HP-PA, the actual legitimate addresses must be
1301: REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1302: But we can treat a SYMBOL_REF as legitimate if it is part of this
1303: function's constant-pool, because such addresses can actually
1304: be output as REG+SMALLINT. */
1305:
1306: #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1307: #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1308:
1309: #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1310: #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1311:
1312: #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1313: #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1314:
1315: #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1316: #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1317:
1318: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1319: { \
1320: if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1321: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1322: || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1323: && REG_P (XEXP (X, 0)) \
1324: && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1325: goto ADDR; \
1326: else if (GET_CODE (X) == PLUS) \
1327: { \
1328: rtx base = 0, index; \
1329: if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1330: { \
1331: if (GET_CODE (XEXP (X, 1)) == REG \
1332: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1333: goto ADDR; \
1334: else if (flag_pic == 1 \
1335: && GET_CODE (XEXP (X, 1)) != REG \
1336: && GET_CODE (XEXP (X, 1)) != LO_SUM \
1337: && GET_CODE (XEXP (X, 1)) != MEM) \
1338: goto ADDR; \
1339: } \
1340: else if (REG_P (XEXP (X, 0)) \
1341: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1342: base = XEXP (X, 0), index = XEXP (X, 1); \
1343: else if (REG_P (XEXP (X, 1)) \
1344: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1345: base = XEXP (X, 1), index = XEXP (X, 0); \
1346: if (base != 0) \
1347: if (GET_CODE (index) == CONST_INT \
1348: && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1349: || INT_5_BITS (index))) \
1350: goto ADDR; \
1351: } \
1352: else if (GET_CODE (X) == LO_SUM \
1353: && GET_CODE (XEXP (X, 0)) == REG \
1354: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1355: && CONSTANT_P (XEXP (X, 1)) \
1356: && (MODE) != SFmode \
1357: && (MODE) != DFmode) \
1358: goto ADDR; \
1359: else if (GET_CODE (X) == LO_SUM \
1360: && GET_CODE (XEXP (X, 0)) == SUBREG \
1361: && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1362: && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1363: && CONSTANT_P (XEXP (X, 1)) \
1364: && (MODE) != SFmode \
1365: && (MODE) != DFmode) \
1366: goto ADDR; \
1367: else if (GET_CODE (X) == LABEL_REF \
1368: || (GET_CODE (X) == CONST_INT \
1369: && INT_14_BITS (X))) \
1370: goto ADDR; \
1371: }
1372:
1373: /* Try machine-dependent ways of modifying an illegitimate address
1374: to be legitimate. If we find one, return the new, valid address.
1375: This macro is used in only one place: `memory_address' in explow.c.
1376:
1377: OLDX is the address as it was before break_out_memory_refs was called.
1378: In some cases it is useful to look at this to decide what needs to be done.
1379:
1380: MODE and WIN are passed so that this macro can use
1381: GO_IF_LEGITIMATE_ADDRESS.
1382:
1383: It is always safe for this macro to do nothing. It exists to recognize
1384: opportunities to optimize the output. */
1385:
1386: extern struct rtx_def *hppa_legitimize_address ();
1387: #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1388: { rtx orig_x = (X); \
1389: (X) = hppa_legitimize_address (X, OLDX, MODE); \
1390: if ((X) != orig_x && memory_address_p (MODE, X)) \
1391: goto WIN; }
1392:
1393: /* Go to LABEL if ADDR (a legitimate address expression)
1394: has an effect that depends on the machine mode it is used for. */
1395:
1396: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1397: if (GET_CODE (ADDR) == PRE_DEC \
1398: || GET_CODE (ADDR) == POST_DEC \
1399: || GET_CODE (ADDR) == PRE_INC \
1400: || GET_CODE (ADDR) == POST_INC) \
1401: goto LABEL
1402:
1403: /* Define this macro if references to a symbol must be treated
1404: differently depending on something about the variable or
1405: function named by the symbol (such as what section it is in).
1406:
1407: The macro definition, if any, is executed immediately after the
1408: rtl for DECL or other node is created.
1409: The value of the rtl will be a `mem' whose address is a
1410: `symbol_ref'.
1411:
1412: The usual thing for this macro to do is to a flag in the
1413: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1414: name string in the `symbol_ref' (if one bit is not enough
1415: information).
1416:
1417: On the HP-PA we use this to indicate if a symbol is in text or
1418: data space. Also, function labels need special treatment. */
1419:
1420: #define TEXT_SPACE_P(DECL)\
1421: (TREE_CODE (DECL) == FUNCTION_DECL \
1422: || (TREE_CODE (DECL) == VAR_DECL \
1423: && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1424: && !flag_pic) \
1425: || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1426: && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1427:
1428: #define FUNCTION_NAME_P(NAME) \
1429: (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1430:
1431: #define ENCODE_SECTION_INFO(DECL)\
1432: do \
1433: { if (TEXT_SPACE_P (DECL)) \
1434: { rtx _rtl; \
1435: if (TREE_CODE (DECL) == FUNCTION_DECL \
1436: || TREE_CODE (DECL) == VAR_DECL) \
1437: _rtl = DECL_RTL (DECL); \
1438: else \
1439: _rtl = TREE_CST_RTL (DECL); \
1440: SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1441: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1442: hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1443: } \
1444: } \
1445: while (0)
1446:
1447: /* Store the user-specified part of SYMBOL_NAME in VAR.
1448: This is sort of inverse to ENCODE_SECTION_INFO. */
1449:
1450: #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1451: (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1452: 1 + (SYMBOL_NAME)[1] == '@'\
1453: : (SYMBOL_NAME)[0] == '@'))
1454:
1455: /* Specify the machine mode that this machine uses
1456: for the index in the tablejump instruction. */
1457: #define CASE_VECTOR_MODE DImode
1458:
1459: /* Define this if the tablejump instruction expects the table
1460: to contain offsets from the address of the table.
1461: Do not define this if the table should contain absolute addresses. */
1462: /* #define CASE_VECTOR_PC_RELATIVE */
1463:
1464: #define CASE_DROPS_THROUGH
1465: /* Specify the tree operation to be used to convert reals to integers. */
1466: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1467:
1468: /* This is the kind of divide that is easiest to do in the general case. */
1469: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1470:
1471: /* Define this as 1 if `char' should by default be signed; else as 0. */
1472: #define DEFAULT_SIGNED_CHAR 1
1473:
1474: /* Max number of bytes we can move from memory to memory
1475: in one reasonably fast instruction. */
1476: #define MOVE_MAX 8
1477:
1478: /* Define if operations between registers always perform the operation
1479: on the full register even if a narrower mode is specified. */
1480: #define WORD_REGISTER_OPERATIONS
1481:
1482: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1483: will either zero-extend or sign-extend. The value of this macro should
1484: be the code that says which one of the two operations is implicitly
1485: done, NIL if none. */
1486: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1487:
1488: /* Nonzero if access to memory by bytes is slow and undesirable. */
1489: #define SLOW_BYTE_ACCESS 1
1490:
1491: /* Do not break .stabs pseudos into continuations. */
1492: #define DBX_CONTIN_LENGTH 0
1493:
1494: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1495: is done just by pretending it is already truncated. */
1496: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1497:
1498: /* We assume that the store-condition-codes instructions store 0 for false
1499: and some other value for true. This is the value stored for true. */
1500:
1501: #define STORE_FLAG_VALUE 1
1502:
1503: /* When a prototype says `char' or `short', really pass an `int'. */
1504: #define PROMOTE_PROTOTYPES
1505:
1506: /* Specify the machine mode that pointers have.
1507: After generation of rtl, the compiler makes no further distinction
1508: between pointers and any other objects of this machine mode. */
1509: #define Pmode SImode
1510:
1511: /* Add any extra modes needed to represent the condition code.
1512:
1513: HPPA floating comparisons produce condition codes. */
1514: #define EXTRA_CC_MODES CCFPmode
1515:
1516: /* Define the names for the modes specified above. */
1517: #define EXTRA_CC_NAMES "CCFP"
1518:
1519: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1520: return the mode to be used for the comparison. For floating-point, CCFPmode
1521: should be used. CC_NOOVmode should be used when the first operand is a
1522: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1523: needed. */
1524: #define SELECT_CC_MODE(OP,X,Y) \
1525: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1526:
1527: /* A function address in a call instruction
1528: is a byte address (for indexing purposes)
1529: so give the MEM rtx a byte's mode. */
1530: #define FUNCTION_MODE SImode
1531:
1532: /* Define this if addresses of constant functions
1533: shouldn't be put through pseudo regs where they can be cse'd.
1534: Desirable on machines where ordinary constants are expensive
1535: but a CALL with constant address is cheap. */
1536: #define NO_FUNCTION_CSE
1537:
1538: /* Define this to be nonzero if shift instructions ignore all but the low-order
1539: few bits. */
1540: #define SHIFT_COUNT_TRUNCATED 1
1541:
1542: /* Use atexit for static constructors/destructors, instead of defining
1543: our own exit function. */
1544: #define HAVE_ATEXIT
1545:
1546: /* Compute the cost of computing a constant rtl expression RTX
1547: whose rtx-code is CODE. The body of this macro is a portion
1548: of a switch statement. If the code is computed here,
1549: return it with a return statement. Otherwise, break from the switch. */
1550:
1551: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1552: case CONST_INT: \
1553: if (INTVAL (RTX) == 0) return 0; \
1554: if (INT_14_BITS (RTX)) return 1; \
1555: case HIGH: \
1556: return 2; \
1557: case CONST: \
1558: case LABEL_REF: \
1559: case SYMBOL_REF: \
1560: return 4; \
1561: case CONST_DOUBLE: \
1562: if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1563: && OUTER_CODE != SET) \
1564: return 0; \
1565: else \
1566: return 8;
1567:
1568: #define ADDRESS_COST(RTX) \
1569: (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1570:
1571: /* Compute extra cost of moving data between one register class
1572: and another.
1573:
1574: Make moves from SAR so expensive they should never happen. We used to
1575: have 0xffff here, but that generates overflow in rare cases.
1576:
1577: Copies involving a FP register and a non-FP register are relatively
1578: expensive because they must go through memory.
1579:
1580: Other copies are reasonably cheap. */
1581: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1582: (CLASS1 == SHIFT_REGS ? 0x100 \
1583: : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1584: : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1585: : 2)
1586:
1587:
1588: /* Provide the costs of a rtl expression. This is in the body of a
1589: switch on CODE. The purpose for the cost of MULT is to encourage
1590: `synth_mult' to find a synthetic multiply when reasonable. */
1591:
1592: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1593: case MULT: \
1594: return TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1595: ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1596: case DIV: \
1597: case UDIV: \
1598: case MOD: \
1599: case UMOD: \
1600: return COSTS_N_INSNS (60); \
1601: case PLUS: \
1602: if (GET_CODE (XEXP (X, 0)) == MULT \
1603: && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1604: return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1605: + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1606: break;
1607:
1608: /* Adjust the cost of dependencies. */
1609:
1610: #define ADJUST_COST(INSN,LINK,DEP,COST) \
1611: (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1612:
1613: /* Handling the special cases is going to get too complicated for a macro,
1614: just call `pa_adjust_insn_length' to do the real work. */
1615: #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1616: LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1617:
1618: /* Enable a bug fix. (This is for extra caution.) */
1619: #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1620:
1621: /* Millicode insns are actually function calls with some special
1622: constraints on arguments and register usage.
1623:
1624: Millicode calls always expect their arguments in the integer argument
1625: registers, and always return their result in %r29 (ret1). They
1626: are expected to clobber their arguments, %r1, %r29, and %r31 and
1627: nothing else.
1628:
1629: These macros tell reorg that the references to arguments and
1630: register clobbers for millicode calls do not appear to happen
1631: until after the millicode call. This allows reorg to put insns
1632: which set the argument registers into the delay slot of the millicode
1633: call -- thus they act more like traditional CALL_INSNs.
1634:
1635: get_attr_type will try to recognize the given insn, so make sure to
1636: filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1637: in particular. */
1638: #define INSN_SETS_ARE_DELAYED(X) \
1639: ((GET_CODE (X) == INSN \
1640: && GET_CODE (PATTERN (X)) != SEQUENCE \
1641: && GET_CODE (PATTERN (X)) != USE \
1642: && GET_CODE (PATTERN (X)) != CLOBBER \
1643: && get_attr_type (X) == TYPE_MILLI))
1644:
1645: #define INSN_REFERENCES_ARE_DELAYED(X) \
1646: ((GET_CODE (X) == INSN \
1647: && GET_CODE (PATTERN (X)) != SEQUENCE \
1648: && GET_CODE (PATTERN (X)) != USE \
1649: && GET_CODE (PATTERN (X)) != CLOBBER \
1650: && get_attr_type (X) == TYPE_MILLI))
1651:
1652:
1653: /* Control the assembler format that we output. */
1654:
1655: /* Output at beginning of assembler file. */
1656:
1657: #define ASM_FILE_START(FILE) \
1658: do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1659: \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1660: \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1661: \t.SPACE $TEXT$\n\
1662: \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1663: \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1664: \t.IMPORT $global$,DATA\n\
1665: \t.IMPORT $$dyncall,MILLICODE\n");\
1666: if (profile_flag)\
1667: fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1668: if (write_symbols != NO_DEBUG) \
1669: output_file_directive ((FILE), main_input_filename); \
1670: } while (0)
1671:
1672: /* Output to assembler file text saying following lines
1673: may contain character constants, extra white space, comments, etc. */
1674:
1675: #define ASM_APP_ON ""
1676:
1677: /* Output to assembler file text saying following lines
1678: no longer contain unusual constructs. */
1679:
1680: #define ASM_APP_OFF ""
1681:
1682: /* We don't yet know how to identify GCC to HP-PA machines. */
1683: #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1684:
1685: /* Output before code. */
1686:
1687: /* Supposedly the assembler rejects the command if there is no tab! */
1688: #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1689:
1690: /* Output before read-only data. */
1691:
1692: /* Supposedly the assembler rejects the command if there is no tab! */
1693: #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1694:
1695: #define READONLY_DATA_SECTION readonly_data
1696:
1697: /* Output before writable data. */
1698:
1699: /* Supposedly the assembler rejects the command if there is no tab! */
1700: #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1701:
1702: /* Output before uninitialized data. */
1703:
1704: #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1705:
1706: /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1707:
1708: #define EXTRA_SECTIONS in_bss, in_readonly_data
1709:
1710: #define EXTRA_SECTION_FUNCTIONS \
1711: void \
1712: bss_section () \
1713: { \
1714: if (in_section != in_bss) \
1715: { \
1716: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1717: in_section = in_bss; \
1718: } \
1719: } \
1720: void \
1721: readonly_data () \
1722: { \
1723: if (in_section != in_readonly_data) \
1724: { \
1725: fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1726: in_section = in_readonly_data; \
1727: } \
1728: }
1729:
1730:
1731: /* How to refer to registers in assembler output.
1732: This sequence is indexed by compiler's hard-register-number (see above). */
1733:
1734: #define REGISTER_NAMES \
1735: {"0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1736: "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1737: "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1738: "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1739: "%fr4", "%fr5", "%fr6", "%fr7", \
1740: "%fr8", "%fr9", "%fr10", "%fr11", "%fr12", "%fr13", "%fr14", "%fr15", \
1741: "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1742: "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R",\
1743: "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R",\
1744: "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R",\
1745: "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R",\
1746: "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R",\
1747: "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R",\
1748: "SAR"}
1749:
1750: /* How to renumber registers for dbx and gdb.
1751:
1752: Registers 0 - 31 remain unchanged.
1753:
1754: Registers 32 - 43 are mapped to 72 - 94 (even numbers only)
1755:
1756: Registers 44 - 100 are mapped to 72 - 128
1757:
1758: Register 101 is mapped to 32. */
1759:
1760: #define DBX_REGISTER_NUMBER(REGNO) \
1761: ((REGNO) <= 31 ? (REGNO) : \
1762: ((REGNO) > 31 && (REGNO) <= 43 ? ((REGNO) - 32) * 2 + 72 : \
1763: ((REGNO) > 43 && (REGNO) <= 100 ? (REGNO) + 28 : 32)))
1764:
1765: /* This is how to output the definition of a user-level label named NAME,
1766: such as the label on a static function or variable NAME. */
1767:
1768: #define ASM_OUTPUT_LABEL(FILE, NAME) \
1769: do { assemble_name (FILE, NAME); \
1770: fputc ('\n', FILE); } while (0)
1771:
1772: /* This is how to output a command to make the user-level label named NAME
1773: defined for reference from other files. */
1774:
1775: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1776: do { fputs ("\t.IMPORT ", FILE); \
1777: assemble_name (FILE, NAME); \
1778: if (FUNCTION_NAME_P (NAME)) \
1779: fputs (",CODE\n", FILE); \
1780: else \
1781: fputs (",DATA\n", FILE); \
1782: } while (0)
1783:
1784: /* hpux ld doesn't output the object file name, or anything useful at
1785: all, to indicate the start of an object file's symbols. This screws
1786: up gdb, so we'll output this magic cookie at the end of an object
1787: file with debugging symbols */
1788:
1789: #define ASM_FILE_END(FILE) \
1790: do { if (write_symbols == DBX_DEBUG)\
1791: { fputs (TEXT_SECTION_ASM_OP, FILE);\
1792: fputs ("\t.stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1793: (FILE));\
1794: }\
1795: } while (0)
1796:
1797: /* The bogus HP assembler requires ALL external references to be
1798: "imported", even library calls. They look a bit different, so
1799: here's this macro. */
1800:
1801: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1802: do { fputs ("\t.IMPORT ", FILE); \
1803: assemble_name (FILE, XSTR ((RTL), 0)); \
1804: fputs (",CODE\n", FILE); \
1805: } while (0)
1806:
1807: #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1808: do { \
1809: /* We only handle DATA objects here, functions are globalized in \
1810: ASM_DECLARE_FUNCTION_NAME. */ \
1811: if (! FUNCTION_NAME_P (NAME)) \
1812: { \
1813: fputs ("\t.EXPORT ", FILE); \
1814: assemble_name (FILE, NAME); \
1815: fputs (",DATA\n", FILE); \
1816: } \
1817: } while (0)
1818:
1819: /* This is how to output a reference to a user-level label named NAME.
1820: `assemble_name' uses this. */
1821:
1822: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1823: fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1824:
1825: /* This is how to output an internal numbered label where
1826: PREFIX is the class of label and NUM is the number within the class. */
1827:
1828: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1829: {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1830:
1831: /* This is how to store into the string LABEL
1832: the symbol_ref name of an internal numbered label where
1833: PREFIX is the class of label and NUM is the number within the class.
1834: This is suitable for output with `assemble_name'. */
1835:
1836: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1837: sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1838:
1839: /* This is how to output an assembler line defining a `double' constant. */
1840:
1841: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1842: do { union { double d; int i[2];} __u; \
1843: __u.d = (VALUE); \
1844: fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1845: __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1846: } while (0)
1847:
1848: /* This is how to output an assembler line defining a `float' constant. */
1849:
1850: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1851: do { union { float f; int i;} __u; \
1852: __u.f = (VALUE); \
1853: fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1854: } while (0)
1855:
1856: /* This is how to output an assembler line defining an `int' constant. */
1857:
1858: #define ASM_OUTPUT_INT(FILE,VALUE) \
1859: { fprintf (FILE, "\t.word "); \
1860: if (function_label_operand (VALUE, VOIDmode) \
1861: && !TARGET_PORTABLE_RUNTIME) \
1862: fprintf (FILE, "P%%"); \
1863: output_addr_const (FILE, (VALUE)); \
1864: fprintf (FILE, "\n");}
1865:
1866: /* Likewise for `short' and `char' constants. */
1867:
1868: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1869: ( fprintf (FILE, "\t.half "), \
1870: output_addr_const (FILE, (VALUE)), \
1871: fprintf (FILE, "\n"))
1872:
1873: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1874: ( fprintf (FILE, "\t.byte "), \
1875: output_addr_const (FILE, (VALUE)), \
1876: fprintf (FILE, "\n"))
1877:
1878: /* This is how to output an assembler line for a numeric constant byte. */
1879:
1880: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1881: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1882:
1883: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1884: output_ascii ((FILE), (P), (SIZE))
1885:
1886: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1887: #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1888: /* This is how to output an element of a case-vector that is absolute.
1889: Note that this method makes filling these branch delay slots
1890: impossible. */
1891:
1892: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1893: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1894:
1895: /* Jump tables are executable code and live in the TEXT section on the PA. */
1896: #define JUMP_TABLES_IN_TEXT_SECTION
1897:
1898: /* This is how to output an element of a case-vector that is relative.
1899: This must be defined correctly as it is used when generating PIC code.
1900:
1901: I belive it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1902: on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1903: rather than a table of absolute addresses. */
1904:
1905: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1906: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1907:
1908: /* This is how to output an assembler line
1909: that says to advance the location counter
1910: to a multiple of 2**LOG bytes. */
1911:
1912: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1913: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1914:
1915: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1916: fprintf (FILE, "\t.blockz %d\n", (SIZE))
1917:
1918: /* This says how to output an assembler line
1919: to define a global common symbol. */
1920:
1921: /* Supposedly the assembler rejects the command if there is no tab! */
1922:
1923:
1924: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1925: { bss_section (); \
1926: assemble_name ((FILE), (NAME)); \
1927: fputs ("\t.comm ", (FILE)); \
1928: fprintf ((FILE), "%d\n", (ROUNDED));}
1929:
1930: /* This says how to output an assembler line
1931: to define a local common symbol. */
1932:
1933: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1934: { bss_section (); \
1935: fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8); \
1936: assemble_name ((FILE), (NAME)); \
1937: fprintf ((FILE), "\n\t.block %d\n", (ROUNDED));}
1938:
1939: /* Store in OUTPUT a string (made with alloca) containing
1940: an assembler-name for a local static variable named NAME.
1941: LABELNO is an integer which is different for each call. */
1942:
1943: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1944: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1945: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1946:
1947: /* Define the parentheses used to group arithmetic operations
1948: in assembler code. */
1949:
1950: #define ASM_OPEN_PAREN "("
1951: #define ASM_CLOSE_PAREN ")"
1952:
1953: /* All HP assemblers use "!" to separate logical lines. */
1954: #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1955:
1956: /* Define results of standard character escape sequences. */
1957: #define TARGET_BELL 007
1958: #define TARGET_BS 010
1959: #define TARGET_TAB 011
1960: #define TARGET_NEWLINE 012
1961: #define TARGET_VT 013
1962: #define TARGET_FF 014
1963: #define TARGET_CR 015
1964:
1965: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1966: ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1967:
1968: /* Print operand X (an rtx) in assembler syntax to file FILE.
1969: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1970: For `%' followed by punctuation, CODE is the punctuation and X is null.
1971:
1972: On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1973: and an immediate zero should be represented as `r0'.
1974:
1975: Several % codes are defined:
1976: O an operation
1977: C compare conditions
1978: N extract conditions
1979: M modifier to handle preincrement addressing for memory refs.
1980: F modifier to handle preincrement addressing for fp memory refs */
1981:
1982: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1983:
1984:
1985: /* Print a memory address as an operand to reference that memory location. */
1986:
1987: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1988: { register rtx addr = ADDR; \
1989: register rtx base; \
1990: int offset; \
1991: switch (GET_CODE (addr)) \
1992: { \
1993: case REG: \
1994: fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1995: break; \
1996: case PLUS: \
1997: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1998: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1999: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2000: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2001: else \
2002: abort (); \
2003: fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2004: break; \
2005: case LO_SUM: \
2006: fputs ("R'", FILE); \
2007: output_global_address (FILE, XEXP (addr, 1)); \
2008: fputs ("(", FILE); \
2009: output_operand (XEXP (addr, 0), 0); \
2010: fputs (")", FILE); \
2011: break; \
2012: case CONST_INT: \
2013: fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2014: break; \
2015: default: \
2016: output_addr_const (FILE, addr); \
2017: }}
2018:
2019:
2020: /* Define functions in pa.c and used in insn-output.c. */
2021:
2022: extern char *output_and ();
2023: extern char *output_ior ();
2024: extern char *output_move_double ();
2025: extern char *output_fp_move_double ();
2026: extern char *output_block_move ();
2027: extern char *output_cbranch ();
2028: extern char *output_bb ();
2029: extern char *output_dbra ();
2030: extern char *output_movb ();
2031: extern char *output_return ();
2032: extern char *output_call ();
2033: extern char *output_mul_insn ();
2034: extern char *output_div_insn ();
2035: extern char *output_mod_insn ();
2036: extern char *singlemove_string ();
2037: extern void output_arg_descriptor ();
2038: extern void output_global_address ();
2039: extern struct rtx_def *legitimize_pic_address ();
2040: extern struct rtx_def *gen_cmp_fp ();
2041: extern void hppa_encode_label ();
2042:
2043: extern struct rtx_def *hppa_save_pic_table_rtx;
2044:
2045: #if 0
2046: #define PREDICATE_CODES \
2047: {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2048: {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
2049: {"arith_operand", {SUBREG, REG, CONST_INT}}, \
2050: {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
2051: {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
2052: {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
2053: {"pre_cint_operand", {CONST_INT}}, \
2054: {"post_cint_operand", {CONST_INT}}, \
2055: {"int5_operand", {CONST_INT}}, \
2056: {"uint5_operand", {CONST_INT}}, \
2057: {"uint32_operand", {CONST_INT}}, \
2058: {"int11_operand", {CONST_INT}}, \
2059: {"and_operand", {SUBREG, REG, CONST_INT}}, \
2060: {"ior_operand", {CONST_INT}}, \
2061: {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
2062: {"lhs_lshift_cint_operand", {CONST_INT}}, \
2063: {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
2064: {"shadd_operand", {CONST_INT}}, \
2065: {"eq_neq_comparison_operator", {EQ, NE}}, \
2066: {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
2067: {"pc_or_label_operand", {LABEL_REF, PC}}, \
2068: {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2069: {"reg_or_nonsymb_mem_operand", {REG, SUBREG, MEM}}, \
2070: {"move_operand", {REG, SUBREG, CONST_INT, MEM}}, \
2071: {"pic_operand", {REG, SUBREG, CONST_INT, SYMBOL_REF, LABEL_REF, \
2072: CONST, HIGH, PC}}, /* No clue */ \
2073: {"function_label_operand", {SYMBOL_REF}}, \
2074: {"reg_or_0_or_nonsymb_mem_operand", {REG, SUBREG, CONST_INT, MEM}}, \
2075: {"div_operand", {REG, CONST_INT}}, \
2076: {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
2077: CONST, HIGH}},
2078: #endif
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.