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1.1 root 1: /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2: Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4: and Tim Moore ([email protected]) of the Center for
5: Software Science at the University of Utah.
6:
7: This file is part of GNU CC.
8:
9: GNU CC is free software; you can redistribute it and/or modify
10: it under the terms of the GNU General Public License as published by
11: the Free Software Foundation; either version 1, or (at your option)
12: any later version.
13:
14: GNU CC is distributed in the hope that it will be useful,
15: but WITHOUT ANY WARRANTY; without even the implied warranty of
16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17: GNU General Public License for more details.
18:
19: You should have received a copy of the GNU General Public License
20: along with GNU CC; see the file COPYING. If not, write to
21: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22:
23: enum cmp_type /* comparison type */
24: {
25: CMP_SI, /* compare integers */
26: CMP_SF, /* compare single precision floats */
27: CMP_DF, /* compare double precision floats */
28: CMP_MAX /* max comparison type */
29: };
30:
31: /* Print subsidiary information on the compiler version in use. */
32:
33: #ifdef NeXT_ASM
34: #define TARGET_VERSION fprintf (stderr, " (hppa, NeXT syntax)");
35: #else
36: #define TARGET_VERSION fprintf (stderr, " (hppa, HPUX syntax)");
37: #endif
38:
39: /* Run-time compilation parameters selecting different hardware subsets. */
40:
41: extern int target_flags;
42:
43: /* compile code for HP-PA 1.1 ("Snake") */
44:
45: #define TARGET_SNAKE (target_flags & 1)
46:
47: /* Disable all FP registers (they all become fixed). This may be necessary
48: for compiling kernels which perform lazy context switching of FP regs.
49: Note if you use this option and try to perform floating point operations
50: the compiler will abort! */
51:
52: #define TARGET_DISABLE_FPREGS (target_flags & 2)
53:
54: /* Allow unconditional jumps in the delay slots of call instructions. */
55: #define TARGET_JUMP_IN_DELAY (target_flags & 8)
56:
57: /* Force all function calls to indirect addressing via a register. This
58: avoids lossage when the function is very far away from the current PC.
59:
60: ??? What about simple jumps, they can suffer from the same problem.
61: Would require significant surgery in pa.md. */
62:
63: #define TARGET_LONG_CALLS (target_flags & 16)
64:
65: /* Disable indexed addressing modes. */
66:
67: #define TARGET_DISABLE_INDEXING (target_flags & 32)
68:
69: /* Emit directives only understood by GAS. This allows parameter
70: relocations to work for static functions. There is no way
71: to make them work the HP assembler at this time.
72:
73: Also forces a colon to be tacked onto the end of local and
74: global labes. */
75:
76: #define TARGET_GAS (target_flags & 128)
77:
78: /* For all calls to symbols, emit a local stub that does a far
79: call and then branch locally (using the pseudo instruction jbsr)
80: to that stub. The assembler will then generate a local branch-and-
81: link instruction in place if the jbsr instruction, and add a
82: relocation entry to the object file so that the link editor may
83: relocate where to jump without actually enlarging the object file. */
84:
85: #define TARGET_STUB_CALLS (target_flags & 256)
86:
87: /* Macro to define tables used to set the flags.
88: This is a list in braces of pairs in braces,
89: each pair being { "NAME", VALUE }
90: where VALUE is the bits to set or minus the bits to clear.
91: An empty string NAME is used to identify the default VALUE. */
92:
93: #define TARGET_SWITCHES \
94: {{"snake", 1}, \
95: {"nosnake", -1}, \
96: {"pa-risc-1-0", -1}, \
97: {"pa-risc-1-1", 1}, \
98: {"disable-fpregs", 2}, \
99: {"no-disable-fpregs", 2}, \
100: {"jump-in-delay", 8}, \
101: {"no-jump-in-delay", -8}, \
102: {"long-calls", 16}, \
103: {"no-long-calls", -16}, \
104: {"disable-indexing", 32}, \
105: {"no-disable-indexing", -32},\
106: {"gas", 128}, \
107: {"no-gas", -128}, \
108: {"stub-calls", 256}, \
109: {"no-stub-calls", -256}, \
110: { "", TARGET_DEFAULT}}
111:
112: #ifndef TARGET_DEFAULT
113: #define TARGET_DEFAULT 128 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
114: #endif
115:
116: #define DBX_DEBUGGING_INFO
117: #define DEFAULT_GDB_EXTENSIONS 1
118:
119: /* Only lables should ever begin in colunm zero. */
120: #define ASM_STABS_OP "\t.stabs"
121: #define ASM_STABN_OP "\t.stabn"
122:
123: #if (TARGET_DEFAULT & 1) == 0
124: #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
125: %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
126: #else
127: #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}}"
128: #endif
129:
130: /* Defines for a K&R CC */
131:
132: #define CC1_SPEC "%{pg:} %{p:}"
133:
134: #define LINK_SPEC "-u main"
135:
136: /* Allow $ in identifiers. */
137: #define DOLLARS_IN_IDENTIFIERS 2
138:
139: /* Make gcc agree with <machine/ansi.h> */
140:
141: #define SIZE_TYPE "unsigned int"
142: #define PTRDIFF_TYPE "int"
143: #define WCHAR_TYPE "short unsigned int"
144: #define WCHAR_TYPE_SIZE 16
145:
146: /* Sometimes certain combinations of command options do not make sense
147: on a particular target machine. You can define a macro
148: `OVERRIDE_OPTIONS' to take account of this. This macro, if
149: defined, is executed once just after all the command options have
150: been parsed.
151:
152: On the PA, it is used to explicitly warn the user that -fpic and -fPIC
153: do not work. */
154:
155: #define OVERRIDE_OPTIONS \
156: { \
157: if (flag_pic != 0) \
158: warning ("-fpic and -fPIC are not supported on the PA."); \
159: }
160:
161: /* Omit frame pointer at high optimization levels. */
162:
163: #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
164: { \
165: if (OPTIMIZE >= 2) \
166: flag_omit_frame_pointer = 1; \
167: }
168:
169: /* Names to predefine in the preprocessor for this target machine. */
170:
171: #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
172:
173: /* target machine storage layout */
174:
175: /* Define this if most significant bit is lowest numbered
176: in instructions that operate on numbered bit-fields. */
177: #define BITS_BIG_ENDIAN 1
178:
179: /* Define this if most significant byte of a word is the lowest numbered. */
180: /* That is true on the HP-PA. */
181: #define BYTES_BIG_ENDIAN 1
182:
183: /* Define this if most significant word of a multiword number is lowest
184: numbered. */
185: /* For the HP-PA we can decide arbitrarily
186: since there are no machine instructions for them. */
187: #define WORDS_BIG_ENDIAN 1
188:
189: /* number of bits in an addressable storage unit */
190: #define BITS_PER_UNIT 8
191:
192: /* Width in bits of a "word", which is the contents of a machine register.
193: Note that this is not necessarily the width of data type `int';
194: if using 16-bit ints on a 68000, this would still be 32.
195: But on a machine with 16-bit registers, this would be 16. */
196: #define BITS_PER_WORD 32
197:
198: /* Width of a word, in units (bytes). */
199: #define UNITS_PER_WORD 4
200:
201: /* Width in bits of a pointer.
202: See also the macro `Pmode' defined below. */
203: #define POINTER_SIZE 32
204:
205: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
206: #define PARM_BOUNDARY 32
207:
208: /* Largest alignment required for any stack parameter, in bits.
209: Don't define this if it is equal to PARM_BOUNDARY */
210: #define MAX_PARM_BOUNDARY 64
211:
212: /* Boundary (in *bits*) on which stack pointer should be aligned. */
213: #define STACK_BOUNDARY 512
214:
215: /* Allocation boundary (in *bits*) for the code of a function. */
216: #define FUNCTION_BOUNDARY 32
217:
218: /* Alignment of field after `int : 0' in a structure. */
219: #define EMPTY_FIELD_BOUNDARY 32
220:
221: /* Every structure's size must be a multiple of this. */
222: #define STRUCTURE_SIZE_BOUNDARY 8
223:
224: /* A bitfield declared as `int' forces `int' alignment for the struct. */
225: #define PCC_BITFIELD_TYPE_MATTERS 1
226:
227: /* No data type wants to be aligned rounder than this. */
228: #define BIGGEST_ALIGNMENT 64
229:
230: /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
231: #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
232: ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
233:
234: /* Make arrays of chars word-aligned for the same reasons. */
235: #define DATA_ALIGNMENT(TYPE, ALIGN) \
236: (TREE_CODE (TYPE) == ARRAY_TYPE \
237: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
238: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
239:
240:
241: /* Set this nonzero if move instructions will actually fail to work
242: when given unaligned data. */
243: #define STRICT_ALIGNMENT 1
244:
245: /* Generate calls to memcpy, memcmp and memset. */
246: #define TARGET_MEM_FUNCTIONS
247:
248: /* Standard register usage. */
249:
250: /* Number of actual hardware registers.
251: The hardware registers are assigned numbers for the compiler
252: from 0 to just below FIRST_PSEUDO_REGISTER.
253: All registers that the compiler knows about must be given numbers,
254: even those that are not normally considered general registers.
255:
256: HP-PA 1.0 has 32 fullword registers and 16 floating point
257: registers. The floating point registers hold either word or double
258: word values.
259:
260: 16 additional registers are reserved.
261:
262: HP-PA 1.1 has 32 fullword registers and 32 floating point
263: registers. However, the floating point registers behave
264: differently: the left and right halves of registers are addressable
265: as 32 bit registers. So, we will set things up like the 68k which
266: has different fp units: define separate register sets for the 1.0
267: and 1.1 fp units. */
268:
269: #define FIRST_PSEUDO_REGISTER 101 /* 32 + 12 1.0 regs + 56 1.1 regs + */
270: /* 1 shift reg */
271:
272: /* 1 for registers that have pervasive standard uses
273: and are not available for the register allocator.
274:
275: On the HP-PA, these are:
276: Reg 0 = 0 (hardware). However, 0 is used for condition code,
277: so is not fixed.
278: Reg 1 = ADDIL target/Temporary (hardware).
279: Reg 2 = Return Pointer
280: Reg 3 = Preserved Register (Gnu). Frame Pointer (> 8k frames HP.)
281: Reg 4 = Frame Pointer (Gnu)
282: Reg 5-18 = Preserved Registers
283: Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
284: Reg 20-22 = Temporary Registers
285: Reg 23-26 = Temporary/Parameter Registers
286: Reg 27 = Global Data Pointer (hp)
287: Reg 28 = Temporary/???/Return Value register
288: Reg 29 = Temporary/Static Chain/Return Value register
289: Reg 30 = stack pointer
290: Reg 31 = Temporary/Millicode Return Pointer (hp)
291:
292: Freg 0-3 = Status Registers -- Not known to the compiler.
293: Freg 4-7 = Arguments/Return Value
294: Freg 8-11 = Temporary Registers
295: Freg 12-15 = Preserved Registers
296:
297: Freg 16-31 = Reserved
298:
299: On the Snake, fp regs are
300:
301: Freg 0-3 = Status Registers -- Not known to the compiler.
302: Freg 4L-7R = Arguments/Return Value
303: Freg 8L-11R = Temporary Registers
304: Freg 12L-21R = Preserved Registers
305: Freg 22L-31R = Temporary Registers
306:
307:
308: */
309:
310: #define FIXED_REGISTERS \
311: {0, 0, 0, 0, 0, 0, 0, 0, \
312: 0, 0, 0, 0, 0, 0, 0, 0, \
313: 0, 0, 0, 0, 0, 0, 0, 0, \
314: 0, 0, 0, 1, 0, 0, 1, 0, \
315: /* 1.0 fp registers */ \
316: 0, 0, 0, 0, \
317: 0, 0, 0, 0, 0, 0, 0, 0, \
318: /* 1.1 fp registers */ \
319: 0, 0, 0, 0, 0, 0, 0, 0, \
320: 0, 0, 0, 0, 0, 0, 0, 0, \
321: 0, 0, 0, 0, 0, 0, 0, 0, \
322: 0, 0, 0, 0, 0, 0, 0, 0, \
323: 0, 0, 0, 0, 0, 0, 0, 0, \
324: 0, 0, 0, 0, 0, 0, 0, 0, \
325: 0, 0, 0, 0, 0, 0, 0, 0, \
326: 0}
327:
328: /* 1 for registers not available across function calls.
329: These must include the FIXED_REGISTERS and also any
330: registers that can be used without being saved.
331: The latter must include the registers where values are returned
332: and the register where structure-value addresses are passed.
333: Aside from that, you can include as many other registers as you like. */
334: #define CALL_USED_REGISTERS \
335: {1, 1, 1, 0, 0, 0, 0, 0, \
336: 0, 0, 0, 0, 0, 0, 0, 0, \
337: 0, 0, 0, 1, 1, 1, 1, 1, \
338: 1, 1, 1, 1, 1, 1, 1, 1, \
339: /* 1.0 fp registers */ \
340: 1, 1, 1, 1, \
341: 1, 1, 1, 1, 0, 0, 0, 0, \
342: /* 1.1 fp registers */ \
343: 1, 1, 1, 1, 1, 1, 1, 1, \
344: 1, 1, 1, 1, 1, 1, 1, 1, \
345: 0, 0, 0, 0, 0, 0, 0, 0, \
346: 0, 0, 0, 0, 0, 0, 0, 0, \
347: 0, 0, 0, 0, 1, 1, 1, 1, \
348: 1, 1, 1, 1, 1, 1, 1, 1, \
349: 1, 1, 1, 1, 1, 1, 1, 1, \
350: 1}
351:
352: /* Make sure everything's fine if we *don't* have a given processor.
353: This assumes that putting a register in fixed_regs will keep the
354: compiler's mitts completely off it. We don't bother to zero it out
355: of register classes. */
356:
357: #define CONDITIONAL_REGISTER_USAGE \
358: { \
359: int i; \
360: HARD_REG_SET x; \
361: if (!TARGET_SNAKE) \
362: { \
363: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
364: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
365: if (TEST_HARD_REG_BIT (x, i)) \
366: fixed_regs[i] = call_used_regs[i] = 1; \
367: } \
368: else if (TARGET_DISABLE_FPREGS) \
369: { \
370: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]);\
371: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
372: if (TEST_HARD_REG_BIT (x, i)) \
373: fixed_regs[i] = call_used_regs[i] = 1; \
374: COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
375: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
376: if (TEST_HARD_REG_BIT (x, i)) \
377: fixed_regs[i] = call_used_regs[i] = 1; \
378: } \
379: else \
380: { \
381: COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
382: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
383: if (TEST_HARD_REG_BIT (x, i)) \
384: fixed_regs[i] = call_used_regs[i] = 1; \
385: } \
386: if (flag_pic) \
387: fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
388: }
389:
390: /* Allocated the call used registers first. This should minimize
391: the number of registers that need to be saved (as call used
392: registers will generally not be allocated across a call).
393:
394: Experimentation has shown slightly better results by allocating
395: FP registers first. */
396:
397: #define REG_ALLOC_ORDER \
398: /* 1.0 caller-saved fp regs. */ \
399: {36, 37, 38, 39, 32, 33, 34, 35, \
400: /* 1.1 caller-saved fp regs. */ \
401: 52, 53, 54, 55, 56, 57, 58, 59, \
402: 80, 81, 82, 83, 84, 85, 86, 87, \
403: 88, 89, 90, 91, 92, 93, 94, 95, \
404: 96, 97, 98, 99, \
405: 44, 45, 46, 47, 48, 49, 50, 51, \
406: /* caller-saved general regs. */ \
407: 19, 20, 21, 22, 23, 24, 25, 26, \
408: 27, 28, 29, 31, 2, \
409: /* 1.0 callee-saved fp regs. */ \
410: 40, 41, 42, 43, \
411: /* 1.1 callee-saved fp regs. */ \
412: 60, 61, 62, 63, 64, 65, 66, 67, \
413: 68, 69, 70, 71, 72, 73, 74, 75, \
414: 76, 77, 78, 79, \
415: /* callee-saved general regs. */ \
416: 3, 4, 5, 6, 7, 8, 9, 10, \
417: 11, 12, 13, 14, 15, 16, 17, 18, \
418: /* special registers. */ \
419: 1, 30, 0, 100}
420:
421:
422: /* Return number of consecutive hard regs needed starting at reg REGNO
423: to hold something of mode MODE.
424: This is ordinarily the length in words of a value of mode MODE
425: but can be less for certain modes in special long registers.
426:
427: On the HP-PA, ordinary registers hold 32 bits worth;
428: The floating point registers are 64 bits wide. Snake fp regs are 32
429: bits wide */
430: #define HARD_REGNO_NREGS(REGNO, MODE) \
431: (((REGNO) < 32 || (REGNO) >= 44) \
432: ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
433:
434: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
435: On the HP-PA, the cpu registers can hold any mode. We
436: force this to be an even register is it cannot hold the full mode. */
437: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
438: ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
439: : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
440: : (REGNO) < 44 ? (GET_MODE_SIZE (MODE) <= 4 \
441: || (GET_MODE_SIZE (MODE) > 4 \
442: && GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
443: : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
444: : 1))
445:
446: /* Value is 1 if it is a good idea to tie two pseudo registers
447: when one has mode MODE1 and one has mode MODE2.
448: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
449: for any hard reg, then this must be 0 for correct output. */
450: #define MODES_TIEABLE_P(MODE1, MODE2) \
451: (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
452:
453: /* Specify the registers used for certain standard purposes.
454: The values of these macros are register numbers. */
455:
456: /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
457: /* #define PC_REGNUM */
458:
459: /* Register to use for pushing function arguments. */
460: #define STACK_POINTER_REGNUM 30
461:
462: /* Base register for access to local variables of the function. */
463: #define FRAME_POINTER_REGNUM 4
464:
465: /* Value should be nonzero if functions must have frame pointers. */
466: #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
467:
468:
469: /* C statement to store the difference between the frame pointer
470: and the stack pointer values immediately after the function prologue.
471:
472: Note, we always pretend that this is a leaf function because if
473: it's not, there's no point in trying to eliminate the
474: frame pointer. If it is a leaf function, we guessed right! */
475: #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
476: do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
477:
478: /* Base register for access to arguments of the function. */
479: #define ARG_POINTER_REGNUM 4
480:
481: /* Register in which static-chain is passed to a function. */
482: /* ??? */
483: #define STATIC_CHAIN_REGNUM 29
484:
485: /* Register which holds offset table for position-independent
486: data references. */
487:
488: #define PIC_OFFSET_TABLE_REGNUM 19
489:
490: #define INITIALIZE_PIC initialize_pic ()
491: #define FINALIZE_PIC finalize_pic ()
492:
493: /* SOM ABI says that objects larger than 64 bits are returned in memory. */
494: #define RETURN_IN_MEMORY(TYPE) \
495: (TYPE_MODE (TYPE) == BLKmode || int_size_in_bytes (TYPE) > 8)
496:
497: /* Register in which address to store a structure value
498: is passed to a function. */
499: #define STRUCT_VALUE_REGNUM 28
500:
501: /* Define the classes of registers for register constraints in the
502: machine description. Also define ranges of constants.
503:
504: One of the classes must always be named ALL_REGS and include all hard regs.
505: If there is more than one class, another class must be named NO_REGS
506: and contain no registers.
507:
508: The name GENERAL_REGS must be the name of a class (or an alias for
509: another name such as ALL_REGS). This is the class of registers
510: that is allowed by "g" or "r" in a register constraint.
511: Also, registers outside this class are allocated only when
512: instructions express preferences for them.
513:
514: The classes must be numbered in nondecreasing order; that is,
515: a larger-numbered class must never be contained completely
516: in a smaller-numbered class.
517:
518: For any two classes, it is very desirable that there be another
519: class that represents their union. */
520:
521: /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
522: 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
523: fmpyadd and fmpysub are restricted.
524:
525: FP_OR_SNAKE_FP_REGS is for reload_{in,out}di only and isn't used
526: anywhere else. */
527:
528: enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
529: HI_SNAKE_FP_REGS, SNAKE_FP_REGS, GENERAL_OR_SNAKE_FP_REGS,
530: FP_OR_SNAKE_FP_REGS, NON_SHIFT_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
531:
532: #define N_REG_CLASSES (int) LIM_REG_CLASSES
533:
534: /* Give names of register classes as strings for dump file. */
535:
536: #define REG_CLASS_NAMES \
537: { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\
538: "HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\
539: "FP_OR_SNAKE_FP_REGS", "NON_SHIFT_REGS", "SHIFT_REGS", "ALL_REGS"}
540:
541: /* Define which registers fit in which classes.
542: This is an initializer for a vector of HARD_REG_SET
543: of length N_REG_CLASSES. Register 0, the "condition code" register,
544: is in no class. */
545:
546: #define REG_CLASS_CONTENTS \
547: { {0, 0, 0, 0}, /* NO_REGS */ \
548: {0x2, 0, 0, 0}, /* R1_REGS */ \
549: {-2, 0, 0, 0}, /* GENERAL_REGS */ \
550: {0, 0xfff, 0, 0}, /* FP_REGS */ \
551: {-2, 0xfff, 0, 0}, /* GENERAL_OR_FP_REGS */\
552: {0, 0, 0xfffffff0, 0xf}, /* HI_SNAKE_FP_REGS */ \
553: {0, 0xfffff000, ~0, 0xf}, /* SNAKE_FP_REGS */ \
554: {-2, 0xfffff000, ~0, 0xf}, /* GENERAL_OR_SNAKE_FP_REGS */\
555: {0, ~0, ~0, 0xf}, /* FP_OR_SNAKE_FP_REGS */\
556: {-2, ~0, ~0, ~0x10}, /* NON_SHIFT_REGS */ \
557: {0, 0, 0, 0x10}, /* SHIFT_REGS */ \
558: {-2, ~0, ~0, 0x1f}} /* ALL_REGS */
559:
560: /* The same information, inverted:
561: Return the class number of the smallest class containing
562: reg number REGNO. This could be a conditional expression
563: or could index an array. */
564:
565: #define REGNO_REG_CLASS(REGNO) \
566: ((REGNO) == 0 ? NO_REGS \
567: : (REGNO) == 1 ? R1_REGS \
568: : (REGNO) < 32 ? GENERAL_REGS \
569: : (REGNO) < 44 ? FP_REGS \
570: : (REGNO) < 68 ? SNAKE_FP_REGS \
571: : (REGNO) < 100 ? HI_SNAKE_FP_REGS \
572: : SHIFT_REGS)
573:
574: /* The class value for index registers, and the one for base regs. */
575: #define INDEX_REG_CLASS GENERAL_REGS
576: #define BASE_REG_CLASS GENERAL_REGS
577:
578: #define FP_REG_CLASS_P(CLASS) \
579: (CLASS == FP_REGS || CLASS == SNAKE_FP_REGS || CLASS == HI_SNAKE_FP_REGS)
580:
581: /* Get reg_class from a letter such as appears in the machine description.
582: Note 'Z' is not the same as 'r' since SHIFT_REGS is not part of
583: GENERAL_REGS. */
584:
585: #define REG_CLASS_FROM_LETTER(C) \
586: ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
587: ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
588: ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) : \
589: ((C) == 'q' ? SHIFT_REGS : \
590: ((C) == 'a' ? R1_REGS : \
591: ((C) == 'z' ? FP_OR_SNAKE_FP_REGS : \
592: ((C) == 'Z' ? ALL_REGS : NO_REGS)))))))
593:
594: /* The letters I, J, K, L and M in a register constraint string
595: can be used to stand for particular ranges of immediate operands.
596: This macro defines what the ranges are.
597: C is the letter, and VALUE is a constant value.
598: Return 1 if VALUE is in the range specified by C.
599:
600: `I' is used for the 11 bit constants.
601: `J' is used for the 14 bit constants.
602: `K' is used for values that can be moved with a zdepi insn.
603: `L' is used for the 5 bit constants.
604: `M' is used for 0.
605: `N' is used for values with the least significant 11 bits equal to zero.
606: `O' is used for numbers n such that n+1 is a power of 2.
607: */
608:
609: #ifdef NeXT_ASM
610: #define RIGHT_BITS_MASK 0x3fff
611: #else
612: #define RIGHT_BITS_MASK 0x7ff
613: #endif
614:
615: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
616: ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
617: : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
618: : (C) == 'K' ? zdepi_cint_p (VALUE) \
619: : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
620: : (C) == 'M' ? (VALUE) == 0 \
621: : (C) == 'N' ? ((VALUE) & RIGHT_BITS_MASK) == 0 \
622: : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
623: : (C) == 'P' ? and_mask_p (VALUE) \
624: : 0)
625:
626: /* Similar, but for floating or large integer constants, and defining letters
627: G and H. Here VALUE is the CONST_DOUBLE rtx itself.
628:
629: For PA, `G' is the floating-point constant zero. `H' is undefined. */
630:
631: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
632: ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
633: && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
634: : 0)
635:
636: /* Given an rtx X being reloaded into a reg required to be
637: in class CLASS, return the class of reg to actually use.
638: In general this is just CLASS; but on some machines
639: in some cases it is preferable to use a more restrictive class. */
640: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
641:
642: /* Return the register class of a scratch register needed to copy IN into
643: or out of a register in CLASS in MODE. If it can be done directly,
644: NO_REGS is returned. */
645:
646: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
647: secondary_reload_class (CLASS, MODE, IN)
648:
649: /* On the PA it is not possible to directly move data between
650: GENERAL_REGS and FP_REGS. */
651: #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
652: ((FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2)) \
653: || (! FP_REG_CLASS_P (CLASS1) && FP_REG_CLASS_P (CLASS2)))
654:
655: /* Return the stack location to use for secondary memory needed reloads. */
656: #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
657: gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
658:
659: /* Return the maximum number of consecutive registers
660: needed to represent mode MODE in a register of class CLASS. */
661: #define CLASS_MAX_NREGS(CLASS, MODE) \
662: ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
663:
664: /* Stack layout; function entry, exit and calling. */
665:
666: /* Define this if pushing a word on the stack
667: makes the stack pointer a smaller address. */
668: /* #define STACK_GROWS_DOWNWARD */
669:
670: /* Believe it or not. */
671: #define ARGS_GROW_DOWNWARD
672:
673: /* Define this if the nominal address of the stack frame
674: is at the high-address end of the local variables;
675: that is, each additional local variable allocated
676: goes at a more negative offset in the frame. */
677: /* #define FRAME_GROWS_DOWNWARD */
678:
679: /* Offset within stack frame to start allocating local variables at.
680: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
681: first local allocated. Otherwise, it is the offset to the BEGINNING
682: of the first local allocated. */
683: #define STARTING_FRAME_OFFSET 8
684:
685: /* If we generate an insn to push BYTES bytes,
686: this says how many the stack pointer really advances by.
687: On the HP-PA, don't define this because there are no push insns. */
688: /* #define PUSH_ROUNDING(BYTES) */
689:
690: /* Offset of first parameter from the argument pointer register value.
691: This value will be negated because the arguments grow down.
692: Also note that on STACK_GROWS_UPWARD machines (such as this one)
693: this is the distance from the frame pointer to the end of the first
694: argument, not it's beginning. To get the real offset of the first
695: argument, the size of the argument must be added.
696:
697: ??? Have to check on this.*/
698:
699: #define FIRST_PARM_OFFSET(FNDECL) -32
700:
701: /* Absolute value of offset from top-of-stack address to location to store the
702: function parameter if it can't go in a register.
703: Addresses for following parameters are computed relative to this one. */
704: #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
705:
706:
707: /* When a parameter is passed in a register, stack space is still
708: allocated for it. */
709: #define REG_PARM_STACK_SPACE(DECL) 16
710:
711: /* Define this if the above stack space is to be considered part of the
712: space allocated by the caller. */
713: #define OUTGOING_REG_PARM_STACK_SPACE
714:
715: /* Keep the stack pointer constant throughout the function.
716: This is both an optimization and a necessity: longjmp
717: doesn't behave itself when the stack pointer moves within
718: the function! */
719: #define ACCUMULATE_OUTGOING_ARGS
720:
721: /* The weird HPPA calling conventions require a minimum of 48 bytes on
722: the stack: 16 bytes for register saves, and 32 bytes for magic.
723: This is the difference between the logical top of stack and the
724: actual sp. */
725: #define STACK_POINTER_OFFSET -32
726:
727: #define STACK_DYNAMIC_OFFSET(FNDECL) \
728: ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
729:
730: /* Value is 1 if returning from a function call automatically
731: pops the arguments described by the number-of-args field in the call.
732: FUNTYPE is the data type of the function (as a tree),
733: or for a library call it is an identifier node for the subroutine name. */
734:
735: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
736:
737: /* Define how to find the value returned by a function.
738: VALTYPE is the data type of the value (as a tree).
739: If the precise function being called is known, FUNC is its FUNCTION_DECL;
740: otherwise, FUNC is 0. */
741:
742: /* On the HP-PA the value is found in register(s) 28(-29), unless
743: the mode is SF or DF. Then the value is returned in fr4 (32, ) */
744:
745:
746: #define FUNCTION_VALUE(VALTYPE, FUNC) \
747: gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
748: TYPE_MODE (VALTYPE) == DFmode) ? \
749: (TARGET_SNAKE ? 44 : 32) : 28))
750:
751: /* Define how to find the value returned by a library function
752: assuming the value has mode MODE. */
753:
754: #define LIBCALL_VALUE(MODE) \
755: gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
756: (TARGET_SNAKE ? 44 : 32) : 28))
757:
758: /* 1 if N is a possible register number for a function value
759: as seen by the caller. */
760:
761: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == (TARGET_SNAKE ? 44 : 32))
762:
763: /* 1 if N is a possible register number for function argument passing. */
764:
765: #define FUNCTION_ARG_REGNO_P(N) \
766: (((N) >= 23 && (N) <= 26) \
767: || ((N) >= 32 && (N) <= 35 && ! TARGET_SNAKE) \
768: || ((N) >= 44 && (N) <= 51 && TARGET_SNAKE))
769:
770: /* Define a data type for recording info about an argument list
771: during the scan of that argument list. This data type should
772: hold all necessary information about the function itself
773: and about the args processed so far, enough to enable macros
774: such as FUNCTION_ARG to determine where the next arg should go.
775:
776: On the HP-PA, this is a single integer, which is a number of words
777: of arguments scanned so far (including the invisible argument,
778: if any, which holds the structure-value-address).
779: Thus 4 or more means all following args should go on the stack. */
780:
781: #define CUMULATIVE_ARGS int
782:
783: /* Initialize a variable CUM of type CUMULATIVE_ARGS
784: for a call to a function whose data type is FNTYPE.
785: For a library call, FNTYPE is 0.
786: */
787:
788: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
789:
790: /* Figure out the size in words of the function argument. */
791:
792: #define FUNCTION_ARG_SIZE(MODE, TYPE) \
793: ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
794:
795: /* Update the data in CUM to advance over an argument
796: of mode MODE and data type TYPE.
797: (TYPE is null for libcalls where that information may not be available.) */
798:
799: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
800: (((((CUM) & 01) && (TYPE) != 0 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1)\
801: && (CUM)++), (CUM) += FUNCTION_ARG_SIZE(MODE, TYPE))
802:
803: /* Determine where to put an argument to a function.
804: Value is zero to push the argument on the stack,
805: or a hard register in which to store the argument.
806:
807: MODE is the argument's machine mode.
808: TYPE is the data type of the argument (as a tree).
809: This is null for libcalls where that information may
810: not be available.
811: CUM is a variable of type CUMULATIVE_ARGS which gives info about
812: the preceding args and about the function being called.
813: NAMED is nonzero if this argument is a named parameter
814: (otherwise it is an extra parameter matching an ellipsis). */
815:
816: /* On the HP-PA the first four words of args are normally in registers
817: and the rest are pushed. But any arg that won't entirely fit in regs
818: is pushed.
819:
820: Arguments passed in registers are either 1 or 2 words long.
821:
822: The caller must make a distinction between calls to explicitly named
823: functions and calls through pointers to functions -- the conventions
824: are different! Calls through pointers to functions only use general
825: registers for the first four argument words. */
826:
827: #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
828:
829: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
830: (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
831: ? gen_rtx (REG, (MODE), \
832: (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
833: ? ((! current_call_is_indirect \
834: && (MODE) == DFmode) \
835: ? ((CUM) ? (TARGET_SNAKE ? 50 : 35) \
836: : (TARGET_SNAKE ? 46 : 33)) \
837: : ((CUM) ? 23 : 25)) \
838: : ((! current_call_is_indirect \
839: && (MODE) == SFmode) \
840: ? (TARGET_SNAKE ? 44 + 2 * (CUM) : 32 + (CUM)) \
841: : (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE))))))\
842: : 0)
843:
844: /* Define where a function finds its arguments.
845: This would be different from FUNCTION_ARG if we had register windows. */
846:
847: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
848: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
849:
850: /* For an arg passed partly in registers and partly in memory,
851: this is the number of registers used.
852: For args passed entirely in registers or entirely in memory, zero. */
853:
854: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
855:
856: /* If defined, a C expression that gives the alignment boundary, in
857: bits, of an argument with the specified mode and type. If it is
858: not defined, `PARM_BOUNDARY' is used for all arguments. */
859: /*
860: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
861: (((TYPE) != 0) \
862: ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
863: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
864: ? PARM_BOUNDARY \
865: : GET_MODE_ALIGNMENT(MODE)))
866: */
867: #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
868: (((TYPE) != 0) \
869: ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
870: ? PARM_BOUNDARY \
871: : TYPE_ALIGN(TYPE)) \
872: : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
873: ? PARM_BOUNDARY \
874: : GET_MODE_ALIGNMENT(MODE)))
875:
876: /* Arguments larger than eight bytes are passed by invisible reference */
877:
878: #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
879: ((TYPE) && int_size_in_bytes (TYPE) > 8)
880:
881: extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
882: extern enum cmp_type hppa_branch_type;
883:
884: /* How the quote in "R'label" is printed. */
885: #ifdef NeXT_ASM
886: #define PA_QUOTE '`'
887: #else
888: #define PA_QUOTE '\''
889: #endif
890:
891: /* Output the label for a function definition. */
892: #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
893: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
894: do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
895: fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
896: #else
897: #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
898: do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
899: fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
900: #endif
901:
902: #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
903: do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
904: tree tree_type = TREE_TYPE (DECL); \
905: tree parm; \
906: int i; \
907: if (TREE_PUBLIC (DECL) || TARGET_GAS) \
908: { extern int current_function_varargs; \
909: if (TREE_PUBLIC (DECL)) \
910: { \
911: fputs ("\t.EXPORT ", FILE); \
912: assemble_name (FILE, NAME); \
913: fputs (",ENTRY,PRIV_LEV=3", FILE); \
914: } \
915: else \
916: { \
917: fputs ("\t.PARAM ", FILE); \
918: assemble_name (FILE, NAME); \
919: } \
920: for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
921: parm = TREE_CHAIN (parm)) \
922: { \
923: if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
924: fprintf (FILE, ",ARGW%d=FR", i++); \
925: else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
926: { \
927: if (i <= 2) \
928: { \
929: if (i == 1) i++; \
930: ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
931: } \
932: else \
933: break; \
934: } \
935: else \
936: { \
937: int arg_size = \
938: FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
939: DECL_ARG_TYPE (parm)); \
940: if (arg_size == 2 && i <= 2) \
941: { \
942: if (i == 1) i++; \
943: fprintf (FILE, ",ARGW%d=GR", i++); \
944: fprintf (FILE, ",ARGW%d=GR", i++); \
945: } \
946: else if (arg_size == 1) \
947: fprintf (FILE, ",ARGW%d=GR", i++); \
948: else \
949: i += arg_size; \
950: } \
951: } \
952: /* anonymous args */ \
953: if ((TYPE_ARG_TYPES (tree_type) != 0 \
954: && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
955: != void_type_node)) \
956: || current_function_varargs) \
957: { \
958: for (; i < 4; i++) \
959: fprintf (FILE, ",ARGW%d=GR", i); \
960: } \
961: if (TYPE_MODE (fntype) == DFmode) \
962: fprintf (FILE, ",RTNVAL=FR"); \
963: else if (TYPE_MODE (fntype) == SFmode) \
964: fprintf (FILE, ",RTNVAL=FU"); \
965: else if (fntype != void_type_node) \
966: fprintf (FILE, ",RTNVAL=GR"); \
967: fputs ("\n", FILE); \
968: } \
969: ASM_OUTPUT_LABEL (FILE, NAME);} while (0)
970:
971: /* This macro generates the assembly code for function entry.
972: FILE is a stdio stream to output the code to.
973: SIZE is an int: how many units of temporary storage to allocate.
974: Refer to the array `regs_ever_live' to determine which registers
975: to save; `regs_ever_live[I]' is nonzero if register number I
976: is ever used in the function. This macro is responsible for
977: knowing which registers should not be saved even if used. */
978:
979: /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
980: of memory. If any fpu reg is used in the function, we allocate
981: such a block here, at the bottom of the frame, just in case it's needed.
982:
983: If this function is a leaf procedure, then we may choose not
984: to do a "save" insn. The decision about whether or not
985: to do this is made in regclass.c. */
986:
987: #define FUNCTION_PROLOGUE(FILE, SIZE) \
988: output_function_prologue (FILE, SIZE)
989:
990: /* Output assembler code to FILE to increment profiler label # LABELNO
991: for profiling a function entry.
992:
993: Because HPUX _mcount is so different, we actually emit the
994: profiling code in function_prologue. This just stores LABELNO for
995: that. */
996:
997: #define PROFILE_BEFORE_PROLOGUE
998: #define FUNCTION_PROFILER(FILE, LABELNO) \
999: { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1000:
1001: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1002: the stack pointer does not matter. The value is tested only in
1003: functions that have frame pointers.
1004: No definition is equivalent to always zero. */
1005:
1006: extern int may_call_alloca;
1007: extern int current_function_pretend_args_size;
1008:
1009: #define EXIT_IGNORE_STACK \
1010: (get_frame_size () != 0 \
1011: || current_function_calls_alloca || current_function_outgoing_args_size)
1012:
1013:
1014: /* This macro generates the assembly code for function exit,
1015: on machines that need it. If FUNCTION_EPILOGUE is not defined
1016: then individual return instructions are generated for each
1017: return statement. Args are same as for FUNCTION_PROLOGUE.
1018:
1019: The function epilogue should not depend on the current stack pointer!
1020: It should use the frame pointer only. This is mandatory because
1021: of alloca; we also take advantage of it to omit stack adjustments
1022: before returning. */
1023:
1024: /* This declaration is needed due to traditional/ANSI
1025: incompatibilities which cannot be #ifdefed away
1026: because they occur inside of macros. Sigh. */
1027: extern union tree_node *current_function_decl;
1028:
1029: #define FUNCTION_EPILOGUE(FILE, SIZE) \
1030: output_function_epilogue (FILE, SIZE)
1031:
1032: /* Output assembler code for a block containing the constant parts
1033: of a trampoline, leaving space for the variable parts.\
1034:
1035: The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1036: and then branches to the specified routine.
1037:
1038: This code template is copied from text segment to stack location
1039: and then patched with INITIALIZE_TRAMPOLINE to contain
1040: valid values, and then entered as a subroutine.
1041:
1042: It is best to keep this as small as possible to avoid having to
1043: flush multiple lines in the cache. */
1044:
1045: #define TRAMPOLINE_TEMPLATE(FILE) \
1046: { \
1047: fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1048: fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1049: fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1050: fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1051: fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1052: fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1053: fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1054: fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1055: fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1056: fprintf (FILE, "\t.word 0\n"); \
1057: fprintf (FILE, "\t.word 0\n"); \
1058: }
1059:
1060: /* Length in units of the trampoline for entering a nested function.
1061:
1062: Flush the cache entries corresponding to the first and last addresses
1063: of the trampoline. This is necessary as the trampoline may cross two
1064: cache lines.
1065:
1066: If the code part of the trampoline ever grows to > 32 bytes, then it
1067: will become necessary to hack on the cacheflush pattern in pa.md. */
1068:
1069: #define TRAMPOLINE_SIZE (11 * 4)
1070:
1071: /* Emit RTL insns to initialize the variable parts of a trampoline.
1072: FNADDR is an RTX for the address of the function's pure code.
1073: CXT is an RTX for the static chain value for the function.
1074:
1075: Move the function address to the trampoline template at offset 12.
1076: Move the static chain value to trampoline template at offset 16. */
1077:
1078: #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1079: { \
1080: rtx start_addr, end_addr, masked_start_addr; \
1081: \
1082: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1083: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1084: start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1085: emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1086: /* fdc and fic only use registers for the address to flush, \
1087: they do not accept integer displacements. */ \
1088: start_addr = force_reg (SImode, (TRAMP)); \
1089: end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1090: emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1091: masked_start_addr = gen_reg_rtx (SImode); \
1092: emit_insn (gen_andsi3 (masked_start_addr, start_addr, \
1093: GEN_INT (0x3fffffff))); \
1094: end_addr = force_reg (SImode, plus_constant (masked_start_addr, 32)); \
1095: emit_insn (gen_icacheflush (masked_start_addr, end_addr, start_addr, \
1096: gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1097: }
1098:
1099: /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1100: reference the 4 integer arg registers and 4 fp arg registers.
1101: Ordinarily they are not call used registers, but they are for
1102: _builtin_saveregs, so we must make this explicit. */
1103:
1104: #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1105:
1106:
1107: /* Addressing modes, and classification of registers for them. */
1108:
1109: #define HAVE_POST_INCREMENT
1110: #define HAVE_POST_DECREMENT
1111:
1112: #define HAVE_PRE_DECREMENT
1113: #define HAVE_PRE_INCREMENT
1114:
1115: /* Macros to check register numbers against specific register classes. */
1116:
1117: /* These assume that REGNO is a hard or pseudo reg number.
1118: They give nonzero only if REGNO is a hard reg of the suitable class
1119: or a pseudo reg currently allocated to a suitable hard reg.
1120: Since they use reg_renumber, they are safe only once reg_renumber
1121: has been allocated, which happens in local-alloc.c. */
1122:
1123: #define REGNO_OK_FOR_INDEX_P(REGNO) \
1124: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1125: #define REGNO_OK_FOR_BASE_P(REGNO) \
1126: ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1127: #define REGNO_OK_FOR_FP_P(REGNO) \
1128: (((REGNO) >= 32 && (REGNO) <= 99)\
1129: || (reg_renumber[REGNO] >= 32 && reg_renumber[REGNO] <= 99))
1130:
1131: /* Now macros that check whether X is a register and also,
1132: strictly, whether it is in a specified class.
1133:
1134: These macros are specific to the the HP-PA, and may be used only
1135: in code for printing assembler insns and in conditions for
1136: define_optimization. */
1137:
1138: /* 1 if X is an fp register. */
1139:
1140: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1141:
1142: /* Maximum number of registers that can appear in a valid memory address. */
1143:
1144: #define MAX_REGS_PER_ADDRESS 2
1145:
1146: /* Recognize any constant value that is a valid address except
1147: for symbolic addresses. We get better CSE by rejecting them
1148: here and allowing hppa_legitimize_address to break them up. We
1149: use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1150:
1151: #define CONSTANT_ADDRESS_P(X) \
1152: ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1153: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1154: || GET_CODE (X) == HIGH) \
1155: && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1156:
1157: /* Include all constant integers and constant doubles, but not
1158: floating-point, except for floating-point zero.
1159:
1160: Also reject function labels as reload can not handle them correctly
1161: right now. (Fix this for 2.5). */
1162: #define LEGITIMATE_CONSTANT_P(X) \
1163: (((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1164: || (X) == CONST0_RTX (GET_MODE (X))) \
1165: && ! function_label_operand (X, VOIDmode)))
1166:
1167: /* Subroutine for EXTRA_CONSTRAINT.
1168:
1169: Return 1 iff OP is a pseudo which did not get a hard register and
1170: we are running the reload pass. */
1171:
1172: #define IS_RELOADING_PSEUDO_P(OP) \
1173: ((reload_in_progress \
1174: && GET_CODE (OP) == REG \
1175: && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1176: && reg_renumber [REGNO (OP)] < 0))
1177:
1178: /* Optional extra constraints for this machine. Borrowed from sparc.h.
1179:
1180: For the HPPA, `Q' means that this is a memory operand but not a
1181: symbolic memory operand. Note that an unassigned pseudo register
1182: is such a memory operand. Needed because reload will generate
1183: these things in insns and then not re-recognize the insns, causing
1184: constrain_operands to fail.
1185:
1186: Also note `Q' accepts any memory operand during the reload pass.
1187: This includes out-of-range displacements in reg+d addressing.
1188: This makes for better code. (??? For 2.5 address this issue).
1189:
1190: `R' is unused.
1191:
1192: `S' is unused.
1193:
1194: `T' is for fp loads and stores. */
1195: #define EXTRA_CONSTRAINT(OP, C) \
1196: ((C) == 'Q' ? \
1197: (IS_RELOADING_PSEUDO_P (OP) \
1198: || (GET_CODE (OP) == MEM \
1199: && reload_in_progress) \
1200: || (GET_CODE (OP) == MEM \
1201: && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1202: && ! symbolic_memory_operand (OP, VOIDmode))) \
1203: : ((C) == 'T' ? \
1204: (GET_CODE (OP) == MEM \
1205: /* Using DFmode forces only short displacements \
1206: to be recognized as valid in reg+d addresses. */\
1207: && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1208:
1209: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1210: and check its validity for a certain class.
1211: We have two alternate definitions for each of them.
1212: The usual definition accepts all pseudo regs; the other rejects
1213: them unless they have been allocated suitable hard regs.
1214: The symbol REG_OK_STRICT causes the latter definition to be used.
1215:
1216: Most source files want to accept pseudo regs in the hope that
1217: they will get allocated to the class that the insn wants them to be in.
1218: Source files for reload pass need to be strict.
1219: After reload, it makes no difference, since pseudo regs have
1220: been eliminated by then. */
1221:
1222: #ifndef REG_OK_STRICT
1223:
1224: /* Nonzero if X is a hard reg that can be used as an index
1225: or if it is a pseudo reg. */
1226: #define REG_OK_FOR_INDEX_P(X) \
1227: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1228: /* Nonzero if X is a hard reg that can be used as a base reg
1229: or if it is a pseudo reg. */
1230: #define REG_OK_FOR_BASE_P(X) \
1231: (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1232:
1233: #else
1234:
1235: /* Nonzero if X is a hard reg that can be used as an index. */
1236: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1237: /* Nonzero if X is a hard reg that can be used as a base reg. */
1238: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1239:
1240: #endif
1241:
1242: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1243: that is a valid memory address for an instruction.
1244: The MODE argument is the machine mode for the MEM expression
1245: that wants to use this address.
1246:
1247: On the HP-PA, the actual legitimate addresses must be
1248: REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1249: But we can treat a SYMBOL_REF as legitimate if it is part of this
1250: function's constant-pool, because such addresses can actually
1251: be output as REG+SMALLINT. */
1252:
1253: #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1254: #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1255:
1256: #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1257: #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1258:
1259: #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1260: #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1261:
1262: #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1263: #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1264:
1265: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1266: { \
1267: if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1268: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1269: || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1270: && REG_P (XEXP (X, 0)) \
1271: && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1272: goto ADDR; \
1273: else if (GET_CODE (X) == PLUS) \
1274: { \
1275: rtx base = 0, index; \
1276: if (flag_pic == 3 && XEXP (X, 0) == pic_offset_table_rtx)\
1277: { \
1278: if (GET_CODE (XEXP (X, 1)) == REG \
1279: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1280: goto ADDR; \
1281: else if (flag_pic == 1 \
1282: && GET_CODE (XEXP (X, 1)) != REG \
1283: && GET_CODE (XEXP (X, 1)) != LO_SUM \
1284: && GET_CODE (XEXP (X, 1)) != MEM) \
1285: goto ADDR; \
1286: } \
1287: else if (REG_P (XEXP (X, 0)) \
1288: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1289: base = XEXP (X, 0), index = XEXP (X, 1); \
1290: else if (REG_P (XEXP (X, 1)) \
1291: && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1292: base = XEXP (X, 1), index = XEXP (X, 0); \
1293: if (base != 0) \
1294: if (GET_CODE (index) == CONST_INT \
1295: && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1296: || INT_5_BITS (index))) \
1297: goto ADDR; \
1298: } \
1299: else if (GET_CODE (X) == LO_SUM \
1300: && GET_CODE (XEXP (X, 0)) == REG \
1301: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1302: && CONSTANT_P (XEXP (X, 1)) \
1303: && (MODE) != SFmode \
1304: && (MODE) != DFmode) \
1305: goto ADDR; \
1306: else if (GET_CODE (X) == LO_SUM \
1307: && GET_CODE (XEXP (X, 0)) == SUBREG \
1308: && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1309: && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1310: && CONSTANT_P (XEXP (X, 1)) \
1311: && (MODE) != SFmode \
1312: && (MODE) != DFmode) \
1313: goto ADDR; \
1314: else if (GET_CODE (X) == LABEL_REF \
1315: || (GET_CODE (X) == CONST_INT \
1316: && INT_14_BITS (X))) \
1317: goto ADDR; \
1318: }
1319:
1320: /* Try machine-dependent ways of modifying an illegitimate address
1321: to be legitimate. If we find one, return the new, valid address.
1322: This macro is used in only one place: `memory_address' in explow.c.
1323:
1324: OLDX is the address as it was before break_out_memory_refs was called.
1325: In some cases it is useful to look at this to decide what needs to be done.
1326:
1327: MODE and WIN are passed so that this macro can use
1328: GO_IF_LEGITIMATE_ADDRESS.
1329:
1330: It is always safe for this macro to do nothing. It exists to recognize
1331: opportunities to optimize the output. */
1332:
1333: extern struct rtx_def *hppa_legitimize_address ();
1334: #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1335: { rtx orig_x = (X); \
1336: (X) = hppa_legitimize_address (X, OLDX, MODE); \
1337: if ((X) != orig_x && memory_address_p (MODE, X)) \
1338: goto WIN; }
1339:
1340: /* Go to LABEL if ADDR (a legitimate address expression)
1341: has an effect that depends on the machine mode it is used for. */
1342:
1343: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1344: if (GET_CODE (ADDR) == PRE_DEC \
1345: || GET_CODE (ADDR) == POST_DEC \
1346: || GET_CODE (ADDR) == PRE_INC \
1347: || GET_CODE (ADDR) == POST_INC) \
1348: goto LABEL
1349:
1350: /* Define this macro if references to a symbol must be treated
1351: differently depending on something about the variable or
1352: function named by the symbol (such as what section it is in).
1353:
1354: The macro definition, if any, is executed immediately after the
1355: rtl for DECL or other node is created.
1356: The value of the rtl will be a `mem' whose address is a
1357: `symbol_ref'.
1358:
1359: The usual thing for this macro to do is to a flag in the
1360: `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1361: name string in the `symbol_ref' (if one bit is not enough
1362: information).
1363:
1364: On the HP-PA we use this to indicate if a symbol is in text or
1365: data space. Also, function labels need special treatment. */
1366:
1367: #define TEXT_SPACE_P(DECL)\
1368: (TREE_CODE (DECL) == FUNCTION_DECL \
1369: || (TREE_CODE (DECL) == VAR_DECL \
1370: && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1371: && !flag_pic) \
1372: || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1373: && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1374:
1375: #define FUNCTION_NAME_P(NAME) \
1376: (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1377:
1378: #define ENCODE_SECTION_INFO(DECL)\
1379: do \
1380: { if (TEXT_SPACE_P (DECL)) \
1381: { rtx _rtl; \
1382: if (TREE_CODE (DECL) == FUNCTION_DECL \
1383: || TREE_CODE (DECL) == VAR_DECL) \
1384: _rtl = DECL_RTL (DECL); \
1385: else \
1386: _rtl = TREE_CST_RTL (DECL); \
1387: SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1388: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1389: hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1390: } \
1391: } \
1392: while (0)
1393:
1394: /* Store the user-specified part of SYMBOL_NAME in VAR.
1395: This is sort of inverse to ENCODE_SECTION_INFO. */
1396:
1397: #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1398: (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1399: 1 + (SYMBOL_NAME)[1] == '@'\
1400: : (SYMBOL_NAME)[0] == '@'))
1401:
1402: /* Specify the machine mode that this machine uses
1403: for the index in the tablejump instruction. */
1404: #define CASE_VECTOR_MODE DImode
1405:
1406: /* Define this if the tablejump instruction expects the table
1407: to contain offsets from the address of the table.
1408: Do not define this if the table should contain absolute addresses. */
1409: /* #define CASE_VECTOR_PC_RELATIVE */
1410:
1411: #define CASE_DROPS_THROUGH
1412: /* Specify the tree operation to be used to convert reals to integers. */
1413: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1414:
1415: /* This is the kind of divide that is easiest to do in the general case. */
1416: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1417:
1418: /* Define this as 1 if `char' should by default be signed; else as 0. */
1419: #define DEFAULT_SIGNED_CHAR 1
1420:
1421: /* Max number of bytes we can move from memory to memory
1422: in one reasonably fast instruction. */
1423: #define MOVE_MAX 8
1424:
1425: /* Define if operations between registers always perform the operation
1426: on the full register even if a narrower mode is specified. */
1427: #define WORD_REGISTER_OPERATIONS
1428:
1429: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1430: will either zero-extend or sign-extend. The value of this macro should
1431: be the code that says which one of the two operations is implicitly
1432: done, NIL if none. */
1433: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1434:
1435: /* Nonzero if access to memory by bytes is slow and undesirable. */
1436: #define SLOW_BYTE_ACCESS 1
1437:
1438: /* Do not break .stabs pseudos into continuations. */
1439: #define DBX_CONTIN_LENGTH 0
1440:
1441: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1442: is done just by pretending it is already truncated. */
1443: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1444:
1445: /* We assume that the store-condition-codes instructions store 0 for false
1446: and some other value for true. This is the value stored for true. */
1447:
1448: #define STORE_FLAG_VALUE 1
1449:
1450: /* When a prototype says `char' or `short', really pass an `int'. */
1451: #define PROMOTE_PROTOTYPES
1452:
1453: /* Specify the machine mode that pointers have.
1454: After generation of rtl, the compiler makes no further distinction
1455: between pointers and any other objects of this machine mode. */
1456: #define Pmode SImode
1457:
1458: /* Add any extra modes needed to represent the condition code.
1459:
1460: HPPA floating comparisons produce condition codes. */
1461: #define EXTRA_CC_MODES CCFPmode
1462:
1463: /* Define the names for the modes specified above. */
1464: #define EXTRA_CC_NAMES "CCFP"
1465:
1466: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1467: return the mode to be used for the comparison. For floating-point, CCFPmode
1468: should be used. CC_NOOVmode should be used when the first operand is a
1469: PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1470: needed. */
1471: #define SELECT_CC_MODE(OP,X,Y) \
1472: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1473:
1474: /* A function address in a call instruction
1475: is a byte address (for indexing purposes)
1476: so give the MEM rtx a byte's mode. */
1477: #define FUNCTION_MODE SImode
1478:
1479: /* Define this if addresses of constant functions
1480: shouldn't be put through pseudo regs where they can be cse'd.
1481: Desirable on machines where ordinary constants are expensive
1482: but a CALL with constant address is cheap. */
1483: #define NO_FUNCTION_CSE
1484:
1485: /* Define this to be nonzero if shift instructions ignore all but the low-order
1486: few bits. */
1487: #define SHIFT_COUNT_TRUNCATED 1
1488:
1489: /* Use atexit for static constructors/destructors, instead of defining
1490: our own exit function. */
1491: #define HAVE_ATEXIT
1492:
1493: /* Compute the cost of computing a constant rtl expression RTX
1494: whose rtx-code is CODE. The body of this macro is a portion
1495: of a switch statement. If the code is computed here,
1496: return it with a return statement. Otherwise, break from the switch. */
1497:
1498: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1499: case CONST_INT: \
1500: if (INTVAL (RTX) == 0) return 0; \
1501: if (INT_14_BITS (RTX)) return 1; \
1502: case HIGH: \
1503: return 2; \
1504: case CONST: \
1505: case LABEL_REF: \
1506: case SYMBOL_REF: \
1507: return 4; \
1508: case CONST_DOUBLE: \
1509: if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1510: && OUTER_CODE != SET) \
1511: return 0; \
1512: else \
1513: return 8;
1514:
1515: #define ADDRESS_COST(RTX) \
1516: (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1517:
1518: /* Compute extra cost of moving data between one register class
1519: and another.
1520:
1521: Make moves from SAR so expensive they should never happen. Used to
1522: have 0xffff here but that generates an overflow in rare cases.
1523:
1524: Copies involving a FP register and a non-FP register are relatively
1525: expensive because they must go through memory.
1526:
1527: Other copies are reasonably cheap. */
1528: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1529: (CLASS1 == SHIFT_REGS ? 0x100 \
1530: : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1531: : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1532: : 2)
1533:
1534:
1535: /* Provide the costs of a rtl expression. This is in the body of a
1536: switch on CODE. The purpose for the cost of MULT is to encourage
1537: `synth_mult' to find a synthetic multiply when reasonable. */
1538:
1539: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1540: case MULT: \
1541: return TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1542: ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1543: case DIV: \
1544: case UDIV: \
1545: case MOD: \
1546: case UMOD: \
1547: return COSTS_N_INSNS (60); \
1548: case PLUS: /* this includes shNadd insns */ \
1549: return COSTS_N_INSNS (1) + 2;
1550:
1551: /* Adjust the cost of dependencies. */
1552:
1553: #define ADJUST_COST(INSN,LINK,DEP,COST) \
1554: (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1555:
1556: /* Handling the special cases is going to get too complicated for a macro,
1557: just call `pa_adjust_insn_length' to do the real work. */
1558: #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1559: LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1560:
1561: /* Enable a bug fix. (This is for extra caution.) */
1562: #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1563:
1564: /* Millicode insns are actually function calls with some special
1565: constraints on arguments and register usage.
1566:
1567: Millicode calls always expect their arguments in the integer argument
1568: registers, and always return their result in %r29 (ret1). They
1569: are expected to clobber their arguments, %r1, %r29, and %r31 and
1570: nothing else.
1571:
1572: These macros tell reorg that the references to arguments and
1573: register clobbers for millicode calls do not appear to happen
1574: until after the millicode call. This allows reorg to put insns
1575: which set the argument registers into the delay slot of the millicode
1576: call -- thus they act more like traditional CALL_INSNs.
1577:
1578: get_attr_type will try to recognize the given insn, so make sure to
1579: filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1580: in particular. */
1581: #define INSN_SETS_ARE_DELAYED(X) \
1582: ((GET_CODE (X) == INSN \
1583: && GET_CODE (PATTERN (X)) != SEQUENCE \
1584: && GET_CODE (PATTERN (X)) != USE \
1585: && GET_CODE (PATTERN (X)) != CLOBBER \
1586: && get_attr_type (X) == TYPE_MILLI))
1587:
1588: #define INSN_REFERENCES_ARE_DELAYED(X) \
1589: ((GET_CODE (X) == INSN \
1590: && GET_CODE (PATTERN (X)) != SEQUENCE \
1591: && GET_CODE (PATTERN (X)) != USE \
1592: && GET_CODE (PATTERN (X)) != CLOBBER \
1593: && get_attr_type (X) == TYPE_MILLI))
1594:
1595:
1596: /* Control the assembler format that we output. */
1597:
1598: /* Output at beginning of assembler file. */
1599:
1600: #define ASM_FILE_START(FILE) \
1601: do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1602: \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1603: \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1604: \t.SPACE $TEXT$\n\
1605: \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1606: \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1607: \t.IMPORT $global$,DATA\n\
1608: \t.IMPORT $$dyncall,MILLICODE\n");\
1609: if (profile_flag)\
1610: fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1611: } while (0)
1612:
1613: /* Output to assembler file text saying following lines
1614: may contain character constants, extra white space, comments, etc. */
1615:
1616: #define ASM_APP_ON ""
1617:
1618: /* Output to assembler file text saying following lines
1619: no longer contain unusual constructs. */
1620:
1621: #define ASM_APP_OFF ""
1622:
1623: /* We don't yet know how to identify GCC to HP-PA machines. */
1624: #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1625:
1626: /* Output before code. */
1627:
1628: /* Supposedly the assembler rejects the command if there is no tab! */
1629: #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$"
1630:
1631: /* Output before read-only data. */
1632:
1633: /* Supposedly the assembler rejects the command if there is no tab! */
1634: #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$"
1635:
1636: #if 0
1637: /* This has apparently triggered a latent GAS bug which manifests itself
1638: as numerous warnings from the debugger of the form:
1639:
1640: During symbol reading, inner block not inside outer block in ...
1641: inner block not inside outer block in ...
1642:
1643: Or as local variables not being accessable from the debugger.
1644:
1645: Disable $LIT$ for now. Try it with GAS-2 when it is functional (I
1646: am not even going to try to fix this in GAS-1). */
1647: #define READONLY_DATA_SECTION readonly_data
1648: #endif
1649:
1650: /* Output before writable data. */
1651:
1652: /* Supposedly the assembler rejects the command if there is no tab! */
1653: #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$"
1654:
1655: /* Output before uninitialized data. */
1656:
1657: #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$"
1658:
1659: /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1660:
1661: #define EXTRA_SECTIONS in_bss, in_readonly_data
1662:
1663: #define EXTRA_SECTION_FUNCTIONS \
1664: void \
1665: bss_section () \
1666: { \
1667: if (in_section != in_bss) \
1668: { \
1669: fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1670: in_section = in_bss; \
1671: } \
1672: } \
1673: void \
1674: readonly_data () \
1675: { \
1676: if (in_section != in_readonly_data) \
1677: { \
1678: fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1679: in_section = in_readonly_data; \
1680: } \
1681: }
1682:
1683:
1684: /* How to refer to registers in assembler output.
1685: This sequence is indexed by compiler's hard-register-number (see above). */
1686:
1687: #define REGISTER_NAMES \
1688: {"0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1689: "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1690: "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1691: "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1692: "%fr4", "%fr5", "%fr6", "%fr7", \
1693: "%fr8", "%fr9", "%fr10", "%fr11", "%fr12", "%fr13", "%fr14", "%fr15", \
1694: "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1695: "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R",\
1696: "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R",\
1697: "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R",\
1698: "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R",\
1699: "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R",\
1700: "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R",\
1701: "SAR"}
1702:
1703: /* How to renumber registers for dbx and gdb. */
1704:
1705: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1706:
1707: /* This is how to output the definition of a user-level label named NAME,
1708: such as the label on a static function or variable NAME. */
1709:
1710: #define ASM_OUTPUT_LABEL(FILE, NAME) \
1711: do { assemble_name (FILE, NAME); \
1712: if (TARGET_GAS) \
1713: fputc (':', FILE); \
1714: fputc ('\n', FILE); } while (0)
1715:
1716: /* This is how to output a command to make the user-level label named NAME
1717: defined for reference from other files. */
1718:
1719: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1720: do { fputs ("\t.IMPORT ", FILE); \
1721: assemble_name (FILE, NAME); \
1722: if (FUNCTION_NAME_P (NAME)) \
1723: fputs (",CODE\n", FILE); \
1724: else \
1725: fputs (",DATA\n", FILE); \
1726: } while (0)
1727:
1728: /* hpux ld doesn't output the object file name, or anything useful at
1729: all, to indicate the start of an object file's symbols. This screws
1730: up gdb, so we'll output this magic cookie at the end of an object
1731: file with debugging symbols */
1732:
1733: #define ASM_FILE_END(FILE) \
1734: do { if (write_symbols == DBX_DEBUG)\
1735: { fputs (TEXT_SECTION_ASM_OP, FILE);\
1736: fputs ("\n\t.stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1737: (FILE));\
1738: }\
1739: } while (0)
1740:
1741: /* The bogus HP assembler requires ALL external references to be
1742: "imported", even library calls. They look a bit different, so
1743: here's this macro. */
1744:
1745: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1746: do { fputs ("\t.IMPORT ", FILE); \
1747: assemble_name (FILE, XSTR ((RTL), 0)); \
1748: fputs (",CODE\n", FILE); \
1749: } while (0)
1750:
1751: #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1752: do { fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1753: if (FUNCTION_NAME_P (NAME)) \
1754: fputs (",CODE\n", FILE); \
1755: else \
1756: fputs (",DATA\n", FILE);} while (0)
1757:
1758: /* This is how to output a reference to a user-level label named NAME.
1759: `assemble_name' uses this. */
1760:
1761: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1762: fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1763:
1764: /* This is how to output an internal numbered label where
1765: PREFIX is the class of label and NUM is the number within the class. */
1766:
1767: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1768: {fprintf (FILE, "%s$%04d", PREFIX, NUM); \
1769: if (TARGET_GAS) \
1770: fputs (":\n", FILE); \
1771: else \
1772: fputs ("\n", FILE);}
1773:
1774: #define STRING_SECTION_NAME "STRING"
1775:
1776: /* This is how to store into the string LABEL
1777: the symbol_ref name of an internal numbered label where
1778: PREFIX is the class of label and NUM is the number within the class.
1779: This is suitable for output with `assemble_name'. */
1780:
1781: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1782: sprintf (LABEL, "*%s$%04d", PREFIX, NUM)
1783:
1784: /* This is how to output an assembler line defining a `double' constant. */
1785:
1786: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1787: do { union { double d; int i[2];} __u; \
1788: __u.d = (VALUE); \
1789: fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1790: __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1791: } while (0)
1792:
1793: /* This is how to output an assembler line defining a `float' constant. */
1794:
1795: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1796: do { union { float f; int i;} __u; \
1797: __u.f = (VALUE); \
1798: fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1799: } while (0)
1800:
1801: /* This is how to output an assembler line defining an `int' constant. */
1802:
1803: #define ASM_OUTPUT_INT(FILE,VALUE) \
1804: { fprintf (FILE, "\t.word "); \
1805: if (function_label_operand (VALUE, VOIDmode)) \
1806: fprintf (FILE, "P%%"); \
1807: output_addr_const (FILE, (VALUE)); \
1808: fprintf (FILE, "\n");}
1809:
1810: /* Likewise for `short' and `char' constants. */
1811:
1812: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1813: ( fprintf (FILE, "\t.half "), \
1814: output_addr_const (FILE, (VALUE)), \
1815: fprintf (FILE, "\n"))
1816:
1817: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1818: ( fprintf (FILE, "\t.byte "), \
1819: output_addr_const (FILE, (VALUE)), \
1820: fprintf (FILE, "\n"))
1821:
1822: /* This is how to output an assembler line for a numeric constant byte. */
1823:
1824: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1825: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1826:
1827: #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1828: output_ascii ((FILE), (P), (SIZE))
1829:
1830: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1831: #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1832: /* This is how to output an element of a case-vector that is absolute.
1833: Note that this method makes filling these branch delay slots
1834: impossible. */
1835:
1836: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1837: fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1838:
1839: /* Jump tables are executable code and live in the TEXT section on the PA. */
1840: #define JUMP_TABLES_IN_TEXT_SECTION
1841:
1842: /* This is how to output an element of a case-vector that is relative.
1843: (The HP-PA does not use such vectors,
1844: but we must define this macro anyway.) */
1845:
1846: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1847: fprintf (FILE, "\tword L%d-L%d\n", VALUE, REL)
1848:
1849: /* This is how to output an assembler line
1850: that says to advance the location counter
1851: to a multiple of 2**LOG bytes. */
1852:
1853: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1854: fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1855:
1856: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1857: fprintf (FILE, "\t.blockz %d\n", (SIZE))
1858:
1859: /* This says how to output an assembler line
1860: to define a global common symbol. */
1861:
1862: /* Supposedly the assembler rejects the command if there is no tab! */
1863:
1864:
1865: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1866: { bss_section (); \
1867: assemble_name ((FILE), (NAME)); \
1868: if (TARGET_GAS) \
1869: fputc (':', (FILE)); \
1870: fputs ("\t.comm ", (FILE)); \
1871: fprintf ((FILE), "%d\n", (ROUNDED));}
1872:
1873: /* This says how to output an assembler line
1874: to define a local common symbol. */
1875:
1876: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1877: { bss_section (); \
1878: fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8); \
1879: assemble_name ((FILE), (NAME)); \
1880: if (TARGET_GAS) \
1881: fputc (':', (FILE)); \
1882: fprintf ((FILE), "\n\t.block %d\n", (ROUNDED));}
1883:
1884: /* Store in OUTPUT a string (made with alloca) containing
1885: an assembler-name for a local static variable named NAME.
1886: LABELNO is an integer which is different for each call. */
1887:
1888: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1889: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1890: sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1891:
1892: /* Define the parentheses used to group arithmetic operations
1893: in assembler code. */
1894:
1895: #define ASM_OPEN_PAREN "("
1896: #define ASM_CLOSE_PAREN ")"
1897:
1898: /* Define results of standard character escape sequences. */
1899: #define TARGET_BELL 007
1900: #define TARGET_BS 010
1901: #define TARGET_TAB 011
1902: #define TARGET_NEWLINE 012
1903: #define TARGET_VT 013
1904: #define TARGET_FF 014
1905: #define TARGET_CR 015
1906:
1907: #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1908: ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' \
1909: || (CHAR) == '^' || (CHAR) == '\'')
1910:
1911: /* Print operand X (an rtx) in assembler syntax to file FILE.
1912: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1913: For `%' followed by punctuation, CODE is the punctuation and X is null.
1914:
1915: On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1916: and an immediate zero should be represented as `r0'.
1917:
1918: Several % codes are defined:
1919: O an operation
1920: C compare conditions
1921: N extract conditions
1922: M modifier to handle preincrement addressing for memory refs.
1923: F modifier to handle preincrement addressing for fp memory refs */
1924:
1925: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1926:
1927:
1928: /* Print a memory address as an operand to reference that memory location. */
1929:
1930: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1931: { register rtx addr = ADDR; \
1932: register rtx base; \
1933: int offset; \
1934: switch (GET_CODE (addr)) \
1935: { \
1936: case REG: \
1937: fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1938: break; \
1939: case PLUS: \
1940: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1941: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1942: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1943: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1944: else \
1945: abort (); \
1946: fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1947: break; \
1948: case LO_SUM: \
1949: fprintf (FILE, "R%c", PA_QUOTE); \
1950: output_global_address (FILE, XEXP (addr, 1)); \
1951: fputs ("(", FILE); \
1952: output_operand (XEXP (addr, 0), 0); \
1953: fputs (")", FILE); \
1954: break; \
1955: case CONST_INT: \
1956: fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
1957: break; \
1958: default: \
1959: output_addr_const (FILE, addr); \
1960: }}
1961:
1962:
1963: /* Define functions in pa.c and used in insn-output.c. */
1964:
1965: extern char *output_and ();
1966: extern char *output_ior ();
1967: extern char *output_move_double ();
1968: extern char *output_fp_move_double ();
1969: extern char *output_block_move ();
1970: extern char *output_scc_insn ();
1971: extern char *output_cbranch ();
1972: extern char *output_bb ();
1973: extern char *output_dbra ();
1974: extern char *output_movb ();
1975: extern char *output_return ();
1976: extern char *output_call ();
1977: extern char *output_floatsisf2 ();
1978: extern char *output_floatsidf2 ();
1979: extern char *output_mul_insn ();
1980: extern char *output_div_insn ();
1981: extern char *output_mod_insn ();
1982: extern char *singlemove_string ();
1983: extern void output_arg_descriptor ();
1984: extern void output_global_address ();
1985: extern struct rtx_def *legitimize_pic_address ();
1986: extern struct rtx_def *gen_cmp_fp ();
1987: extern void hppa_encode_label ();
1988:
1989: extern struct rtx_def *hppa_save_pic_table_rtx;
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