![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to rs6000.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Apple XNU] / GNUtools / cc / config / rs6000|
Return to rs6000.h CVS log | Up to [Apple XNU] / GNUtools / cc / config / rs6000 |
1.1 root 1: /* Definitions of target machine for GNU compiler, for IBM RS/6000.
2: Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3: Contributed by Richard Kenner ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20:
21:
22: /* Note that some other tm.h files include this one and then override
23: many of the definitions that relate to assembler syntax. */
24:
25:
26: /* Names to predefine in the preprocessor for this target machine. */
27:
28: #define CPP_PREDEFINES "-D_IBMR2 -D_AIX -D_AIX32 -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)"
29:
30: /* Print subsidiary information on the compiler version in use. */
31: #define TARGET_VERSION ;
32:
33: /* Tell the assembler to assume that all undefined names are external.
34:
35: Don't do this until the fixed IBM assembler is more generally available.
36: When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL,
37: ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no
38: longer be needed. Also, the extern declaration of mcount in ASM_FILE_START
39: will no longer be needed. */
40:
41: /* #define ASM_SPEC "-u" */
42:
43: /* Define the options for the binder: Start text at 512, align all segments
44: to 512 bytes, and warn if there is text relocation.
45:
46: The -bhalt:4 option supposedly changes the level at which ld will abort,
47: but it also suppresses warnings about multiply defined symbols and is
48: used by the AIX cc command. So we use it here.
49:
50: -bnodelcsect undoes a poor choice of default relating to multiply-defined
51: csects. See AIX documentation for more information about this. */
52:
53: #define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\
54: %{static:-bnso -bI:/lib/syscalls.exp} %{g*:-bexport:/usr/lib/libg.exp}"
55:
56: /* Profiled library versions are used by linking with special directories. */
57: #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
58: %{p:-L/lib/profiled -L/usr/lib/profiled} %{g*:-lg} -lc"
59:
60: /* gcc must do the search itself to find libgcc.a, not use -l. */
61: #define LINK_LIBGCC_SPECIAL_1
62:
63: /* Don't turn -B into -L if the argument specifies a relative file name. */
64: #define RELATIVE_PREFIX_NOT_LINKDIR
65:
66: /* Architecture type. */
67:
68: extern int target_flags;
69:
70: /* Use POWER architecture instructions and MQ register. */
71: #define MASK_POWER 0x01
72:
73: /* Use POWER2 extensions to POWER architecture. */
74: #define MASK_POWER2 0x02
75:
76: /* Use PowerPC architecture instructions. */
77: #define MASK_POWERPC 0x04
78:
79: /* Use PowerPC square root instructions. */
80: #define MASK_POWERPCSQR 0x08
81:
82: /* Use PowerPC-64 architecture instructions. */
83: #define MASK_POWERPC64 0x10
84:
85: /* Use revised mnemonic names defined for PowerPC architecture. */
86: #define MASK_NEW_MNEMONICS 0x20
87:
88: /* Disable placing fp constants in the TOC; can be turned on when the
89: TOC overflows. */
90: #define MASK_NO_FP_IN_TOC 0x40
91:
92: /* Output only one TOC entry per module. Normally linking fails if
93: there are more than 16K unique variables/constants in an executable. With
94: this option, linking fails only if there are more than 16K modules, or
95: if there are more than 16K unique variables/constant in a single module.
96:
97: This is at the cost of having 2 extra loads and one extra store per
98: function, and one less allocatable register. */
99: #define MASK_MINIMAL_TOC 0x80
100:
101: #define TARGET_POWER (target_flags & MASK_POWER)
102: #define TARGET_POWER2 (target_flags & MASK_POWER2)
103: #define TARGET_POWERPC (target_flags & MASK_POWERPC)
104: #define TARGET_POWERPCSQR (target_flags & MASK_POWERPCSQR)
105: #define TARGET_POWERPC64 (target_flags & MASK_POWERPC64)
106: #define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS)
107: #define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC)
108: #define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC)
109:
110: /* Run-time compilation parameters selecting different hardware subsets.
111:
112: Macro to define tables used to set the flags.
113: This is a list in braces of pairs in braces,
114: each pair being { "NAME", VALUE }
115: where VALUE is the bits to set or minus the bits to clear.
116: An empty string NAME is used to identify the default VALUE. */
117:
118: #define TARGET_SWITCHES \
119: {{"power", MASK_POWER}, \
120: {"power2", MASK_POWER | MASK_POWER2}, \
121: {"no-power2", - MASK_POWER2}, \
122: {"no-power", - (MASK_POWER | MASK_POWER2)}, \
123: {"powerpc", MASK_POWERPC}, \
124: {"no-powerpc", - (MASK_POWERPC | MASK_POWERPCSQR | MASK_POWERPC64)}, \
125: {"powerpc-sqr", MASK_POWERPC | MASK_POWERPCSQR}, \
126: {"no-powerpc-sqr", - MASK_POWERPCSQR}, \
127: {"powerpc64", MASK_POWERPC | MASK_POWERPC64}, \
128: {"no-powerpc64", -MASK_POWERPC64}, \
129: {"new-mnemonics", MASK_NEW_MNEMONICS}, \
130: {"old-mnemonics", -MASK_NEW_MNEMONICS}, \
131: {"normal-toc", - (MASK_NO_FP_IN_TOC | MASK_MINIMAL_TOC)}, \
132: {"fp-in-toc", - MASK_NO_FP_IN_TOC}, \
133: {"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \
134: {"minimal-toc", MASK_MINIMAL_TOC}, \
135: {"no-minimal-toc", - MASK_MINIMAL_TOC}, \
136: {"", TARGET_DEFAULT}}
137:
138: #define TARGET_DEFAULT MASK_POWER
139:
140: /* Processor type. */
141: enum processor_type
142: {PROCESSOR_RIOS1,
143: PROCESSOR_RIOS2,
144: PROCESSOR_PPC601,
145: PROCESSOR_PPC603,
146: PROCESSOR_PPC604,
147: PROCESSOR_PPC620};
148:
149: extern enum processor_type rs6000_cpu;
150:
151: /* Recast the processor type to the cpu attribute. */
152: #define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu)
153:
154: /* Define the default processor. This is overridden by other tm.h files. */
155: #define PROCESSOR_DEFAULT PROCESSOR_RIOS1
156:
157: /* Specify the dialect of assembler to use. New mnemonics is dialect one
158: and the old mnemonics are dialect zero. */
159: #define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0
160:
161: /* This macro is similar to `TARGET_SWITCHES' but defines names of
162: command options that have values. Its definition is an
163: initializer with a subgrouping for each command option.
164:
165: Each subgrouping contains a string constant, that defines the
166: fixed part of the option name, and the address of a variable.
167: The variable, type `char *', is set to the variable part of the
168: given option if the fixed part matches. The actual option name
169: is made by appending `-m' to the specified name.
170:
171: Here is an example which defines `-mshort-data-NUMBER'. If the
172: given option is `-mshort-data-512', the variable `m88k_short_data'
173: will be set to the string `"512"'.
174:
175: extern char *m88k_short_data;
176: #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
177:
178: #define TARGET_OPTIONS \
179: { {"cpu=", &rs6000_cpu_string}}
180:
181: extern char *rs6000_cpu_string;
182:
183: /* Sometimes certain combinations of command options do not make sense
184: on a particular target machine. You can define a macro
185: `OVERRIDE_OPTIONS' to take account of this. This macro, if
186: defined, is executed once just after all the command options have
187: been parsed.
188:
189: On the RS/6000 this is used to define the target cpu type. */
190:
191: #define OVERRIDE_OPTIONS rs6000_override_options ()
192:
193: #define OPTIMIZATION_OPTIONS(LEVEL) \
194: { \
195: if ((LEVEL) > 0) \
196: { \
197: flag_force_mem = 1; \
198: flag_omit_frame_pointer = 1; \
199: } \
200: }
201:
202: /* target machine storage layout */
203:
204: /* Define this macro if it is advisable to hold scalars in registers
205: in a wider mode than that declared by the program. In such cases,
206: the value is constrained to be within the bounds of the declared
207: type, but kept valid in the wider mode. The signedness of the
208: extension may differ from that of the type. */
209:
210: #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
211: if (GET_MODE_CLASS (MODE) == MODE_INT \
212: && GET_MODE_SIZE (MODE) < 4) \
213: (MODE) = SImode;
214:
215: /* Define this if most significant bit is lowest numbered
216: in instructions that operate on numbered bit-fields. */
217: /* That is true on RS/6000. */
218: #define BITS_BIG_ENDIAN 1
219:
220: /* Define this if most significant byte of a word is the lowest numbered. */
221: /* That is true on RS/6000. */
222: #define BYTES_BIG_ENDIAN 1
223:
224: /* Define this if most significant word of a multiword number is lowest
225: numbered.
226:
227: For RS/6000 we can decide arbitrarily since there are no machine
228: instructions for them. Might as well be consistent with bits and bytes. */
229: #define WORDS_BIG_ENDIAN 1
230:
231: /* number of bits in an addressable storage unit */
232: #define BITS_PER_UNIT 8
233:
234: /* Width in bits of a "word", which is the contents of a machine register.
235: Note that this is not necessarily the width of data type `int';
236: if using 16-bit ints on a 68000, this would still be 32.
237: But on a machine with 16-bit registers, this would be 16. */
238: #define BITS_PER_WORD 32
239:
240: /* Width of a word, in units (bytes). */
241: #define UNITS_PER_WORD 4
242:
243: /* Type used for ptrdiff_t, as a string used in a declaration. */
244: #define PTRDIFF_TYPE "int"
245:
246: /* Type used for wchar_t, as a string used in a declaration. */
247: #define WCHAR_TYPE "short unsigned int"
248:
249: /* Width of wchar_t in bits. */
250: #define WCHAR_TYPE_SIZE 16
251:
252: /* Width in bits of a pointer.
253: See also the macro `Pmode' defined below. */
254: #define POINTER_SIZE 32
255:
256: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
257: #define PARM_BOUNDARY 32
258:
259: /* Boundary (in *bits*) on which stack pointer should be aligned. */
260: #define STACK_BOUNDARY 64
261:
262: /* Allocation boundary (in *bits*) for the code of a function. */
263: #define FUNCTION_BOUNDARY 32
264:
265: /* No data type wants to be aligned rounder than this. */
266: #define BIGGEST_ALIGNMENT 32
267:
268: /* Alignment of field after `int : 0' in a structure. */
269: #define EMPTY_FIELD_BOUNDARY 32
270:
271: /* Every structure's size must be a multiple of this. */
272: #define STRUCTURE_SIZE_BOUNDARY 8
273:
274: /* A bitfield declared as `int' forces `int' alignment for the struct. */
275: #define PCC_BITFIELD_TYPE_MATTERS 1
276:
277: /* Make strings word-aligned so strcpy from constants will be faster. */
278: #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
279: (TREE_CODE (EXP) == STRING_CST \
280: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
281:
282: /* Make arrays of chars word-aligned for the same reasons. */
283: #define DATA_ALIGNMENT(TYPE, ALIGN) \
284: (TREE_CODE (TYPE) == ARRAY_TYPE \
285: && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
286: && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
287:
288: /* Non-zero if move instructions will actually fail to work
289: when given unaligned data. */
290: #define STRICT_ALIGNMENT 0
291:
292: /* Standard register usage. */
293:
294: /* Number of actual hardware registers.
295: The hardware registers are assigned numbers for the compiler
296: from 0 to just below FIRST_PSEUDO_REGISTER.
297: All registers that the compiler knows about must be given numbers,
298: even those that are not normally considered general registers.
299:
300: RS/6000 has 32 fixed-point registers, 32 floating-point registers,
301: an MQ register, a count register, a link register, and 8 condition
302: register fields, which we view here as separate registers.
303:
304: In addition, the difference between the frame and argument pointers is
305: a function of the number of registers saved, so we need to have a
306: register for AP that will later be eliminated in favor of SP or FP.
307: This is a normal register, but it is fixed. */
308:
309: #define FIRST_PSEUDO_REGISTER 76
310:
311: /* 1 for registers that have pervasive standard uses
312: and are not available for the register allocator.
313:
314: On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer.
315:
316: cr5 is not supposed to be used. */
317:
318: #define FIXED_REGISTERS \
319: {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
320: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
321: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
322: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
323: 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0}
324:
325: /* 1 for registers not available across function calls.
326: These must include the FIXED_REGISTERS and also any
327: registers that can be used without being saved.
328: The latter must include the registers where values are returned
329: and the register where structure-value addresses are passed.
330: Aside from that, you can include as many other registers as you like. */
331:
332: #define CALL_USED_REGISTERS \
333: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, \
334: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
335: 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
336: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
337: 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1}
338:
339: /* List the order in which to allocate registers. Each register must be
340: listed once, even those in FIXED_REGISTERS.
341:
342: We allocate in the following order:
343: fp0 (not saved or used for anything)
344: fp13 - fp2 (not saved; incoming fp arg registers)
345: fp1 (not saved; return value)
346: fp31 - fp14 (saved; order given to save least number)
347: cr1, cr6, cr7 (not saved or special)
348: cr0 (not saved, but used for arithmetic operations)
349: cr2, cr3, cr4 (saved)
350: r0 (not saved; cannot be base reg)
351: r9 (not saved; best for TImode)
352: r11, r10, r8-r4 (not saved; highest used first to make less conflict)
353: r3 (not saved; return value register)
354: r31 - r13 (saved; order given to save least number)
355: r12 (not saved; if used for DImode or DFmode would use r13)
356: mq (not saved; best to use it if we can)
357: ctr (not saved; when we have the choice ctr is better)
358: lr (saved)
359: cr5, r1, r2, ap (fixed) */
360:
361: #define REG_ALLOC_ORDER \
362: {32, \
363: 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \
364: 33, \
365: 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
366: 50, 49, 48, 47, 46, \
367: 69, 74, 75, 68, 70, 71, 72, \
368: 0, \
369: 9, 11, 10, 8, 7, 6, 5, 4, \
370: 3, \
371: 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \
372: 18, 17, 16, 15, 14, 13, 12, \
373: 64, 66, 65, \
374: 73, 1, 2, 67}
375:
376: /* True if register is floating-point. */
377: #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63)
378:
379: /* True if register is a condition register. */
380: #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75)
381:
382: /* True if register is an integer register. */
383: #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67)
384:
385: /* Return number of consecutive hard regs needed starting at reg REGNO
386: to hold something of mode MODE.
387: This is ordinarily the length in words of a value of mode MODE
388: but can be less for certain modes in special long registers.
389:
390: On RS/6000, ordinary registers hold 32 bits worth;
391: a single floating point register holds 64 bits worth. */
392:
393: #define HARD_REGNO_NREGS(REGNO, MODE) \
394: (FP_REGNO_P (REGNO) \
395: ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
396: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
397:
398: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
399: On RS/6000, the cpu registers can hold any mode but the float registers
400: can hold only floating modes and CR register can only hold CC modes. We
401: cannot put DImode or TImode anywhere except general register and they
402: must be able to fit within the register set. */
403:
404: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
405: (FP_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_FLOAT \
406: : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
407: : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \
408: && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
409: : 1)
410:
411: /* Value is 1 if it is a good idea to tie two pseudo registers
412: when one has mode MODE1 and one has mode MODE2.
413: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
414: for any hard reg, then this must be 0 for correct output. */
415: #define MODES_TIEABLE_P(MODE1, MODE2) \
416: (GET_MODE_CLASS (MODE1) == MODE_FLOAT \
417: ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \
418: : GET_MODE_CLASS (MODE2) == MODE_FLOAT \
419: ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \
420: : GET_MODE_CLASS (MODE1) == MODE_CC \
421: ? GET_MODE_CLASS (MODE2) == MODE_CC \
422: : GET_MODE_CLASS (MODE2) == MODE_CC \
423: ? GET_MODE_CLASS (MODE1) == MODE_CC \
424: : 1)
425:
426: /* A C expression returning the cost of moving data from a register of class
427: CLASS1 to one of CLASS2.
428:
429: On the RS/6000, copying between floating-point and fixed-point
430: registers is expensive. */
431:
432: #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
433: ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \
434: : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \
435: : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \
436: : 2)
437:
438: /* A C expressions returning the cost of moving data of MODE from a register to
439: or from memory.
440:
441: On the RS/6000, bump this up a bit. */
442:
443: #define MEMORY_MOVE_COST(MODE) 6
444:
445: /* Specify the cost of a branch insn; roughly the number of extra insns that
446: should be added to avoid a branch.
447:
448: Set this to 3 on the RS/6000 since that is roughly the average cost of an
449: unscheduled conditional branch. */
450:
451: #define BRANCH_COST 3
452:
453: /* A C statement (sans semicolon) to update the integer variable COST
454: based on the relationship between INSN that is dependent on
455: DEP_INSN through the dependence LINK. The default is to make no
456: adjustment to COST. On the RS/6000, ignore the cost of anti- and
457: output-dependencies. In fact, output dependencies on the CR do have
458: a cost, but it is probably not worthwhile to track it. */
459:
460: #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
461: if (REG_NOTE_KIND (LINK) != 0) \
462: (COST) = 0; /* Anti or output dependence. */
463:
464: /* Define this macro to change register usage conditional on target flags.
465: Set MQ register fixed (already call_used) if not POWER architecture
466: (RIOS1, RIOS2, and PPC601) so that it will not be allocated.
467: Provide alternate register names for ppcas assembler */
468:
469: #define CONDITIONAL_REGISTER_USAGE \
470: if (!TARGET_POWER) \
471: fixed_regs[64] = 1;
472:
473: /* Specify the registers used for certain standard purposes.
474: The values of these macros are register numbers. */
475:
476: /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */
477: /* #define PC_REGNUM */
478:
479: /* Register to use for pushing function arguments. */
480: #define STACK_POINTER_REGNUM 1
481:
482: /* Base register for access to local variables of the function. */
483: #define FRAME_POINTER_REGNUM 31
484:
485: /* Value should be nonzero if functions must have frame pointers.
486: Zero means the frame pointer need not be set up (and parms
487: may be accessed via the stack pointer) in functions that seem suitable.
488: This is computed in `reload', in reload1.c. */
489: #define FRAME_POINTER_REQUIRED 0
490:
491: /* Base register for access to arguments of the function. */
492: #define ARG_POINTER_REGNUM 67
493:
494: /* Place to put static chain when calling a function that requires it. */
495: #define STATIC_CHAIN_REGNUM 11
496:
497: /* Place that structure value return address is placed.
498:
499: On the RS/6000, it is passed as an extra parameter. */
500: #define STRUCT_VALUE 0
501:
502: /* Define the classes of registers for register constraints in the
503: machine description. Also define ranges of constants.
504:
505: One of the classes must always be named ALL_REGS and include all hard regs.
506: If there is more than one class, another class must be named NO_REGS
507: and contain no registers.
508:
509: The name GENERAL_REGS must be the name of a class (or an alias for
510: another name such as ALL_REGS). This is the class of registers
511: that is allowed by "g" or "r" in a register constraint.
512: Also, registers outside this class are allocated only when
513: instructions express preferences for them.
514:
515: The classes must be numbered in nondecreasing order; that is,
516: a larger-numbered class must never be contained completely
517: in a smaller-numbered class.
518:
519: For any two classes, it is very desirable that there be another
520: class that represents their union. */
521:
522: /* The RS/6000 has three types of registers, fixed-point, floating-point,
523: and condition registers, plus three special registers, MQ, CTR, and the
524: link register.
525:
526: However, r0 is special in that it cannot be used as a base register.
527: So make a class for registers valid as base registers.
528:
529: Also, cr0 is the only condition code register that can be used in
530: arithmetic insns, so make a separate class for it. */
531:
532: enum reg_class { NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
533: NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS,
534: SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
535: ALL_REGS, LIM_REG_CLASSES };
536:
537: #define N_REG_CLASSES (int) LIM_REG_CLASSES
538:
539: /* Give names of register classes as strings for dump file. */
540:
541: #define REG_CLASS_NAMES \
542: { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \
543: "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \
544: "LINK_OR_CTR_REGS", "SPECIAL_REGS", "SPEC_OR_GEN_REGS", \
545: "CR0_REGS", "CR_REGS", "NON_FLOAT_REGS", "ALL_REGS" }
546:
547: /* Define which registers fit in which classes.
548: This is an initializer for a vector of HARD_REG_SET
549: of length N_REG_CLASSES. */
550:
551: #define REG_CLASS_CONTENTS \
552: { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \
553: {0, ~0, 0}, {~0, ~0, 8}, {0, 0, 1}, {0, 0, 2}, \
554: {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {~0, 0, 15}, \
555: {0, 0, 16}, {0, 0, 0xff0}, {~0, 0, 0xffff}, \
556: {~0, ~0, 0xffff} }
557:
558: /* The same information, inverted:
559: Return the class number of the smallest class containing
560: reg number REGNO. This could be a conditional expression
561: or could index an array. */
562:
563: #define REGNO_REG_CLASS(REGNO) \
564: ((REGNO) == 0 ? GENERAL_REGS \
565: : (REGNO) < 32 ? BASE_REGS \
566: : FP_REGNO_P (REGNO) ? FLOAT_REGS \
567: : (REGNO) == 68 ? CR0_REGS \
568: : CR_REGNO_P (REGNO) ? CR_REGS \
569: : (REGNO) == 64 ? MQ_REGS \
570: : (REGNO) == 65 ? LINK_REGS \
571: : (REGNO) == 66 ? CTR_REGS \
572: : (REGNO) == 67 ? BASE_REGS \
573: : NO_REGS)
574:
575: /* The class value for index registers, and the one for base regs. */
576: #define INDEX_REG_CLASS GENERAL_REGS
577: #define BASE_REG_CLASS BASE_REGS
578:
579: /* Get reg_class from a letter such as appears in the machine description. */
580:
581: #define REG_CLASS_FROM_LETTER(C) \
582: ((C) == 'f' ? FLOAT_REGS \
583: : (C) == 'b' ? BASE_REGS \
584: : (C) == 'h' ? SPECIAL_REGS \
585: : (C) == 'q' ? MQ_REGS \
586: : (C) == 'c' ? CTR_REGS \
587: : (C) == 'l' ? LINK_REGS \
588: : (C) == 'x' ? CR0_REGS \
589: : (C) == 'y' ? CR_REGS \
590: : NO_REGS)
591:
592: /* The letters I, J, K, L, M, N, and P in a register constraint string
593: can be used to stand for particular ranges of immediate operands.
594: This macro defines what the ranges are.
595: C is the letter, and VALUE is a constant value.
596: Return 1 if VALUE is in the range specified by C.
597:
598: `I' is signed 16-bit constants
599: `J' is a constant with only the high-order 16 bits non-zero
600: `K' is a constant with only the low-order 16 bits non-zero
601: `L' is a constant that can be placed into a mask operand
602: `M' is a constant that is greater than 31
603: `N' is a constant that is an exact power of two
604: `O' is the constant zero
605: `P' is a constant whose negation is a signed 16-bit constant */
606:
607: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
608: ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
609: : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \
610: : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \
611: : (C) == 'L' ? mask_constant (VALUE) \
612: : (C) == 'M' ? (VALUE) > 31 \
613: : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
614: : (C) == 'O' ? (VALUE) == 0 \
615: : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \
616: : 0)
617:
618: /* Similar, but for floating constants, and defining letters G and H.
619: Here VALUE is the CONST_DOUBLE rtx itself.
620:
621: We flag for special constants when we can copy the constant into
622: a general register in two insns for DF and one insn for SF. */
623:
624: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
625: ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : 0)
626:
627: /* Optional extra constraints for this machine.
628:
629: For the RS/6000, `Q' means that this is a memory operand that is just
630: an offset from a register. */
631:
632: #define EXTRA_CONSTRAINT(OP, C) \
633: ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
634: : 0)
635:
636: /* Given an rtx X being reloaded into a reg required to be
637: in class CLASS, return the class of reg to actually use.
638: In general this is just CLASS; but on some machines
639: in some cases it is preferable to use a more restrictive class.
640:
641: On the RS/6000, we have to return NO_REGS when we want to reload a
642: floating-point CONST_DOUBLE to force it to be copied to memory. */
643:
644: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
645: ((GET_CODE (X) == CONST_DOUBLE \
646: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
647: ? NO_REGS : (CLASS))
648:
649: /* Return the register class of a scratch register needed to copy IN into
650: or out of a register in CLASS in MODE. If it can be done directly,
651: NO_REGS is returned. */
652:
653: #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
654: secondary_reload_class (CLASS, MODE, IN)
655:
656: /* If we are copying between FP registers and anything else, we need a memory
657: location. */
658:
659: #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
660: ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS))
661:
662: /* Return the maximum number of consecutive registers
663: needed to represent mode MODE in a register of class CLASS.
664:
665: On RS/6000, this is the size of MODE in words,
666: except in the FP regs, where a single reg is enough for two words. */
667: #define CLASS_MAX_NREGS(CLASS, MODE) \
668: ((CLASS) == FLOAT_REGS \
669: ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
670: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
671:
672: /* Stack layout; function entry, exit and calling. */
673:
674: /* Define this if pushing a word on the stack
675: makes the stack pointer a smaller address. */
676: #define STACK_GROWS_DOWNWARD
677:
678: /* Define this if the nominal address of the stack frame
679: is at the high-address end of the local variables;
680: that is, each additional local variable allocated
681: goes at a more negative offset in the frame.
682:
683: On the RS/6000, we grow upwards, from the area after the outgoing
684: arguments. */
685: /* #define FRAME_GROWS_DOWNWARD */
686:
687: /* Offset within stack frame to start allocating local variables at.
688: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
689: first local allocated. Otherwise, it is the offset to the BEGINNING
690: of the first local allocated.
691:
692: On the RS/6000, the frame pointer is the same as the stack pointer,
693: except for dynamic allocations. So we start after the fixed area and
694: outgoing parameter area. */
695:
696: #define STARTING_FRAME_OFFSET (current_function_outgoing_args_size + 24)
697:
698: /* If we generate an insn to push BYTES bytes,
699: this says how many the stack pointer really advances by.
700: On RS/6000, don't define this because there are no push insns. */
701: /* #define PUSH_ROUNDING(BYTES) */
702:
703: /* Offset of first parameter from the argument pointer register value.
704: On the RS/6000, we define the argument pointer to the start of the fixed
705: area. */
706: #define FIRST_PARM_OFFSET(FNDECL) 24
707:
708: /* Define this if stack space is still allocated for a parameter passed
709: in a register. The value is the number of bytes allocated to this
710: area. */
711: #define REG_PARM_STACK_SPACE(FNDECL) 32
712:
713: /* Define this if the above stack space is to be considered part of the
714: space allocated by the caller. */
715: #define OUTGOING_REG_PARM_STACK_SPACE
716:
717: /* This is the difference between the logical top of stack and the actual sp.
718:
719: For the RS/6000, sp points past the fixed area. */
720: #define STACK_POINTER_OFFSET 24
721:
722: /* Define this if the maximum size of all the outgoing args is to be
723: accumulated and pushed during the prologue. The amount can be
724: found in the variable current_function_outgoing_args_size. */
725: #define ACCUMULATE_OUTGOING_ARGS
726:
727: /* Value is the number of bytes of arguments automatically
728: popped when returning from a subroutine call.
729: FUNTYPE is the data type of the function (as a tree),
730: or for a library call it is an identifier node for the subroutine name.
731: SIZE is the number of bytes of arguments passed on the stack. */
732:
733: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
734:
735: /* Define how to find the value returned by a function.
736: VALTYPE is the data type of the value (as a tree).
737: If the precise function being called is known, FUNC is its FUNCTION_DECL;
738: otherwise, FUNC is 0.
739:
740: On RS/6000 an integer value is in r3 and a floating-point value is in
741: fp1. */
742:
743: #define FUNCTION_VALUE(VALTYPE, FUNC) \
744: gen_rtx (REG, TYPE_MODE (VALTYPE), \
745: TREE_CODE (VALTYPE) == REAL_TYPE ? 33 : 3)
746:
747: /* Define how to find the value returned by a library function
748: assuming the value has mode MODE. */
749:
750: #define LIBCALL_VALUE(MODE) \
751: gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT ? 33 : 3)
752:
753: /* The definition of this macro implies that there are cases where
754: a scalar value cannot be returned in registers.
755:
756: For the RS/6000, any structure or union type is returned in memory. */
757:
758: #define RETURN_IN_MEMORY(TYPE) \
759: (TYPE_MODE (TYPE) == BLKmode)
760:
761: /* 1 if N is a possible register number for a function value
762: as seen by the caller.
763:
764: On RS/6000, this is r3 and fp1. */
765:
766: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 3 || ((N) == 33))
767:
768: /* 1 if N is a possible register number for function argument passing.
769: On RS/6000, these are r3-r10 and fp1-fp13. */
770:
771: #define FUNCTION_ARG_REGNO_P(N) \
772: (((N) <= 10 && (N) >= 3) || ((N) >= 33 && (N) <= 45))
773:
774: /* Define a data type for recording info about an argument list
775: during the scan of that argument list. This data type should
776: hold all necessary information about the function itself
777: and about the args processed so far, enough to enable macros
778: such as FUNCTION_ARG to determine where the next arg should go.
779:
780: On the RS/6000, this is a structure. The first element is the number of
781: total argument words, the second is used to store the next
782: floating-point register number, and the third says how many more args we
783: have prototype types for. */
784:
785: struct rs6000_args {int words, fregno, nargs_prototype; };
786: #define CUMULATIVE_ARGS struct rs6000_args
787:
788: /* Define intermediate macro to compute the size (in registers) of an argument
789: for the RS/6000. */
790:
791: #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \
792: (! (NAMED) ? 0 \
793: : (MODE) != BLKmode \
794: ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
795: : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
796:
797: /* Initialize a variable CUM of type CUMULATIVE_ARGS
798: for a call to a function whose data type is FNTYPE.
799: For a library call, FNTYPE is 0. */
800:
801: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
802: (CUM).words = 0, \
803: (CUM).fregno = 33, \
804: (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
805: ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
806: + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
807: || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
808: : 0)
809:
810: /* Similar, but when scanning the definition of a procedure. We always
811: set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
812:
813: #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
814: (CUM).words = 0, \
815: (CUM).fregno = 33, \
816: (CUM).nargs_prototype = 1000
817:
818: /* Update the data in CUM to advance over an argument
819: of mode MODE and data type TYPE.
820: (TYPE is null for libcalls where that information may not be available.) */
821:
822: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
823: { (CUM).nargs_prototype--; \
824: if (NAMED) \
825: { \
826: (CUM).words += RS6000_ARG_SIZE (MODE, TYPE, NAMED); \
827: if (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
828: (CUM).fregno++; \
829: } \
830: }
831:
832: /* Non-zero if we can use a floating-point register to pass this arg. */
833: #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
834: (GET_MODE_CLASS (MODE) == MODE_FLOAT && (CUM).fregno < 46)
835:
836: /* Determine where to put an argument to a function.
837: Value is zero to push the argument on the stack,
838: or a hard register in which to store the argument.
839:
840: MODE is the argument's machine mode.
841: TYPE is the data type of the argument (as a tree).
842: This is null for libcalls where that information may
843: not be available.
844: CUM is a variable of type CUMULATIVE_ARGS which gives info about
845: the preceding args and about the function being called.
846: NAMED is nonzero if this argument is a named parameter
847: (otherwise it is an extra parameter matching an ellipsis).
848:
849: On RS/6000 the first eight words of non-FP are normally in registers
850: and the rest are pushed. The first 13 FP args are in registers.
851:
852: If this is floating-point and no prototype is specified, we use
853: both an FP and integer register (or possibly FP reg and stack). Library
854: functions (when TYPE is zero) always have the proper types for args,
855: so we can pass the FP value just in one register. emit_library_function
856: doesn't support EXPR_LIST anyway. */
857:
858: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
859: (! (NAMED) ? 0 \
860: : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \
861: : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \
862: ? ((CUM).nargs_prototype > 0 || (TYPE) == 0 \
863: ? gen_rtx (REG, MODE, (CUM).fregno) \
864: : ((CUM).words < 8 \
865: ? gen_rtx (EXPR_LIST, VOIDmode, \
866: gen_rtx (REG, (MODE), 3 + (CUM).words), \
867: gen_rtx (REG, (MODE), (CUM).fregno)) \
868: : gen_rtx (EXPR_LIST, VOIDmode, 0, \
869: gen_rtx (REG, (MODE), (CUM).fregno)))) \
870: : (CUM).words < 8 ? gen_rtx(REG, (MODE), 3 + (CUM).words) : 0)
871:
872: /* For an arg passed partly in registers and partly in memory,
873: this is the number of registers used.
874: For args passed entirely in registers or entirely in memory, zero. */
875:
876: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
877: (! (NAMED) ? 0 \
878: : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) && (CUM).nargs_prototype >= 0 ? 0 \
879: : (((CUM).words < 8 \
880: && 8 < ((CUM).words + RS6000_ARG_SIZE (MODE, TYPE, NAMED))) \
881: ? 8 - (CUM).words : 0))
882:
883: /* Perform any needed actions needed for a function that is receiving a
884: variable number of arguments.
885:
886: CUM is as above.
887:
888: MODE and TYPE are the mode and type of the current parameter.
889:
890: PRETEND_SIZE is a variable that should be set to the amount of stack
891: that must be pushed by the prolog to pretend that our caller pushed
892: it.
893:
894: Normally, this macro will push all remaining incoming registers on the
895: stack and set PRETEND_SIZE to the length of the registers pushed. */
896:
897: #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
898: { if ((CUM).words < 8) \
899: { \
900: int first_reg_offset = (CUM).words; \
901: \
902: if (MUST_PASS_IN_STACK (MODE, TYPE)) \
903: first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
904: \
905: if (first_reg_offset > 8) \
906: first_reg_offset = 8; \
907: \
908: if (! (NO_RTL) && first_reg_offset != 8) \
909: move_block_from_reg \
910: (3 + first_reg_offset, \
911: gen_rtx (MEM, BLKmode, \
912: plus_constant (virtual_incoming_args_rtx, \
913: first_reg_offset * 4)), \
914: 8 - first_reg_offset, (8 - first_reg_offset) * UNITS_PER_WORD); \
915: PRETEND_SIZE = (8 - first_reg_offset) * UNITS_PER_WORD; \
916: } \
917: }
918:
919: /* This macro generates the assembly code for function entry.
920: FILE is a stdio stream to output the code to.
921: SIZE is an int: how many units of temporary storage to allocate.
922: Refer to the array `regs_ever_live' to determine which registers
923: to save; `regs_ever_live[I]' is nonzero if register number I
924: is ever used in the function. This macro is responsible for
925: knowing which registers should not be saved even if used. */
926:
927: #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
928:
929: /* Output assembler code to FILE to increment profiler label # LABELNO
930: for profiling a function entry. */
931:
932: #define FUNCTION_PROFILER(FILE, LABELNO) \
933: output_function_profiler ((FILE), (LABELNO));
934:
935: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
936: the stack pointer does not matter. No definition is equivalent to
937: always zero.
938:
939: On the RS/6000, this is non-zero because we can restore the stack from
940: its backpointer, which we maintain. */
941: #define EXIT_IGNORE_STACK 1
942:
943: /* This macro generates the assembly code for function exit,
944: on machines that need it. If FUNCTION_EPILOGUE is not defined
945: then individual return instructions are generated for each
946: return statement. Args are same as for FUNCTION_PROLOGUE.
947:
948: The function epilogue should not depend on the current stack pointer!
949: It should use the frame pointer only. This is mandatory because
950: of alloca; we also take advantage of it to omit stack adjustments
951: before returning. */
952:
953: #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
954:
955: /* Output assembler code for a block containing the constant parts
956: of a trampoline, leaving space for the variable parts.
957:
958: The trampoline should set the static chain pointer to value placed
959: into the trampoline and should branch to the specified routine.
960:
961: On the RS/6000, this is not code at all, but merely a data area,
962: since that is the way all functions are called. The first word is
963: the address of the function, the second word is the TOC pointer (r2),
964: and the third word is the static chain value. */
965:
966: #define TRAMPOLINE_TEMPLATE(FILE) { fprintf (FILE, "\t.long 0, 0, 0\n"); }
967:
968: /* Length in units of the trampoline for entering a nested function. */
969:
970: #define TRAMPOLINE_SIZE 12
971:
972: /* Emit RTL insns to initialize the variable parts of a trampoline.
973: FNADDR is an RTX for the address of the function's pure code.
974: CXT is an RTX for the static chain value for the function. */
975:
976: #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
977: { \
978: emit_move_insn (gen_rtx (MEM, SImode, \
979: memory_address (SImode, (ADDR))), \
980: gen_rtx (MEM, SImode, \
981: memory_address (SImode, (FNADDR)))); \
982: emit_move_insn (gen_rtx (MEM, SImode, \
983: memory_address (SImode, \
984: plus_constant ((ADDR), 4))), \
985: gen_rtx (MEM, SImode, \
986: memory_address (SImode, \
987: plus_constant ((FNADDR), 4)))); \
988: emit_move_insn (gen_rtx (MEM, SImode, \
989: memory_address (SImode, \
990: plus_constant ((ADDR), 8))), \
991: force_reg (SImode, (CXT))); \
992: }
993:
994: /* Definitions for register eliminations.
995:
996: We have two registers that can be eliminated on the RS/6000. First, the
997: frame pointer register can often be eliminated in favor of the stack
998: pointer register. Secondly, the argument pointer register can always be
999: eliminated; it is replaced with either the stack or frame pointer.
1000:
1001: In addition, we use the elimination mechanism to see if r30 is needed
1002: Initially we assume that it isn't. If it is, we spill it. This is done
1003: by making it an eliminable register. We replace it with itself so that
1004: if it isn't needed, then existing uses won't be modified. */
1005:
1006: /* This is an array of structures. Each structure initializes one pair
1007: of eliminable registers. The "from" register number is given first,
1008: followed by "to". Eliminations of the same "from" register are listed
1009: in order of preference. */
1010: #define ELIMINABLE_REGS \
1011: {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1012: { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1013: { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1014: { 30, 30} }
1015:
1016: /* Given FROM and TO register numbers, say whether this elimination is allowed.
1017: Frame pointer elimination is automatically handled.
1018:
1019: For the RS/6000, if frame pointer elimination is being done, we would like
1020: to convert ap into fp, not sp.
1021:
1022: We need r30 if -mmininal-toc was specified, and there are constant pool
1023: references. */
1024:
1025: #define CAN_ELIMINATE(FROM, TO) \
1026: ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1027: ? ! frame_pointer_needed \
1028: : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || get_pool_size () == 0 \
1029: : 1)
1030:
1031: /* Define the offset between two registers, one to be eliminated, and the other
1032: its replacement, at the start of a routine. */
1033: #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1034: { \
1035: int total_stack_size = (rs6000_sa_size () + get_frame_size () \
1036: + current_function_outgoing_args_size); \
1037: \
1038: total_stack_size = (total_stack_size + 7) & ~7; \
1039: \
1040: if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1041: { \
1042: if (rs6000_pushes_stack ()) \
1043: (OFFSET) = 0; \
1044: else \
1045: (OFFSET) = - total_stack_size; \
1046: } \
1047: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1048: (OFFSET) = total_stack_size; \
1049: else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1050: { \
1051: if (rs6000_pushes_stack ()) \
1052: (OFFSET) = total_stack_size; \
1053: else \
1054: (OFFSET) = 0; \
1055: } \
1056: else if ((FROM) == 30) \
1057: (OFFSET) = 0; \
1058: else \
1059: abort (); \
1060: }
1061:
1062: /* Addressing modes, and classification of registers for them. */
1063:
1064: /* #define HAVE_POST_INCREMENT */
1065: /* #define HAVE_POST_DECREMENT */
1066:
1067: #define HAVE_PRE_DECREMENT
1068: #define HAVE_PRE_INCREMENT
1069:
1070: /* Macros to check register numbers against specific register classes. */
1071:
1072: /* These assume that REGNO is a hard or pseudo reg number.
1073: They give nonzero only if REGNO is a hard reg of the suitable class
1074: or a pseudo reg currently allocated to a suitable hard reg.
1075: Since they use reg_renumber, they are safe only once reg_renumber
1076: has been allocated, which happens in local-alloc.c. */
1077:
1078: #define REGNO_OK_FOR_INDEX_P(REGNO) \
1079: ((REGNO) < FIRST_PSEUDO_REGISTER \
1080: ? (REGNO) <= 31 || (REGNO) == 67 \
1081: : (reg_renumber[REGNO] >= 0 \
1082: && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
1083:
1084: #define REGNO_OK_FOR_BASE_P(REGNO) \
1085: ((REGNO) < FIRST_PSEUDO_REGISTER \
1086: ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \
1087: : (reg_renumber[REGNO] > 0 \
1088: && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
1089:
1090: /* Maximum number of registers that can appear in a valid memory address. */
1091:
1092: #define MAX_REGS_PER_ADDRESS 2
1093:
1094: /* Recognize any constant value that is a valid address. */
1095:
1096: #define CONSTANT_ADDRESS_P(X) \
1097: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1098: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1099: || GET_CODE (X) == HIGH)
1100:
1101: /* Nonzero if the constant value X is a legitimate general operand.
1102: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
1103:
1104: On the RS/6000, all integer constants are acceptable, most won't be valid
1105: for particular insns, though. Only easy FP constants are
1106: acceptable. */
1107:
1108: #define LEGITIMATE_CONSTANT_P(X) \
1109: (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
1110: || easy_fp_constant (X, GET_MODE (X)))
1111:
1112: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1113: and check its validity for a certain class.
1114: We have two alternate definitions for each of them.
1115: The usual definition accepts all pseudo regs; the other rejects
1116: them unless they have been allocated suitable hard regs.
1117: The symbol REG_OK_STRICT causes the latter definition to be used.
1118:
1119: Most source files want to accept pseudo regs in the hope that
1120: they will get allocated to the class that the insn wants them to be in.
1121: Source files for reload pass need to be strict.
1122: After reload, it makes no difference, since pseudo regs have
1123: been eliminated by then. */
1124:
1125: #ifndef REG_OK_STRICT
1126:
1127: /* Nonzero if X is a hard reg that can be used as an index
1128: or if it is a pseudo reg. */
1129: #define REG_OK_FOR_INDEX_P(X) \
1130: (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1131:
1132: /* Nonzero if X is a hard reg that can be used as a base reg
1133: or if it is a pseudo reg. */
1134: #define REG_OK_FOR_BASE_P(X) \
1135: (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X))
1136:
1137: #else
1138:
1139: /* Nonzero if X is a hard reg that can be used as an index. */
1140: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1141: /* Nonzero if X is a hard reg that can be used as a base reg. */
1142: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1143:
1144: #endif
1145:
1146: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1147: that is a valid memory address for an instruction.
1148: The MODE argument is the machine mode for the MEM expression
1149: that wants to use this address.
1150:
1151: On the RS/6000, there are four valid address: a SYMBOL_REF that
1152: refers to a constant pool entry of an address (or the sum of it
1153: plus a constant), a short (16-bit signed) constant plus a register,
1154: the sum of two registers, or a register indirect, possibly with an
1155: auto-increment. For DFmode and DImode with an constant plus register,
1156: we must ensure that both words are addressable. */
1157:
1158: #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \
1159: (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X) \
1160: && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X)))
1161:
1162: #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \
1163: (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \
1164: || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1165: && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1166: && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0))))
1167:
1168: #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
1169: (GET_CODE (X) == CONST_INT \
1170: && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
1171:
1172: #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \
1173: (GET_CODE (X) == PLUS \
1174: && GET_CODE (XEXP (X, 0)) == REG \
1175: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1176: && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1177: && (((MODE) != DFmode && (MODE) != DImode) \
1178: || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))
1179:
1180: #define LEGITIMATE_INDEXED_ADDRESS_P(X) \
1181: (GET_CODE (X) == PLUS \
1182: && GET_CODE (XEXP (X, 0)) == REG \
1183: && GET_CODE (XEXP (X, 1)) == REG \
1184: && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1185: && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
1186: || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \
1187: && REG_OK_FOR_INDEX_P (XEXP (X, 0)))))
1188:
1189: #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \
1190: (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
1191:
1192: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1193: { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \
1194: goto ADDR; \
1195: if (GET_CODE (X) == PRE_INC \
1196: && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1197: goto ADDR; \
1198: if (GET_CODE (X) == PRE_DEC \
1199: && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1200: goto ADDR; \
1201: if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \
1202: goto ADDR; \
1203: if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \
1204: goto ADDR; \
1205: if ((MODE) != DImode && (MODE) != TImode \
1206: && LEGITIMATE_INDEXED_ADDRESS_P (X)) \
1207: goto ADDR; \
1208: }
1209:
1210: /* Try machine-dependent ways of modifying an illegitimate address
1211: to be legitimate. If we find one, return the new, valid address.
1212: This macro is used in only one place: `memory_address' in explow.c.
1213:
1214: OLDX is the address as it was before break_out_memory_refs was called.
1215: In some cases it is useful to look at this to decide what needs to be done.
1216:
1217: MODE and WIN are passed so that this macro can use
1218: GO_IF_LEGITIMATE_ADDRESS.
1219:
1220: It is always safe for this macro to do nothing. It exists to recognize
1221: opportunities to optimize the output.
1222:
1223: On RS/6000, first check for the sum of a register with a constant
1224: integer that is out of range. If so, generate code to add the
1225: constant with the low-order 16 bits masked to the register and force
1226: this result into another register (this can be done with `cau').
1227: Then generate an address of REG+(CONST&0xffff), allowing for the
1228: possibility of bit 16 being a one.
1229:
1230: Then check for the sum of a register and something not constant, try to
1231: load the other things into a register and return the sum. */
1232:
1233: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1234: { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1235: && GET_CODE (XEXP (X, 1)) == CONST_INT \
1236: && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1237: { int high_int, low_int; \
1238: high_int = INTVAL (XEXP (X, 1)) >> 16; \
1239: low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1240: if (low_int & 0x8000) \
1241: high_int += 1, low_int |= 0xffff0000; \
1242: (X) = gen_rtx (PLUS, SImode, \
1243: force_operand \
1244: (gen_rtx (PLUS, SImode, XEXP (X, 0), \
1245: gen_rtx (CONST_INT, VOIDmode, \
1246: high_int << 16)), 0),\
1247: gen_rtx (CONST_INT, VOIDmode, low_int)); \
1248: goto WIN; \
1249: } \
1250: else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1251: && GET_CODE (XEXP (X, 1)) != CONST_INT \
1252: && (MODE) != DImode && (MODE) != TImode) \
1253: { \
1254: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1255: force_reg (SImode, force_operand (XEXP (X, 1), 0))); \
1256: goto WIN; \
1257: } \
1258: }
1259:
1260: /* Go to LABEL if ADDR (a legitimate address expression)
1261: has an effect that depends on the machine mode it is used for.
1262:
1263: On the RS/6000 this is true if the address is valid with a zero offset
1264: but not with an offset of four (this means it cannot be used as an
1265: address for DImode or DFmode) or is a pre-increment or decrement. Since
1266: we know it is valid, we just check for an address that is not valid with
1267: an offset of four. */
1268:
1269: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1270: { if (GET_CODE (ADDR) == PLUS \
1271: && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \
1272: && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1273: goto LABEL; \
1274: if (GET_CODE (ADDR) == PRE_INC) \
1275: goto LABEL; \
1276: if (GET_CODE (ADDR) == PRE_DEC) \
1277: goto LABEL; \
1278: }
1279:
1280: /* Define this if some processing needs to be done immediately before
1281: emitting code for an insn. */
1282:
1283: /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1284:
1285: /* Specify the machine mode that this machine uses
1286: for the index in the tablejump instruction. */
1287: #define CASE_VECTOR_MODE SImode
1288:
1289: /* Define this if the tablejump instruction expects the table
1290: to contain offsets from the address of the table.
1291: Do not define this if the table should contain absolute addresses. */
1292: #define CASE_VECTOR_PC_RELATIVE
1293:
1294: /* Specify the tree operation to be used to convert reals to integers. */
1295: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1296:
1297: /* This is the kind of divide that is easiest to do in the general case. */
1298: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1299:
1300: /* Define this as 1 if `char' should by default be signed; else as 0. */
1301: #define DEFAULT_SIGNED_CHAR 0
1302:
1303: /* This flag, if defined, says the same insns that convert to a signed fixnum
1304: also convert validly to an unsigned one. */
1305:
1306: /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1307:
1308: /* Max number of bytes we can move from memory to memory
1309: in one reasonably fast instruction. */
1310: #define MOVE_MAX 16
1311:
1312: /* Nonzero if access to memory by bytes is no faster than for words.
1313: Also non-zero if doing byte operations (specifically shifts) in registers
1314: is undesirable. */
1315: #define SLOW_BYTE_ACCESS 1
1316:
1317: /* Define if operations between registers always perform the operation
1318: on the full register even if a narrower mode is specified. */
1319: #define WORD_REGISTER_OPERATIONS
1320:
1321: /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1322: will either zero-extend or sign-extend. The value of this macro should
1323: be the code that says which one of the two operations is implicitly
1324: done, NIL if none. */
1325: #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1326:
1327: /* Define if loading short immediate values into registers sign extends. */
1328: #define SHORT_IMMEDIATES_SIGN_EXTEND
1329:
1330: /* The RS/6000 uses the XCOFF format. */
1331:
1332: #define XCOFF_DEBUGGING_INFO
1333:
1334: /* Define if the object format being used is COFF or a superset. */
1335: #define OBJECT_FORMAT_COFF
1336:
1337: /* Define the magic numbers that we recognize as COFF. */
1338:
1339: #define MY_ISCOFF(magic) \
1340: ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC || (magic) == U802TOCMAGIC)
1341:
1342: /* This is the only version of nm that collect2 can work with. */
1343: #define REAL_NM_FILE_NAME "/usr/ucb/nm"
1344:
1345: /* We don't have GAS for the RS/6000 yet, so don't write out special
1346: .stabs in cc1plus. */
1347:
1348: #define FASCIST_ASSEMBLER
1349:
1350: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1351: is done just by pretending it is already truncated. */
1352: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1353:
1354: /* Specify the machine mode that pointers have.
1355: After generation of rtl, the compiler makes no further distinction
1356: between pointers and any other objects of this machine mode. */
1357: #define Pmode SImode
1358:
1359: /* Mode of a function address in a call instruction (for indexing purposes).
1360:
1361: Doesn't matter on RS/6000. */
1362: #define FUNCTION_MODE SImode
1363:
1364: /* Define this if addresses of constant functions
1365: shouldn't be put through pseudo regs where they can be cse'd.
1366: Desirable on machines where ordinary constants are expensive
1367: but a CALL with constant address is cheap. */
1368: #define NO_FUNCTION_CSE
1369:
1370: /* Define this to be nonzero if shift instructions ignore all but the low-order
1371: few bits.
1372:
1373: The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED
1374: have been dropped from the PowerPC architecture. */
1375:
1376: #define SHIFT_COUNT_TRUNCATED TARGET_POWER ? 1 : 0
1377:
1378: /* Use atexit for static constructors/destructors, instead of defining
1379: our own exit function. */
1380: #define HAVE_ATEXIT
1381:
1382: /* Compute the cost of computing a constant rtl expression RTX
1383: whose rtx-code is CODE. The body of this macro is a portion
1384: of a switch statement. If the code is computed here,
1385: return it with a return statement. Otherwise, break from the switch.
1386:
1387: On the RS/6000, if it is legal in the insn, it is free. So this
1388: always returns 0. */
1389:
1390: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1391: case CONST_INT: \
1392: case CONST: \
1393: case LABEL_REF: \
1394: case SYMBOL_REF: \
1395: case CONST_DOUBLE: \
1396: return 0;
1397:
1398: /* Provide the costs of a rtl expression. This is in the body of a
1399: switch on CODE. */
1400:
1401: #define RTX_COSTS(X,CODE,OUTER_CODE) \
1402: case MULT: \
1403: return (GET_CODE (XEXP (X, 1)) != CONST_INT \
1404: ? COSTS_N_INSNS (5) \
1405: : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
1406: ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
1407: case DIV: \
1408: case MOD: \
1409: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1410: && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \
1411: return COSTS_N_INSNS (2); \
1412: /* otherwise fall through to normal divide. */ \
1413: case UDIV: \
1414: case UMOD: \
1415: return COSTS_N_INSNS (19); \
1416: case MEM: \
1417: /* MEM should be slightly more expensive than (plus (reg) (const)) */ \
1418: return 5;
1419:
1420: /* Compute the cost of an address. This is meant to approximate the size
1421: and/or execution delay of an insn using that address. If the cost is
1422: approximated by the RTL complexity, including CONST_COSTS above, as
1423: is usually the case for CISC machines, this macro should not be defined.
1424: For aggressively RISCy machines, only one insn format is allowed, so
1425: this macro should be a constant. The value of this macro only matters
1426: for valid addresses.
1427:
1428: For the RS/6000, everything is cost 0. */
1429:
1430: #define ADDRESS_COST(RTX) 0
1431:
1432: /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1433: should be adjusted to reflect any required changes. This macro is used when
1434: there is some systematic length adjustment required that would be difficult
1435: to express in the length attribute. */
1436:
1437: /* #define ADJUST_INSN_LENGTH(X,LENGTH) */
1438:
1439: /* Add any extra modes needed to represent the condition code.
1440:
1441: For the RS/6000, we need separate modes when unsigned (logical) comparisons
1442: are being done and we need a separate mode for floating-point. We also
1443: use a mode for the case when we are comparing the results of two
1444: comparisons. */
1445:
1446: #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode
1447:
1448: /* Define the names for the modes specified above. */
1449: #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ"
1450:
1451: /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1452: return the mode to be used for the comparison. For floating-point, CCFPmode
1453: should be used. CCUNSmode should be used for unsigned comparisons.
1454: CCEQmode should be used when we are doing an inequality comparison on
1455: the result of a comparison. CCmode should be used in all other cases. */
1456:
1457: #define SELECT_CC_MODE(OP,X,Y) \
1458: (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
1459: : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \
1460: : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \
1461: ? CCEQmode : CCmode))
1462:
1463: /* Define the information needed to generate branch and scc insns. This is
1464: stored from the compare operation. Note that we can't use "rtx" here
1465: since it hasn't been defined! */
1466:
1467: extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1;
1468: extern int rs6000_compare_fp_p;
1469:
1470: /* Set to non-zero by "fix" operation to indicate that itrunc and
1471: uitrunc must be defined. */
1472:
1473: extern int rs6000_trunc_used;
1474:
1475: /* Control the assembler format that we output. */
1476:
1477: /* Output at beginning of assembler file.
1478:
1479: Initialize the section names for the RS/6000 at this point.
1480:
1481: Specify filename to assembler.
1482:
1483: We want to go into the TOC section so at least one .toc will be emitted.
1484: Also, in order to output proper .bs/.es pairs, we need at least one static
1485: [RW] section emitted.
1486:
1487: We then switch back to text to force the gcc2_compiled. label and the space
1488: allocated after it (when profiling) into the text section.
1489:
1490: Finally, declare mcount when profiling to make the assembler happy. */
1491:
1492: #define ASM_FILE_START(FILE) \
1493: { \
1494: rs6000_gen_section_name (&xcoff_bss_section_name, \
1495: main_input_filename, ".bss_"); \
1496: rs6000_gen_section_name (&xcoff_private_data_section_name, \
1497: main_input_filename, ".rw_"); \
1498: rs6000_gen_section_name (&xcoff_read_only_section_name, \
1499: main_input_filename, ".ro_"); \
1500: \
1501: output_file_directive (FILE, main_input_filename); \
1502: toc_section (); \
1503: if (write_symbols != NO_DEBUG) \
1504: private_data_section (); \
1505: text_section (); \
1506: if (profile_flag) \
1507: fprintf (FILE, "\t.extern .mcount\n"); \
1508: }
1509:
1510: /* Output at end of assembler file.
1511:
1512: On the RS/6000, referencing data should automatically pull in text. */
1513:
1514: #define ASM_FILE_END(FILE) \
1515: { \
1516: text_section (); \
1517: fprintf (FILE, "_section_.text:\n"); \
1518: data_section (); \
1519: fprintf (FILE, "\t.long _section_.text\n"); \
1520: }
1521:
1522: /* We define this to prevent the name mangler from putting dollar signs into
1523: function names. */
1524:
1525: #define NO_DOLLAR_IN_LABEL
1526:
1527: /* We define this to 0 so that gcc will never accept a dollar sign in a
1528: variable name. This is needed because the AIX assembler will not accept
1529: dollar signs. */
1530:
1531: #define DOLLARS_IN_IDENTIFIERS 0
1532:
1533: /* Implicit library calls should use memcpy, not bcopy, etc. */
1534:
1535: #define TARGET_MEM_FUNCTIONS
1536:
1537: /* Define the extra sections we need. We define three: one is the read-only
1538: data section which is used for constants. This is a csect whose name is
1539: derived from the name of the input file. The second is for initialized
1540: global variables. This is a csect whose name is that of the variable.
1541: The third is the TOC. */
1542:
1543: #define EXTRA_SECTIONS \
1544: read_only_data, private_data, read_only_private_data, toc, bss
1545:
1546: /* Define the name of our readonly data section. */
1547:
1548: #define READONLY_DATA_SECTION read_only_data_section
1549:
1550: /* If we are referencing a function that is static or is known to be
1551: in this file, make the SYMBOL_REF special. We can use this to indicate
1552: that we can branch to this function without emitting a no-op after the
1553: call. */
1554:
1555: #define ENCODE_SECTION_INFO(DECL) \
1556: if (TREE_CODE (DECL) == FUNCTION_DECL \
1557: && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \
1558: SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1559:
1560: /* Indicate that jump tables go in the text section. */
1561:
1562: #define JUMP_TABLES_IN_TEXT_SECTION
1563:
1564: /* Define the routines to implement these extra sections. */
1565:
1566: #define EXTRA_SECTION_FUNCTIONS \
1567: \
1568: void \
1569: read_only_data_section () \
1570: { \
1571: if (in_section != read_only_data) \
1572: { \
1573: fprintf (asm_out_file, ".csect %s[RO]\n", \
1574: xcoff_read_only_section_name); \
1575: in_section = read_only_data; \
1576: } \
1577: } \
1578: \
1579: void \
1580: private_data_section () \
1581: { \
1582: if (in_section != private_data) \
1583: { \
1584: fprintf (asm_out_file, ".csect %s[RW]\n", \
1585: xcoff_private_data_section_name); \
1586: \
1587: in_section = private_data; \
1588: } \
1589: } \
1590: \
1591: void \
1592: read_only_private_data_section () \
1593: { \
1594: if (in_section != read_only_private_data) \
1595: { \
1596: fprintf (asm_out_file, ".csect %s[RO]\n", \
1597: xcoff_private_data_section_name); \
1598: in_section = read_only_private_data; \
1599: } \
1600: } \
1601: \
1602: void \
1603: toc_section () \
1604: { \
1605: if (TARGET_MINIMAL_TOC) \
1606: { \
1607: static int toc_initialized = 0; \
1608: \
1609: /* toc_section is always called at least once from ASM_FILE_START, \
1610: so this is guaranteed to always be defined once and only once \
1611: in each file. */ \
1612: if (! toc_initialized) \
1613: { \
1614: fprintf (asm_out_file, ".toc\nLCTOC..0:\n"); \
1615: fprintf (asm_out_file, "\t.tc toc_table[TC],toc_table[RW]\n"); \
1616: toc_initialized = 1; \
1617: } \
1618: \
1619: if (in_section != toc) \
1620: fprintf (asm_out_file, ".csect toc_table[RW]\n"); \
1621: } \
1622: else \
1623: { \
1624: if (in_section != toc) \
1625: fprintf (asm_out_file, ".toc\n"); \
1626: } \
1627: in_section = toc; \
1628: }
1629:
1630: /* This macro produces the initial definition of a function name.
1631: On the RS/6000, we need to place an extra '.' in the function name and
1632: output the function descriptor.
1633:
1634: The csect for the function will have already been created by the
1635: `text_section' call previously done. We do have to go back to that
1636: csect, however. */
1637:
1638: /* ??? What do the 16 and 044 in the .function line really mean? */
1639:
1640: #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1641: { if (TREE_PUBLIC (DECL)) \
1642: { \
1643: fprintf (FILE, "\t.globl ."); \
1644: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1645: fprintf (FILE, "\n"); \
1646: } \
1647: else if (write_symbols == XCOFF_DEBUG) \
1648: { \
1649: fprintf (FILE, "\t.lglobl ."); \
1650: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1651: fprintf (FILE, "\n"); \
1652: } \
1653: fprintf (FILE, ".csect "); \
1654: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1655: fprintf (FILE, "[DS]\n"); \
1656: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1657: fprintf (FILE, ":\n"); \
1658: fprintf (FILE, "\t.long ."); \
1659: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1660: fprintf (FILE, ", TOC[tc0], 0\n"); \
1661: fprintf (FILE, ".csect .text[PR]\n."); \
1662: RS6000_OUTPUT_BASENAME (FILE, NAME); \
1663: fprintf (FILE, ":\n"); \
1664: if (write_symbols == XCOFF_DEBUG) \
1665: xcoffout_declare_function (FILE, DECL, NAME); \
1666: }
1667:
1668: /* Return non-zero if this entry is to be written into the constant pool
1669: in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST
1670: containing one of them. If -mfp-in-toc (the default), we also do
1671: this for floating-point constants. We actually can only do this
1672: if the FP formats of the target and host machines are the same, but
1673: we can't check that since not every file that uses
1674: GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */
1675:
1676: #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \
1677: (GET_CODE (X) == SYMBOL_REF \
1678: || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1679: && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
1680: || GET_CODE (X) == LABEL_REF \
1681: || (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \
1682: && GET_CODE (X) == CONST_DOUBLE \
1683: && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1684: && BITS_PER_WORD == HOST_BITS_PER_INT))
1685:
1686: /* Select section for constant in constant pool.
1687:
1688: On RS/6000, all constants are in the private read-only data area.
1689: However, if this is being placed in the TOC it must be output as a
1690: toc entry. */
1691:
1692: #define SELECT_RTX_SECTION(MODE, X) \
1693: { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1694: toc_section (); \
1695: else \
1696: read_only_private_data_section (); \
1697: }
1698:
1699: /* Macro to output a special constant pool entry. Go to WIN if we output
1700: it. Otherwise, it is written the usual way.
1701:
1702: On the RS/6000, toc entries are handled this way. */
1703:
1704: #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \
1705: { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1706: { \
1707: output_toc (FILE, X, LABELNO); \
1708: goto WIN; \
1709: } \
1710: }
1711:
1712: /* Select the section for an initialized data object.
1713:
1714: On the RS/6000, we have a special section for all variables except those
1715: that are static. */
1716:
1717: #define SELECT_SECTION(EXP,RELOC) \
1718: { \
1719: if ((TREE_READONLY (EXP) \
1720: || (TREE_CODE (EXP) == STRING_CST \
1721: && !flag_writable_strings)) \
1722: && ! TREE_THIS_VOLATILE (EXP) \
1723: && ! (RELOC)) \
1724: { \
1725: if (TREE_PUBLIC (EXP)) \
1726: read_only_data_section (); \
1727: else \
1728: read_only_private_data_section (); \
1729: } \
1730: else \
1731: { \
1732: if (TREE_PUBLIC (EXP)) \
1733: data_section (); \
1734: else \
1735: private_data_section (); \
1736: } \
1737: }
1738:
1739: /* This outputs NAME to FILE up to the first null or '['. */
1740:
1741: #define RS6000_OUTPUT_BASENAME(FILE, NAME) \
1742: if ((NAME)[0] == '*') \
1743: assemble_name (FILE, NAME); \
1744: else \
1745: { \
1746: char *_p; \
1747: for (_p = (NAME); *_p && *_p != '['; _p++) \
1748: fputc (*_p, FILE); \
1749: }
1750:
1751: /* Output something to declare an external symbol to the assembler. Most
1752: assemblers don't need this.
1753:
1754: If we haven't already, add "[RW]" (or "[DS]" for a function) to the
1755: name. Normally we write this out along with the name. In the few cases
1756: where we can't, it gets stripped off. */
1757:
1758: #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1759: { rtx _symref = XEXP (DECL_RTL (DECL), 0); \
1760: if ((TREE_CODE (DECL) == VAR_DECL \
1761: || TREE_CODE (DECL) == FUNCTION_DECL) \
1762: && (NAME)[0] != '*' \
1763: && (NAME)[strlen (NAME) - 1] != ']') \
1764: { \
1765: char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
1766: strcpy (_name, XSTR (_symref, 0)); \
1767: strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
1768: XSTR (_symref, 0) = _name; \
1769: } \
1770: fprintf (FILE, "\t.extern "); \
1771: assemble_name (FILE, XSTR (_symref, 0)); \
1772: if (TREE_CODE (DECL) == FUNCTION_DECL) \
1773: { \
1774: fprintf (FILE, "\n\t.extern ."); \
1775: RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \
1776: } \
1777: fprintf (FILE, "\n"); \
1778: }
1779:
1780: /* Similar, but for libcall. We only have to worry about the function name,
1781: not that of the descriptor. */
1782:
1783: #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1784: { fprintf (FILE, "\t.extern ."); \
1785: assemble_name (FILE, XSTR (FUN, 0)); \
1786: fprintf (FILE, "\n"); \
1787: }
1788:
1789: /* Output to assembler file text saying following lines
1790: may contain character constants, extra white space, comments, etc. */
1791:
1792: #define ASM_APP_ON ""
1793:
1794: /* Output to assembler file text saying following lines
1795: no longer contain unusual constructs. */
1796:
1797: #define ASM_APP_OFF ""
1798:
1799: /* Output before instructions. */
1800:
1801: #define TEXT_SECTION_ASM_OP ".csect .text[PR]"
1802:
1803: /* Output before writable data. */
1804:
1805: #define DATA_SECTION_ASM_OP ".csect .data[RW]"
1806:
1807: /* How to refer to registers in assembler output.
1808: This sequence is indexed by compiler's hard-register-number (see above). */
1809:
1810: #define REGISTER_NAMES \
1811: {"0", "1", "2", "3", "4", "5", "6", "7", \
1812: "8", "9", "10", "11", "12", "13", "14", "15", \
1813: "16", "17", "18", "19", "20", "21", "22", "23", \
1814: "24", "25", "26", "27", "28", "29", "30", "31", \
1815: "0", "1", "2", "3", "4", "5", "6", "7", \
1816: "8", "9", "10", "11", "12", "13", "14", "15", \
1817: "16", "17", "18", "19", "20", "21", "22", "23", \
1818: "24", "25", "26", "27", "28", "29", "30", "31", \
1819: "mq", "lr", "ctr", "ap", \
1820: "0", "1", "2", "3", "4", "5", "6", "7" }
1821:
1822: /* Table of additional register names to use in user input. */
1823:
1824: #define ADDITIONAL_REGISTER_NAMES \
1825: {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \
1826: "r4", 4, "r5", 5, "r6", 6, "r7", 7, \
1827: "r8", 8, "r9", 9, "r10", 10, "r11", 11, \
1828: "r12", 12, "r13", 13, "r14", 14, "r15", 15, \
1829: "r16", 16, "r17", 17, "r18", 18, "r19", 19, \
1830: "r20", 20, "r21", 21, "r22", 22, "r23", 23, \
1831: "r24", 24, "r25", 25, "r26", 26, "r27", 27, \
1832: "r28", 28, "r29", 29, "r30", 30, "r31", 31, \
1833: "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \
1834: "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \
1835: "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \
1836: "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \
1837: "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \
1838: "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \
1839: "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \
1840: "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \
1841: /* no additional names for: mq, lr, ctr, ap */ \
1842: "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \
1843: "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \
1844: "cc", 68 }
1845:
1846: /* How to renumber registers for dbx and gdb. */
1847:
1848: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1849:
1850: /* Text to write out after a CALL that may be replaced by glue code by
1851: the loader. This depends on the AIX version. */
1852: #define RS6000_CALL_GLUE "cror 31,31,31"
1853:
1854: /* This is how to output the definition of a user-level label named NAME,
1855: such as the label on a static function or variable NAME. */
1856:
1857: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1858: do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0)
1859:
1860: /* This is how to output a command to make the user-level label named NAME
1861: defined for reference from other files. */
1862:
1863: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1864: do { fputs ("\t.globl ", FILE); \
1865: RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0)
1866:
1867: /* This is how to output a reference to a user-level label named NAME.
1868: `assemble_name' uses this. */
1869:
1870: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1871: fprintf (FILE, NAME)
1872:
1873: /* This is how to output an internal numbered label where
1874: PREFIX is the class of label and NUM is the number within the class. */
1875:
1876: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1877: fprintf (FILE, "%s..%d:\n", PREFIX, NUM)
1878:
1879: /* This is how to output a label for a jump table. Arguments are the same as
1880: for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1881: passed. */
1882:
1883: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1884: { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1885:
1886: /* This is how to store into the string LABEL
1887: the symbol_ref name of an internal numbered label where
1888: PREFIX is the class of label and NUM is the number within the class.
1889: This is suitable for output with `assemble_name'. */
1890:
1891: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1892: sprintf (LABEL, "%s..%d", PREFIX, NUM)
1893:
1894: /* This is how to output an assembler line defining a `double' constant. */
1895:
1896: #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1897: { \
1898: if (REAL_VALUE_ISINF (VALUE) \
1899: || REAL_VALUE_ISNAN (VALUE) \
1900: || REAL_VALUE_MINUS_ZERO (VALUE)) \
1901: { \
1902: long t[2]; \
1903: REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1904: fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \
1905: t[0] & 0xffffffff, t[1] & 0xffffffff); \
1906: } \
1907: else \
1908: { \
1909: char str[30]; \
1910: REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \
1911: fprintf (FILE, "\t.double 0d%s\n", str); \
1912: } \
1913: }
1914:
1915: /* This is how to output an assembler line defining a `float' constant. */
1916:
1917: #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1918: { \
1919: if (REAL_VALUE_ISINF (VALUE) \
1920: || REAL_VALUE_ISNAN (VALUE) \
1921: || REAL_VALUE_MINUS_ZERO (VALUE)) \
1922: { \
1923: long t; \
1924: REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1925: fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
1926: } \
1927: else \
1928: { \
1929: char str[30]; \
1930: REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1931: fprintf (FILE, "\t.float 0d%s\n", str); \
1932: } \
1933: }
1934:
1935: /* This is how to output an assembler line defining an `int' constant. */
1936:
1937: #define ASM_OUTPUT_INT(FILE,VALUE) \
1938: ( fprintf (FILE, "\t.long "), \
1939: output_addr_const (FILE, (VALUE)), \
1940: fprintf (FILE, "\n"))
1941:
1942: /* Likewise for `char' and `short' constants. */
1943:
1944: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1945: ( fprintf (FILE, "\t.short "), \
1946: output_addr_const (FILE, (VALUE)), \
1947: fprintf (FILE, "\n"))
1948:
1949: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1950: ( fprintf (FILE, "\t.byte "), \
1951: output_addr_const (FILE, (VALUE)), \
1952: fprintf (FILE, "\n"))
1953:
1954: /* This is how to output an assembler line for a numeric constant byte. */
1955:
1956: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1957: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1958:
1959: /* This is how to output an assembler line to define N characters starting
1960: at P to FILE. */
1961:
1962: #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N))
1963:
1964: /* This is how to output code to push a register on the stack.
1965: It need not be very fast code. */
1966:
1967: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1968: asm_fprintf (FILE, "\{tstu|stwu} %s,-4(r1)\n", reg_names[REGNO]);
1969:
1970: /* This is how to output an insn to pop a register from the stack.
1971: It need not be very fast code. */
1972:
1973: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1974: asm_fprintf (FILE, "\t{l|lwz} %s,0(r1)\n\t{ai|addic} r1,r1,4\n", \
1975: reg_names[REGNO])
1976:
1977: /* This is how to output an element of a case-vector that is absolute.
1978: (RS/6000 does not use such vectors, but we must define this macro
1979: anyway.) */
1980:
1981: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1982: fprintf (FILE, "\t.long L..%d\n", VALUE)
1983:
1984: /* This is how to output an element of a case-vector that is relative. */
1985:
1986: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1987: fprintf (FILE, "\t.long L..%d-L..%d\n", VALUE, REL)
1988:
1989: /* This is how to output an assembler line
1990: that says to advance the location counter
1991: to a multiple of 2**LOG bytes. */
1992:
1993: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1994: if ((LOG) != 0) \
1995: fprintf (FILE, "\t.align %d\n", (LOG))
1996:
1997: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1998: fprintf (FILE, "\t.space %d\n", (SIZE))
1999:
2000: /* This says how to output an assembler line
2001: to define a global common symbol. */
2002:
2003: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2004: do { fputs (".comm ", (FILE)); \
2005: RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
2006: fprintf ((FILE), ",%d\n", (SIZE)); } while (0)
2007:
2008: /* This says how to output an assembler line
2009: to define a local common symbol. */
2010:
2011: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
2012: do { fputs (".lcomm ", (FILE)); \
2013: RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
2014: fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \
2015: } while (0)
2016:
2017: /* Store in OUTPUT a string (made with alloca) containing
2018: an assembler-name for a local static variable named NAME.
2019: LABELNO is an integer which is different for each call. */
2020:
2021: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2022: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2023: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2024:
2025: /* Define the parentheses used to group arithmetic operations
2026: in assembler code. */
2027:
2028: #define ASM_OPEN_PAREN "("
2029: #define ASM_CLOSE_PAREN ")"
2030:
2031: /* Define results of standard character escape sequences. */
2032: #define TARGET_BELL 007
2033: #define TARGET_BS 010
2034: #define TARGET_TAB 011
2035: #define TARGET_NEWLINE 012
2036: #define TARGET_VT 013
2037: #define TARGET_FF 014
2038: #define TARGET_CR 015
2039:
2040: /* Print operand X (an rtx) in assembler syntax to file FILE.
2041: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2042: For `%' followed by punctuation, CODE is the punctuation and X is null. */
2043:
2044: #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2045:
2046: /* Define which CODE values are valid. */
2047:
2048: #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '.')
2049:
2050: /* Print a memory address as an operand to reference that memory location. */
2051:
2052: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2053:
2054: /* Define the codes that are matched by predicates in rs6000.c. */
2055:
2056: #define PREDICATE_CODES \
2057: {"short_cint_operand", {CONST_INT}}, \
2058: {"u_short_cint_operand", {CONST_INT}}, \
2059: {"non_short_cint_operand", {CONST_INT}}, \
2060: {"gpc_reg_operand", {SUBREG, REG}}, \
2061: {"cc_reg_operand", {SUBREG, REG}}, \
2062: {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
2063: {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
2064: {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
2065: {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
2066: {"easy_fp_constant", {CONST_DOUBLE}}, \
2067: {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \
2068: {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \
2069: {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
2070: {"add_operand", {SUBREG, REG, CONST_INT}}, \
2071: {"non_add_cint_operand", {CONST_INT}}, \
2072: {"and_operand", {SUBREG, REG, CONST_INT}}, \
2073: {"non_and_cint_operand", {CONST_INT}}, \
2074: {"logical_operand", {SUBREG, REG, CONST_INT}}, \
2075: {"non_logical_cint_operand", {CONST_INT}}, \
2076: {"mask_operand", {CONST_INT}}, \
2077: {"call_operand", {SYMBOL_REF, REG}}, \
2078: {"current_file_function_operand", {SYMBOL_REF}}, \
2079: {"input_operand", {SUBREG, MEM, REG, CONST_INT}}, \
2080: {"load_multiple_operation", {PARALLEL}}, \
2081: {"store_multiple_operation", {PARALLEL}}, \
2082: {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \
2083: GT, LEU, LTU, GEU, GTU}}, \
2084: {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \
2085: GT, LEU, LTU, GEU, GTU}},
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.