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1.1 root 1: /* Definitions of target machine for GNU compiler, for SPUR chip.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: /* Note that some other tm.h files include this one and then override
22: many of the definitions that relate to assembler syntax. */
23:
24:
25: /* Names to predefine in the preprocessor for this target machine. */
26:
27: #define CPP_PREDEFINES "-Dspur -Acpu(spur) -Amachine(spur)"
28:
29: /* Link with libg.a when debugging, for dbx's sake. */
30:
31: #define LIB_SPEC "%{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} "
32:
33: /* Print subsidiary information on the compiler version in use. */
34: #define TARGET_VERSION fprintf (stderr, " (spur)");
35:
36: /* Run-time compilation parameters selecting different hardware subsets.
37:
38: On the SPUR, we don't yet need any. */
39:
40: extern int target_flags;
41:
42: /* Nonzero if we should generate code to use the fpu. */
43: #define TARGET_FPU (target_flags & 1)
44:
45: /* Nonzero if we should expand constant shifts into series of shift
46: instructions. */
47: #define TARGET_EXPAND_SHIFTS (target_flags & 2)
48:
49: /* Nonzero if we should generate long jumps for compares. */
50: #define TARGET_LONG_JUMPS (target_flags & 4)
51:
52: /* Macro to define tables used to set the flags.
53: This is a list in braces of pairs in braces,
54: each pair being { "NAME", VALUE }
55: where VALUE is the bits to set or minus the bits to clear.
56: An empty string NAME is used to identify the default VALUE. */
57:
58: #define TARGET_SWITCHES \
59: { {"fpu", 1}, \
60: {"soft-float", -1}, \
61: {"expand-shifts", 2}, \
62: {"lib-shifts", -2}, \
63: {"long-jumps", 4}, \
64: {"short-jumps", -4}, \
65: { "", TARGET_DEFAULT}}
66:
67: #define TARGET_DEFAULT 0
68:
69: /* target machine storage layout */
70:
71: /* Define this if most significant bit is lowest numbered
72: in instructions that operate on numbered bit-fields.
73: This is a moot question on the SPUR due to the lack of bit-field insns. */
74: #define BITS_BIG_ENDIAN 0
75:
76: /* Define this if most significant byte of a word is the lowest numbered. */
77: /* That is not true on SPUR. */
78: #define BYTES_BIG_ENDIAN 0
79:
80: /* Define this if most significant word of a multiword number is the lowest
81: numbered. */
82: /* For SPUR we can decide arbitrarily
83: since there are no machine instructions for them. */
84: #define WORDS_BIG_ENDIAN 0
85:
86: /* number of bits in an addressable storage unit */
87: #define BITS_PER_UNIT 8
88:
89: /* Width in bits of a "word", which is the contents of a machine register.
90: Note that this is not necessarily the width of data type `int';
91: if using 16-bit ints on a 68000, this would still be 32.
92: But on a machine with 16-bit registers, this would be 16. */
93: #define BITS_PER_WORD 32
94:
95: /* Width of a word, in units (bytes). */
96: #define UNITS_PER_WORD 4
97:
98: /* Width in bits of a pointer.
99: See also the macro `Pmode' defined below. */
100: #define POINTER_SIZE 32
101:
102: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
103: #define PARM_BOUNDARY 64
104:
105: /* Boundary (in *bits*) on which stack pointer should be aligned. */
106: #define STACK_BOUNDARY 64
107:
108: /* Allocation boundary (in *bits*) for the code of a function. */
109: #define FUNCTION_BOUNDARY 32
110:
111: /* Alignment of field after `int : 0' in a structure. */
112: #define EMPTY_FIELD_BOUNDARY 32
113:
114: /* Every structure's size must be a multiple of this. */
115: #define STRUCTURE_SIZE_BOUNDARY 32
116:
117: /* No data type wants to be aligned rounder than this. */
118: #define BIGGEST_ALIGNMENT 64
119:
120: /* Set this nonzero if move instructions will actually fail to work
121: when given unaligned data. */
122: #define STRICT_ALIGNMENT 1
123:
124: /* Standard register usage. */
125:
126: /* Number of actual hardware registers.
127: The hardware registers are assigned numbers for the compiler
128: from 0 to just below FIRST_PSEUDO_REGISTER.
129: All registers that the compiler knows about must be given numbers,
130: even those that are not normally considered general registers.
131:
132: SPUR has 32 fullword registers and 15 floating point registers. */
133:
134: #define FIRST_PSEUDO_REGISTER 47
135:
136: /* 1 for registers that have pervasive standard uses
137: and are not available for the register allocator.
138: On SPUR, this includes all the global registers
139: and the callee return address register. */
140: #define FIXED_REGISTERS \
141: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
142: 1, 0, 0, 0, 0, 0, \
143: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
144: 1, 0, 0, 0, 0, 0, \
145: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
146:
147: /* 1 for registers not available across function calls.
148: These must include the FIXED_REGISTERS and also any
149: registers that can be used without being saved.
150: The latter must include the registers where values are returned
151: and the register where structure-value addresses are passed.
152: Aside from that, you can include as many other registers as you like. */
153: #define CALL_USED_REGISTERS \
154: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
155: 1, 0, 0, 0, 0, 0, \
156: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
157: 1, 1, 1, 1, 1, 1, \
158: 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}
159:
160: /* Return number of consecutive hard regs needed starting at reg REGNO
161: to hold something of mode MODE.
162: This is ordinarily the length in words of a value of mode MODE
163: but can be less for certain modes in special long registers.
164:
165: On SPUR, ordinary registers hold 32 bits worth;
166: a single floating point register is always enough for
167: anything that can be stored in them at all. */
168: #define HARD_REGNO_NREGS(REGNO, MODE) \
169: ((REGNO) >= 32 ? GET_MODE_NUNITS ((MODE)) \
170: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
171:
172: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
173: On SPUR, the cpu registers can hold any mode but the float registers
174: can hold only floating point. And they can't hold anything if use
175: of hardware floating point is disabled. */
176: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
177: (((REGNO) < 32 \
178: && (REGNO) + ((GET_MODE_UNIT_SIZE ((MODE)) + 3) / 4) <= 32) \
179: || (TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode \
180: || (MODE) == SCmode || (MODE) == DCmode)))
181:
182: /* Value is 1 if it is a good idea to tie two pseudo registers
183: when one has mode MODE1 and one has mode MODE2.
184: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
185: for any hard reg, then this must be 0 for correct output. */
186: #define MODES_TIEABLE_P(MODE1, MODE2) \
187: (((MODE1) == SFmode || (MODE1) == DFmode \
188: || (MODE1) == SCmode || (MODE1) == DCmode) \
189: == ((MODE2) == SFmode || (MODE2) == DFmode \
190: || (MODE2) == SCmode || (MODE2) == DCmode))
191:
192: /* Specify the registers used for certain standard purposes.
193: The values of these macros are register numbers. */
194:
195: /* SPUR pc isn't overloaded on a register that the compiler knows about. */
196: /* #define PC_REGNUM */
197:
198: /* Register to use for pushing function arguments. */
199: #define STACK_POINTER_REGNUM 4
200:
201: /* Base register for access to local variables of the function. */
202: #define FRAME_POINTER_REGNUM 25
203:
204: /* Value should be nonzero if functions must have frame pointers.
205: Zero means the frame pointer need not be set up (and parms
206: may be accessed via the stack pointer) in functions that seem suitable.
207: This is computed in `reload', in reload1.c. */
208: #define FRAME_POINTER_REQUIRED 1
209:
210: /* Base register for access to arguments of the function. */
211: #define ARG_POINTER_REGNUM 25
212:
213: /* Register in which static-chain is passed to a function. */
214: /* ??? */
215: #define STATIC_CHAIN_REGNUM 8
216:
217: /* Register in which address to store a structure value
218: is passed to a function. */
219: #define STRUCT_VALUE_REGNUM 27
220: #define STRUCT_VALUE_INCOMING_REGNUM 11
221:
222: /* Define the classes of registers for register constraints in the
223: machine description. Also define ranges of constants.
224:
225: One of the classes must always be named ALL_REGS and include all hard regs.
226: If there is more than one class, another class must be named NO_REGS
227: and contain no registers.
228:
229: The name GENERAL_REGS must be the name of a class (or an alias for
230: another name such as ALL_REGS). This is the class of registers
231: that is allowed by "g" or "r" in a register constraint.
232: Also, registers outside this class are allocated only when
233: instructions express preferences for them.
234:
235: The classes must be numbered in nondecreasing order; that is,
236: a larger-numbered class must never be contained completely
237: in a smaller-numbered class.
238:
239: For any two classes, it is very desirable that there be another
240: class that represents their union. */
241:
242: /* The 68000 has two kinds of registers, hence four classes. */
243:
244: enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
245:
246: #define N_REG_CLASSES (int) LIM_REG_CLASSES
247:
248: /* Give names of register classes as strings for dump file. */
249:
250: #define REG_CLASS_NAMES \
251: {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
252:
253: /* Define which registers fit in which classes.
254: This is an initializer for a vector of HARD_REG_SET
255: of length N_REG_CLASSES. */
256:
257: #define REG_CLASS_CONTENTS {{0, 0}, {-1, 0}, {0, 0x7fff}, {-1, 0x7fff}}
258:
259: /* The same information, inverted:
260: Return the class number of the smallest class containing
261: reg number REGNO. This could be a conditional expression
262: or could index an array. */
263:
264: #define REGNO_REG_CLASS(REGNO) \
265: ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
266:
267: /* The class value for index registers, and the one for base regs. */
268: #define INDEX_REG_CLASS GENERAL_REGS
269: #define BASE_REG_CLASS GENERAL_REGS
270:
271: /* Get reg_class from a letter such as appears in the machine description. */
272:
273: #define REG_CLASS_FROM_LETTER(C) \
274: ((C) == 'f' ? FP_REGS : NO_REGS)
275:
276: /* The letters I, J, K, L and M in a register constraint string
277: can be used to stand for particular ranges of immediate operands.
278: This macro defines what the ranges are.
279: C is the letter, and VALUE is a constant value.
280: Return 1 if VALUE is in the range specified by C.
281:
282: For SPUR, `I' is used for the range of constants an insn
283: can actually contain.
284: `J' is used for the range which is just zero (since that is R0).
285: `K' is used for the 5-bit operand of a compare insns. */
286:
287: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
288: ((C) == 'I' ? (unsigned) ((VALUE) + 0x2000) < 0x4000 \
289: : (C) == 'J' ? (VALUE) == 0 \
290: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
291: : 0)
292:
293: /* Similar, but for floating constants, and defining letters G and H.
294: Here VALUE is the CONST_DOUBLE rtx itself. */
295:
296: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
297: ((C) == 'G' && CONST_DOUBLE_HIGH (VALUE) == 0 \
298: && CONST_DOUBLE_LOW (VALUE) == 0)
299:
300: /* Given an rtx X being reloaded into a reg required to be
301: in class CLASS, return the class of reg to actually use.
302: In general this is just CLASS; but on some machines
303: in some cases it is preferable to use a more restrictive class. */
304: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
305:
306: /* Return the maximum number of consecutive registers
307: needed to represent mode MODE in a register of class CLASS. */
308: /* On SPUR, this is the size of MODE in words,
309: except in the FP regs, where a single reg is always enough. */
310: #define CLASS_MAX_NREGS(CLASS, MODE) \
311: ((CLASS) == FP_REGS ? 1 \
312: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
313:
314: /* Stack layout; function entry, exit and calling. */
315:
316: /* Define this if pushing a word on the stack
317: makes the stack pointer a smaller address. */
318: #define STACK_GROWS_DOWNWARD
319:
320: /* Define this if the nominal address of the stack frame
321: is at the high-address end of the local variables;
322: that is, each additional local variable allocated
323: goes at a more negative offset in the frame. */
324: #define FRAME_GROWS_DOWNWARD
325:
326: /* Offset within stack frame to start allocating local variables at.
327: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
328: first local allocated. Otherwise, it is the offset to the BEGINNING
329: of the first local allocated. */
330: #define STARTING_FRAME_OFFSET 0
331:
332: /* If we generate an insn to push BYTES bytes,
333: this says how many the stack pointer really advances by.
334: On SPUR, don't define this because there are no push insns. */
335: /* #define PUSH_ROUNDING(BYTES) */
336:
337: /* Offset of first parameter from the argument pointer register value. */
338: #define FIRST_PARM_OFFSET(FNDECL) 0
339:
340: /* Value is the number of bytes of arguments automatically
341: popped when returning from a subroutine call.
342: FUNTYPE is the data type of the function (as a tree),
343: or for a library call it is an identifier node for the subroutine name.
344: SIZE is the number of bytes of arguments passed on the stack. */
345:
346: #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
347:
348: /* Define how to find the value returned by a function.
349: VALTYPE is the data type of the value (as a tree).
350: If the precise function being called is known, FUNC is its FUNCTION_DECL;
351: otherwise, FUNC is 0. */
352:
353: /* On SPUR the value is found in the second "output" register. */
354:
355: #define FUNCTION_VALUE(VALTYPE, FUNC) \
356: gen_rtx (REG, TYPE_MODE (VALTYPE), 27)
357:
358: /* But the called function leaves it in the second "input" register. */
359:
360: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
361: gen_rtx (REG, TYPE_MODE (VALTYPE), 11)
362:
363: /* Define how to find the value returned by a library function
364: assuming the value has mode MODE. */
365:
366: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 27)
367:
368: /* 1 if N is a possible register number for a function value
369: as seen by the caller.
370: On SPUR, the first "output" reg is the only register thus used. */
371:
372: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 27)
373:
374: /* 1 if N is a possible register number for function argument passing.
375: On SPUR, these are the "output" registers. */
376:
377: #define FUNCTION_ARG_REGNO_P(N) ((N) < 32 && (N) > 26)
378:
379: /* Define this macro if the target machine has "register windows". This
380: C expression returns the register number as seen by the called function
381: corresponding to register number OUT as seen by the calling function.
382: Return OUT if register number OUT is not an outbound register. */
383:
384: #define INCOMING_REGNO(OUT) \
385: (((OUT) < 27 || (OUT) > 31) ? (OUT) : (OUT) - 16)
386:
387: /* Define this macro if the target machine has "register windows". This
388: C expression returns the register number as seen by the calling function
389: corresponding to register number IN as seen by the called function.
390: Return IN if register number IN is not an inbound register. */
391:
392: #define OUTGOING_REGNO(IN) \
393: (((IN) < 11 || (IN) > 15) ? (IN) : (IN) + 16)
394:
395: /* Define a data type for recording info about an argument list
396: during the scan of that argument list. This data type should
397: hold all necessary information about the function itself
398: and about the args processed so far, enough to enable macros
399: such as FUNCTION_ARG to determine where the next arg should go.
400:
401: On SPUR, this is a single integer, which is a number of words
402: of arguments scanned so far (including the invisible argument,
403: if any, which holds the structure-value-address).
404: Thus 5 or more means all following args should go on the stack. */
405:
406: #define CUMULATIVE_ARGS int
407:
408: /* Initialize a variable CUM of type CUMULATIVE_ARGS
409: for a call to a function whose data type is FNTYPE.
410: For a library call, FNTYPE is 0.
411:
412: On SPUR, the offset normally starts at 0, but starts at 4 bytes
413: when the function gets a structure-value-address as an
414: invisible first argument. */
415:
416: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
417: ((CUM) = ((FNTYPE) != 0 && aggregate_value_p (TREE_TYPE ((FNTYPE)))))
418:
419: /* Update the data in CUM to advance over an argument
420: of mode MODE and data type TYPE.
421: (TYPE is null for libcalls where that information may not be available.) */
422:
423: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
424: ((CUM) += ((MODE) != BLKmode \
425: ? (GET_MODE_SIZE (MODE) + 3) / 4 \
426: : (int_size_in_bytes (TYPE) + 3) / 4))
427:
428: /* Determine where to put an argument to a function.
429: Value is zero to push the argument on the stack,
430: or a hard register in which to store the argument.
431:
432: MODE is the argument's machine mode.
433: TYPE is the data type of the argument (as a tree).
434: This is null for libcalls where that information may
435: not be available.
436: CUM is a variable of type CUMULATIVE_ARGS which gives info about
437: the preceding args and about the function being called.
438: NAMED is nonzero if this argument is a named parameter
439: (otherwise it is an extra parameter matching an ellipsis). */
440:
441: /* On SPUR the first five words of args are normally in registers
442: and the rest are pushed. But any arg that won't entirely fit in regs
443: is pushed. */
444:
445: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
446: (5 >= ((CUM) \
447: + ((MODE) == BLKmode \
448: ? (int_size_in_bytes (TYPE) + 3) / 4 \
449: : (GET_MODE_SIZE (MODE) + 3) / 4)) \
450: ? gen_rtx (REG, (MODE), 27 + (CUM)) \
451: : 0)
452:
453: /* Define where a function finds its arguments.
454: This is different from FUNCTION_ARG because of register windows. */
455:
456: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
457: (5 >= ((CUM) \
458: + ((MODE) == BLKmode \
459: ? (int_size_in_bytes (TYPE) + 3) / 4 \
460: : (GET_MODE_SIZE (MODE) + 3) / 4)) \
461: ? gen_rtx (REG, (MODE), 11 + (CUM)) \
462: : 0)
463:
464: /* For an arg passed partly in registers and partly in memory,
465: this is the number of registers used.
466: For args passed entirely in registers or entirely in memory, zero. */
467:
468: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
469:
470: /* This macro generates the assembly code for function entry.
471: FILE is a stdio stream to output the code to.
472: SIZE is an int: how many units of temporary storage to allocate.
473: Refer to the array `regs_ever_live' to determine which registers
474: to save; `regs_ever_live[I]' is nonzero if register number I
475: is ever used in the function. This macro is responsible for
476: knowing which registers should not be saved even if used. */
477:
478: /* On spur, move-double insns between fpu and cpu need an 8-byte block
479: of memory. If any fpu reg is used in the function, we allocate
480: such a block here, at the bottom of the frame, just in case it's needed. */
481:
482: #define FUNCTION_PROLOGUE(FILE, SIZE) \
483: { \
484: extern char call_used_regs[]; \
485: extern int current_function_pretend_args_size; \
486: int fsize = ((SIZE) + 7) & ~7; \
487: int nregs, i, fp_used = 0; \
488: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
489: { \
490: if (regs_ever_live[i] && ! call_used_regs[i]) \
491: nregs++; \
492: if (regs_ever_live[i]) fp_used = 1; \
493: } \
494: if (fp_used) fsize += 8; \
495: fprintf (FILE, "0:\trd_special r24,pc\n"); \
496: fprintf (FILE, "\tand r24,r24,$~0x3\n"); \
497: fprintf (FILE, "\tadd_nt r25,r4,$%d\n", \
498: - current_function_pretend_args_size); \
499: if (fsize + nregs != 0 || current_function_pretend_args_size > 0)\
500: { \
501: int n = - fsize - nregs * 16; \
502: if (n >= -8192) \
503: fprintf (FILE, "\tadd_nt r4,r25,$%d\n", n); \
504: else \
505: { \
506: fprintf (FILE, "\tadd_nt r4,r25,$-8192\n"); \
507: n += 8192; \
508: while (n < -8192) \
509: fprintf (FILE, "\tadd_nt r4,r4,$-8192\n"), n += 8192; \
510: if (n != 0) \
511: fprintf (FILE, "\tadd_nt r4,r4,$%d\n", n); \
512: } \
513: } \
514: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
515: if (regs_ever_live[i] && ! call_used_regs[i]) \
516: { \
517: fprintf (FILE, "\tst_ext1 %s,r4,$%d\n", \
518: reg_names[i], 8 * nregs++); \
519: fprintf (FILE, "\tst_ext2 %s,r4,$%d\n", \
520: reg_names[i], 8 * nregs++); \
521: } \
522: }
523:
524: /* Output assembler code to FILE to increment profiler label # LABELNO
525: for profiling a function entry. */
526:
527: #define FUNCTION_PROFILER(FILE, LABELNO) \
528: abort ();
529:
530: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
531: the stack pointer does not matter. The value is tested only in
532: functions that have frame pointers.
533: No definition is equivalent to always zero. */
534:
535: extern int current_function_calls_alloca;
536: extern int current_function_pretend_args_size;
537:
538: #define EXIT_IGNORE_STACK \
539: (get_frame_size () != 0 \
540: || current_function_calls_alloca || current_function_pretend_args_size)
541:
542: /* This macro generates the assembly code for function exit,
543: on machines that need it. If FUNCTION_EPILOGUE is not defined
544: then individual return instructions are generated for each
545: return statement. Args are same as for FUNCTION_PROLOGUE.
546:
547: The function epilogue should not depend on the current stack pointer!
548: It should use the frame pointer only. This is mandatory because
549: of alloca; we also take advantage of it to omit stack adjustments
550: before returning. */
551:
552: #define FUNCTION_EPILOGUE(FILE, SIZE) \
553: { \
554: extern char call_used_regs[]; \
555: extern int current_function_calls_alloca; \
556: extern int current_function_pretend_args_size; \
557: int fsize = ((SIZE) + 7) & ~7; \
558: int nregs, i, fp_used = 0; \
559: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
560: { \
561: if (regs_ever_live[i] && ! call_used_regs[i]) \
562: nregs++; \
563: if (regs_ever_live[i]) fp_used = 1; \
564: } \
565: if (fp_used) fsize += 8; \
566: if (nregs != 0) \
567: { \
568: fprintf (FILE, "\tadd_nt r4,r25,$%d\n", - fsize - nregs * 16); \
569: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
570: if (regs_ever_live[i] && ! call_used_regs[i]) \
571: { \
572: fprintf (FILE, "\tld_ext1 %s,r4,$%d\n\tnop\n", \
573: reg_names[i], 8 * nregs++); \
574: fprintf (FILE, "\tld_ext2 %s,r4,$%d\n\tnop\n", \
575: reg_names[i], 8 * nregs++); \
576: } \
577: } \
578: if (fsize != 0 || nregs != 0 || current_function_calls_alloca \
579: || current_function_pretend_args_size > 0) \
580: fprintf (FILE, "\tadd_nt r4,r25,$%d\n", \
581: current_function_pretend_args_size); \
582: fprintf (FILE, "\treturn r10,$8\n\tnop\n"); \
583: }
584:
585: /* Addressing modes, and classification of registers for them. */
586:
587: /* #define HAVE_POST_INCREMENT */
588: /* #define HAVE_POST_DECREMENT */
589:
590: /* #define HAVE_PRE_DECREMENT */
591: /* #define HAVE_PRE_INCREMENT */
592:
593: /* Macros to check register numbers against specific register classes. */
594:
595: /* These assume that REGNO is a hard or pseudo reg number.
596: They give nonzero only if REGNO is a hard reg of the suitable class
597: or a pseudo reg currently allocated to a suitable hard reg.
598: Since they use reg_renumber, they are safe only once reg_renumber
599: has been allocated, which happens in local-alloc.c. */
600:
601: #define REGNO_OK_FOR_INDEX_P(REGNO) \
602: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
603: #define REGNO_OK_FOR_BASE_P(REGNO) \
604: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
605: #define REGNO_OK_FOR_FP_P(REGNO) \
606: (((REGNO) ^ 0x20) < 14 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 14)
607:
608: /* Now macros that check whether X is a register and also,
609: strictly, whether it is in a specified class.
610:
611: These macros are specific to the SPUR, and may be used only
612: in code for printing assembler insns and in conditions for
613: define_optimization. */
614:
615: /* 1 if X is an fp register. */
616:
617: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
618:
619: /* Maximum number of registers that can appear in a valid memory address. */
620:
621: #define MAX_REGS_PER_ADDRESS 2
622:
623: /* Recognize any constant value that is a valid address. */
624:
625: #define CONSTANT_ADDRESS_P(X) \
626: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
627: || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
628: || GET_CODE (X) == HIGH)
629:
630: /* Nonzero if the constant value X is a legitimate general operand.
631: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
632:
633: #define LEGITIMATE_CONSTANT_P(X) \
634: ((GET_CODE (X) == CONST_INT \
635: && (unsigned) (INTVAL (X) + 0x2000) < 0x4000)\
636: || (GET_CODE (X) == SYMBOL_REF && (X)->unchanging))
637:
638: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
639: and check its validity for a certain class.
640: We have two alternate definitions for each of them.
641: The usual definition accepts all pseudo regs; the other rejects
642: them unless they have been allocated suitable hard regs.
643: The symbol REG_OK_STRICT causes the latter definition to be used.
644:
645: Most source files want to accept pseudo regs in the hope that
646: they will get allocated to the class that the insn wants them to be in.
647: Source files for reload pass need to be strict.
648: After reload, it makes no difference, since pseudo regs have
649: been eliminated by then. */
650:
651: #ifndef REG_OK_STRICT
652:
653: /* Nonzero if X is a hard reg that can be used as an index
654: or if it is a pseudo reg. */
655: #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
656: /* Nonzero if X is a hard reg that can be used as a base reg
657: or if it is a pseudo reg. */
658: #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
659:
660: #else
661:
662: /* Nonzero if X is a hard reg that can be used as an index. */
663: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
664: /* Nonzero if X is a hard reg that can be used as a base reg. */
665: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
666:
667: #endif
668:
669: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
670: that is a valid memory address for an instruction.
671: The MODE argument is the machine mode for the MEM expression
672: that wants to use this address.
673:
674: On SPUR, the actual legitimate addresses must be REG+SMALLINT or REG+REG.
675: Actually, REG+REG is not legitimate for stores, so
676: it is obtained only by combination on loads.
677: We can treat a SYMBOL_REF as legitimate if it is part of this
678: function's constant-pool, because such addresses can actually
679: be output as REG+SMALLINT. */
680:
681: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
682: { if (GET_CODE (X) == REG \
683: && REG_OK_FOR_BASE_P (X)) \
684: goto ADDR; \
685: if (GET_CODE (X) == SYMBOL_REF && (X)->unchanging) \
686: goto ADDR; \
687: if (GET_CODE (X) == PLUS \
688: && GET_CODE (XEXP (X, 0)) == REG \
689: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
690: { \
691: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
692: && INTVAL (XEXP (X, 1)) >= -0x2000 \
693: && INTVAL (XEXP (X, 1)) < 0x2000) \
694: goto ADDR; \
695: } \
696: }
697:
698: /* Try machine-dependent ways of modifying an illegitimate address
699: to be legitimate. If we find one, return the new, valid address.
700: This macro is used in only one place: `memory_address' in explow.c.
701:
702: OLDX is the address as it was before break_out_memory_refs was called.
703: In some cases it is useful to look at this to decide what needs to be done.
704:
705: MODE and WIN are passed so that this macro can use
706: GO_IF_LEGITIMATE_ADDRESS.
707:
708: It is always safe for this macro to do nothing. It exists to recognize
709: opportunities to optimize the output. */
710:
711: /* On SPUR, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
712:
713: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
714: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
715: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
716: copy_to_mode_reg (SImode, XEXP (X, 1))); \
717: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
718: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
719: copy_to_mode_reg (SImode, XEXP (X, 0))); \
720: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
721: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
722: force_operand (XEXP (X, 0), 0)); \
723: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
724: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
725: force_operand (XEXP (X, 1), 0)); \
726: if (memory_address_p (MODE, X)) \
727: goto WIN; }
728:
729: /* Go to LABEL if ADDR (a legitimate address expression)
730: has an effect that depends on the machine mode it is used for.
731: On the SPUR this is never true. */
732:
733: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
734:
735: /* Specify the machine mode that this machine uses
736: for the index in the tablejump instruction. */
737: #define CASE_VECTOR_MODE SImode
738:
739: /* Define this if the tablejump instruction expects the table
740: to contain offsets from the address of the table.
741: Do not define this if the table should contain absolute addresses. */
742: /* #define CASE_VECTOR_PC_RELATIVE */
743:
744: /* Specify the tree operation to be used to convert reals to integers. */
745: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
746:
747: /* This is the kind of divide that is easiest to do in the general case. */
748: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
749:
750: /* Define this as 1 if `char' should by default be signed; else as 0. */
751: #define DEFAULT_SIGNED_CHAR 0
752:
753: /* Max number of bytes we can move from memory to memory
754: in one reasonably fast instruction. */
755: #define MOVE_MAX 4
756:
757: /* Nonzero if access to memory by bytes is slow and undesirable. */
758: #define SLOW_BYTE_ACCESS 1
759:
760: /* This is BSD, so it wants DBX format. */
761: #define DBX_DEBUGGING_INFO
762:
763: /* Do not break .stabs pseudos into continuations. */
764: #define DBX_CONTIN_LENGTH 0
765:
766: /* Don't try to use the `x' type-cross-reference character in DBX data.
767: Also has the consequence of putting each struct, union or enum
768: into a separate .stabs, containing only cross-refs to the others. */
769: #define DBX_NO_XREFS
770:
771: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
772: is done just by pretending it is already truncated. */
773: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
774:
775: /* Specify the machine mode that pointers have.
776: After generation of rtl, the compiler makes no further distinction
777: between pointers and any other objects of this machine mode. */
778: #define Pmode SImode
779:
780: /* A function address in a call instruction
781: is a byte address (for indexing purposes)
782: so give the MEM rtx a byte's mode. */
783: #define FUNCTION_MODE SImode
784:
785: /* Define this if addresses of constant functions
786: shouldn't be put through pseudo regs where they can be cse'd.
787: Desirable on machines where ordinary constants are expensive
788: but a CALL with constant address is cheap. */
789: #define NO_FUNCTION_CSE
790:
791: /* Compute the cost of computing a constant rtl expression RTX
792: whose rtx-code is CODE. The body of this macro is a portion
793: of a switch statement. If the code is computed here,
794: return it with a return statement. Otherwise, break from the switch. */
795:
796: #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
797: case CONST_INT: \
798: if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) return 1; \
799: case CONST: \
800: case LABEL_REF: \
801: case SYMBOL_REF: \
802: return 2; \
803: case CONST_DOUBLE: \
804: return 4;
805:
806: /* Tell final.c how to eliminate redundant test instructions. */
807:
808: /* Here we define machine-dependent flags and fields in cc_status
809: (see `conditions.h'). */
810:
811: /* (None are needed on SPUR.) */
812:
813: /* Store in cc_status the expressions
814: that the condition codes will describe
815: after execution of an instruction whose pattern is EXP.
816: Do not alter them if the instruction would not alter the cc's. */
817:
818: /* The SPUR does not really have a condition code. */
819:
820: #define NOTICE_UPDATE_CC(EXP, INSN) \
821: { CC_STATUS_INIT; }
822:
823: /* Control the assembler format that we output. */
824:
825: /* Output at beginning of assembler file. */
826:
827: #define ASM_FILE_START(FILE)
828:
829: /* Output to assembler file text saying following lines
830: may contain character constants, extra white space, comments, etc. */
831:
832: #define ASM_APP_ON ""
833:
834: /* Output to assembler file text saying following lines
835: no longer contain unusual constructs. */
836:
837: #define ASM_APP_OFF ""
838:
839: /* Output before read-only data. */
840:
841: #define TEXT_SECTION_ASM_OP ".text"
842:
843: /* Output before writable data. */
844:
845: #define DATA_SECTION_ASM_OP ".data"
846:
847: /* How to refer to registers in assembler output.
848: This sequence is indexed by compiler's hard-register-number (see above). */
849:
850: #define REGISTER_NAMES \
851: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
852: "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
853: "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
854: "r30", "r31", \
855: "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
856: "f10", "f11", "f12", "f13", "f14" }
857:
858: /* How to renumber registers for dbx and gdb. */
859:
860: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
861:
862: /* This is how to output the definition of a user-level label named NAME,
863: such as the label on a static function or variable NAME. */
864:
865: #define ASM_OUTPUT_LABEL(FILE,NAME) \
866: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
867:
868: /* This is how to output a command to make the user-level label named NAME
869: defined for reference from other files. */
870:
871: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
872: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
873:
874: /* This is how to output a reference to a user-level label named NAME.
875: `assemble_name' uses this. */
876:
877: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
878: fprintf (FILE, "_%s", NAME)
879:
880: /* This is how to output an internal numbered label where
881: PREFIX is the class of label and NUM is the number within the class. */
882:
883: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
884: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
885:
886: /* This is how to store into the string LABEL
887: the symbol_ref name of an internal numbered label where
888: PREFIX is the class of label and NUM is the number within the class.
889: This is suitable for output with `assemble_name'. */
890:
891: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
892: sprintf (LABEL, "*%s%d", PREFIX, NUM)
893:
894: /* This is how to output an assembler line defining a `double' constant. */
895:
896: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
897: fprintf (FILE, "\t.double %.20e\n", (VALUE))
898:
899: /* This is how to output an assembler line defining a `float' constant. */
900:
901: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
902: fprintf (FILE, "\t.single %.12e\n", (VALUE))
903:
904: /* This is how to output an assembler line defining an `int' constant. */
905:
906: #define ASM_OUTPUT_INT(FILE,VALUE) \
907: ( fprintf (FILE, "\t.long "), \
908: output_addr_const (FILE, (VALUE)), \
909: fprintf (FILE, "\n"))
910:
911: /* Likewise for `char' and `short' constants. */
912:
913: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
914: ( fprintf (FILE, "\t.word "), \
915: output_addr_const (FILE, (VALUE)), \
916: fprintf (FILE, "\n"))
917:
918: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
919: ( fprintf (FILE, "\t.byte "), \
920: output_addr_const (FILE, (VALUE)), \
921: fprintf (FILE, "\n"))
922:
923: /* This is how to output an assembler line for a numeric constant byte. */
924:
925: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
926: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
927:
928: /* This is how to output code to push a register on the stack.
929: It need not be very fast code. */
930:
931: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
932: fprintf (FILE, "\tadd_nt r4,r4,$-4\n\tst_32 %s,r4,$0\n", reg_names[REGNO])
933:
934: /* This is how to output an insn to pop a register from the stack.
935: It need not be very fast code. */
936:
937: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
938: fprintf (FILE, "\tld_32 %s,r4,$0\n\tadd_nt r4,r4,$4\n", reg_names[REGNO])
939:
940: /* This is how to output an element of a case-vector that is absolute. */
941:
942: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
943: fprintf (FILE, "\t.long L%d\n", VALUE)
944:
945: /* This is how to output an element of a case-vector that is relative.
946: (SPUR does not use such vectors,
947: but we must define this macro anyway.) */
948:
949: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
950: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
951:
952: /* This is how to output an assembler line
953: that says to advance the location counter
954: to a multiple of 2**LOG bytes. */
955:
956: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
957: if ((LOG) != 0) \
958: fprintf (FILE, "\t.align %d\n", (LOG))
959:
960: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
961: fprintf (FILE, "\t.space %u\n", (SIZE))
962:
963: /* This says how to output an assembler line
964: to define a global common symbol. */
965:
966: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
967: ( fputs (".comm ", (FILE)), \
968: assemble_name ((FILE), (NAME)), \
969: fprintf ((FILE), ",%u\n", (ROUNDED)))
970:
971: /* This says how to output an assembler line
972: to define a local common symbol. */
973:
974: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
975: ( fputs (".lcomm ", (FILE)), \
976: assemble_name ((FILE), (NAME)), \
977: fprintf ((FILE), ",%u\n", (ROUNDED)))
978:
979: /* Store in OUTPUT a string (made with alloca) containing
980: an assembler-name for a local static variable named NAME.
981: LABELNO is an integer which is different for each call. */
982:
983: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
984: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
985: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
986:
987: /* Define the parentheses used to group arithmetic operations
988: in assembler code. */
989:
990: #define ASM_OPEN_PAREN "("
991: #define ASM_CLOSE_PAREN ")"
992:
993: /* Define results of standard character escape sequences. */
994: #define TARGET_BELL 007
995: #define TARGET_BS 010
996: #define TARGET_TAB 011
997: #define TARGET_NEWLINE 012
998: #define TARGET_VT 013
999: #define TARGET_FF 014
1000: #define TARGET_CR 015
1001:
1002: /* Print operand X (an rtx) in assembler syntax to file FILE.
1003: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1004: For `%' followed by punctuation, CODE is the punctuation and X is null.
1005:
1006: On SPUR, the CODE can be `r', meaning this is a register-only operand
1007: and an immediate zero should be represented as `r0'. */
1008:
1009: #define PRINT_OPERAND(FILE, X, CODE) \
1010: { if (GET_CODE (X) == REG) \
1011: fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1012: else if (GET_CODE (X) == MEM) \
1013: output_address (XEXP (X, 0)); \
1014: else if (GET_CODE (X) == CONST_DOUBLE) \
1015: abort (); \
1016: else if ((CODE) == 'r' && (X) == const0_rtx) \
1017: fprintf (FILE, "r0"); \
1018: else { putc ('$', FILE); output_addr_const (FILE, X); }}
1019:
1020: /* Print a memory address as an operand to reference that memory location. */
1021:
1022: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1023: { register rtx base, index = 0; \
1024: int offset = 0; \
1025: register rtx addr = ADDR; \
1026: if (GET_CODE (addr) == REG) \
1027: { \
1028: fprintf (FILE, "%s,$0", reg_names[REGNO (addr)]); \
1029: } \
1030: else if (GET_CODE (addr) == PLUS) \
1031: { \
1032: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1033: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1034: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1035: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1036: else \
1037: base = XEXP (addr, 0), index = XEXP (addr, 1); \
1038: fprintf (FILE, "%s,", reg_names[REGNO (base)]); \
1039: if (index == 0) \
1040: fprintf (FILE, "$%d", offset); \
1041: else \
1042: fprintf (FILE, "%s,", reg_names[REGNO (index)]); \
1043: } \
1044: else \
1045: { \
1046: fprintf (FILE, "r24,$("); \
1047: output_addr_const (FILE, addr); \
1048: fprintf (FILE, "-0b)"); \
1049: } \
1050: }
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