Return to we32k.c CVS log

Up to [Apple XNU] / GNUtools / cc / config / we32k

Annotation of GNUtools/cc/config/we32k/we32k.c, revision 1.1

1.1     ! root        1: /* Subroutines for insn-output.c for AT&T we32000 Family.
        !             2:    Contributed by John Wehle ([email protected])
        !             3:    Copyright (C) 1991-1992 Free Software Foundation, Inc.
        !             4: 
        !             5: This file is part of GNU CC.
        !             6: 
        !             7: GNU CC is free software; you can redistribute it and/or modify
        !             8: it under the terms of the GNU General Public License as published by
        !             9: the Free Software Foundation; either version 1, or (at your option)
        !            10: any later version.
        !            11: 
        !            12: GNU CC is distributed in the hope that it will be useful,
        !            13: but WITHOUT ANY WARRANTY; without even the implied warranty of
        !            14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
        !            15: GNU General Public License for more details.
        !            16: 
        !            17: You should have received a copy of the GNU General Public License
        !            18: along with GNU CC; see the file COPYING.  If not, write to
        !            19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
        !            20: 
        !            21: 
        !            22: #include <stdio.h>
        !            23: #include "config.h"
        !            24: #include "rtl.h"
        !            25: #include "real.h"
        !            26: 
        !            27: 
        !            28: void
        !            29: output_move_double (operands)
        !            30:      rtx *operands;
        !            31: {
        !            32:   rtx lsw_operands[2];
        !            33:   rtx lsw_sreg = NULL;
        !            34:   rtx msw_dreg = NULL;
        !            35: 
        !            36:   if (GET_CODE (operands[0]) == REG) 
        !            37:     {
        !            38:       lsw_operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
        !            39:       msw_dreg = operands[0];
        !            40:     }
        !            41:   else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
        !            42:     lsw_operands[0] = adj_offsettable_operand (operands[0], 4);
        !            43:   else
        !            44:     abort ();
        !            45: 
        !            46:   if (GET_CODE (operands[1]) == REG) 
        !            47:     {
        !            48:       lsw_operands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
        !            49:       lsw_sreg = lsw_operands[1];
        !            50:     }
        !            51:   else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1])) 
        !            52:     {
        !            53:       lsw_operands[1] = adj_offsettable_operand (operands[1], 4);
        !            54:       lsw_sreg = operands[1];
        !            55:       for ( ; ; ) 
        !            56:        {
        !            57:          if (REG_P (lsw_sreg))
        !            58:            break;
        !            59:          if (CONSTANT_ADDRESS_P (lsw_sreg)) 
        !            60:            {
        !            61:              lsw_sreg = NULL;
        !            62:              break;
        !            63:            }
        !            64:          if (GET_CODE (lsw_sreg) == MEM) 
        !            65:            {
        !            66:              lsw_sreg = XEXP (lsw_sreg, 0);
        !            67:              continue;
        !            68:            }
        !            69:          if (GET_CODE (lsw_sreg) == PLUS)
        !            70:            {
        !            71:              if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 1))) 
        !            72:                {
        !            73:                  lsw_sreg = XEXP (lsw_sreg, 0);
        !            74:                  continue;
        !            75:                }
        !            76:              else if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 0))) 
        !            77:                {
        !            78:                  lsw_sreg = XEXP (lsw_sreg, 1);
        !            79:                  continue;
        !            80:                }
        !            81:            }
        !            82:          abort ();
        !            83:        }
        !            84:     }
        !            85:   else if (GET_CODE (operands[1]) == CONST_DOUBLE)
        !            86:     {
        !            87:       lsw_operands[1] = gen_rtx (CONST_INT, SImode,
        !            88:                                 CONST_DOUBLE_HIGH (operands[1]));
        !            89:       operands[1] = gen_rtx (CONST_INT, SImode,
        !            90:                             CONST_DOUBLE_LOW (operands[1]));
        !            91:     }
        !            92:   else if (GET_CODE (operands[1]) == CONST_INT)
        !            93:     {
        !            94:       lsw_operands[1] = operands[1];
        !            95:       operands[1] = const0_rtx;
        !            96:     }
        !            97:   else
        !            98:     abort ();
        !            99: 
        !           100:   if (!msw_dreg || !lsw_sreg || REGNO (msw_dreg) != REGNO (lsw_sreg)) 
        !           101:     {
        !           102:       output_asm_insn ("movw %1, %0", operands);
        !           103:       output_asm_insn ("movw %1, %0", lsw_operands);
        !           104:     }
        !           105:   else 
        !           106:     {
        !           107:       output_asm_insn ("movw %1, %0", lsw_operands);
        !           108:       output_asm_insn ("movw %1, %0", operands);
        !           109:     }
        !           110: }
        !           111: 
        !           112: void
        !           113: output_push_double (operands)
        !           114:      rtx *operands;
        !           115: {
        !           116:   rtx lsw_operands[1];
        !           117: 
        !           118:   if (GET_CODE (operands[0]) == REG)
        !           119:     lsw_operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
        !           120:   else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
        !           121:     lsw_operands[0] = adj_offsettable_operand (operands[0], 4);
        !           122:   else if (GET_CODE (operands[0]) == CONST_DOUBLE)
        !           123:     {
        !           124:       lsw_operands[0] = gen_rtx (CONST_INT, SImode,
        !           125:                                 CONST_DOUBLE_HIGH (operands[0]));
        !           126:       operands[0] = gen_rtx (CONST_INT, SImode,
        !           127:                             CONST_DOUBLE_LOW (operands[0]));
        !           128:     }
        !           129:   else if (GET_CODE (operands[0]) == CONST_INT)
        !           130:     { 
        !           131:       lsw_operands[0] = operands[0];
        !           132:       operands[0] = const0_rtx;
        !           133:     }
        !           134:   else
        !           135:     abort ();
        !           136: 
        !           137:   output_asm_insn ("pushw %0", operands);
        !           138:   output_asm_insn ("pushw %0", lsw_operands);
        !           139: }

This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.