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1.1 ! root 1: /* Compute register class preferences for pseudo-registers. ! 2: Copyright (C) 1987, 1988, 1991, 1992, 1993 Free Software Foundation, Inc. ! 3: ! 4: This file is part of GNU CC. ! 5: ! 6: GNU CC is free software; you can redistribute it and/or modify ! 7: it under the terms of the GNU General Public License as published by ! 8: the Free Software Foundation; either version 2, or (at your option) ! 9: any later version. ! 10: ! 11: GNU CC is distributed in the hope that it will be useful, ! 12: but WITHOUT ANY WARRANTY; without even the implied warranty of ! 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ! 14: GNU General Public License for more details. ! 15: ! 16: You should have received a copy of the GNU General Public License ! 17: along with GNU CC; see the file COPYING. If not, write to ! 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ ! 19: ! 20: ! 21: /* This file contains two passes of the compiler: reg_scan and reg_class. ! 22: It also defines some tables of information about the hardware registers ! 23: and a function init_reg_sets to initialize the tables. */ ! 24: ! 25: #include "config.h" ! 26: #include "rtl.h" ! 27: #include "hard-reg-set.h" ! 28: #include "flags.h" ! 29: #include "basic-block.h" ! 30: #include "regs.h" ! 31: #include "insn-config.h" ! 32: #include "recog.h" ! 33: #include "reload.h" ! 34: #include "real.h" ! 35: #include "bytecode.h" ! 36: ! 37: #ifndef REGISTER_MOVE_COST ! 38: #define REGISTER_MOVE_COST(x, y) 2 ! 39: #endif ! 40: ! 41: #ifndef MEMORY_MOVE_COST ! 42: #define MEMORY_MOVE_COST(x) 4 ! 43: #endif ! 44: ! 45: /* If we have auto-increment or auto-decrement and we can have secondary ! 46: reloads, we are not allowed to use classes requiring secondary ! 47: reloads for psuedos auto-incremented since reload can't handle it. */ ! 48: ! 49: #ifdef AUTO_INC_DEC ! 50: #if defined(SECONDARY_INPUT_RELOAD_CLASS) || defined(SECONDARY_OUTPUT_RELOAD_CLASS) ! 51: #define FORBIDDEN_INC_DEC_CLASSES ! 52: #endif ! 53: #endif ! 54: ! 55: /* Register tables used by many passes. */ ! 56: ! 57: /* Indexed by hard register number, contains 1 for registers ! 58: that are fixed use (stack pointer, pc, frame pointer, etc.). ! 59: These are the registers that cannot be used to allocate ! 60: a pseudo reg whose life does not cross calls. */ ! 61: ! 62: char fixed_regs[FIRST_PSEUDO_REGISTER]; ! 63: ! 64: /* Same info as a HARD_REG_SET. */ ! 65: ! 66: HARD_REG_SET fixed_reg_set; ! 67: ! 68: /* Data for initializing the above. */ ! 69: ! 70: static char initial_fixed_regs[] = FIXED_REGISTERS; ! 71: ! 72: /* Indexed by hard register number, contains 1 for registers ! 73: that are fixed use or are clobbered by function calls. ! 74: These are the registers that cannot be used to allocate ! 75: a pseudo reg whose life crosses calls. */ ! 76: ! 77: char call_used_regs[FIRST_PSEUDO_REGISTER]; ! 78: ! 79: /* Same info as a HARD_REG_SET. */ ! 80: ! 81: HARD_REG_SET call_used_reg_set; ! 82: ! 83: /* Data for initializing the above. */ ! 84: ! 85: static char initial_call_used_regs[] = CALL_USED_REGISTERS; ! 86: ! 87: /* Indexed by hard register number, contains 1 for registers that are ! 88: fixed use -- i.e. in fixed_regs -- or a function value return register ! 89: or STRUCT_VALUE_REGNUM or STATIC_CHAIN_REGNUM. These are the ! 90: registers that cannot hold quantities across calls even if we are ! 91: willing to save and restore them. */ ! 92: ! 93: char call_fixed_regs[FIRST_PSEUDO_REGISTER]; ! 94: ! 95: /* The same info as a HARD_REG_SET. */ ! 96: ! 97: HARD_REG_SET call_fixed_reg_set; ! 98: ! 99: /* Number of non-fixed registers. */ ! 100: ! 101: int n_non_fixed_regs; ! 102: ! 103: /* Indexed by hard register number, contains 1 for registers ! 104: that are being used for global register decls. ! 105: These must be exempt from ordinary flow analysis ! 106: and are also considered fixed. */ ! 107: ! 108: char global_regs[FIRST_PSEUDO_REGISTER]; ! 109: ! 110: /* Table of register numbers in the order in which to try to use them. */ ! 111: #ifdef REG_ALLOC_ORDER ! 112: int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER; ! 113: #endif ! 114: ! 115: /* For each reg class, a HARD_REG_SET saying which registers are in it. */ ! 116: ! 117: HARD_REG_SET reg_class_contents[N_REG_CLASSES]; ! 118: ! 119: /* The same information, but as an array of unsigned ints. We copy from ! 120: these unsigned ints to the table above. We do this so the tm.h files ! 121: do not have to be aware of the wordsize for machines with <= 64 regs. */ ! 122: ! 123: #define N_REG_INTS \ ! 124: ((FIRST_PSEUDO_REGISTER + (HOST_BITS_PER_INT - 1)) / HOST_BITS_PER_INT) ! 125: ! 126: static unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS] ! 127: = REG_CLASS_CONTENTS; ! 128: ! 129: /* For each reg class, number of regs it contains. */ ! 130: ! 131: int reg_class_size[N_REG_CLASSES]; ! 132: ! 133: /* For each reg class, table listing all the containing classes. */ ! 134: ! 135: enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES]; ! 136: ! 137: /* For each reg class, table listing all the classes contained in it. */ ! 138: ! 139: enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES]; ! 140: ! 141: /* For each pair of reg classes, ! 142: a largest reg class contained in their union. */ ! 143: ! 144: enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES]; ! 145: ! 146: /* For each pair of reg classes, ! 147: the smallest reg class containing their union. */ ! 148: ! 149: enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES]; ! 150: ! 151: /* Array containing all of the register names */ ! 152: ! 153: char *reg_names[] = REGISTER_NAMES; ! 154: ! 155: /* Indexed by n, gives number of times (REG n) is set or clobbered. ! 156: This information remains valid for the rest of the compilation ! 157: of the current function; it is used to control register allocation. ! 158: ! 159: This information applies to both hard registers and pseudo registers, ! 160: unlike much of the information above. */ ! 161: ! 162: short *reg_n_sets; ! 163: ! 164: /* Maximum cost of moving from a register in one class to a register in ! 165: another class. Based on REGISTER_MOVE_COST. */ ! 166: ! 167: static int move_cost[N_REG_CLASSES][N_REG_CLASSES]; ! 168: ! 169: /* Similar, but here we don't have to move if the first index is a subset ! 170: of the second so in that case the cost is zero. */ ! 171: ! 172: static int may_move_cost[N_REG_CLASSES][N_REG_CLASSES]; ! 173: ! 174: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 175: ! 176: /* These are the classes that regs which are auto-incremented or decremented ! 177: cannot be put in. */ ! 178: ! 179: static int forbidden_inc_dec_class[N_REG_CLASSES]; ! 180: ! 181: /* Indexed by n, is non-zero if (REG n) is used in an auto-inc or auto-dec ! 182: context. */ ! 183: ! 184: static char *in_inc_dec; ! 185: ! 186: #endif /* FORBIDDEN_INC_DEC_CLASSES */ ! 187: ! 188: /* Function called only once to initialize the above data on reg usage. ! 189: Once this is done, various switches may override. */ ! 190: ! 191: void ! 192: init_reg_sets () ! 193: { ! 194: register int i, j; ! 195: ! 196: /* First copy the register information from the initial int form into ! 197: the regsets. */ ! 198: ! 199: for (i = 0; i < N_REG_CLASSES; i++) ! 200: { ! 201: CLEAR_HARD_REG_SET (reg_class_contents[i]); ! 202: ! 203: for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) ! 204: if (int_reg_class_contents[i][j / HOST_BITS_PER_INT] ! 205: & ((unsigned) 1 << (j % HOST_BITS_PER_INT))) ! 206: SET_HARD_REG_BIT (reg_class_contents[i], j); ! 207: } ! 208: ! 209: bcopy (initial_fixed_regs, fixed_regs, sizeof fixed_regs); ! 210: bcopy (initial_call_used_regs, call_used_regs, sizeof call_used_regs); ! 211: bzero (global_regs, sizeof global_regs); ! 212: ! 213: /* Compute number of hard regs in each class. */ ! 214: ! 215: bzero (reg_class_size, sizeof reg_class_size); ! 216: for (i = 0; i < N_REG_CLASSES; i++) ! 217: for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) ! 218: if (TEST_HARD_REG_BIT (reg_class_contents[i], j)) ! 219: reg_class_size[i]++; ! 220: ! 221: /* Initialize the table of subunions. ! 222: reg_class_subunion[I][J] gets the largest-numbered reg-class ! 223: that is contained in the union of classes I and J. */ ! 224: ! 225: for (i = 0; i < N_REG_CLASSES; i++) ! 226: { ! 227: for (j = 0; j < N_REG_CLASSES; j++) ! 228: { ! 229: #ifdef HARD_REG_SET ! 230: register /* Declare it register if it's a scalar. */ ! 231: #endif ! 232: HARD_REG_SET c; ! 233: register int k; ! 234: ! 235: COPY_HARD_REG_SET (c, reg_class_contents[i]); ! 236: IOR_HARD_REG_SET (c, reg_class_contents[j]); ! 237: for (k = 0; k < N_REG_CLASSES; k++) ! 238: { ! 239: GO_IF_HARD_REG_SUBSET (reg_class_contents[k], c, ! 240: subclass1); ! 241: continue; ! 242: ! 243: subclass1: ! 244: /* keep the largest subclass */ /* SPEE 900308 */ ! 245: GO_IF_HARD_REG_SUBSET (reg_class_contents[k], ! 246: reg_class_contents[(int) reg_class_subunion[i][j]], ! 247: subclass2); ! 248: reg_class_subunion[i][j] = (enum reg_class) k; ! 249: subclass2: ! 250: ; ! 251: } ! 252: } ! 253: } ! 254: ! 255: /* Initialize the table of superunions. ! 256: reg_class_superunion[I][J] gets the smallest-numbered reg-class ! 257: containing the union of classes I and J. */ ! 258: ! 259: for (i = 0; i < N_REG_CLASSES; i++) ! 260: { ! 261: for (j = 0; j < N_REG_CLASSES; j++) ! 262: { ! 263: #ifdef HARD_REG_SET ! 264: register /* Declare it register if it's a scalar. */ ! 265: #endif ! 266: HARD_REG_SET c; ! 267: register int k; ! 268: ! 269: COPY_HARD_REG_SET (c, reg_class_contents[i]); ! 270: IOR_HARD_REG_SET (c, reg_class_contents[j]); ! 271: for (k = 0; k < N_REG_CLASSES; k++) ! 272: GO_IF_HARD_REG_SUBSET (c, reg_class_contents[k], superclass); ! 273: ! 274: superclass: ! 275: reg_class_superunion[i][j] = (enum reg_class) k; ! 276: } ! 277: } ! 278: ! 279: /* Initialize the tables of subclasses and superclasses of each reg class. ! 280: First clear the whole table, then add the elements as they are found. */ ! 281: ! 282: for (i = 0; i < N_REG_CLASSES; i++) ! 283: { ! 284: for (j = 0; j < N_REG_CLASSES; j++) ! 285: { ! 286: reg_class_superclasses[i][j] = LIM_REG_CLASSES; ! 287: reg_class_subclasses[i][j] = LIM_REG_CLASSES; ! 288: } ! 289: } ! 290: ! 291: for (i = 0; i < N_REG_CLASSES; i++) ! 292: { ! 293: if (i == (int) NO_REGS) ! 294: continue; ! 295: ! 296: for (j = i + 1; j < N_REG_CLASSES; j++) ! 297: { ! 298: enum reg_class *p; ! 299: ! 300: GO_IF_HARD_REG_SUBSET (reg_class_contents[i], reg_class_contents[j], ! 301: subclass); ! 302: continue; ! 303: subclass: ! 304: /* Reg class I is a subclass of J. ! 305: Add J to the table of superclasses of I. */ ! 306: p = ®_class_superclasses[i][0]; ! 307: while (*p != LIM_REG_CLASSES) p++; ! 308: *p = (enum reg_class) j; ! 309: /* Add I to the table of superclasses of J. */ ! 310: p = ®_class_subclasses[j][0]; ! 311: while (*p != LIM_REG_CLASSES) p++; ! 312: *p = (enum reg_class) i; ! 313: } ! 314: } ! 315: ! 316: /* Initialize the move cost table. Find every subset of each class ! 317: and take the maximum cost of moving any subset to any other. */ ! 318: ! 319: for (i = 0; i < N_REG_CLASSES; i++) ! 320: for (j = 0; j < N_REG_CLASSES; j++) ! 321: { ! 322: int cost = i == j ? 2 : REGISTER_MOVE_COST (i, j); ! 323: enum reg_class *p1, *p2; ! 324: ! 325: for (p2 = ®_class_subclasses[j][0]; *p2 != LIM_REG_CLASSES; p2++) ! 326: if (*p2 != i) ! 327: cost = MAX (cost, REGISTER_MOVE_COST (i, *p2)); ! 328: ! 329: for (p1 = ®_class_subclasses[i][0]; *p1 != LIM_REG_CLASSES; p1++) ! 330: { ! 331: if (*p1 != j) ! 332: cost = MAX (cost, REGISTER_MOVE_COST (*p1, j)); ! 333: ! 334: for (p2 = ®_class_subclasses[j][0]; ! 335: *p2 != LIM_REG_CLASSES; p2++) ! 336: if (*p1 != *p2) ! 337: cost = MAX (cost, REGISTER_MOVE_COST (*p1, *p2)); ! 338: } ! 339: ! 340: move_cost[i][j] = cost; ! 341: ! 342: if (reg_class_subset_p (i, j)) ! 343: cost = 0; ! 344: ! 345: may_move_cost[i][j] = cost; ! 346: } ! 347: } ! 348: ! 349: /* After switches have been processed, which perhaps alter ! 350: `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */ ! 351: ! 352: void ! 353: init_reg_sets_1 () ! 354: { ! 355: register int i; ! 356: ! 357: /* This macro allows the fixed or call-used registers ! 358: to depend on target flags. */ ! 359: ! 360: #ifdef CONDITIONAL_REGISTER_USAGE ! 361: CONDITIONAL_REGISTER_USAGE; ! 362: #endif ! 363: ! 364: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) ! 365: if (global_regs[i]) ! 366: { ! 367: if (call_used_regs[i] && ! fixed_regs[i]) ! 368: warning ("call-clobbered register used for global register variable"); ! 369: fixed_regs[i] = 1; ! 370: /* Prevent saving/restoring of this reg. */ ! 371: call_used_regs[i] = 1; ! 372: } ! 373: ! 374: /* Initialize "constant" tables. */ ! 375: ! 376: CLEAR_HARD_REG_SET (fixed_reg_set); ! 377: CLEAR_HARD_REG_SET (call_used_reg_set); ! 378: CLEAR_HARD_REG_SET (call_fixed_reg_set); ! 379: ! 380: bcopy (fixed_regs, call_fixed_regs, sizeof call_fixed_regs); ! 381: #ifdef STRUCT_VALUE_REGNUM ! 382: call_fixed_regs[STRUCT_VALUE_REGNUM] = 1; ! 383: #endif ! 384: #ifdef STATIC_CHAIN_REGNUM ! 385: call_fixed_regs[STATIC_CHAIN_REGNUM] = 1; ! 386: #endif ! 387: ! 388: n_non_fixed_regs = 0; ! 389: ! 390: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) ! 391: { ! 392: if (FUNCTION_VALUE_REGNO_P (i)) ! 393: call_fixed_regs[i] = 1; ! 394: if (fixed_regs[i]) ! 395: SET_HARD_REG_BIT (fixed_reg_set, i); ! 396: else ! 397: n_non_fixed_regs++; ! 398: ! 399: if (call_used_regs[i]) ! 400: SET_HARD_REG_BIT (call_used_reg_set, i); ! 401: if (call_fixed_regs[i]) ! 402: SET_HARD_REG_BIT (call_fixed_reg_set, i); ! 403: } ! 404: } ! 405: ! 406: /* Specify the usage characteristics of the register named NAME. ! 407: It should be a fixed register if FIXED and a ! 408: call-used register if CALL_USED. */ ! 409: ! 410: void ! 411: fix_register (name, fixed, call_used) ! 412: char *name; ! 413: int fixed, call_used; ! 414: { ! 415: int i; ! 416: ! 417: if (output_bytecode) ! 418: { ! 419: warning ("request to mark `%s' as %s ignored by bytecode compiler", ! 420: name, call_used ? "call-used" : "fixed"); ! 421: return; ! 422: } ! 423: ! 424: /* Decode the name and update the primary form of ! 425: the register info. */ ! 426: ! 427: if ((i = decode_reg_name (name)) >= 0) ! 428: { ! 429: fixed_regs[i] = fixed; ! 430: call_used_regs[i] = call_used; ! 431: } ! 432: else ! 433: { ! 434: warning ("unknown register name: %s", name); ! 435: } ! 436: } ! 437: ! 438: /* Now the data and code for the `regclass' pass, which happens ! 439: just before local-alloc. */ ! 440: ! 441: /* The `costs' struct records the cost of using a hard register of each class ! 442: and of using memory for each pseudo. We use this data to set up ! 443: register class preferences. */ ! 444: ! 445: struct costs ! 446: { ! 447: int cost[N_REG_CLASSES]; ! 448: int mem_cost; ! 449: }; ! 450: ! 451: /* Record the cost of each class for each pseudo. */ ! 452: ! 453: static struct costs *costs; ! 454: ! 455: /* Record the same data by operand number, accumulated for each alternative ! 456: in an insn. The contribution to a pseudo is that of the minimum-cost ! 457: alternative. */ ! 458: ! 459: static struct costs op_costs[MAX_RECOG_OPERANDS]; ! 460: ! 461: /* (enum reg_class) prefclass[R] is the preferred class for pseudo number R. ! 462: This is available after `regclass' is run. */ ! 463: ! 464: static char *prefclass; ! 465: ! 466: /* altclass[R] is a register class that we should use for allocating ! 467: pseudo number R if no register in the preferred class is available. ! 468: If no register in this class is available, memory is preferred. ! 469: ! 470: It might appear to be more general to have a bitmask of classes here, ! 471: but since it is recommended that there be a class corresponding to the ! 472: union of most major pair of classes, that generality is not required. ! 473: ! 474: This is available after `regclass' is run. */ ! 475: ! 476: static char *altclass; ! 477: ! 478: /* Record the depth of loops that we are in. */ ! 479: ! 480: static int loop_depth; ! 481: ! 482: /* Account for the fact that insns within a loop are executed very commonly, ! 483: but don't keep doing this as loops go too deep. */ ! 484: ! 485: static int loop_cost; ! 486: ! 487: static int copy_cost (); ! 488: static void record_reg_classes (); ! 489: static void record_address_regs (); ! 490: ! 491: ! 492: /* Return the reg_class in which pseudo reg number REGNO is best allocated. ! 493: This function is sometimes called before the info has been computed. ! 494: When that happens, just return GENERAL_REGS, which is innocuous. */ ! 495: ! 496: enum reg_class ! 497: reg_preferred_class (regno) ! 498: int regno; ! 499: { ! 500: if (prefclass == 0) ! 501: return GENERAL_REGS; ! 502: return (enum reg_class) prefclass[regno]; ! 503: } ! 504: ! 505: enum reg_class ! 506: reg_alternate_class (regno) ! 507: { ! 508: if (prefclass == 0) ! 509: return ALL_REGS; ! 510: ! 511: return (enum reg_class) altclass[regno]; ! 512: } ! 513: ! 514: /* This prevents dump_flow_info from losing if called ! 515: before regclass is run. */ ! 516: ! 517: void ! 518: regclass_init () ! 519: { ! 520: prefclass = 0; ! 521: } ! 522: ! 523: /* This is a pass of the compiler that scans all instructions ! 524: and calculates the preferred class for each pseudo-register. ! 525: This information can be accessed later by calling `reg_preferred_class'. ! 526: This pass comes just before local register allocation. */ ! 527: ! 528: void ! 529: regclass (f, nregs) ! 530: rtx f; ! 531: int nregs; ! 532: { ! 533: #ifdef REGISTER_CONSTRAINTS ! 534: register rtx insn; ! 535: register int i, j; ! 536: struct costs init_cost; ! 537: rtx set; ! 538: int pass; ! 539: ! 540: init_recog (); ! 541: ! 542: costs = (struct costs *) alloca (nregs * sizeof (struct costs)); ! 543: ! 544: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 545: ! 546: in_inc_dec = (char *) alloca (nregs); ! 547: ! 548: /* Initialize information about which register classes can be used for ! 549: pseudos that are auto-incremented or auto-decremented. It would ! 550: seem better to put this in init_reg_sets, but we need to be able ! 551: to allocate rtx, which we can't do that early. */ ! 552: ! 553: for (i = 0; i < N_REG_CLASSES; i++) ! 554: { ! 555: rtx r = gen_rtx (REG, VOIDmode, 0); ! 556: enum machine_mode m; ! 557: ! 558: for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) ! 559: if (TEST_HARD_REG_BIT (reg_class_contents[i], j)) ! 560: { ! 561: REGNO (r) = j; ! 562: ! 563: for (m = VOIDmode; (int) m < (int) MAX_MACHINE_MODE; ! 564: m = (enum machine_mode) ((int) m + 1)) ! 565: if (HARD_REGNO_MODE_OK (j, m)) ! 566: { ! 567: PUT_MODE (r, m); ! 568: if (0 ! 569: #ifdef SECONDARY_INPUT_RELOAD_CLASS ! 570: || (SECONDARY_INPUT_RELOAD_CLASS (BASE_REG_CLASS, m, r) ! 571: != NO_REGS) ! 572: #endif ! 573: #ifdef SECONDARY_OUTPUT_RELOAD_CLASS ! 574: || (SECONDARY_OUTPUT_RELOAD_CLASS (BASE_REG_CLASS, m, r) ! 575: != NO_REGS) ! 576: #endif ! 577: ) ! 578: forbidden_inc_dec_class[i] = 1; ! 579: } ! 580: } ! 581: } ! 582: #endif /* FORBIDDEN_INC_DEC_CLASSES */ ! 583: ! 584: init_cost.mem_cost = 10000; ! 585: for (i = 0; i < N_REG_CLASSES; i++) ! 586: init_cost.cost[i] = 10000; ! 587: ! 588: /* Normally we scan the insns once and determine the best class to use for ! 589: each register. However, if -fexpensive_optimizations are on, we do so ! 590: twice, the second time using the tentative best classes to guide the ! 591: selection. */ ! 592: ! 593: for (pass = 0; pass <= flag_expensive_optimizations; pass++) ! 594: { ! 595: /* Zero out our accumulation of the cost of each class for each reg. */ ! 596: ! 597: bzero (costs, nregs * sizeof (struct costs)); ! 598: ! 599: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 600: bzero (in_inc_dec, nregs); ! 601: #endif ! 602: ! 603: loop_depth = 0, loop_cost = 1; ! 604: ! 605: /* Scan the instructions and record each time it would ! 606: save code to put a certain register in a certain class. */ ! 607: ! 608: for (insn = f; insn; insn = NEXT_INSN (insn)) ! 609: { ! 610: char *constraints[MAX_RECOG_OPERANDS]; ! 611: enum machine_mode modes[MAX_RECOG_OPERANDS]; ! 612: int nalternatives; ! 613: int noperands; ! 614: ! 615: /* Show that an insn inside a loop is likely to be executed three ! 616: times more than insns outside a loop. This is much more aggressive ! 617: than the assumptions made elsewhere and is being tried as an ! 618: experiment. */ ! 619: ! 620: if (GET_CODE (insn) == NOTE ! 621: && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) ! 622: loop_depth++, loop_cost = 1 << (2 * MIN (loop_depth, 5)); ! 623: else if (GET_CODE (insn) == NOTE ! 624: && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) ! 625: loop_depth--, loop_cost = 1 << (2 * MIN (loop_depth, 5)); ! 626: ! 627: else if ((GET_CODE (insn) == INSN ! 628: && GET_CODE (PATTERN (insn)) != USE ! 629: && GET_CODE (PATTERN (insn)) != CLOBBER ! 630: && GET_CODE (PATTERN (insn)) != ASM_INPUT) ! 631: || (GET_CODE (insn) == JUMP_INSN ! 632: && GET_CODE (PATTERN (insn)) != ADDR_VEC ! 633: && GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) ! 634: || GET_CODE (insn) == CALL_INSN) ! 635: { ! 636: if (GET_CODE (insn) == INSN ! 637: && (noperands = asm_noperands (PATTERN (insn))) >= 0) ! 638: { ! 639: decode_asm_operands (PATTERN (insn), recog_operand, NULL_PTR, ! 640: constraints, modes); ! 641: nalternatives = (noperands == 0 ? 0 ! 642: : n_occurrences (',', constraints[0]) + 1); ! 643: } ! 644: else ! 645: { ! 646: int insn_code_number = recog_memoized (insn); ! 647: rtx note; ! 648: ! 649: set = single_set (insn); ! 650: insn_extract (insn); ! 651: ! 652: nalternatives = insn_n_alternatives[insn_code_number]; ! 653: noperands = insn_n_operands[insn_code_number]; ! 654: ! 655: /* If this insn loads a parameter from its stack slot, then ! 656: it represents a savings, rather than a cost, if the ! 657: parameter is stored in memory. Record this fact. */ ! 658: ! 659: if (set != 0 && GET_CODE (SET_DEST (set)) == REG ! 660: && GET_CODE (SET_SRC (set)) == MEM ! 661: && (note = find_reg_note (insn, REG_EQUIV, ! 662: NULL_RTX)) != 0 ! 663: && GET_CODE (XEXP (note, 0)) == MEM) ! 664: { ! 665: costs[REGNO (SET_DEST (set))].mem_cost ! 666: -= (MEMORY_MOVE_COST (GET_MODE (SET_DEST (set))) ! 667: * loop_cost); ! 668: record_address_regs (XEXP (SET_SRC (set), 0), ! 669: BASE_REG_CLASS, loop_cost * 2); ! 670: continue; ! 671: } ! 672: ! 673: /* Improve handling of two-address insns such as ! 674: (set X (ashift CONST Y)) where CONST must be made to ! 675: match X. Change it into two insns: (set X CONST) ! 676: (set X (ashift X Y)). If we left this for reloading, it ! 677: would probably get three insns because X and Y might go ! 678: in the same place. This prevents X and Y from receiving ! 679: the same hard reg. ! 680: ! 681: We can only do this if the modes of operands 0 and 1 ! 682: (which might not be the same) are tieable and we only need ! 683: do this during our first pass. */ ! 684: ! 685: if (pass == 0 && optimize ! 686: && noperands >= 3 ! 687: && insn_operand_constraint[insn_code_number][1][0] == '0' ! 688: && insn_operand_constraint[insn_code_number][1][1] == 0 ! 689: && CONSTANT_P (recog_operand[1]) ! 690: && ! rtx_equal_p (recog_operand[0], recog_operand[1]) ! 691: && ! rtx_equal_p (recog_operand[0], recog_operand[2]) ! 692: && GET_CODE (recog_operand[0]) == REG ! 693: && MODES_TIEABLE_P (GET_MODE (recog_operand[0]), ! 694: insn_operand_mode[insn_code_number][1])) ! 695: { ! 696: rtx previnsn = prev_real_insn (insn); ! 697: rtx dest ! 698: = gen_lowpart (insn_operand_mode[insn_code_number][1], ! 699: recog_operand[0]); ! 700: rtx newinsn ! 701: = emit_insn_before (gen_move_insn (dest, ! 702: recog_operand[1]), ! 703: insn); ! 704: ! 705: /* If this insn was the start of a basic block, ! 706: include the new insn in that block. ! 707: We need not check for code_label here; ! 708: while a basic block can start with a code_label, ! 709: INSN could not be at the beginning of that block. */ ! 710: if (previnsn == 0 || GET_CODE (previnsn) == JUMP_INSN) ! 711: { ! 712: int b; ! 713: for (b = 0; b < n_basic_blocks; b++) ! 714: if (insn == basic_block_head[b]) ! 715: basic_block_head[b] = newinsn; ! 716: } ! 717: ! 718: /* This makes one more setting of new insns's dest. */ ! 719: reg_n_sets[REGNO (recog_operand[0])]++; ! 720: ! 721: *recog_operand_loc[1] = recog_operand[0]; ! 722: for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--) ! 723: if (recog_dup_num[i] == 1) ! 724: *recog_dup_loc[i] = recog_operand[0]; ! 725: ! 726: insn = PREV_INSN (newinsn); ! 727: continue; ! 728: } ! 729: ! 730: for (i = 0; i < noperands; i++) ! 731: { ! 732: constraints[i] ! 733: = insn_operand_constraint[insn_code_number][i]; ! 734: modes[i] = insn_operand_mode[insn_code_number][i]; ! 735: } ! 736: } ! 737: ! 738: /* If we get here, we are set up to record the costs of all the ! 739: operands for this insn. Start by initializing the costs. ! 740: Then handle any address registers. Finally record the desired ! 741: classes for any pseudos, doing it twice if some pair of ! 742: operands are commutative. */ ! 743: ! 744: for (i = 0; i < noperands; i++) ! 745: { ! 746: op_costs[i] = init_cost; ! 747: ! 748: if (GET_CODE (recog_operand[i]) == SUBREG) ! 749: recog_operand[i] = SUBREG_REG (recog_operand[i]); ! 750: ! 751: if (GET_CODE (recog_operand[i]) == MEM) ! 752: record_address_regs (XEXP (recog_operand[i], 0), ! 753: BASE_REG_CLASS, loop_cost * 2); ! 754: else if (constraints[i][0] == 'p') ! 755: record_address_regs (recog_operand[i], ! 756: BASE_REG_CLASS, loop_cost * 2); ! 757: } ! 758: ! 759: /* Check for commutative in a separate loop so everything will ! 760: have been initialized. We must do this even if one operand ! 761: is a constant--see addsi3 in m68k.md. */ ! 762: ! 763: for (i = 0; i < noperands - 1; i++) ! 764: if (constraints[i][0] == '%') ! 765: { ! 766: char *xconstraints[MAX_RECOG_OPERANDS]; ! 767: int j; ! 768: ! 769: /* Handle commutative operands by swapping the constraints. ! 770: We assume the modes are the same. */ ! 771: ! 772: for (j = 0; j < noperands; j++) ! 773: xconstraints[j] = constraints[j]; ! 774: ! 775: xconstraints[i] = constraints[i+1]; ! 776: xconstraints[i+1] = constraints[i]; ! 777: record_reg_classes (nalternatives, noperands, ! 778: recog_operand, modes, xconstraints, ! 779: insn); ! 780: } ! 781: ! 782: record_reg_classes (nalternatives, noperands, recog_operand, ! 783: modes, constraints, insn); ! 784: ! 785: /* Now add the cost for each operand to the total costs for ! 786: its register. */ ! 787: ! 788: for (i = 0; i < noperands; i++) ! 789: if (GET_CODE (recog_operand[i]) == REG ! 790: && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER) ! 791: { ! 792: int regno = REGNO (recog_operand[i]); ! 793: struct costs *p = &costs[regno], *q = &op_costs[i]; ! 794: ! 795: p->mem_cost += q->mem_cost * loop_cost; ! 796: for (j = 0; j < N_REG_CLASSES; j++) ! 797: p->cost[j] += q->cost[j] * loop_cost; ! 798: } ! 799: } ! 800: } ! 801: ! 802: /* Now for each register look at how desirable each class is ! 803: and find which class is preferred. Store that in ! 804: `prefclass[REGNO]'. Record in `altclass[REGNO]' the largest register ! 805: class any of whose registers is better than memory. */ ! 806: ! 807: if (pass == 0) ! 808: { ! 809: prefclass = (char *) oballoc (nregs); ! 810: altclass = (char *) oballoc (nregs); ! 811: } ! 812: ! 813: for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++) ! 814: { ! 815: register int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1; ! 816: enum reg_class best = ALL_REGS, alt = NO_REGS; ! 817: /* This is an enum reg_class, but we call it an int ! 818: to save lots of casts. */ ! 819: register int class; ! 820: register struct costs *p = &costs[i]; ! 821: ! 822: for (class = (int) ALL_REGS - 1; class > 0; class--) ! 823: { ! 824: /* Ignore classes that are too small for this operand or ! 825: invalid for a operand that was auto-incremented. */ ! 826: if (CLASS_MAX_NREGS (class, PSEUDO_REGNO_MODE (i)) ! 827: > reg_class_size[class] ! 828: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 829: || (in_inc_dec[i] && forbidden_inc_dec_class[class]) ! 830: #endif ! 831: ) ! 832: ; ! 833: else if (p->cost[class] < best_cost) ! 834: { ! 835: best_cost = p->cost[class]; ! 836: best = (enum reg_class) class; ! 837: } ! 838: else if (p->cost[class] == best_cost) ! 839: best = reg_class_subunion[(int)best][class]; ! 840: } ! 841: ! 842: /* Record the alternate register class; i.e., a class for which ! 843: every register in it is better than using memory. If adding a ! 844: class would make a smaller class (i.e., no union of just those ! 845: classes exists), skip that class. The major unions of classes ! 846: should be provided as a register class. Don't do this if we ! 847: will be doing it again later. */ ! 848: ! 849: if (pass == 1 || ! flag_expensive_optimizations) ! 850: for (class = 0; class < N_REG_CLASSES; class++) ! 851: if (p->cost[class] < p->mem_cost ! 852: && (reg_class_size[(int) reg_class_subunion[(int) alt][class]] ! 853: > reg_class_size[(int) alt]) ! 854: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 855: && ! (in_inc_dec[i] && forbidden_inc_dec_class[class]) ! 856: #endif ! 857: ) ! 858: alt = reg_class_subunion[(int) alt][class]; ! 859: ! 860: /* If we don't add any classes, nothing to try. */ ! 861: if (alt == best) ! 862: alt = (int) NO_REGS; ! 863: ! 864: /* We cast to (int) because (char) hits bugs in some compilers. */ ! 865: prefclass[i] = (int) best; ! 866: altclass[i] = (int) alt; ! 867: } ! 868: } ! 869: #endif /* REGISTER_CONSTRAINTS */ ! 870: } ! 871: ! 872: #ifdef REGISTER_CONSTRAINTS ! 873: ! 874: /* Record the cost of using memory or registers of various classes for ! 875: the operands in INSN. ! 876: ! 877: N_ALTS is the number of alternatives. ! 878: ! 879: N_OPS is the number of operands. ! 880: ! 881: OPS is an array of the operands. ! 882: ! 883: MODES are the modes of the operands, in case any are VOIDmode. ! 884: ! 885: CONSTRAINTS are the constraints to use for the operands. This array ! 886: is modified by this procedure. ! 887: ! 888: This procedure works alternative by alternative. For each alternative ! 889: we assume that we will be able to allocate all pseudos to their ideal ! 890: register class and calculate the cost of using that alternative. Then ! 891: we compute for each operand that is a pseudo-register, the cost of ! 892: having the pseudo allocated to each register class and using it in that ! 893: alternative. To this cost is added the cost of the alternative. ! 894: ! 895: The cost of each class for this insn is its lowest cost among all the ! 896: alternatives. */ ! 897: ! 898: static void ! 899: record_reg_classes (n_alts, n_ops, ops, modes, constraints, insn) ! 900: int n_alts; ! 901: int n_ops; ! 902: rtx *ops; ! 903: enum machine_mode *modes; ! 904: char **constraints; ! 905: rtx insn; ! 906: { ! 907: int alt; ! 908: enum op_type {OP_READ, OP_WRITE, OP_READ_WRITE} op_types[MAX_RECOG_OPERANDS]; ! 909: int i, j; ! 910: ! 911: /* By default, each operand is an input operand. */ ! 912: ! 913: for (i = 0; i < n_ops; i++) ! 914: op_types[i] = OP_READ; ! 915: ! 916: /* Process each alternative, each time minimizing an operand's cost with ! 917: the cost for each operand in that alternative. */ ! 918: ! 919: for (alt = 0; alt < n_alts; alt++) ! 920: { ! 921: struct costs this_op_costs[MAX_RECOG_OPERANDS]; ! 922: int alt_fail = 0; ! 923: int alt_cost = 0; ! 924: enum reg_class classes[MAX_RECOG_OPERANDS]; ! 925: int class; ! 926: ! 927: for (i = 0; i < n_ops; i++) ! 928: { ! 929: char *p = constraints[i]; ! 930: rtx op = ops[i]; ! 931: enum machine_mode mode = modes[i]; ! 932: int allows_mem = 0; ! 933: int win = 0; ! 934: char c; ! 935: ! 936: /* If this operand has no constraints at all, we can conclude ! 937: nothing about it since anything is valid. */ ! 938: ! 939: if (*p == 0) ! 940: { ! 941: if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER) ! 942: bzero ((char *) &this_op_costs[i], sizeof this_op_costs[i]); ! 943: ! 944: continue; ! 945: } ! 946: ! 947: if (*p == '%') ! 948: p++; ! 949: ! 950: /* If this alternative is only relevant when this operand ! 951: matches a previous operand, we do different things depending ! 952: on whether this operand is a pseudo-reg or not. */ ! 953: ! 954: if (p[0] >= '0' && p[0] <= '0' + i && (p[1] == ',' || p[1] == 0)) ! 955: { ! 956: j = p[0] - '0'; ! 957: classes[i] = classes[j]; ! 958: ! 959: if (GET_CODE (op) != REG || REGNO (op) < FIRST_PSEUDO_REGISTER) ! 960: { ! 961: /* If this matches the other operand, we have no added ! 962: cost. */ ! 963: if (rtx_equal_p (ops[j], op)) ! 964: ; ! 965: ! 966: /* If we can put the other operand into a register, add to ! 967: the cost of this alternative the cost to copy this ! 968: operand to the register used for the other operand. */ ! 969: ! 970: if (classes[j] != NO_REGS) ! 971: alt_cost += copy_cost (op, mode, classes[j], 1), win = 1; ! 972: } ! 973: else if (GET_CODE (ops[j]) != REG ! 974: || REGNO (ops[j]) < FIRST_PSEUDO_REGISTER) ! 975: { ! 976: /* This op is a pseudo but the one it matches is not. */ ! 977: ! 978: /* If we can't put the other operand into a register, this ! 979: alternative can't be used. */ ! 980: ! 981: if (classes[j] == NO_REGS) ! 982: alt_fail = 1; ! 983: ! 984: /* Otherwise, add to the cost of this alternative the cost ! 985: to copy the other operand to the register used for this ! 986: operand. */ ! 987: ! 988: else ! 989: alt_cost += copy_cost (ops[j], mode, classes[j], 1); ! 990: } ! 991: else ! 992: { ! 993: /* The costs of this operand are the same as that of the ! 994: other operand. However, if we cannot tie them, this ! 995: alternative needs to do a copy, which is one ! 996: instruction. */ ! 997: ! 998: this_op_costs[i] = this_op_costs[j]; ! 999: if (REGNO (ops[i]) != REGNO (ops[j]) ! 1000: && ! find_reg_note (insn, REG_DEAD, op)) ! 1001: alt_cost += 2; ! 1002: ! 1003: /* This is in place of ordinary cost computation ! 1004: for this operand, so skip to the end of the ! 1005: alternative (should be just one character). */ ! 1006: while (*p && *p++ != ',') ! 1007: ; ! 1008: ! 1009: constraints[i] = p; ! 1010: continue; ! 1011: } ! 1012: } ! 1013: ! 1014: /* Scan all the constraint letters. See if the operand matches ! 1015: any of the constraints. Collect the valid register classes ! 1016: and see if this operand accepts memory. */ ! 1017: ! 1018: classes[i] = NO_REGS; ! 1019: while (*p && (c = *p++) != ',') ! 1020: switch (c) ! 1021: { ! 1022: case '=': ! 1023: op_types[i] = OP_WRITE; ! 1024: break; ! 1025: ! 1026: case '+': ! 1027: op_types[i] = OP_READ_WRITE; ! 1028: break; ! 1029: ! 1030: case '*': ! 1031: /* Ignore the next letter for this pass. */ ! 1032: p++; ! 1033: break; ! 1034: ! 1035: case '%': ! 1036: case '?': case '!': case '#': ! 1037: case '&': ! 1038: case '0': case '1': case '2': case '3': case '4': ! 1039: case 'p': ! 1040: break; ! 1041: ! 1042: case 'm': case 'o': case 'V': ! 1043: /* It doesn't seem worth distinguishing between offsettable ! 1044: and non-offsettable addresses here. */ ! 1045: allows_mem = 1; ! 1046: if (GET_CODE (op) == MEM) ! 1047: win = 1; ! 1048: break; ! 1049: ! 1050: case '<': ! 1051: if (GET_CODE (op) == MEM ! 1052: && (GET_CODE (XEXP (op, 0)) == PRE_DEC ! 1053: || GET_CODE (XEXP (op, 0)) == POST_DEC)) ! 1054: win = 1; ! 1055: break; ! 1056: ! 1057: case '>': ! 1058: if (GET_CODE (op) == MEM ! 1059: && (GET_CODE (XEXP (op, 0)) == PRE_INC ! 1060: || GET_CODE (XEXP (op, 0)) == POST_INC)) ! 1061: win = 1; ! 1062: break; ! 1063: ! 1064: case 'E': ! 1065: /* Match any floating double constant, but only if ! 1066: we can examine the bits of it reliably. */ ! 1067: if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT ! 1068: || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) ! 1069: && GET_MODE (op) != VOIDmode && ! flag_pretend_float) ! 1070: break; ! 1071: if (GET_CODE (op) == CONST_DOUBLE) ! 1072: win = 1; ! 1073: break; ! 1074: ! 1075: case 'F': ! 1076: if (GET_CODE (op) == CONST_DOUBLE) ! 1077: win = 1; ! 1078: break; ! 1079: ! 1080: case 'G': ! 1081: case 'H': ! 1082: if (GET_CODE (op) == CONST_DOUBLE ! 1083: && CONST_DOUBLE_OK_FOR_LETTER_P (op, c)) ! 1084: win = 1; ! 1085: break; ! 1086: ! 1087: case 's': ! 1088: if (GET_CODE (op) == CONST_INT ! 1089: || (GET_CODE (op) == CONST_DOUBLE ! 1090: && GET_MODE (op) == VOIDmode)) ! 1091: break; ! 1092: case 'i': ! 1093: if (CONSTANT_P (op) ! 1094: #ifdef LEGITIMATE_PIC_OPERAND_P ! 1095: && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)) ! 1096: #endif ! 1097: ) ! 1098: win = 1; ! 1099: break; ! 1100: ! 1101: case 'n': ! 1102: if (GET_CODE (op) == CONST_INT ! 1103: || (GET_CODE (op) == CONST_DOUBLE ! 1104: && GET_MODE (op) == VOIDmode)) ! 1105: win = 1; ! 1106: break; ! 1107: ! 1108: case 'I': ! 1109: case 'J': ! 1110: case 'K': ! 1111: case 'L': ! 1112: case 'M': ! 1113: case 'N': ! 1114: case 'O': ! 1115: case 'P': ! 1116: if (GET_CODE (op) == CONST_INT ! 1117: && CONST_OK_FOR_LETTER_P (INTVAL (op), c)) ! 1118: win = 1; ! 1119: break; ! 1120: ! 1121: case 'X': ! 1122: win = 1; ! 1123: break; ! 1124: ! 1125: #ifdef EXTRA_CONSTRAINT ! 1126: case 'Q': ! 1127: case 'R': ! 1128: case 'S': ! 1129: case 'T': ! 1130: case 'U': ! 1131: if (EXTRA_CONSTRAINT (op, c)) ! 1132: win = 1; ! 1133: break; ! 1134: #endif ! 1135: ! 1136: case 'g': ! 1137: if (GET_CODE (op) == MEM ! 1138: || (CONSTANT_P (op) ! 1139: #ifdef LEGITIMATE_PIC_OPERAND_P ! 1140: && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)) ! 1141: #endif ! 1142: )) ! 1143: win = 1; ! 1144: allows_mem = 1; ! 1145: case 'r': ! 1146: classes[i] ! 1147: = reg_class_subunion[(int) classes[i]][(int) GENERAL_REGS]; ! 1148: break; ! 1149: ! 1150: default: ! 1151: classes[i] ! 1152: = reg_class_subunion[(int) classes[i]] ! 1153: [(int) REG_CLASS_FROM_LETTER (c)]; ! 1154: } ! 1155: ! 1156: constraints[i] = p; ! 1157: ! 1158: /* How we account for this operand now depends on whether it is a ! 1159: pseudo register or not. If it is, we first check if any ! 1160: register classes are valid. If not, we ignore this alternative, ! 1161: since we want to assume that all pseudos get allocated for ! 1162: register preferencing. If some register class is valid, compute ! 1163: the costs of moving the pseudo into that class. */ ! 1164: ! 1165: if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER) ! 1166: { ! 1167: if (classes[i] == NO_REGS) ! 1168: alt_fail = 1; ! 1169: else ! 1170: { ! 1171: struct costs *pp = &this_op_costs[i]; ! 1172: ! 1173: for (class = 0; class < N_REG_CLASSES; class++) ! 1174: pp->cost[class] = may_move_cost[class][(int) classes[i]]; ! 1175: ! 1176: /* If the alternative actually allows memory, make things ! 1177: a bit cheaper since we won't need an extra insn to ! 1178: load it. */ ! 1179: ! 1180: pp->mem_cost = MEMORY_MOVE_COST (mode) - allows_mem; ! 1181: ! 1182: /* If we have assigned a class to this register in our ! 1183: first pass, add a cost to this alternative corresponding ! 1184: to what we would add if this register were not in the ! 1185: appropriate class. */ ! 1186: ! 1187: if (prefclass) ! 1188: alt_cost ! 1189: += may_move_cost[prefclass[REGNO (op)]][(int) classes[i]]; ! 1190: } ! 1191: } ! 1192: ! 1193: /* Otherwise, if this alternative wins, either because we ! 1194: have already determined that or if we have a hard register of ! 1195: the proper class, there is no cost for this alternative. */ ! 1196: ! 1197: else if (win ! 1198: || (GET_CODE (op) == REG ! 1199: && reg_fits_class_p (op, classes[i], 0, GET_MODE (op)))) ! 1200: ; ! 1201: ! 1202: /* If registers are valid, the cost of this alternative includes ! 1203: copying the object to and/or from a register. */ ! 1204: ! 1205: else if (classes[i] != NO_REGS) ! 1206: { ! 1207: if (op_types[i] != OP_WRITE) ! 1208: alt_cost += copy_cost (op, mode, classes[i], 1); ! 1209: ! 1210: if (op_types[i] != OP_READ) ! 1211: alt_cost += copy_cost (op, mode, classes[i], 0); ! 1212: } ! 1213: ! 1214: /* The only other way this alternative can be used is if this is a ! 1215: constant that could be placed into memory. */ ! 1216: ! 1217: else if (CONSTANT_P (op) && allows_mem) ! 1218: alt_cost += MEMORY_MOVE_COST (mode); ! 1219: else ! 1220: alt_fail = 1; ! 1221: } ! 1222: ! 1223: if (alt_fail) ! 1224: continue; ! 1225: ! 1226: /* Finally, update the costs with the information we've calculated ! 1227: about this alternative. */ ! 1228: ! 1229: for (i = 0; i < n_ops; i++) ! 1230: if (GET_CODE (ops[i]) == REG ! 1231: && REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER) ! 1232: { ! 1233: struct costs *pp = &op_costs[i], *qq = &this_op_costs[i]; ! 1234: int scale = 1 + (op_types[i] == OP_READ_WRITE); ! 1235: ! 1236: pp->mem_cost = MIN (pp->mem_cost, ! 1237: (qq->mem_cost + alt_cost) * scale); ! 1238: ! 1239: for (class = 0; class < N_REG_CLASSES; class++) ! 1240: pp->cost[class] = MIN (pp->cost[class], ! 1241: (qq->cost[class] + alt_cost) * scale); ! 1242: } ! 1243: } ! 1244: } ! 1245: ! 1246: /* Compute the cost of loading X into (if TO_P is non-zero) or from (if ! 1247: TO_P is zero) a register of class CLASS in mode MODE. ! 1248: ! 1249: X must not be a pseudo. */ ! 1250: ! 1251: static int ! 1252: copy_cost (x, mode, class, to_p) ! 1253: rtx x; ! 1254: enum machine_mode mode; ! 1255: enum reg_class class; ! 1256: int to_p; ! 1257: { ! 1258: enum reg_class secondary_class = NO_REGS; ! 1259: ! 1260: /* If X is a SCRATCH, there is actually nothing to move since we are ! 1261: assuming optimal allocation. */ ! 1262: ! 1263: if (GET_CODE (x) == SCRATCH) ! 1264: return 0; ! 1265: ! 1266: /* Get the class we will actually use for a reload. */ ! 1267: class = PREFERRED_RELOAD_CLASS (x, class); ! 1268: ! 1269: #ifdef HAVE_SECONDARY_RELOADS ! 1270: /* If we need a secondary reload (we assume here that we are using ! 1271: the secondary reload as an intermediate, not a scratch register), the ! 1272: cost is that to load the input into the intermediate register, then ! 1273: to copy them. We use a special value of TO_P to avoid recursion. */ ! 1274: ! 1275: #ifdef SECONDARY_INPUT_RELOAD_CLASS ! 1276: if (to_p == 1) ! 1277: secondary_class = SECONDARY_INPUT_RELOAD_CLASS (class, mode, x); ! 1278: #endif ! 1279: ! 1280: #ifdef SECONDARY_OUTPUT_RELOAD_CLASS ! 1281: if (! to_p) ! 1282: secondary_class = SECONDARY_OUTPUT_RELOAD_CLASS (class, mode, x); ! 1283: #endif ! 1284: ! 1285: if (secondary_class != NO_REGS) ! 1286: return (move_cost[(int) secondary_class][(int) class] ! 1287: + copy_cost (x, mode, secondary_class, 2)); ! 1288: #endif /* HAVE_SECONDARY_RELOADS */ ! 1289: ! 1290: /* For memory, use the memory move cost, for (hard) registers, use the ! 1291: cost to move between the register classes, and use 2 for everything ! 1292: else (constants). */ ! 1293: ! 1294: if (GET_CODE (x) == MEM || class == NO_REGS) ! 1295: return MEMORY_MOVE_COST (mode); ! 1296: ! 1297: else if (GET_CODE (x) == REG) ! 1298: return move_cost[(int) REGNO_REG_CLASS (REGNO (x))][(int) class]; ! 1299: ! 1300: else ! 1301: /* If this is a constant, we may eventually want to call rtx_cost here. */ ! 1302: return 2; ! 1303: } ! 1304: ! 1305: /* Record the pseudo registers we must reload into hard registers ! 1306: in a subexpression of a memory address, X. ! 1307: ! 1308: CLASS is the class that the register needs to be in and is either ! 1309: BASE_REG_CLASS or INDEX_REG_CLASS. ! 1310: ! 1311: SCALE is twice the amount to multiply the cost by (it is twice so we ! 1312: can represent half-cost adjustments). */ ! 1313: ! 1314: static void ! 1315: record_address_regs (x, class, scale) ! 1316: rtx x; ! 1317: enum reg_class class; ! 1318: int scale; ! 1319: { ! 1320: register enum rtx_code code = GET_CODE (x); ! 1321: ! 1322: switch (code) ! 1323: { ! 1324: case CONST_INT: ! 1325: case CONST: ! 1326: case CC0: ! 1327: case PC: ! 1328: case SYMBOL_REF: ! 1329: case LABEL_REF: ! 1330: return; ! 1331: ! 1332: case PLUS: ! 1333: /* When we have an address that is a sum, ! 1334: we must determine whether registers are "base" or "index" regs. ! 1335: If there is a sum of two registers, we must choose one to be ! 1336: the "base". Luckily, we can use the REGNO_POINTER_FLAG ! 1337: to make a good choice most of the time. We only need to do this ! 1338: on machines that can have two registers in an address and where ! 1339: the base and index register classes are different. ! 1340: ! 1341: ??? This code used to set REGNO_POINTER_FLAG in some cases, but ! 1342: that seems bogus since it should only be set when we are sure ! 1343: the register is being used as a pointer. */ ! 1344: ! 1345: { ! 1346: rtx arg0 = XEXP (x, 0); ! 1347: rtx arg1 = XEXP (x, 1); ! 1348: register enum rtx_code code0 = GET_CODE (arg0); ! 1349: register enum rtx_code code1 = GET_CODE (arg1); ! 1350: ! 1351: /* Look inside subregs. */ ! 1352: if (code0 == SUBREG) ! 1353: arg0 = SUBREG_REG (arg0), code0 = GET_CODE (arg0); ! 1354: if (code1 == SUBREG) ! 1355: arg1 = SUBREG_REG (arg1), code1 = GET_CODE (arg1); ! 1356: ! 1357: /* If this machine only allows one register per address, it must ! 1358: be in the first operand. */ ! 1359: ! 1360: if (MAX_REGS_PER_ADDRESS == 1) ! 1361: record_address_regs (arg0, class, scale); ! 1362: ! 1363: /* If index and base registers are the same on this machine, just ! 1364: record registers in any non-constant operands. We assume here, ! 1365: as well as in the tests below, that all addresses are in ! 1366: canonical form. */ ! 1367: ! 1368: else if (INDEX_REG_CLASS == BASE_REG_CLASS) ! 1369: { ! 1370: record_address_regs (arg0, class, scale); ! 1371: if (! CONSTANT_P (arg1)) ! 1372: record_address_regs (arg1, class, scale); ! 1373: } ! 1374: ! 1375: /* If the second operand is a constant integer, it doesn't change ! 1376: what class the first operand must be. */ ! 1377: ! 1378: else if (code1 == CONST_INT || code1 == CONST_DOUBLE) ! 1379: record_address_regs (arg0, class, scale); ! 1380: ! 1381: /* If the second operand is a symbolic constant, the first operand ! 1382: must be an index register. */ ! 1383: ! 1384: else if (code1 == SYMBOL_REF || code1 == CONST || code1 == LABEL_REF) ! 1385: record_address_regs (arg0, INDEX_REG_CLASS, scale); ! 1386: ! 1387: /* If this the sum of two registers where the first is known to be a ! 1388: pointer, it must be a base register with the second an index. */ ! 1389: ! 1390: else if (code0 == REG && code1 == REG ! 1391: && REGNO_POINTER_FLAG (REGNO (arg0))) ! 1392: { ! 1393: record_address_regs (arg0, BASE_REG_CLASS, scale); ! 1394: record_address_regs (arg1, INDEX_REG_CLASS, scale); ! 1395: } ! 1396: ! 1397: /* If this is the sum of two registers and neither is known to ! 1398: be a pointer, count equal chances that each might be a base ! 1399: or index register. This case should be rare. */ ! 1400: ! 1401: else if (code0 == REG && code1 == REG ! 1402: && ! REGNO_POINTER_FLAG (REGNO (arg0)) ! 1403: && ! REGNO_POINTER_FLAG (REGNO (arg1))) ! 1404: { ! 1405: record_address_regs (arg0, BASE_REG_CLASS, scale / 2); ! 1406: record_address_regs (arg0, INDEX_REG_CLASS, scale / 2); ! 1407: record_address_regs (arg1, BASE_REG_CLASS, scale / 2); ! 1408: record_address_regs (arg1, INDEX_REG_CLASS, scale / 2); ! 1409: } ! 1410: ! 1411: /* In all other cases, the first operand is an index and the ! 1412: second is the base. */ ! 1413: ! 1414: else ! 1415: { ! 1416: record_address_regs (arg0, INDEX_REG_CLASS, scale); ! 1417: record_address_regs (arg1, BASE_REG_CLASS, scale); ! 1418: } ! 1419: } ! 1420: break; ! 1421: ! 1422: case POST_INC: ! 1423: case PRE_INC: ! 1424: case POST_DEC: ! 1425: case PRE_DEC: ! 1426: /* Double the importance of a pseudo register that is incremented ! 1427: or decremented, since it would take two extra insns ! 1428: if it ends up in the wrong place. If the operand is a pseudo, ! 1429: show it is being used in an INC_DEC context. */ ! 1430: ! 1431: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 1432: if (GET_CODE (XEXP (x, 0)) == REG ! 1433: && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER) ! 1434: in_inc_dec[REGNO (XEXP (x, 0))] = 1; ! 1435: #endif ! 1436: ! 1437: record_address_regs (XEXP (x, 0), class, 2 * scale); ! 1438: break; ! 1439: ! 1440: case REG: ! 1441: { ! 1442: register struct costs *pp = &costs[REGNO (x)]; ! 1443: register int i; ! 1444: ! 1445: pp->mem_cost += (MEMORY_MOVE_COST (Pmode) * scale) / 2; ! 1446: ! 1447: for (i = 0; i < N_REG_CLASSES; i++) ! 1448: pp->cost[i] += (may_move_cost[i][(int) class] * scale) / 2; ! 1449: } ! 1450: break; ! 1451: ! 1452: default: ! 1453: { ! 1454: register char *fmt = GET_RTX_FORMAT (code); ! 1455: register int i; ! 1456: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) ! 1457: if (fmt[i] == 'e') ! 1458: record_address_regs (XEXP (x, i), class, scale); ! 1459: } ! 1460: } ! 1461: } ! 1462: #endif /* REGISTER_CONSTRAINTS */ ! 1463: ! 1464: /* This is the `regscan' pass of the compiler, run just before cse ! 1465: and again just before loop. ! 1466: ! 1467: It finds the first and last use of each pseudo-register ! 1468: and records them in the vectors regno_first_uid, regno_last_uid ! 1469: and counts the number of sets in the vector reg_n_sets. ! 1470: ! 1471: REPEAT is nonzero the second time this is called. */ ! 1472: ! 1473: /* Indexed by pseudo register number, gives uid of first insn using the reg ! 1474: (as of the time reg_scan is called). */ ! 1475: ! 1476: int *regno_first_uid; ! 1477: ! 1478: /* Indexed by pseudo register number, gives uid of last insn using the reg ! 1479: (as of the time reg_scan is called). */ ! 1480: ! 1481: int *regno_last_uid; ! 1482: ! 1483: /* Indexed by pseudo register number, gives uid of last insn using the reg ! 1484: or mentioning it in a note (as of the time reg_scan is called). */ ! 1485: ! 1486: int *regno_last_note_uid; ! 1487: ! 1488: /* Record the number of registers we used when we allocated the above two ! 1489: tables. If we are called again with more than this, we must re-allocate ! 1490: the tables. */ ! 1491: ! 1492: static int highest_regno_in_uid_map; ! 1493: ! 1494: /* Maximum number of parallel sets and clobbers in any insn in this fn. ! 1495: Always at least 3, since the combiner could put that many togetherm ! 1496: and we want this to remain correct for all the remaining passes. */ ! 1497: ! 1498: int max_parallel; ! 1499: ! 1500: void reg_scan_mark_refs (); ! 1501: ! 1502: void ! 1503: reg_scan (f, nregs, repeat) ! 1504: rtx f; ! 1505: int nregs; ! 1506: int repeat; ! 1507: { ! 1508: register rtx insn; ! 1509: ! 1510: if (!repeat || nregs > highest_regno_in_uid_map) ! 1511: { ! 1512: /* Leave some spare space in case more regs are allocated. */ ! 1513: highest_regno_in_uid_map = nregs + nregs / 20; ! 1514: regno_first_uid ! 1515: = (int *) oballoc (highest_regno_in_uid_map * sizeof (int)); ! 1516: regno_last_uid ! 1517: = (int *) oballoc (highest_regno_in_uid_map * sizeof (int)); ! 1518: regno_last_note_uid ! 1519: = (int *) oballoc (highest_regno_in_uid_map * sizeof (int)); ! 1520: reg_n_sets ! 1521: = (short *) oballoc (highest_regno_in_uid_map * sizeof (short)); ! 1522: } ! 1523: ! 1524: bzero (regno_first_uid, highest_regno_in_uid_map * sizeof (int)); ! 1525: bzero (regno_last_uid, highest_regno_in_uid_map * sizeof (int)); ! 1526: bzero (regno_last_note_uid, highest_regno_in_uid_map * sizeof (int)); ! 1527: bzero (reg_n_sets, highest_regno_in_uid_map * sizeof (short)); ! 1528: ! 1529: max_parallel = 3; ! 1530: ! 1531: for (insn = f; insn; insn = NEXT_INSN (insn)) ! 1532: if (GET_CODE (insn) == INSN ! 1533: || GET_CODE (insn) == CALL_INSN ! 1534: || GET_CODE (insn) == JUMP_INSN) ! 1535: { ! 1536: if (GET_CODE (PATTERN (insn)) == PARALLEL ! 1537: && XVECLEN (PATTERN (insn), 0) > max_parallel) ! 1538: max_parallel = XVECLEN (PATTERN (insn), 0); ! 1539: reg_scan_mark_refs (PATTERN (insn), insn, 0); ! 1540: ! 1541: if (REG_NOTES (insn)) ! 1542: reg_scan_mark_refs (REG_NOTES (insn), insn, 1); ! 1543: } ! 1544: } ! 1545: ! 1546: /* X is the expression to scan. INSN is the insn it appears in. ! 1547: NOTE_FLAG is nonzero if X is from INSN's notes rather than its body. */ ! 1548: ! 1549: void ! 1550: reg_scan_mark_refs (x, insn, note_flag) ! 1551: rtx x; ! 1552: rtx insn; ! 1553: int note_flag; ! 1554: { ! 1555: register enum rtx_code code = GET_CODE (x); ! 1556: register rtx dest; ! 1557: register rtx note; ! 1558: ! 1559: switch (code) ! 1560: { ! 1561: case CONST_INT: ! 1562: case CONST: ! 1563: case CONST_DOUBLE: ! 1564: case CC0: ! 1565: case PC: ! 1566: case SYMBOL_REF: ! 1567: case LABEL_REF: ! 1568: case ADDR_VEC: ! 1569: case ADDR_DIFF_VEC: ! 1570: return; ! 1571: ! 1572: case REG: ! 1573: { ! 1574: register int regno = REGNO (x); ! 1575: ! 1576: regno_last_note_uid[regno] = INSN_UID (insn); ! 1577: if (!note_flag) ! 1578: regno_last_uid[regno] = INSN_UID (insn); ! 1579: if (regno_first_uid[regno] == 0) ! 1580: regno_first_uid[regno] = INSN_UID (insn); ! 1581: } ! 1582: break; ! 1583: ! 1584: case EXPR_LIST: ! 1585: if (XEXP (x, 0)) ! 1586: reg_scan_mark_refs (XEXP (x, 0), insn, note_flag); ! 1587: if (XEXP (x, 1)) ! 1588: reg_scan_mark_refs (XEXP (x, 1), insn, note_flag); ! 1589: break; ! 1590: ! 1591: case INSN_LIST: ! 1592: if (XEXP (x, 1)) ! 1593: reg_scan_mark_refs (XEXP (x, 1), insn, note_flag); ! 1594: break; ! 1595: ! 1596: case SET: ! 1597: /* Count a set of the destination if it is a register. */ ! 1598: for (dest = SET_DEST (x); ! 1599: GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART ! 1600: || GET_CODE (dest) == ZERO_EXTEND; ! 1601: dest = XEXP (dest, 0)) ! 1602: ; ! 1603: ! 1604: if (GET_CODE (dest) == REG) ! 1605: reg_n_sets[REGNO (dest)]++; ! 1606: ! 1607: /* If this is setting a pseudo from another pseudo or the sum of a ! 1608: pseudo and a constant integer and the other pseudo is known to be ! 1609: a pointer, set the destination to be a pointer as well. ! 1610: ! 1611: Likewise if it is setting the destination from an address or from a ! 1612: value equivalent to an address or to the sum of an address and ! 1613: something else. ! 1614: ! 1615: But don't do any of this if the pseudo corresponds to a user ! 1616: variable since it should have already been set as a pointer based ! 1617: on the type. */ ! 1618: ! 1619: if (GET_CODE (SET_DEST (x)) == REG ! 1620: && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER ! 1621: && ! REG_USERVAR_P (SET_DEST (x)) ! 1622: && ! REGNO_POINTER_FLAG (REGNO (SET_DEST (x))) ! 1623: && ((GET_CODE (SET_SRC (x)) == REG ! 1624: && REGNO_POINTER_FLAG (REGNO (SET_SRC (x)))) ! 1625: || ((GET_CODE (SET_SRC (x)) == PLUS ! 1626: || GET_CODE (SET_SRC (x)) == LO_SUM) ! 1627: && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT ! 1628: && GET_CODE (XEXP (SET_SRC (x), 0)) == REG ! 1629: && REGNO_POINTER_FLAG (REGNO (XEXP (SET_SRC (x), 0)))) ! 1630: || GET_CODE (SET_SRC (x)) == CONST ! 1631: || GET_CODE (SET_SRC (x)) == SYMBOL_REF ! 1632: || GET_CODE (SET_SRC (x)) == LABEL_REF ! 1633: || (GET_CODE (SET_SRC (x)) == HIGH ! 1634: && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST ! 1635: || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF ! 1636: || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF)) ! 1637: || ((GET_CODE (SET_SRC (x)) == PLUS ! 1638: || GET_CODE (SET_SRC (x)) == LO_SUM) ! 1639: && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST ! 1640: || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF ! 1641: || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF)) ! 1642: || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 ! 1643: && (GET_CODE (XEXP (note, 0)) == CONST ! 1644: || GET_CODE (XEXP (note, 0)) == SYMBOL_REF ! 1645: || GET_CODE (XEXP (note, 0)) == LABEL_REF)))) ! 1646: REGNO_POINTER_FLAG (REGNO (SET_DEST (x))) = 1; ! 1647: ! 1648: /* ... fall through ... */ ! 1649: ! 1650: default: ! 1651: { ! 1652: register char *fmt = GET_RTX_FORMAT (code); ! 1653: register int i; ! 1654: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) ! 1655: { ! 1656: if (fmt[i] == 'e') ! 1657: reg_scan_mark_refs (XEXP (x, i), insn, note_flag); ! 1658: else if (fmt[i] == 'E' && XVEC (x, i) != 0) ! 1659: { ! 1660: register int j; ! 1661: for (j = XVECLEN (x, i) - 1; j >= 0; j--) ! 1662: reg_scan_mark_refs (XVECEXP (x, i, j), insn, note_flag); ! 1663: } ! 1664: } ! 1665: } ! 1666: } ! 1667: } ! 1668: ! 1669: /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1 ! 1670: is also in C2. */ ! 1671: ! 1672: int ! 1673: reg_class_subset_p (c1, c2) ! 1674: register enum reg_class c1; ! 1675: register enum reg_class c2; ! 1676: { ! 1677: if (c1 == c2) return 1; ! 1678: ! 1679: if (c2 == ALL_REGS) ! 1680: win: ! 1681: return 1; ! 1682: GO_IF_HARD_REG_SUBSET (reg_class_contents[(int)c1], ! 1683: reg_class_contents[(int)c2], ! 1684: win); ! 1685: return 0; ! 1686: } ! 1687: ! 1688: /* Return nonzero if there is a register that is in both C1 and C2. */ ! 1689: ! 1690: int ! 1691: reg_classes_intersect_p (c1, c2) ! 1692: register enum reg_class c1; ! 1693: register enum reg_class c2; ! 1694: { ! 1695: #ifdef HARD_REG_SET ! 1696: register ! 1697: #endif ! 1698: HARD_REG_SET c; ! 1699: ! 1700: if (c1 == c2) return 1; ! 1701: ! 1702: if (c1 == ALL_REGS || c2 == ALL_REGS) ! 1703: return 1; ! 1704: ! 1705: COPY_HARD_REG_SET (c, reg_class_contents[(int) c1]); ! 1706: AND_HARD_REG_SET (c, reg_class_contents[(int) c2]); ! 1707: ! 1708: GO_IF_HARD_REG_SUBSET (c, reg_class_contents[(int) NO_REGS], lose); ! 1709: return 1; ! 1710: ! 1711: lose: ! 1712: return 0; ! 1713: } ! 1714:
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