Annotation of GNUtools/cctools/as/i860-opcode.h, revision 1.1

1.1     ! root        1: /* i860_opcode.h -- Table of opcodes for the i860.
        !             2:    Copyright (C) 1989 Free Software Foundation, Inc.
        !             3: 
        !             4: This file is part of GAS, the GNU Assembler.
        !             5: 
        !             6: GAS is free software; you can redistribute it and/or modify
        !             7: it under the terms of the GNU General Public License as published by
        !             8: the Free Software Foundation; either version 1, or (at your option)
        !             9: any later version.
        !            10: 
        !            11: GAS is distributed in the hope that it will be useful,
        !            12: but WITHOUT ANY WARRANTY; without even the implied warranty of
        !            13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
        !            14: GNU General Public License for more details.
        !            15: 
        !            16: You should have received a copy of the GNU General Public License
        !            17: along with GAS; see the file COPYING.  If not, write to
        !            18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
        !            19: 
        !            20: /* Assorted opcode bits used to diddle the instruction during operand processing */
        !            21: #define OP_PREFIX_MASK 0xFC000000
        !            22: #define PREFIX_FPU     0x48000000
        !            23: #define OP_FNOP                0xB0000000
        !            24: #define OP_NOP         0xA0000000
        !            25: #define DUAL_INSN_MODE_BIT     0x00000200
        !            26: 
        !            27: #define LOGOP_MASK     0xC0000000
        !            28: #define IS_LOGOP(x)    (((x)&LOGOP_MASK) == LOGOP_MASK)
        !            29: 
        !            30: /* Macros to fill in register fields of insns */
        !            31: #define SET_RS1(op, rval)      (op)=(((op) & ~(0x1F << 11)) | ((rval) & 0x1F) << 11)
        !            32: #define SET_RS2(op, rval)      (op)=(((op) & ~(0x1F << 21)) | ((rval) & 0x1F) << 21)
        !            33: #define SET_RD(op, rval)       (op)=(((op) & ~(0x1F << 16)) | ((rval) & 0x1F) << 16)
        !            34: 
        !            35: #define GET_RS1(op)    (((op) >> 11) & 0x1F)
        !            36: #define GET_RS2(op)    (((op) >> 21) & 0x1F)
        !            37: #define GET_RD(op)     (((op) >> 16) & 0x1F)
        !            38: 
        !            39: 
        !            40: /*
        !            41:  * Structure of an opcode table entry.
        !            42:  */
        !            43: struct i860_opcode
        !            44: {
        !            45:     const char *name;
        !            46:     unsigned long mask;     /* used only for error checking */
        !            47:     unsigned long match;
        !            48:     const char *args;
        !            49:     unsigned int last;      /* used to simplify hashing */
        !            50: };
        !            51: 
        !            52: /*
        !            53:    All i860 opcodes are 32 bits.
        !            54: 
        !            55:    The match component is a mask saying which bits must match a
        !            56:    particular opcode in order for an instruction to be an instance
        !            57:    of that opcode.
        !            58: 
        !            59:    The args component is a string containing one character
        !            60:    for each operand of the instruction.
        !            61: 
        !            62: Kinds of operands:
        !            63:    #    Number used by optimizer.  It is ignored.
        !            64:    1    rs1 register, bits 11-15 of insn.
        !            65:    2    rs2 register, bits 21-25 of insn.
        !            66:    d    rd register, bits 16-20 of insn.
        !            67:    e    frs1 floating point register, bits 11-15 of insn.
        !            68:    f    frs2 floating point register, bits 21-25 of insn.
        !            69:    g    frsd floating point register, bits 16-20 of insn.
        !            70:    E   Same as e, f, g above, but requires an even reg number.
        !            71:    F
        !            72:    G
        !            73:    H   frsd floating point register, quad aligned! (f0, f4, f8....)
        !            74:    i   16 bit byte address low half, default of RELOC_LOW0
        !            75:    I   16 bit High portion of address, RELOC_HIGH.
        !            76:    j   16 bit short address, RELOC_LOW1
        !            77:    k   16 bit word/int address low half, RELOC_LOW2
        !            78:    l   16 bit 8-byte address (double) low half, RELOC_LOW3
        !            79:    m   16 bit 16-byte address (quad) low half, RELOC_LOW4
        !            80: 
        !            81:    n   16 bit byte aligned low half, split fields, RELOC_SPLIT0
        !            82:    o   16 bit short aligned low half, split fields, RELOC_SPLIT1
        !            83:    p   16 bit int/word aligned low half, split fields, RELOC_SPLIT2
        !            84: 
        !            85:    J   16 bit High portion of address requiring adjustment, RELOC_HIGHADJ
        !            86:    K   26 bit branch displacement
        !            87:    L   16 bit split branch displacement
        !            88:    B   5 bit immediate, for bte and btne insn, RS1 field.
        !            89:    D   Immediate field constant, no label or reloc data permitted.
        !            90:    C    Control Register, one of fir, psr, epsr, dirbase, db, or fsr.
        !            91:    S    Special ops
        !            92:    
        !            93: Literals used and matched in operand list:
        !            94:    ()  Used around indirect register ld and st operations.
        !            95:    ,   Arg separator.
        !            96:  */
        !            97: 
        !            98: /*
        !            99:  *   The assembler requires that all instances of the same mnemonic must be
        !           100:  *   consecutive.  If they aren't, the assembler will bomb at runtime.
        !           101:  */
        !           102: 
        !           103: static const struct i860_opcode i860_opcodes[] =
        !           104: {
        !           105: 
        !           106: { "adds",      0xFC000000, 0x90000000, "1,2,d", 0 },
        !           107: { "adds",      0xFC000000, 0x94000000, "i,2,d", 1 },
        !           108: 
        !           109: { "addu",      0xFC000000, 0x80000000, "1,2,d", 0 },
        !           110: { "addu",      0xFC000000, 0x84000000, "i,2,d", 1 },
        !           111: 
        !           112: { "and",       0xFC000000, 0xC0000000, "1,2,d", 0 },
        !           113: { "and",       0xFC000000, 0xC4000000, "i,2,d", 1 },
        !           114: { "andh",      0xFC000000, 0xCC000000, "i,2,d", 1 },
        !           115: 
        !           116: { "andnot",    0xFC000000, 0xD0000000, "1,2,d", 0 },
        !           117: { "andnot",    0xFC000000, 0xD4000000, "i,2,d", 1 },
        !           118: { "andnoth",   0xFC000000, 0xDC000000, "i,2,d", 1 },
        !           119: 
        !           120: { "bc",                0xFC000000, 0x70000000, "K", 1 },
        !           121: { "bc.t",      0xFC000000, 0x74000000, "K", 1 },
        !           122: 
        !           123: { "bla",       0xFC000000, 0xB4000000, "1,2,L", 1 },
        !           124: 
        !           125: { "bnc",       0xFC000000, 0x78000000, "K", 1 },
        !           126: { "bnc.t",     0xFC000000, 0x7C000000, "K", 1 },
        !           127: 
        !           128: { "br",                0xFC000000, 0x68000000, "K", 1 },
        !           129: 
        !           130: { "bri",       0xFC000000, 0x40000000, "1", 1 },
        !           131: 
        !           132: { "bte",       0xFC000000, 0x58000000, "1,2,L", 0 },
        !           133: { "bte",       0xFC000000, 0x5C000000, "B,2,L", 1 },
        !           134: 
        !           135: { "btne",      0xFC000000, 0x50000000, "1,2,L", 0 },
        !           136: { "btne",      0xFC000000, 0x54000000, "B,2,L", 1 },
        !           137: 
        !           138: { "call",      0xFC000000, 0x6C000000, "K", 1 },
        !           139: 
        !           140: { "calli",     0xFC00001F, 0x4C000002, "1", 1 },
        !           141: 
        !           142: { "fadd.dd",   0xFC0007FF, 0x480001B0, "E,F,G", 1 },
        !           143: { "fadd.sd",   0xFC0007FF, 0x480000B0, "e,f,G", 1 },
        !           144: { "fadd.ss",   0xFC0007FF, 0x48000030, "e,f,g", 1 },
        !           145: 
        !           146: { "faddp",     0xFC0007FF, 0x480001D0, "E,F,G", 1 },
        !           147: 
        !           148: { "faddz",     0xFC0007FF, 0x480001D1, "E,F,G", 1 },
        !           149: 
        !           150: { "fiadd.dd",  0xFC0007FF, 0x480001C9, "E,F,G", 1 },
        !           151: { "fiadd.ss",  0xFC0007FF, 0x48000049, "e,f,g", 1 },
        !           152: 
        !           153: { "fisub.dd",  0xFC0007FF, 0x480001CD, "E,F,G", 1 },
        !           154: { "fisub.ss",  0xFC0007FF, 0x4800004D, "e,f,g", 1 },
        !           155: 
        !           156: { "fix.dd",    0xFC0007FF, 0x480001B2, "E,G", 1 },
        !           157: { "fix.sd",    0xFC0007FF, 0x480000B2, "e,G", 1 },
        !           158: /* { "fix.ss", 0xFC0007FF, 0x48000032, "e,g", 1 }, */  /* Not supported by Intel */
        !           159: 
        !           160: { "fld.d",     0xFC000007, 0x20000000, "1(2),G", 0 },
        !           161: { "fld.d",     0xFC000007, 0x20000001, "1(2)++,G", 0 },
        !           162: { "fld.d",     0xFC000007, 0x24000000, "l(2),G", 0 },
        !           163: { "fld.d",     0xFC000007, 0x24000001, "l(2)++,G", 1 },
        !           164: { "fld.l",     0xFC000003, 0x20000002, "1(2),g", 0 },
        !           165: { "fld.l",     0xFC000003, 0x20000003, "1(2)++,g", 0 },
        !           166: { "fld.l",     0xFC000003, 0x24000002, "k(2),g", 0 },
        !           167: { "fld.l",     0xFC000003, 0x24000003, "k(2)++,g", 1 },
        !           168: { "fld.q",     0xFC000007, 0x20000004, "1(2),H", 0 },
        !           169: { "fld.q",     0xFC000007, 0x20000005, "1(2)++,H", 0 },
        !           170: { "fld.q",     0xFC000007, 0x24000004, "m(2),H", 0 },
        !           171: { "fld.q",     0xFC000007, 0x24000005, "m(2)++,H", 1 },
        !           172: 
        !           173: { "flush",     0xFC000007, 0x34000000, "m(2)", 0 },
        !           174: { "flush",     0xFC000007, 0x34000001, "m(2)++", 1 },
        !           175: 
        !           176: { "fmlow.dd",  0xFC0007FF, 0x480001A1, "E,F,G", 1 },
        !           177: /* { "fmlow.sd",       0xFC0007FF, 0x480000A1, "e,f,g", 1 }, */ /* Not supported... */
        !           178: /* { "fmlow.ss",       0xFC0007FF, 0x48000021, "e,f,g", 1 }, */
        !           179: 
        !           180: { "fmov.dd",   0xFFE007FF, 0x480001C9, "E,G", 1 },
        !           181: { "fmov.ds",   0xFFE007FF, 0x48000133, "E,g", 1 },     /* Update B.0 4.0 errata */
        !           182: { "famov.ds",  0xFFE007FF, 0x48000133, "E,g", 1 },     /* B.0 insn */
        !           183: { "fmov.sd",   0xFFE007FF, 0x480000B3, "e,G", 1 },     /* Update B.0 4.0 errata */
        !           184: { "famov.sd",  0xFFE007FF, 0x480000B3, "e,G", 1 },     /* B.0 insn */
        !           185: { "famov.ss",  0xFFE007FF, 0x48000033, "e,g", 1 },     /* B.0 insn */
        !           186: { "famov.dd",  0xFFE007FF, 0x480001B3, "E,G", 1 },     /* B.0 insn */
        !           187: { "fmov.ss",   0xFFE007FF, 0x48000049, "e,g", 1 },
        !           188: 
        !           189: { "fmul.dd",   0xFC0007FF, 0x480001A0, "E,F,G", 1 },
        !           190: { "fmul.sd",   0xFC0007FF, 0x480000A0, "e,f,G", 1 },
        !           191: { "fmul.ss",   0xFC0007FF, 0x48000020, "e,f,g", 1 },
        !           192: 
        !           193: { "fnop",      0xFFFFFFFF, 0xB0000000, "", 1 },
        !           194: 
        !           195: { "form",      0xFC0007FF, 0x480001DA, "E,G", 1 },
        !           196: 
        !           197: { "frcp.dd",   0xFC0007FF, 0x480001A2, "F,G", 1 },
        !           198: { "frcp.sd",   0xFC0007FF, 0x480000A2, "f,G", 1 },
        !           199: { "frcp.ss",   0xFC0007FF, 0x48000022, "f,g", 1 },
        !           200: 
        !           201: { "frsqr.dd",  0xFC0007FF, 0x480001A3, "F,G", 1 },
        !           202: { "frsqr.sd",  0xFC0007FF, 0x480000A3, "f,G", 1 },
        !           203: { "frsqr.ss",  0xFC0007FF, 0x48000023, "f,g", 1 },
        !           204: 
        !           205: { "fst.d",     0xFC000007, 0x28000000, "G,1(2)", 0 },
        !           206: { "fst.d",     0xFC000007, 0x28000001, "G,1(2)++", 0 },
        !           207: { "fst.d",     0xFC000007, 0x2C000000, "G,l(2)", 0 },
        !           208: { "fst.d",     0xFC000007, 0x2C000001, "G,l(2)++", 1 },
        !           209: { "fst.l",     0xFC000003, 0x28000002, "g,1(2)", 0 },
        !           210: { "fst.l",     0xFC000003, 0x28000003, "g,1(2)++", 0 },
        !           211: { "fst.l",     0xFC000003, 0x2C000002, "g,k(2)", 0 },
        !           212: { "fst.l",     0xFC000003, 0x2C000003, "g,k(2)++", 1 },
        !           213: { "fst.q",     0xFC000007, 0x28000004, "H,1(2)", 0 },
        !           214: { "fst.q",     0xFC000007, 0x28000005, "H,1(2)++", 0 },
        !           215: { "fst.q",     0xFC000007, 0x2C000004, "H,m(2)", 0 },
        !           216: { "fst.q",     0xFC000007, 0x2C000005, "H,m(2)++", 1 },
        !           217: 
        !           218: { "fsub.dd",   0xFC0007FF, 0x480001B1, "E,F,G", 1 },
        !           219: { "fsub.sd",   0xFC0007FF, 0x480000B1, "e,f,G", 1 },
        !           220: { "fsub.ss",   0xFC0007FF, 0x48000031, "e,f,g", 1 },
        !           221: 
        !           222: { "ftrunc.dd", 0xFC0007FF, 0x480001BA, "E,G", 1 },
        !           223: { "ftrunc.sd", 0xFC0007FF, 0x480000BA, "e,G", 1 },
        !           224: /* { "ftrunc.ss",      0xFC0007FF, 0x4800003A, "e,g", 1 }, */  /* Not supported... */
        !           225: 
        !           226: { "fxfr",      0xFC0007FF, 0x48000040, "e,d", 1 },
        !           227: 
        !           228: { "fzchkl",    0xFC0007FF, 0x480001D7, "E,F,G", 1 },
        !           229: 
        !           230: { "fzchks",    0xFC0007FF, 0x480001DF, "E,F,G", 1 },
        !           231: 
        !           232: { "intovr",    0xFC00001F, 0x4C000004, "", 1 },
        !           233: 
        !           234: { "ixfr",      0xFC000000, 0x08000000, "1,g", 1 },
        !           235: 
        !           236: { "ld.b",      0xFC000000, 0x00000000, "1(2),d", 0 },
        !           237: { "ld.b",      0xFC000000, 0x04000000, "i(2),d", 1 },
        !           238: { "ld.c",      0xFC000000, 0x30000000, "C,d", 1 },
        !           239: { "ld.l",      0xFC000001, 0x10000001, "1(2),d", 0 },
        !           240: { "ld.l",      0xFC000001, 0x14000001, "k(2),d", 1 },
        !           241: { "ld.s",      0xFC000001, 0x10000000, "1(2),d", 0 },
        !           242: { "ld.s",      0xFC000001, 0x14000000, "j(2),d", 1 },
        !           243: 
        !           244: { "lock",      0xFC00001F, 0x4C000001, "", 1 },
        !           245: 
        !           246: { "nop",       0xFFFFFFFF, 0xA0000000, "", 1 },
        !           247: 
        !           248: { "mov",       0xFC00F800, 0xA0000000, "2,d", 1 },
        !           249: 
        !           250: { "or",                0xFC000000, 0xE0000000, "1,2,d", 0 },
        !           251: { "or",                0xFC000000, 0xE4000000, "i,2,d", 1 },
        !           252: { "orh",       0xFC000000, 0xEC000000, "i,2,d", 1 },
        !           253: 
        !           254: { "pfadd.dd",  0xFC0007FF, 0x480005B0, "E,F,G", 1 },
        !           255: { "pfadd.sd",  0xFC0007FF, 0x480004B0, "e,f,G", 1 },
        !           256: { "pfadd.ss",  0xFC0007FF, 0x48000430, "e,f,g", 1 },
        !           257: 
        !           258: { "pfaddp",    0xFC0007FF, 0x480005D0, "E,F,G", 1 },
        !           259: 
        !           260: { "pfaddz",    0xFC0007FF, 0x480005D1, "E,F,G", 1 },
        !           261: 
        !           262: { "pfeq.dd",   0xFC0007FF, 0x48000535, "E,F,G", 1 },
        !           263: { "pfeq.ss",   0xFC0007FF, 0x48000435, "e,f,g", 1 },
        !           264: { "pfeq.sd",   0xFC0007FF, 0x48000435, "e,f,G", 1 },
        !           265: 
        !           266: { "pfgt.dd",   0xFC0007FF, 0x48000534, "E,F,G", 1 },
        !           267: { "pfgt.ss",   0xFC0007FF, 0x48000434, "e,f,g", 1 },
        !           268: { "pfgt.sd",   0xFC0007FF, 0x48000434, "e,f,G", 1 },
        !           269: 
        !           270: { "pfiadd.dd", 0xFC0007FF, 0x480005C9, "E,F,G", 1 },
        !           271: { "pfiadd.ss", 0xFC0007FF, 0x48000449, "e,f,g", 1 },
        !           272: 
        !           273: { "pfisub.dd", 0xFC0007FF, 0x480005CD, "E,F,G", 1 },
        !           274: { "pfisub.ss", 0xFC0007FF, 0x4800044D, "e,f,g", 1 },
        !           275: 
        !           276: { "pfix.dd",   0xFC0007FF, 0x480005B2, "E,G", 1 },
        !           277: { "pfix.sd",   0xFC0007FF, 0x480004B2, "e,G", 1 },
        !           278: /* { "pfix.ss",        0xFC0007FF, 0x48000432, "e,g", 1 }, */  /* Not supported... */
        !           279: 
        !           280: { "pfld.d",    0xFC000007, 0x60000000, "1(2),G", 0 },
        !           281: { "pfld.d",    0xFC000007, 0x60000001, "1(2)++,G", 0 },
        !           282: { "pfld.d",    0xFC000007, 0x64000000, "l(2),G", 0 },
        !           283: { "pfld.d",    0xFC000007, 0x64000001, "l(2)++,G", 1 },
        !           284: { "pfld.l",    0xFC000003, 0x60000002, "1(2),g", 0 },
        !           285: { "pfld.l",    0xFC000003, 0x60000003, "1(2)++,g", 0 },
        !           286: { "pfld.l",    0xFC000003, 0x64000002, "k(2),g", 0 },
        !           287: { "pfld.l",    0xFC000003, 0x64000003, "k(2)++,g", 1 },
        !           288: 
        !           289: { "pfle.dd",   0xFC0007FF, 0x480005b4, "E,F,G", 1 },
        !           290: { "pfle.sd",   0xFC0007FF, 0x480004b4, "e,f,G", 1 },
        !           291: { "pfle.ss",   0xFC0007FF, 0x480004b4, "e,f,g", 1 },
        !           292: 
        !           293: { "pfmov.dd",  0xFFE007FF, 0x480005C9, "E,G", 1 },
        !           294: { "pfmov.ds",  0xFFE007FF, 0x48000533, "E,g", 1 },     /* Update B.0 4.0 errata */
        !           295: { "pfamov.ds", 0xFFE007FF, 0x48000533, "E,g", 1 },     /* B.0 insn */
        !           296: { "pfmov.sd",  0xFFE007FF, 0x480004B3, "e,G", 1 },     /* Update B.0 4.0 errata */
        !           297: { "pfamov.sd", 0xFFE007FF, 0x480004B3, "e,G", 1 },     /* B.0 insn */
        !           298: { "pfamov.ss", 0xFFE007FF, 0x48000433, "e,g", 1 },     /* B.0 insn */
        !           299: { "pfamov.dd", 0xFFE007FF, 0x480005B3, "E,G", 1 },     /* B.0 insn */
        !           300: { "pfmov.ss",  0xFFE007FF, 0x48000449, "e,g", 1 },
        !           301: 
        !           302: { "pfmul.dd",  0xFC0007FF, 0x480005A0, "E,F,G", 1 },
        !           303: { "pfmul.sd",  0xFC0007FF, 0x480004A0, "e,f,G", 1 },
        !           304: { "pfmul.ss",  0xFC0007FF, 0x48000420, "e,f,g", 1 },
        !           305: 
        !           306: { "pfmul3.dd", 0xFC0007FF, 0x480005A4, "E,F,G", 1 },
        !           307: /* { "pfmul3.sd",      0xFC0007FF, 0x480004A4, "e,f,g", 1 }, */ /* Not supported... */
        !           308: /* { "pfmul3.ss",      0xFC0007FF, 0x48000424, "e,f,g", 1 }, */
        !           309: 
        !           310: { "pform",     0xFC0007FF, 0x480005DA, "E,G", 1 },
        !           311: 
        !           312: { "pfsub.dd",  0xFC0007FF, 0x480005B1, "E,F,G", 1 },
        !           313: { "pfsub.sd",  0xFC0007FF, 0x480004B1, "e,f,G", 1 },
        !           314: { "pfsub.ss",  0xFC0007FF, 0x48000431, "e,f,g", 1 },
        !           315: 
        !           316: { "pftrunc.dd",        0xFC0007FF, 0x480005BA, "E,G", 1 },
        !           317: { "pftrunc.sd",        0xFC0007FF, 0x480004BA, "e,G", 1 },
        !           318: /* { "pftrunc.ss",     0xFC0007FF, 0x4800043A, "e,g", 1 }, */  /* Not supported... */
        !           319: 
        !           320: { "pfzchkl",   0xFC0007FF, 0x480005D7, "E,F,G", 1 },
        !           321: 
        !           322: { "pfzchks",   0xFC0007FF, 0x480005DF, "E,F,G", 1 },
        !           323: 
        !           324: { "pst.d",     0xFC000007, 0x3C000000, "G,l(2)", 0 },
        !           325: { "pst.d",     0xFC000007, 0x3C000001, "G,l(2)++", 1 },
        !           326: 
        !           327: { "shl",       0xFC000000, 0xA0000000, "1,2,d", 0 },
        !           328: { "shl",       0xFC000000, 0xA4000000, "D,2,d", 1 },
        !           329: 
        !           330: { "shr",       0xFC000000, 0xA8000000, "1,2,d", 0 },
        !           331: { "shr",       0xFC000000, 0xAC000000, "D,2,d", 1 },
        !           332: { "shra",      0xFC000000, 0xB8000000, "1,2,d", 0 },
        !           333: { "shra",      0xFC000000, 0xBC000000, "D,2,d", 1 },
        !           334: { "shrd",      0xFC000000, 0xB0000000, "1,2,d", 1 },
        !           335: 
        !           336: { "st.b",      0xFC000000, 0x0C000000, "1,n(2)", 1 },
        !           337: { "st.c",      0xFC000000, 0x38000000, "1,C", 1 },
        !           338: { "st.l",      0xFC000001, 0x1C000001, "1,p(2)", 1 },
        !           339: { "st.s",      0xFC000001, 0x1C000000, "1,o(2)", 1 },
        !           340: 
        !           341: { "subs",      0xFC000000, 0x98000000, "1,2,d", 0 },
        !           342: { "subs",      0xFC000000, 0x9C000000, "i,2,d", 1 },
        !           343: { "subu",      0xFC000000, 0x88000000, "1,2,d", 0 },
        !           344: { "subu",      0xFC000000, 0x8C000000, "i,2,d", 1 },
        !           345: 
        !           346: { "trap",      0xFC000000, 0x44000000, "1,2,d", 1 },
        !           347: 
        !           348: { "unlock",    0xFC00001F, 0x4C000007, "", 1 },
        !           349: 
        !           350: { "xor",       0xFC000000, 0xF0000000, "1,2,d", 0 },
        !           351: { "xor",       0xFC000000, 0xF4000000, "i,2,d", 1 },
        !           352: { "xorh",      0xFC000000, 0xFC000000, "i,2,d", 1 },
        !           353: 
        !           354: 
        !           355: /*
        !           356:  *           Pipelined Accumulate/Multiply Operators
        !           357:  *
        !           358:  *             Abandon all hope, ye who enter here...
        !           359:  *
        !           360:  * PFAM operators.  There are 48 of these horrors.  Don't ask....
        !           361:  */
        !           362: { "r2p1.dd",   0xFC0007FF, 0x48000580, "E,F,G", 1 },
        !           363: { "r2pt.dd",   0xFC0007FF, 0x48000581, "E,F,G", 1 },
        !           364: { "r2ap1.dd",  0xFC0007FF, 0x48000582, "E,F,G", 1 },
        !           365: { "r2apt.dd",  0xFC0007FF, 0x48000583, "E,F,G", 1 },
        !           366: { "i2p1.dd",   0xFC0007FF, 0x48000584, "E,F,G", 1 },
        !           367: { "i2pt.dd",   0xFC0007FF, 0x48000585, "E,F,G", 1 },
        !           368: { "i2ap1.dd",  0xFC0007FF, 0x48000586, "E,F,G", 1 },
        !           369: { "i2apt.dd",  0xFC0007FF, 0x48000587, "E,F,G", 1 },
        !           370: { "rat1p2.dd", 0xFC0007FF, 0x48000588, "E,F,G", 1 },
        !           371: { "m12apm.dd", 0xFC0007FF, 0x48000589, "E,F,G", 1 },
        !           372: { "ra1p2.dd",  0xFC0007FF, 0x4800058A, "E,F,G", 1 },
        !           373: { "m12ttpa.dd",        0xFC0007FF, 0x4800058B, "E,F,G", 1 },
        !           374: { "iat1p2.dd", 0xFC0007FF, 0x4800058C, "E,F,G", 1 },
        !           375: { "m12tpm.dd", 0xFC0007FF, 0x4800058D, "E,F,G", 1 },
        !           376: { "ia1p2.dd",  0xFC0007FF, 0x4800058E, "E,F,G", 1 },
        !           377: { "m12tpa.dd", 0xFC0007FF, 0x4800058F, "E,F,G", 1 },
        !           378: 
        !           379: { "r2p1.sd",   0xFC0007FF, 0x48000480, "e,f,G", 1 },
        !           380: { "r2pt.sd",   0xFC0007FF, 0x48000481, "e,f,G", 1 },
        !           381: { "r2ap1.sd",  0xFC0007FF, 0x48000482, "e,f,G", 1 },
        !           382: { "r2apt.sd",  0xFC0007FF, 0x48000483, "e,f,G", 1 },
        !           383: { "i2p1.sd",   0xFC0007FF, 0x48000484, "e,f,G", 1 },
        !           384: { "i2pt.sd",   0xFC0007FF, 0x48000485, "e,f,G", 1 },
        !           385: { "i2ap1.sd",  0xFC0007FF, 0x48000486, "e,f,G", 1 },
        !           386: { "i2apt.sd",  0xFC0007FF, 0x48000487, "e,f,G", 1 },
        !           387: { "rat1p2.sd", 0xFC0007FF, 0x48000488, "e,f,G", 1 },
        !           388: { "m12apm.sd", 0xFC0007FF, 0x48000489, "e,f,G", 1 },
        !           389: { "ra1p2.sd",  0xFC0007FF, 0x4800048A, "e,f,G", 1 },
        !           390: { "m12ttpa.sd",        0xFC0007FF, 0x4800048B, "e,f,G", 1 },
        !           391: { "iat1p2.sd", 0xFC0007FF, 0x4800048C, "e,f,G", 1 },
        !           392: { "m12tpm.sd", 0xFC0007FF, 0x4800048D, "e,f,G", 1 },
        !           393: { "ia1p2.sd",  0xFC0007FF, 0x4800048E, "e,f,G", 1 },
        !           394: { "m12tpa.sd", 0xFC0007FF, 0x4800048F, "e,f,G", 1 },
        !           395: 
        !           396: { "r2p1.ss",   0xFC0007FF, 0x48000400, "e,f,g", 1 },
        !           397: { "r2pt.ss",   0xFC0007FF, 0x48000401, "e,f,g", 1 },
        !           398: { "r2ap1.ss",  0xFC0007FF, 0x48000402, "e,f,g", 1 },
        !           399: { "r2apt.ss",  0xFC0007FF, 0x48000403, "e,f,g", 1 },
        !           400: { "i2p1.ss",   0xFC0007FF, 0x48000404, "e,f,g", 1 },
        !           401: { "i2pt.ss",   0xFC0007FF, 0x48000405, "e,f,g", 1 },
        !           402: { "i2ap1.ss",  0xFC0007FF, 0x48000406, "e,f,g", 1 },
        !           403: { "i2apt.ss",  0xFC0007FF, 0x48000407, "e,f,g", 1 },
        !           404: { "rat1p2.ss", 0xFC0007FF, 0x48000408, "e,f,g", 1 },
        !           405: { "m12apm.ss", 0xFC0007FF, 0x48000409, "e,f,g", 1 },
        !           406: { "ra1p2.ss",  0xFC0007FF, 0x4800040A, "e,f,g", 1 },
        !           407: { "m12ttpa.ss",        0xFC0007FF, 0x4800040B, "e,f,g", 1 },
        !           408: { "iat1p2.ss", 0xFC0007FF, 0x4800040C, "e,f,g", 1 },
        !           409: { "m12tpm.ss", 0xFC0007FF, 0x4800040D, "e,f,g", 1 },
        !           410: { "ia1p2.ss",  0xFC0007FF, 0x4800040E, "e,f,g", 1 },
        !           411: { "m12tpa.ss", 0xFC0007FF, 0x4800040F, "e,f,g", 1 },
        !           412: 
        !           413: /*
        !           414:  * PFMAM operators.  There are 48 of these.
        !           415:  */
        !           416: { "mr2p1.dd",  0xFC0007FF, 0x48000180, "E,F,G", 1 },
        !           417: { "mr2pt.dd",  0xFC0007FF, 0x48000181, "E,F,G", 1 },
        !           418: { "mr2mp1.dd", 0xFC0007FF, 0x48000182, "E,F,G", 1 },
        !           419: { "mr2mpt.dd", 0xFC0007FF, 0x48000183, "E,F,G", 1 },
        !           420: { "mi2p1.dd",  0xFC0007FF, 0x48000184, "E,F,G", 1 },
        !           421: { "mi2pt.dd",  0xFC0007FF, 0x48000185, "E,F,G", 1 },
        !           422: { "mi2mp1.dd", 0xFC0007FF, 0x48000186, "E,F,G", 1 },
        !           423: { "mi2mpt.dd", 0xFC0007FF, 0x48000187, "E,F,G", 1 },
        !           424: { "mrmt1p2.dd",        0xFC0007FF, 0x48000188, "E,F,G", 1 },
        !           425: { "mm12mpm.dd",        0xFC0007FF, 0x48000189, "E,F,G", 1 },
        !           426: { "mrm1p2.dd", 0xFC0007FF, 0x4800018A, "E,F,G", 1 },
        !           427: { "mm12ttpm.dd",0xFC0007FF, 0x4800018B,        "E,F,G", 1 },
        !           428: { "mimt1p2.dd",        0xFC0007FF, 0x4800018C, "E,F,G", 1 },
        !           429: { "mm12tpm.dd",        0xFC0007FF, 0x4800018D, "E,F,G", 1 },
        !           430: { "mim1p2.dd", 0xFC0007FF, 0x4800018E, "E,F,G", 1 },
        !           431: /* { "mm12tpm.dd",     0xFC0007FF, 0x4800018F, "E,F,G", 1 }, */  /* ??? */
        !           432: 
        !           433: { "mr2p1.sd",  0xFC0007FF, 0x48000080, "e,f,G", 1 },
        !           434: { "mr2pt.sd",  0xFC0007FF, 0x48000081, "e,f,G", 1 },
        !           435: { "mr2mp1.sd", 0xFC0007FF, 0x48000082, "e,f,G", 1 },
        !           436: { "mr2mpt.sd", 0xFC0007FF, 0x48000083, "e,f,G", 1 },
        !           437: { "mi2p1.sd",  0xFC0007FF, 0x48000084, "e,f,G", 1 },
        !           438: { "mi2pt.sd",  0xFC0007FF, 0x48000085, "e,f,G", 1 },
        !           439: { "mi2mp1.sd", 0xFC0007FF, 0x48000086, "e,f,G", 1 },
        !           440: { "mi2mpt.sd", 0xFC0007FF, 0x48000087, "e,f,G", 1 },
        !           441: { "mrmt1p2.sd",        0xFC0007FF, 0x48000088, "e,f,G", 1 },
        !           442: { "mm12mpm.sd",        0xFC0007FF, 0x48000089, "e,f,G", 1 },
        !           443: { "mrm1p2.sd", 0xFC0007FF, 0x4800008A, "e,f,G", 1 },
        !           444: { "mm12ttpm.sd",0xFC0007FF, 0x4800008B,        "e,f,G", 1 },
        !           445: { "mimt1p2.sd",        0xFC0007FF, 0x4800008C, "e,f,G", 1 },
        !           446: { "mm12tpm.sd",        0xFC0007FF, 0x4800008D, "e,f,G", 1 },
        !           447: { "mim1p2.sd", 0xFC0007FF, 0x4800008E, "e,f,G", 1 },
        !           448: /* { "mm12tpm.sd",     0xFC0007FF, 0x4800008F, "e,f,G", 1 }, */   /* ??? */
        !           449: 
        !           450: { "mr2p1.ss",  0xFC0007FF, 0x48000000, "e,f,g", 1 },
        !           451: { "mr2pt.ss",  0xFC0007FF, 0x48000001, "e,f,g", 1 },
        !           452: { "mr2mp1.ss", 0xFC0007FF, 0x48000002, "e,f,g", 1 },
        !           453: { "mr2mpt.ss", 0xFC0007FF, 0x48000003, "e,f,g", 1 },
        !           454: { "mi2p1.ss",  0xFC0007FF, 0x48000004, "e,f,g", 1 },
        !           455: { "mi2pt.ss",  0xFC0007FF, 0x48000005, "e,f,g", 1 },
        !           456: { "mi2mp1.ss", 0xFC0007FF, 0x48000006, "e,f,g", 1 },
        !           457: { "mi2mpt.ss", 0xFC0007FF, 0x48000007, "e,f,g", 1 },
        !           458: { "mrmt1p2.ss",        0xFC0007FF, 0x48000008, "e,f,g", 1 },
        !           459: { "mm12mpm.ss",        0xFC0007FF, 0x48000009, "e,f,g", 1 },
        !           460: { "mrm1p2.ss", 0xFC0007FF, 0x4800000A, "e,f,g", 1 },
        !           461: { "mm12ttpm.ss",0xFC0007FF, 0x4800000B,        "e,f,g", 1 },
        !           462: { "mimt1p2.ss",        0xFC0007FF, 0x4800000C, "e,f,g", 1 },
        !           463: { "mm12tpm.ss",        0xFC0007FF, 0x4800000D, "e,f,g", 1 },
        !           464: { "mim1p2.ss", 0xFC0007FF, 0x4800000E, "e,f,g", 1 },
        !           465: /* { "mm12tpm.ss",     0xFC0007FF, 0x4800000F, "e,f,g", 1 }, */  /* ??? */
        !           466: 
        !           467: /*
        !           468:  * PFMSM operators.  There are 48 of these.
        !           469:  */
        !           470: { "mr2s1.dd",  0xFC0007FF, 0x48000190, "E,F,G", 1 },
        !           471: { "mr2st.dd",  0xFC0007FF, 0x48000191, "E,F,G", 1 },
        !           472: { "mr2ms1.dd", 0xFC0007FF, 0x48000192, "E,F,G", 1 },
        !           473: { "mr2mst.dd", 0xFC0007FF, 0x48000193, "E,F,G", 1 },
        !           474: { "mi2s1.dd",  0xFC0007FF, 0x48000194, "E,F,G", 1 },
        !           475: { "mi2st.dd",  0xFC0007FF, 0x48000195, "E,F,G", 1 },
        !           476: { "mi2ms1.dd", 0xFC0007FF, 0x48000196, "E,F,G", 1 },
        !           477: { "mi2mst.dd", 0xFC0007FF, 0x48000197, "E,F,G", 1 },
        !           478: { "mrmt1s2.dd",        0xFC0007FF, 0x48000198, "E,F,G", 1 },
        !           479: { "mm12msm.dd",        0xFC0007FF, 0x48000199, "E,F,G", 1 },
        !           480: { "mrm1s2.dd", 0xFC0007FF, 0x4800019A, "E,F,G", 1 },
        !           481: { "mm12ttsm.dd",0xFC0007FF, 0x4800019B,        "E,F,G", 1 },
        !           482: { "mimt1s2.dd",        0xFC0007FF, 0x4800019C, "E,F,G", 1 },
        !           483: { "mm12tsm.dd",        0xFC0007FF, 0x4800019D, "E,F,G", 1 },
        !           484: { "mim1s2.dd", 0xFC0007FF, 0x4800019E, "E,F,G", 1 },
        !           485: /* { "mm12tsm.dd",     0xFC0007FF, 0x4800019F, "E,F,G", 1 }, */  /* ??? */
        !           486: 
        !           487: { "mr2s1.sd",  0xFC0007FF, 0x48000090, "e,f,G", 1 },
        !           488: { "mr2st.sd",  0xFC0007FF, 0x48000091, "e,f,G", 1 },
        !           489: { "mr2ms1.sd", 0xFC0007FF, 0x48000092, "e,f,G", 1 },
        !           490: { "mr2mst.sd", 0xFC0007FF, 0x48000093, "e,f,G", 1 },
        !           491: { "mi2s1.sd",  0xFC0007FF, 0x48000094, "e,f,G", 1 },
        !           492: { "mi2st.sd",  0xFC0007FF, 0x48000095, "e,f,G", 1 },
        !           493: { "mi2ms1.sd", 0xFC0007FF, 0x48000096, "e,f,G", 1 },
        !           494: { "mi2mst.sd", 0xFC0007FF, 0x48000097, "e,f,G", 1 },
        !           495: { "mrmt1s2.sd",        0xFC0007FF, 0x48000098, "e,f,G", 1 },
        !           496: { "mm12msm.sd",        0xFC0007FF, 0x48000099, "e,f,G", 1 },
        !           497: { "mrm1s2.sd", 0xFC0007FF, 0x4800009A, "e,f,G", 1 },
        !           498: { "mm12ttsm.sd",0xFC0007FF, 0x4800009B,        "e,f,G", 1 },
        !           499: { "mimt1s2.sd",        0xFC0007FF, 0x4800009C, "e,f,G", 1 },
        !           500: { "mm12tsm.sd",        0xFC0007FF, 0x4800009D, "e,f,G", 1 },
        !           501: { "mim1s2.sd", 0xFC0007FF, 0x4800009E, "e,f,G", 1 },
        !           502: /* { "mm12tsm.sd",     0xFC0007FF, 0x4800009F, "e,f,G", 1 }, */  /* ??? */
        !           503: 
        !           504: { "mr2s1.ss",  0xFC0007FF, 0x48000010, "e,f,g", 1 },
        !           505: { "mr2st.ss",  0xFC0007FF, 0x48000011, "e,f,g", 1 },
        !           506: { "mr2ms1.ss", 0xFC0007FF, 0x48000012, "e,f,g", 1 },
        !           507: { "mr2mst.ss", 0xFC0007FF, 0x48000013, "e,f,g", 1 },
        !           508: { "mi2s1.ss",  0xFC0007FF, 0x48000014, "e,f,g", 1 },
        !           509: { "mi2st.ss",  0xFC0007FF, 0x48000015, "e,f,g", 1 },
        !           510: { "mi2ms1.ss", 0xFC0007FF, 0x48000016, "e,f,g", 1 },
        !           511: { "mi2mst.ss", 0xFC0007FF, 0x48000017, "e,f,g", 1 },
        !           512: { "mrmt1s2.ss",        0xFC0007FF, 0x48000018, "e,f,g", 1 },
        !           513: { "mm12msm.ss",        0xFC0007FF, 0x48000019, "e,f,g", 1 },
        !           514: { "mrm1s2.ss", 0xFC0007FF, 0x4800001A, "e,f,g", 1 },
        !           515: { "mm12ttsm.ss",0xFC0007FF, 0x4800001B,        "e,f,g", 1 },
        !           516: { "mimt1s2.ss",        0xFC0007FF, 0x4800001C, "e,f,g", 1 },
        !           517: { "mm12tsm.ss",        0xFC0007FF, 0x4800001D, "e,f,g", 1 },
        !           518: { "mim1s2.ss", 0xFC0007FF, 0x4800001E, "e,f,g", 1 },
        !           519: /* { "mm12tsm.ss",     0xFC0007FF, 0x4800001F, "e,f,g", 1 }, */  /* ??? */
        !           520: 
        !           521: /*
        !           522:  * PFSM operators.  There are 48 of these.
        !           523:  */
        !           524: { "r2s1.dd",   0xFC0007FF, 0x48000590, "E,F,G", 1 },
        !           525: { "r2st.dd",   0xFC0007FF, 0x48000591, "E,F,G", 1 },
        !           526: { "r2as1.dd",  0xFC0007FF, 0x48000592, "E,F,G", 1 },
        !           527: { "r2ast.dd",  0xFC0007FF, 0x48000593, "E,F,G", 1 },
        !           528: { "i2s1.dd",   0xFC0007FF, 0x48000594, "E,F,G", 1 },
        !           529: { "i2st.dd",   0xFC0007FF, 0x48000595, "E,F,G", 1 },
        !           530: { "i2as1.dd",  0xFC0007FF, 0x48000596, "E,F,G", 1 },
        !           531: { "i2ast.dd",  0xFC0007FF, 0x48000597, "E,F,G", 1 },
        !           532: { "rat1s2.dd", 0xFC0007FF, 0x48000598, "E,F,G", 1 },
        !           533: { "m12asm.dd", 0xFC0007FF, 0x48000599, "E,F,G", 1 },
        !           534: { "ra1s2.dd",  0xFC0007FF, 0x4800059A, "E,F,G", 1 },
        !           535: { "m12ttsa.dd",        0xFC0007FF, 0x4800059B, "E,F,G", 1 },
        !           536: { "iat1s2.dd", 0xFC0007FF, 0x4800059C, "E,F,G", 1 },
        !           537: { "m12tsm.dd", 0xFC0007FF, 0x4800059D, "E,F,G", 1 },
        !           538: { "ia1s2.dd",  0xFC0007FF, 0x4800059E, "E,F,G", 1 },
        !           539: { "m12tsa.dd", 0xFC0007FF, 0x4800059F, "E,F,G", 1 },
        !           540: 
        !           541: { "r2s1.sd",   0xFC0007FF, 0x48000490, "e,f,G", 1 },
        !           542: { "r2st.sd",   0xFC0007FF, 0x48000491, "e,f,G", 1 },
        !           543: { "r2as1.sd",  0xFC0007FF, 0x48000492, "e,f,G", 1 },
        !           544: { "r2ast.sd",  0xFC0007FF, 0x48000493, "e,f,G", 1 },
        !           545: { "i2s1.sd",   0xFC0007FF, 0x48000494, "e,f,G", 1 },
        !           546: { "i2st.sd",   0xFC0007FF, 0x48000495, "e,f,G", 1 },
        !           547: { "i2as1.sd",  0xFC0007FF, 0x48000496, "e,f,G", 1 },
        !           548: { "i2ast.sd",  0xFC0007FF, 0x48000497, "e,f,G", 1 },
        !           549: { "rat1s2.sd", 0xFC0007FF, 0x48000498, "e,f,G", 1 },
        !           550: { "m12asm.sd", 0xFC0007FF, 0x48000499, "e,f,G", 1 },
        !           551: { "ra1s2.sd",  0xFC0007FF, 0x4800049A, "e,f,G", 1 },
        !           552: { "m12ttsa.sd",        0xFC0007FF, 0x4800049B, "e,f,G", 1 },
        !           553: { "iat1s2.sd", 0xFC0007FF, 0x4800049C, "e,f,G", 1 },
        !           554: { "m12tsm.sd", 0xFC0007FF, 0x4800049D, "e,f,G", 1 },
        !           555: { "ia1s2.sd",  0xFC0007FF, 0x4800049E, "e,f,G", 1 },
        !           556: { "m12tsa.sd", 0xFC0007FF, 0x4800049F, "e,f,G", 1 },
        !           557: 
        !           558: { "r2s1.ss",   0xFC0007FF, 0x48000410, "e,f,g", 1 },
        !           559: { "r2st.ss",   0xFC0007FF, 0x48000411, "e,f,g", 1 },
        !           560: { "r2as1.ss",  0xFC0007FF, 0x48000412, "e,f,g", 1 },
        !           561: { "r2ast.ss",  0xFC0007FF, 0x48000413, "e,f,g", 1 },
        !           562: { "i2s1.ss",   0xFC0007FF, 0x48000414, "e,f,g", 1 },
        !           563: { "i2st.ss",   0xFC0007FF, 0x48000415, "e,f,g", 1 },
        !           564: { "i2as1.ss",  0xFC0007FF, 0x48000416, "e,f,g", 1 },
        !           565: { "i2ast.ss",  0xFC0007FF, 0x48000417, "e,f,g", 1 },
        !           566: { "rat1s2.ss", 0xFC0007FF, 0x48000418, "e,f,g", 1 },
        !           567: { "m12asm.ss", 0xFC0007FF, 0x48000419, "e,f,g", 1 },
        !           568: { "ra1s2.ss",  0xFC0007FF, 0x4800041A, "e,f,g", 1 },
        !           569: { "m12ttsa.ss",        0xFC0007FF, 0x4800041B, "e,f,g", 1 },
        !           570: { "iat1s2.ss", 0xFC0007FF, 0x4800041C, "e,f,g", 1 },
        !           571: { "m12tsm.ss", 0xFC0007FF, 0x4800041D, "e,f,g", 1 },
        !           572: { "ia1s2.ss",  0xFC0007FF, 0x4800041E, "e,f,g", 1 },
        !           573: { "m12tsa.ss", 0xFC0007FF, 0x4800041F, "e,f,g", 1 },
        !           574: 
        !           575: };
        !           576: 
        !           577: #define NUMOPCODES ((sizeof i860_opcodes)/(sizeof *i860_opcodes))

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