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1.1 root 1: #include <stdio.h>
2: #define DREG 0x1 /* Data Register Direct */
3: #define AREG 0x2 /* Address Register Direct */
4: #define AINDR 0x4 /* Address Register Indirect */
5: #define AINC 0x8 /* Address Register Indirect with Postincrement */
6: #define ADEC 0x10 /* Address Register Indirect with Predecrement */
7: #define Ad16 0x20 /* Address Register Indirect with Displacement */
8: #define Ad8Xn 0x40 /* Address Register Indirect with Index */
9: /* (8-Bit Displacement) */
10: #define AbdXn 0x80 /* Address Register Indirect with Index */
11: /* (Base Displacement) */
12: #define MIPRE 0x100 /* Memory Indirect with Preindexed */
13: #define MIPOST 0x200 /* Memory Indirect with Postindexed */
14: #define ABSW 0x400 /* Absolute Short */
15: #define ABSL 0x800 /* Absolute Long */
16: #define IMMED 0x1000 /* Immediate */
17: #define PCd16 0x2000 /* Program Counter Indirect with Displacement */
18: #define PCd8Xn 0x4000 /* Program Counter Indirect with Index */
19: /* (8-Bit Displacement) */
20: #define PCbdXn 0x8000 /* Program Counter Indirect with Index */
21: /* (Base Displacement) */
22: #define PCMIPRE 0x10000 /* Program Counter Memory Indirect with Preindexed */
23: #define PCMIPOST 0x20000/* Program Counter Memory Indirect with Postindexed */
24: #define MOVEC_REG 0x40000
25: #define SPECIAL_1 0x80000
26: #define SPECIAL_2 0x100000
27: #define SPECIAL_3 0x200000
28:
29: struct operand {
30: char *string;
31: long type;
32: };
33:
34: struct operand ops[] = {
35: /* Dn "Data Register Direct" Dn */
36: { "d0", DREG },
37: /* An "Address Register Direct" An */
38: { "a1", AREG },
39: /* An@ "Address Register Indirect" (An) */
40: { "a3@", AINDR },
41: /* An@+ "Address Register Indirect with Postincrement" (An)+ */
42: { "a3@+", AINC },
43: /* An@- "Address Register Indirect with Predecrement" -(An) */
44: { "a3@-", ADEC },
45: /* An@(d16) "Address Register Indirect with Displacement" (d16,An) */
46: { "a3@(0x1234:w)", Ad16 },
47: /* An@(d8,Xn) "Address Register Indirect with Index (8-Bit Displacement)"
48: uses Brief Format Extension Word (d8,An,Xn) */
49: #ifdef ALL_OPERANDS
50: { "a3@(0x12:b,d2:w:1)", Ad8Xn },
51: { "a3@(0x12:b,d2:w:2)", Ad8Xn },
52: { "a3@(0x12:b,d2:w:4)", Ad8Xn },
53: { "a3@(0x12:b,d2:w:8)", Ad8Xn },
54: { "a3@(0x12:b,d2:l:1)", Ad8Xn },
55: { "a3@(0x12:b,d2:l:2)", Ad8Xn },
56: { "a3@(0x12:b,d2:l:4)", Ad8Xn },
57: { "a3@(0x12:b,d2:l:8)", Ad8Xn },
58: { "a3@(0x12:b,a5:w:1)", Ad8Xn },
59: { "a3@(0x12:b,a5:w:2)", Ad8Xn },
60: { "a3@(0x12:b,a5:w:4)", Ad8Xn },
61: { "a3@(0x12:b,a5:w:8)", Ad8Xn },
62: { "a3@(0x12:b,a5:l:1)", Ad8Xn },
63: { "a3@(0x12:b,a5:l:2)", Ad8Xn },
64: { "a3@(0x12:b,a5:l:4)", Ad8Xn },
65: #endif ALL_OPERANDS
66: { "a3@(0x12:b,a5:l:8)", Ad8Xn },
67: /* An@(bd,Xn) "Address Register Indirect with Index (Base Displacement)",
68: uses Full Format Extension Word(s) (bd,An,Xn) */
69: #ifdef ALL_OPERANDS
70: /* the form of An@(bd,Xn) with bd (base displacement) encoded as a null
71: displacement will not be generated by the assembler because it will use
72: the form An(d8,Xn).
73: { "a3@(0)", AbdXn },
74: { "a3@(0,d2:w:1)", AbdXn },
75: { "a3@(0,d2:w:2)", AbdXn },
76: { "a3@(0,d2:w:4)", AbdXn },
77: { "a3@(0,d2:w:8)", AbdXn },
78: { "a3@(0,d2:l:1)", AbdXn },
79: { "a3@(0,d2:l:2)", AbdXn },
80: { "a3@(0,d2:l:4)", AbdXn },
81: { "a3@(0,d2:l:8)", AbdXn },
82: { "a3@(0,a5:w:1)", AbdXn },
83: { "a3@(0,a5:w:2)", AbdXn },
84: { "a3@(0,a5:w:4)", AbdXn },
85: { "a3@(0,a5:w:8)", AbdXn },
86: { "a3@(0,a5:l:1)", AbdXn },
87: { "a3@(0,a5:l:2)", AbdXn },
88: { "a3@(0,a5:l:4)", AbdXn },
89: { "a3@(0,a5:l:8)", AbdXn },
90: */
91: { "a3@(0x1234:w,d2:w:1)", AbdXn },
92: { "a3@(0x1234:w,d2:w:2)", AbdXn },
93: { "a3@(0x1234:w,d2:w:4)", AbdXn },
94: { "a3@(0x1234:w,d2:w:8)", AbdXn },
95: { "a3@(0x1234:w,d2:l:1)", AbdXn },
96: { "a3@(0x1234:w,d2:l:2)", AbdXn },
97: { "a3@(0x1234:w,d2:l:4)", AbdXn },
98: { "a3@(0x1234:w,d2:l:8)", AbdXn },
99: { "a3@(0x1234:w,a5:w:1)", AbdXn },
100: { "a3@(0x1234:w,a5:w:2)", AbdXn },
101: { "a3@(0x1234:w,a5:w:4)", AbdXn },
102: { "a3@(0x1234:w,a5:w:8)", AbdXn },
103: { "a3@(0x1234:w,a5:l:1)", AbdXn },
104: { "a3@(0x1234:w,a5:l:2)", AbdXn },
105: { "a3@(0x1234:w,a5:l:4)", AbdXn },
106: { "a3@(0x1234:w,a5:l:8)", AbdXn },
107: { "a3@(0x1234abcd:l,d2:w:1)", AbdXn },
108: { "a3@(0x1234abcd:l,d2:w:2)", AbdXn },
109: { "a3@(0x1234abcd:l,d2:w:4)", AbdXn },
110: { "a3@(0x1234abcd:l,d2:w:8)", AbdXn },
111: { "a3@(0x1234abcd:l,d2:l:1)", AbdXn },
112: { "a3@(0x1234abcd:l,d2:l:2)", AbdXn },
113: { "a3@(0x1234abcd:l,d2:l:4)", AbdXn },
114: { "a3@(0x1234abcd:l,d2:l:8)", AbdXn },
115: { "a3@(0x1234abcd:l,a5:w:1)", AbdXn },
116: { "a3@(0x1234abcd:l,a5:w:2)", AbdXn },
117: { "a3@(0x1234abcd:l,a5:w:4)", AbdXn },
118: { "a3@(0x1234abcd:l,a5:w:8)", AbdXn },
119: { "a3@(0x1234abcd:l,a5:l:1)", AbdXn },
120: { "a3@(0x1234abcd:l,a5:l:2)", AbdXn },
121: { "a3@(0x1234abcd:l,a5:l:4)", AbdXn },
122: #endif ALL_OPERANDS
123: { "a3@(0x1234abcd:l,a5:l:8)", AbdXn },
124: #ifdef ALL_OPERANDS
125: { "@(0)", AbdXn },
126: { "@(0,d2:w:1)", AbdXn },
127: { "@(0,d2:w:2)", AbdXn },
128: { "@(0,d2:w:4)", AbdXn },
129: { "@(0,d2:w:8)", AbdXn },
130: { "@(0,d2:l:1)", AbdXn },
131: { "@(0,d2:l:2)", AbdXn },
132: { "@(0,d2:l:4)", AbdXn },
133: { "@(0,d2:l:8)", AbdXn },
134: { "@(0,a5:w:1)", AbdXn },
135: { "@(0,a5:w:2)", AbdXn },
136: { "@(0,a5:w:4)", AbdXn },
137: { "@(0,a5:w:8)", AbdXn },
138: { "@(0,a5:l:1)", AbdXn },
139: { "@(0,a5:l:2)", AbdXn },
140: { "@(0,a5:l:4)", AbdXn },
141: { "@(0,a5:l:8)", AbdXn },
142: { "@(0x1234:w,d2:w:1)", AbdXn },
143: { "@(0x1234:w,d2:w:2)", AbdXn },
144: { "@(0x1234:w,d2:w:4)", AbdXn },
145: { "@(0x1234:w,d2:w:8)", AbdXn },
146: { "@(0x1234:w,d2:l:1)", AbdXn },
147: { "@(0x1234:w,d2:l:2)", AbdXn },
148: { "@(0x1234:w,d2:l:4)", AbdXn },
149: { "@(0x1234:w,d2:l:8)", AbdXn },
150: { "@(0x1234:w,a5:w:1)", AbdXn },
151: { "@(0x1234:w,a5:w:2)", AbdXn },
152: { "@(0x1234:w,a5:w:4)", AbdXn },
153: { "@(0x1234:w,a5:w:8)", AbdXn },
154: { "@(0x1234:w,a5:l:1)", AbdXn },
155: { "@(0x1234:w,a5:l:2)", AbdXn },
156: { "@(0x1234:w,a5:l:4)", AbdXn },
157: { "@(0x1234:w,a5:l:8)", AbdXn },
158: { "@(0x1234abcd:l,d2:w:1)", AbdXn },
159: { "@(0x1234abcd:l,d2:w:2)", AbdXn },
160: { "@(0x1234abcd:l,d2:w:4)", AbdXn },
161: { "@(0x1234abcd:l,d2:w:8)", AbdXn },
162: { "@(0x1234abcd:l,d2:l:1)", AbdXn },
163: { "@(0x1234abcd:l,d2:l:2)", AbdXn },
164: { "@(0x1234abcd:l,d2:l:4)", AbdXn },
165: { "@(0x1234abcd:l,d2:l:8)", AbdXn },
166: { "@(0x1234abcd:l,a5:w:1)", AbdXn },
167: { "@(0x1234abcd:l,a5:w:2)", AbdXn },
168: { "@(0x1234abcd:l,a5:w:4)", AbdXn },
169: { "@(0x1234abcd:l,a5:w:8)", AbdXn },
170: { "@(0x1234abcd:l,a5:l:1)", AbdXn },
171: { "@(0x1234abcd:l,a5:l:2)", AbdXn },
172: { "@(0x1234abcd:l,a5:l:4)", AbdXn },
173: { "@(0x1234abcd:l,a5:l:8)", AbdXn },
174: #endif ALL_OPERANDS
175: /* An@(bd,Xn)@(od) "Memory Indirect with Preindexed" ([bd,An,Xn],od)
176: uses Full Format Extension Word(s) */
177: #ifdef ALL_OPERANDS
178: { "a3@(0)@(0)", MIPRE },
179: { "a3@(0,d2:w:1)@(0)", MIPRE },
180: { "a3@(0,d2:w:2)@(0)", MIPRE },
181: { "a3@(0,d2:w:4)@(0)", MIPRE },
182: { "a3@(0,d2:w:8)@(0)", MIPRE },
183: { "a3@(0,d2:l:1)@(0)", MIPRE },
184: { "a3@(0,d2:l:2)@(0)", MIPRE },
185: { "a3@(0,d2:l:4)@(0)", MIPRE },
186: { "a3@(0,d2:l:8)@(0)", MIPRE },
187: { "a3@(0,a5:w:1)@(0)", MIPRE },
188: { "a3@(0,a5:w:2)@(0)", MIPRE },
189: { "a3@(0,a5:w:4)@(0)", MIPRE },
190: { "a3@(0,a5:w:8)@(0)", MIPRE },
191: { "a3@(0,a5:l:1)@(0)", MIPRE },
192: { "a3@(0,a5:l:2)@(0)", MIPRE },
193: { "a3@(0,a5:l:4)@(0)", MIPRE },
194: { "a3@(0,a5:l:8)@(0)", MIPRE },
195: { "a3@(0x1234:w,d2:w:1)@(0)", MIPRE },
196: { "a3@(0x1234:w,d2:w:2)@(0)", MIPRE },
197: { "a3@(0x1234:w,d2:w:4)@(0)", MIPRE },
198: { "a3@(0x1234:w,d2:w:8)@(0)", MIPRE },
199: { "a3@(0x1234:w,d2:l:1)@(0)", MIPRE },
200: { "a3@(0x1234:w,d2:l:2)@(0)", MIPRE },
201: { "a3@(0x1234:w,d2:l:4)@(0)", MIPRE },
202: { "a3@(0x1234:w,d2:l:8)@(0)", MIPRE },
203: { "a3@(0x1234:w,a5:w:1)@(0)", MIPRE },
204: { "a3@(0x1234:w,a5:w:2)@(0)", MIPRE },
205: { "a3@(0x1234:w,a5:w:4)@(0)", MIPRE },
206: { "a3@(0x1234:w,a5:w:8)@(0)", MIPRE },
207: { "a3@(0x1234:w,a5:l:1)@(0)", MIPRE },
208: { "a3@(0x1234:w,a5:l:2)@(0)", MIPRE },
209: { "a3@(0x1234:w,a5:l:4)@(0)", MIPRE },
210: { "a3@(0x1234:w,a5:l:8)@(0)", MIPRE },
211: { "a3@(0x1234abcd:l,d2:w:1)@(0)", MIPRE },
212: { "a3@(0x1234abcd:l,d2:w:2)@(0)", MIPRE },
213: { "a3@(0x1234abcd:l,d2:w:4)@(0)", MIPRE },
214: { "a3@(0x1234abcd:l,d2:w:8)@(0)", MIPRE },
215: { "a3@(0x1234abcd:l,d2:l:1)@(0)", MIPRE },
216: { "a3@(0x1234abcd:l,d2:l:2)@(0)", MIPRE },
217: { "a3@(0x1234abcd:l,d2:l:4)@(0)", MIPRE },
218: { "a3@(0x1234abcd:l,d2:l:8)@(0)", MIPRE },
219: { "a3@(0x1234abcd:l,a5:w:1)@(0)", MIPRE },
220: { "a3@(0x1234abcd:l,a5:w:2)@(0)", MIPRE },
221: { "a3@(0x1234abcd:l,a5:w:4)@(0)", MIPRE },
222: { "a3@(0x1234abcd:l,a5:w:8)@(0)", MIPRE },
223: { "a3@(0x1234abcd:l,a5:l:1)@(0)", MIPRE },
224: { "a3@(0x1234abcd:l,a5:l:2)@(0)", MIPRE },
225: { "a3@(0x1234abcd:l,a5:l:4)@(0)", MIPRE },
226: { "a3@(0x1234abcd:l,a5:l:8)@(0)", MIPRE },
227: { "@(0)@(0)", MIPRE },
228: { "@(0,d2:w:1)@(0)", MIPRE },
229: { "@(0,d2:w:2)@(0)", MIPRE },
230: { "@(0,d2:w:4)@(0)", MIPRE },
231: { "@(0,d2:w:8)@(0)", MIPRE },
232: { "@(0,d2:l:1)@(0)", MIPRE },
233: { "@(0,d2:l:2)@(0)", MIPRE },
234: { "@(0,d2:l:4)@(0)", MIPRE },
235: { "@(0,d2:l:8)@(0)", MIPRE },
236: { "@(0,a5:w:1)@(0)", MIPRE },
237: { "@(0,a5:w:2)@(0)", MIPRE },
238: { "@(0,a5:w:4)@(0)", MIPRE },
239: { "@(0,a5:w:8)@(0)", MIPRE },
240: { "@(0,a5:l:1)@(0)", MIPRE },
241: { "@(0,a5:l:2)@(0)", MIPRE },
242: { "@(0,a5:l:4)@(0)", MIPRE },
243: { "@(0,a5:l:8)@(0)", MIPRE },
244: { "@(0x1234:w,d2:w:1)@(0)", MIPRE },
245: { "@(0x1234:w,d2:w:2)@(0)", MIPRE },
246: { "@(0x1234:w,d2:w:4)@(0)", MIPRE },
247: { "@(0x1234:w,d2:w:8)@(0)", MIPRE },
248: { "@(0x1234:w,d2:l:1)@(0)", MIPRE },
249: { "@(0x1234:w,d2:l:2)@(0)", MIPRE },
250: { "@(0x1234:w,d2:l:4)@(0)", MIPRE },
251: { "@(0x1234:w,d2:l:8)@(0)", MIPRE },
252: { "@(0x1234:w,a5:w:1)@(0)", MIPRE },
253: { "@(0x1234:w,a5:w:2)@(0)", MIPRE },
254: { "@(0x1234:w,a5:w:4)@(0)", MIPRE },
255: { "@(0x1234:w,a5:w:8)@(0)", MIPRE },
256: { "@(0x1234:w,a5:l:1)@(0)", MIPRE },
257: { "@(0x1234:w,a5:l:2)@(0)", MIPRE },
258: { "@(0x1234:w,a5:l:4)@(0)", MIPRE },
259: { "@(0x1234:w,a5:l:8)@(0)", MIPRE },
260: { "@(0x1234abcd:l,d2:w:1)@(0)", MIPRE },
261: { "@(0x1234abcd:l,d2:w:2)@(0)", MIPRE },
262: { "@(0x1234abcd:l,d2:w:4)@(0)", MIPRE },
263: { "@(0x1234abcd:l,d2:w:8)@(0)", MIPRE },
264: { "@(0x1234abcd:l,d2:l:1)@(0)", MIPRE },
265: { "@(0x1234abcd:l,d2:l:2)@(0)", MIPRE },
266: { "@(0x1234abcd:l,d2:l:4)@(0)", MIPRE },
267: { "@(0x1234abcd:l,d2:l:8)@(0)", MIPRE },
268: { "@(0x1234abcd:l,a5:w:1)@(0)", MIPRE },
269: { "@(0x1234abcd:l,a5:w:2)@(0)", MIPRE },
270: { "@(0x1234abcd:l,a5:w:4)@(0)", MIPRE },
271: { "@(0x1234abcd:l,a5:w:8)@(0)", MIPRE },
272: { "@(0x1234abcd:l,a5:l:1)@(0)", MIPRE },
273: { "@(0x1234abcd:l,a5:l:2)@(0)", MIPRE },
274: { "@(0x1234abcd:l,a5:l:4)@(0)", MIPRE },
275: { "@(0x1234abcd:l,a5:l:8)@(0)", MIPRE },
276: { "a3@(0)@(0xfeed:w)", MIPRE },
277: { "a3@(0,d2:w:1)@(0xfeed:w)", MIPRE },
278: { "a3@(0,d2:w:2)@(0xfeed:w)", MIPRE },
279: { "a3@(0,d2:w:4)@(0xfeed:w)", MIPRE },
280: { "a3@(0,d2:w:8)@(0xfeed:w)", MIPRE },
281: { "a3@(0,d2:l:1)@(0xfeed:w)", MIPRE },
282: { "a3@(0,d2:l:2)@(0xfeed:w)", MIPRE },
283: { "a3@(0,d2:l:4)@(0xfeed:w)", MIPRE },
284: { "a3@(0,d2:l:8)@(0xfeed:w)", MIPRE },
285: { "a3@(0,a5:w:1)@(0xfeed:w)", MIPRE },
286: { "a3@(0,a5:w:2)@(0xfeed:w)", MIPRE },
287: { "a3@(0,a5:w:4)@(0xfeed:w)", MIPRE },
288: { "a3@(0,a5:w:8)@(0xfeed:w)", MIPRE },
289: { "a3@(0,a5:l:1)@(0xfeed:w)", MIPRE },
290: { "a3@(0,a5:l:2)@(0xfeed:w)", MIPRE },
291: { "a3@(0,a5:l:4)@(0xfeed:w)", MIPRE },
292: { "a3@(0,a5:l:8)@(0xfeed:w)", MIPRE },
293: { "a3@(0x1234:w,d2:w:1)@(0xfeed:w)", MIPRE },
294: { "a3@(0x1234:w,d2:w:2)@(0xfeed:w)", MIPRE },
295: { "a3@(0x1234:w,d2:w:4)@(0xfeed:w)", MIPRE },
296: { "a3@(0x1234:w,d2:w:8)@(0xfeed:w)", MIPRE },
297: { "a3@(0x1234:w,d2:l:1)@(0xfeed:w)", MIPRE },
298: { "a3@(0x1234:w,d2:l:2)@(0xfeed:w)", MIPRE },
299: { "a3@(0x1234:w,d2:l:4)@(0xfeed:w)", MIPRE },
300: { "a3@(0x1234:w,d2:l:8)@(0xfeed:w)", MIPRE },
301: { "a3@(0x1234:w,a5:w:1)@(0xfeed:w)", MIPRE },
302: { "a3@(0x1234:w,a5:w:2)@(0xfeed:w)", MIPRE },
303: { "a3@(0x1234:w,a5:w:4)@(0xfeed:w)", MIPRE },
304: { "a3@(0x1234:w,a5:w:8)@(0xfeed:w)", MIPRE },
305: { "a3@(0x1234:w,a5:l:1)@(0xfeed:w)", MIPRE },
306: { "a3@(0x1234:w,a5:l:2)@(0xfeed:w)", MIPRE },
307: { "a3@(0x1234:w,a5:l:4)@(0xfeed:w)", MIPRE },
308: { "a3@(0x1234:w,a5:l:8)@(0xfeed:w)", MIPRE },
309: { "a3@(0x1234abcd:l,d2:w:1)@(0xfeed:w)", MIPRE },
310: { "a3@(0x1234abcd:l,d2:w:2)@(0xfeed:w)", MIPRE },
311: { "a3@(0x1234abcd:l,d2:w:4)@(0xfeed:w)", MIPRE },
312: { "a3@(0x1234abcd:l,d2:w:8)@(0xfeed:w)", MIPRE },
313: { "a3@(0x1234abcd:l,d2:l:1)@(0xfeed:w)", MIPRE },
314: { "a3@(0x1234abcd:l,d2:l:2)@(0xfeed:w)", MIPRE },
315: { "a3@(0x1234abcd:l,d2:l:4)@(0xfeed:w)", MIPRE },
316: { "a3@(0x1234abcd:l,d2:l:8)@(0xfeed:w)", MIPRE },
317: { "a3@(0x1234abcd:l,a5:w:1)@(0xfeed:w)", MIPRE },
318: { "a3@(0x1234abcd:l,a5:w:2)@(0xfeed:w)", MIPRE },
319: { "a3@(0x1234abcd:l,a5:w:4)@(0xfeed:w)", MIPRE },
320: { "a3@(0x1234abcd:l,a5:w:8)@(0xfeed:w)", MIPRE },
321: { "a3@(0x1234abcd:l,a5:l:1)@(0xfeed:w)", MIPRE },
322: { "a3@(0x1234abcd:l,a5:l:2)@(0xfeed:w)", MIPRE },
323: { "a3@(0x1234abcd:l,a5:l:4)@(0xfeed:w)", MIPRE },
324: { "a3@(0x1234abcd:l,a5:l:8)@(0xfeed:w)", MIPRE },
325: { "@(0)@(0xfeed:w)", MIPRE },
326: { "@(0,d2:w:1)@(0xfeed:w)", MIPRE },
327: { "@(0,d2:w:2)@(0xfeed:w)", MIPRE },
328: { "@(0,d2:w:4)@(0xfeed:w)", MIPRE },
329: { "@(0,d2:w:8)@(0xfeed:w)", MIPRE },
330: { "@(0,d2:l:1)@(0xfeed:w)", MIPRE },
331: { "@(0,d2:l:2)@(0xfeed:w)", MIPRE },
332: { "@(0,d2:l:4)@(0xfeed:w)", MIPRE },
333: { "@(0,d2:l:8)@(0xfeed:w)", MIPRE },
334: { "@(0,a5:w:1)@(0xfeed:w)", MIPRE },
335: { "@(0,a5:w:2)@(0xfeed:w)", MIPRE },
336: { "@(0,a5:w:4)@(0xfeed:w)", MIPRE },
337: { "@(0,a5:w:8)@(0xfeed:w)", MIPRE },
338: { "@(0,a5:l:1)@(0xfeed:w)", MIPRE },
339: { "@(0,a5:l:2)@(0xfeed:w)", MIPRE },
340: { "@(0,a5:l:4)@(0xfeed:w)", MIPRE },
341: { "@(0,a5:l:8)@(0xfeed:w)", MIPRE },
342: { "@(0x1234:w,d2:w:1)@(0xfeed:w)", MIPRE },
343: { "@(0x1234:w,d2:w:2)@(0xfeed:w)", MIPRE },
344: { "@(0x1234:w,d2:w:4)@(0xfeed:w)", MIPRE },
345: { "@(0x1234:w,d2:w:8)@(0xfeed:w)", MIPRE },
346: { "@(0x1234:w,d2:l:1)@(0xfeed:w)", MIPRE },
347: { "@(0x1234:w,d2:l:2)@(0xfeed:w)", MIPRE },
348: { "@(0x1234:w,d2:l:4)@(0xfeed:w)", MIPRE },
349: { "@(0x1234:w,d2:l:8)@(0xfeed:w)", MIPRE },
350: { "@(0x1234:w,a5:w:1)@(0xfeed:w)", MIPRE },
351: { "@(0x1234:w,a5:w:2)@(0xfeed:w)", MIPRE },
352: { "@(0x1234:w,a5:w:4)@(0xfeed:w)", MIPRE },
353: { "@(0x1234:w,a5:w:8)@(0xfeed:w)", MIPRE },
354: { "@(0x1234:w,a5:l:1)@(0xfeed:w)", MIPRE },
355: { "@(0x1234:w,a5:l:2)@(0xfeed:w)", MIPRE },
356: { "@(0x1234:w,a5:l:4)@(0xfeed:w)", MIPRE },
357: { "@(0x1234:w,a5:l:8)@(0xfeed:w)", MIPRE },
358: { "@(0x1234abcd:l,d2:w:1)@(0xfeed:w)", MIPRE },
359: { "@(0x1234abcd:l,d2:w:2)@(0xfeed:w)", MIPRE },
360: { "@(0x1234abcd:l,d2:w:4)@(0xfeed:w)", MIPRE },
361: { "@(0x1234abcd:l,d2:w:8)@(0xfeed:w)", MIPRE },
362: { "@(0x1234abcd:l,d2:l:1)@(0xfeed:w)", MIPRE },
363: { "@(0x1234abcd:l,d2:l:2)@(0xfeed:w)", MIPRE },
364: { "@(0x1234abcd:l,d2:l:4)@(0xfeed:w)", MIPRE },
365: { "@(0x1234abcd:l,d2:l:8)@(0xfeed:w)", MIPRE },
366: { "@(0x1234abcd:l,a5:w:1)@(0xfeed:w)", MIPRE },
367: { "@(0x1234abcd:l,a5:w:2)@(0xfeed:w)", MIPRE },
368: { "@(0x1234abcd:l,a5:w:4)@(0xfeed:w)", MIPRE },
369: { "@(0x1234abcd:l,a5:w:8)@(0xfeed:w)", MIPRE },
370: { "@(0x1234abcd:l,a5:l:1)@(0xfeed:w)", MIPRE },
371: { "@(0x1234abcd:l,a5:l:2)@(0xfeed:w)", MIPRE },
372: { "@(0x1234abcd:l,a5:l:4)@(0xfeed:w)", MIPRE },
373: { "@(0x1234abcd:l,a5:l:8)@(0xfeed:w)", MIPRE },
374: { "a3@(0)@(0xfeedface:l)", MIPRE },
375: { "a3@(0,d2:w:1)@(0xfeedface:l)", MIPRE },
376: { "a3@(0,d2:w:2)@(0xfeedface:l)", MIPRE },
377: { "a3@(0,d2:w:4)@(0xfeedface:l)", MIPRE },
378: { "a3@(0,d2:w:8)@(0xfeedface:l)", MIPRE },
379: { "a3@(0,d2:l:1)@(0xfeedface:l)", MIPRE },
380: { "a3@(0,d2:l:2)@(0xfeedface:l)", MIPRE },
381: { "a3@(0,d2:l:4)@(0xfeedface:l)", MIPRE },
382: { "a3@(0,d2:l:8)@(0xfeedface:l)", MIPRE },
383: { "a3@(0,a5:w:1)@(0xfeedface:l)", MIPRE },
384: { "a3@(0,a5:w:2)@(0xfeedface:l)", MIPRE },
385: { "a3@(0,a5:w:4)@(0xfeedface:l)", MIPRE },
386: { "a3@(0,a5:w:8)@(0xfeedface:l)", MIPRE },
387: { "a3@(0,a5:l:1)@(0xfeedface:l)", MIPRE },
388: { "a3@(0,a5:l:2)@(0xfeedface:l)", MIPRE },
389: { "a3@(0,a5:l:4)@(0xfeedface:l)", MIPRE },
390: { "a3@(0,a5:l:8)@(0xfeedface:l)", MIPRE },
391: { "a3@(0x1234:w,d2:w:1)@(0xfeedface:l)", MIPRE },
392: { "a3@(0x1234:w,d2:w:2)@(0xfeedface:l)", MIPRE },
393: { "a3@(0x1234:w,d2:w:4)@(0xfeedface:l)", MIPRE },
394: { "a3@(0x1234:w,d2:w:8)@(0xfeedface:l)", MIPRE },
395: { "a3@(0x1234:w,d2:l:1)@(0xfeedface:l)", MIPRE },
396: { "a3@(0x1234:w,d2:l:2)@(0xfeedface:l)", MIPRE },
397: { "a3@(0x1234:w,d2:l:4)@(0xfeedface:l)", MIPRE },
398: { "a3@(0x1234:w,d2:l:8)@(0xfeedface:l)", MIPRE },
399: { "a3@(0x1234:w,a5:w:1)@(0xfeedface:l)", MIPRE },
400: { "a3@(0x1234:w,a5:w:2)@(0xfeedface:l)", MIPRE },
401: { "a3@(0x1234:w,a5:w:4)@(0xfeedface:l)", MIPRE },
402: { "a3@(0x1234:w,a5:w:8)@(0xfeedface:l)", MIPRE },
403: { "a3@(0x1234:w,a5:l:1)@(0xfeedface:l)", MIPRE },
404: { "a3@(0x1234:w,a5:l:2)@(0xfeedface:l)", MIPRE },
405: { "a3@(0x1234:w,a5:l:4)@(0xfeedface:l)", MIPRE },
406: { "a3@(0x1234:w,a5:l:8)@(0xfeedface:l)", MIPRE },
407: { "a3@(0x1234abcd:l,d2:w:1)@(0xfeedface:l)", MIPRE },
408: { "a3@(0x1234abcd:l,d2:w:2)@(0xfeedface:l)", MIPRE },
409: { "a3@(0x1234abcd:l,d2:w:4)@(0xfeedface:l)", MIPRE },
410: { "a3@(0x1234abcd:l,d2:w:8)@(0xfeedface:l)", MIPRE },
411: { "a3@(0x1234abcd:l,d2:l:1)@(0xfeedface:l)", MIPRE },
412: { "a3@(0x1234abcd:l,d2:l:2)@(0xfeedface:l)", MIPRE },
413: { "a3@(0x1234abcd:l,d2:l:4)@(0xfeedface:l)", MIPRE },
414: { "a3@(0x1234abcd:l,d2:l:8)@(0xfeedface:l)", MIPRE },
415: { "a3@(0x1234abcd:l,a5:w:1)@(0xfeedface:l)", MIPRE },
416: { "a3@(0x1234abcd:l,a5:w:2)@(0xfeedface:l)", MIPRE },
417: { "a3@(0x1234abcd:l,a5:w:4)@(0xfeedface:l)", MIPRE },
418: { "a3@(0x1234abcd:l,a5:w:8)@(0xfeedface:l)", MIPRE },
419: { "a3@(0x1234abcd:l,a5:l:1)@(0xfeedface:l)", MIPRE },
420: { "a3@(0x1234abcd:l,a5:l:2)@(0xfeedface:l)", MIPRE },
421: { "a3@(0x1234abcd:l,a5:l:4)@(0xfeedface:l)", MIPRE },
422: #endif ALL_OPERANDS
423: { "a3@(0x1234abcd:l,a5:l:8)@(0xfeedface:l)", MIPRE },
424: #ifdef ALL_OPERANDS
425: { "@(0)@(0xfeedface:l)", MIPRE },
426: { "@(0,d2:w:1)@(0xfeedface:l)", MIPRE },
427: { "@(0,d2:w:2)@(0xfeedface:l)", MIPRE },
428: { "@(0,d2:w:4)@(0xfeedface:l)", MIPRE },
429: { "@(0,d2:w:8)@(0xfeedface:l)", MIPRE },
430: { "@(0,d2:l:1)@(0xfeedface:l)", MIPRE },
431: { "@(0,d2:l:2)@(0xfeedface:l)", MIPRE },
432: { "@(0,d2:l:4)@(0xfeedface:l)", MIPRE },
433: { "@(0,d2:l:8)@(0xfeedface:l)", MIPRE },
434: { "@(0,a5:w:1)@(0xfeedface:l)", MIPRE },
435: { "@(0,a5:w:2)@(0xfeedface:l)", MIPRE },
436: { "@(0,a5:w:4)@(0xfeedface:l)", MIPRE },
437: { "@(0,a5:w:8)@(0xfeedface:l)", MIPRE },
438: { "@(0,a5:l:1)@(0xfeedface:l)", MIPRE },
439: { "@(0,a5:l:2)@(0xfeedface:l)", MIPRE },
440: { "@(0,a5:l:4)@(0xfeedface:l)", MIPRE },
441: { "@(0,a5:l:8)@(0xfeedface:l)", MIPRE },
442: { "@(0x1234:w,d2:w:1)@(0xfeedface:l)", MIPRE },
443: { "@(0x1234:w,d2:w:2)@(0xfeedface:l)", MIPRE },
444: { "@(0x1234:w,d2:w:4)@(0xfeedface:l)", MIPRE },
445: { "@(0x1234:w,d2:w:8)@(0xfeedface:l)", MIPRE },
446: { "@(0x1234:w,d2:l:1)@(0xfeedface:l)", MIPRE },
447: { "@(0x1234:w,d2:l:2)@(0xfeedface:l)", MIPRE },
448: { "@(0x1234:w,d2:l:4)@(0xfeedface:l)", MIPRE },
449: { "@(0x1234:w,d2:l:8)@(0xfeedface:l)", MIPRE },
450: { "@(0x1234:w,a5:w:1)@(0xfeedface:l)", MIPRE },
451: { "@(0x1234:w,a5:w:2)@(0xfeedface:l)", MIPRE },
452: { "@(0x1234:w,a5:w:4)@(0xfeedface:l)", MIPRE },
453: { "@(0x1234:w,a5:w:8)@(0xfeedface:l)", MIPRE },
454: { "@(0x1234:w,a5:l:1)@(0xfeedface:l)", MIPRE },
455: { "@(0x1234:w,a5:l:2)@(0xfeedface:l)", MIPRE },
456: { "@(0x1234:w,a5:l:4)@(0xfeedface:l)", MIPRE },
457: { "@(0x1234:w,a5:l:8)@(0xfeedface:l)", MIPRE },
458: { "@(0x1234abcd:l,d2:w:1)@(0xfeedface:l)", MIPRE },
459: { "@(0x1234abcd:l,d2:w:2)@(0xfeedface:l)", MIPRE },
460: { "@(0x1234abcd:l,d2:w:4)@(0xfeedface:l)", MIPRE },
461: { "@(0x1234abcd:l,d2:w:8)@(0xfeedface:l)", MIPRE },
462: { "@(0x1234abcd:l,d2:l:1)@(0xfeedface:l)", MIPRE },
463: { "@(0x1234abcd:l,d2:l:2)@(0xfeedface:l)", MIPRE },
464: { "@(0x1234abcd:l,d2:l:4)@(0xfeedface:l)", MIPRE },
465: { "@(0x1234abcd:l,d2:l:8)@(0xfeedface:l)", MIPRE },
466: { "@(0x1234abcd:l,a5:w:1)@(0xfeedface:l)", MIPRE },
467: { "@(0x1234abcd:l,a5:w:2)@(0xfeedface:l)", MIPRE },
468: { "@(0x1234abcd:l,a5:w:4)@(0xfeedface:l)", MIPRE },
469: { "@(0x1234abcd:l,a5:w:8)@(0xfeedface:l)", MIPRE },
470: { "@(0x1234abcd:l,a5:l:1)@(0xfeedface:l)", MIPRE },
471: { "@(0x1234abcd:l,a5:l:2)@(0xfeedface:l)", MIPRE },
472: { "@(0x1234abcd:l,a5:l:4)@(0xfeedface:l)", MIPRE },
473: { "@(0x1234abcd:l,a5:l:8)@(0xfeedface:l)", MIPRE },
474: #endif ALL_OPERANDS
475: /* An@(bd)@(od,Xn) "Memory Indirect with Postindexed" ([bd,An],Xn,od)
476: uses Full Format Extension Word(s) */
477: #ifdef ALL_OPERANDS
478: { "a3@(0)@(0)", MIPOST },
479: { "a3@(0)@(0,d2:w:1)", MIPOST },
480: { "a3@(0)@(0,d2:w:2)", MIPOST },
481: { "a3@(0)@(0,d2:w:4)", MIPOST },
482: { "a3@(0)@(0,d2:w:8)", MIPOST },
483: { "a3@(0)@(0,d2:l:1)", MIPOST },
484: { "a3@(0)@(0,d2:l:2)", MIPOST },
485: { "a3@(0)@(0,d2:l:4)", MIPOST },
486: { "a3@(0)@(0,d2:l:8)", MIPOST },
487: { "a3@(0)@(0,a5:w:1)", MIPOST },
488: { "a3@(0)@(0,a5:w:2)", MIPOST },
489: { "a3@(0)@(0,a5:w:4)", MIPOST },
490: { "a3@(0)@(0,a5:w:8)", MIPOST },
491: { "a3@(0)@(0,a5:l:1)", MIPOST },
492: { "a3@(0)@(0,a5:l:2)", MIPOST },
493: { "a3@(0)@(0,a5:l:4)", MIPOST },
494: { "a3@(0)@(0,a5:l:8)", MIPOST },
495: { "a3@(0x1234:w)@(0,d2:w:1)", MIPOST },
496: { "a3@(0x1234:w)@(0,d2:w:2)", MIPOST },
497: { "a3@(0x1234:w)@(0,d2:w:4)", MIPOST },
498: { "a3@(0x1234:w)@(0,d2:w:8)", MIPOST },
499: { "a3@(0x1234:w)@(0,d2:l:1)", MIPOST },
500: { "a3@(0x1234:w)@(0,d2:l:2)", MIPOST },
501: { "a3@(0x1234:w)@(0,d2:l:4)", MIPOST },
502: { "a3@(0x1234:w)@(0,d2:l:8)", MIPOST },
503: { "a3@(0x1234:w)@(0,a5:w:1)", MIPOST },
504: { "a3@(0x1234:w)@(0,a5:w:2)", MIPOST },
505: { "a3@(0x1234:w)@(0,a5:w:4)", MIPOST },
506: { "a3@(0x1234:w)@(0,a5:w:8)", MIPOST },
507: { "a3@(0x1234:w)@(0,a5:l:1)", MIPOST },
508: { "a3@(0x1234:w)@(0,a5:l:2)", MIPOST },
509: { "a3@(0x1234:w)@(0,a5:l:4)", MIPOST },
510: { "a3@(0x1234:w)@(0,a5:l:8)", MIPOST },
511: { "a3@(0x1234abcd:l)@(0,d2:w:1)", MIPOST },
512: { "a3@(0x1234abcd:l)@(0,d2:w:2)", MIPOST },
513: { "a3@(0x1234abcd:l)@(0,d2:w:4)", MIPOST },
514: { "a3@(0x1234abcd:l)@(0,d2:w:8)", MIPOST },
515: { "a3@(0x1234abcd:l)@(0,d2:l:1)", MIPOST },
516: { "a3@(0x1234abcd:l)@(0,d2:l:2)", MIPOST },
517: { "a3@(0x1234abcd:l)@(0,d2:l:4)", MIPOST },
518: { "a3@(0x1234abcd:l)@(0,d2:l:8)", MIPOST },
519: { "a3@(0x1234abcd:l)@(0,a5:w:1)", MIPOST },
520: { "a3@(0x1234abcd:l)@(0,a5:w:2)", MIPOST },
521: { "a3@(0x1234abcd:l)@(0,a5:w:4)", MIPOST },
522: { "a3@(0x1234abcd:l)@(0,a5:w:8)", MIPOST },
523: { "a3@(0x1234abcd:l)@(0,a5:l:1)", MIPOST },
524: { "a3@(0x1234abcd:l)@(0,a5:l:2)", MIPOST },
525: { "a3@(0x1234abcd:l)@(0,a5:l:4)", MIPOST },
526: { "a3@(0x1234abcd:l)@(0,a5:l:8)", MIPOST },
527: { "@(0)@(0)", MIPOST },
528: { "@(0)@(0,d2:w:1)", MIPOST },
529: { "@(0)@(0,d2:w:2)", MIPOST },
530: { "@(0)@(0,d2:w:4)", MIPOST },
531: { "@(0)@(0,d2:w:8)", MIPOST },
532: { "@(0)@(0,d2:l:1)", MIPOST },
533: { "@(0)@(0,d2:l:2)", MIPOST },
534: { "@(0)@(0,d2:l:4)", MIPOST },
535: { "@(0)@(0,d2:l:8)", MIPOST },
536: { "@(0)@(0,a5:w:1)", MIPOST },
537: { "@(0)@(0,a5:w:2)", MIPOST },
538: { "@(0)@(0,a5:w:4)", MIPOST },
539: { "@(0)@(0,a5:w:8)", MIPOST },
540: { "@(0)@(0,a5:l:1)", MIPOST },
541: { "@(0)@(0,a5:l:2)", MIPOST },
542: { "@(0)@(0,a5:l:4)", MIPOST },
543: { "@(0)@(0,a5:l:8)", MIPOST },
544: { "@(0x1234:w)@(0,d2:w:1)", MIPOST },
545: { "@(0x1234:w)@(0,d2:w:2)", MIPOST },
546: { "@(0x1234:w)@(0,d2:w:4)", MIPOST },
547: { "@(0x1234:w)@(0,d2:w:8)", MIPOST },
548: { "@(0x1234:w)@(0,d2:l:1)", MIPOST },
549: { "@(0x1234:w)@(0,d2:l:2)", MIPOST },
550: { "@(0x1234:w)@(0,d2:l:4)", MIPOST },
551: { "@(0x1234:w)@(0,d2:l:8)", MIPOST },
552: { "@(0x1234:w)@(0,a5:w:1)", MIPOST },
553: { "@(0x1234:w)@(0,a5:w:2)", MIPOST },
554: { "@(0x1234:w)@(0,a5:w:4)", MIPOST },
555: { "@(0x1234:w)@(0,a5:w:8)", MIPOST },
556: { "@(0x1234:w)@(0,a5:l:1)", MIPOST },
557: { "@(0x1234:w)@(0,a5:l:2)", MIPOST },
558: { "@(0x1234:w)@(0,a5:l:4)", MIPOST },
559: { "@(0x1234:w)@(0,a5:l:8)", MIPOST },
560: { "@(0x1234abcd:l)@(0,d2:w:1)", MIPOST },
561: { "@(0x1234abcd:l)@(0,d2:w:2)", MIPOST },
562: { "@(0x1234abcd:l)@(0,d2:w:4)", MIPOST },
563: { "@(0x1234abcd:l)@(0,d2:w:8)", MIPOST },
564: { "@(0x1234abcd:l)@(0,d2:l:1)", MIPOST },
565: { "@(0x1234abcd:l)@(0,d2:l:2)", MIPOST },
566: { "@(0x1234abcd:l)@(0,d2:l:4)", MIPOST },
567: { "@(0x1234abcd:l)@(0,d2:l:8)", MIPOST },
568: { "@(0x1234abcd:l)@(0,a5:w:1)", MIPOST },
569: { "@(0x1234abcd:l)@(0,a5:w:2)", MIPOST },
570: { "@(0x1234abcd:l)@(0,a5:w:4)", MIPOST },
571: { "@(0x1234abcd:l)@(0,a5:w:8)", MIPOST },
572: { "@(0x1234abcd:l)@(0,a5:l:1)", MIPOST },
573: { "@(0x1234abcd:l)@(0,a5:l:2)", MIPOST },
574: { "@(0x1234abcd:l)@(0,a5:l:4)", MIPOST },
575: { "@(0x1234abcd:l)@(0,a5:l:8)", MIPOST },
576: { "a3@(0)@(0xfeed:w)", MIPOST },
577: { "a3@(0)@(0xfeed:w,d2:w:1)", MIPOST },
578: { "a3@(0)@(0xfeed:w,d2:w:2)", MIPOST },
579: { "a3@(0)@(0xfeed:w,d2:w:4)", MIPOST },
580: { "a3@(0)@(0xfeed:w,d2:w:8)", MIPOST },
581: { "a3@(0)@(0xfeed:w,d2:l:1)", MIPOST },
582: { "a3@(0)@(0xfeed:w,d2:l:2)", MIPOST },
583: { "a3@(0)@(0xfeed:w,d2:l:4)", MIPOST },
584: { "a3@(0)@(0xfeed:w,d2:l:8)", MIPOST },
585: { "a3@(0)@(0xfeed:w,a5:w:1)", MIPOST },
586: { "a3@(0)@(0xfeed:w,a5:w:2)", MIPOST },
587: { "a3@(0)@(0xfeed:w,a5:w:4)", MIPOST },
588: { "a3@(0)@(0xfeed:w,a5:w:8)", MIPOST },
589: { "a3@(0)@(0xfeed:w,a5:l:1)", MIPOST },
590: { "a3@(0)@(0xfeed:w,a5:l:2)", MIPOST },
591: { "a3@(0)@(0xfeed:w,a5:l:4)", MIPOST },
592: { "a3@(0)@(0xfeed:w,a5:l:8)", MIPOST },
593: { "a3@(0x1234:w)@(0xfeed:w,d2:w:1)", MIPOST },
594: { "a3@(0x1234:w)@(0xfeed:w,d2:w:2)", MIPOST },
595: { "a3@(0x1234:w)@(0xfeed:w,d2:w:4)", MIPOST },
596: { "a3@(0x1234:w)@(0xfeed:w,d2:w:8)", MIPOST },
597: { "a3@(0x1234:w)@(0xfeed:w,d2:l:1)", MIPOST },
598: { "a3@(0x1234:w)@(0xfeed:w,d2:l:2)", MIPOST },
599: { "a3@(0x1234:w)@(0xfeed:w,d2:l:4)", MIPOST },
600: { "a3@(0x1234:w)@(0xfeed:w,d2:l:8)", MIPOST },
601: { "a3@(0x1234:w)@(0xfeed:w,a5:w:1)", MIPOST },
602: { "a3@(0x1234:w)@(0xfeed:w,a5:w:2)", MIPOST },
603: { "a3@(0x1234:w)@(0xfeed:w,a5:w:4)", MIPOST },
604: { "a3@(0x1234:w)@(0xfeed:w,a5:w:8)", MIPOST },
605: { "a3@(0x1234:w)@(0xfeed:w,a5:l:1)", MIPOST },
606: { "a3@(0x1234:w)@(0xfeed:w,a5:l:2)", MIPOST },
607: { "a3@(0x1234:w)@(0xfeed:w,a5:l:4)", MIPOST },
608: { "a3@(0x1234:w)@(0xfeed:w,a5:l:8)", MIPOST },
609: { "a3@(0x1234abcd:l)@(0xfeed:w,d2:w:1)", MIPOST },
610: { "a3@(0x1234abcd:l)@(0xfeed:w,d2:w:2)", MIPOST },
611: { "a3@(0x1234abcd:l)@(0xfeed:w,d2:w:4)", MIPOST },
612: { "a3@(0x1234abcd:l)@(0xfeed:w,d2:w:8)", MIPOST },
613: { "a3@(0x1234abcd:l)@(0xfeed:w,d2:l:1)", MIPOST },
614: { "a3@(0x1234abcd:l)@(0xfeed:w,d2:l:2)", MIPOST },
615: { "a3@(0x1234abcd:l)@(0xfeed:w,d2:l:4)", MIPOST },
616: { "a3@(0x1234abcd:l)@(0xfeed:w,d2:l:8)", MIPOST },
617: { "a3@(0x1234abcd:l)@(0xfeed:w,a5:w:1)", MIPOST },
618: { "a3@(0x1234abcd:l)@(0xfeed:w,a5:w:2)", MIPOST },
619: { "a3@(0x1234abcd:l)@(0xfeed:w,a5:w:4)", MIPOST },
620: { "a3@(0x1234abcd:l)@(0xfeed:w,a5:w:8)", MIPOST },
621: { "a3@(0x1234abcd:l)@(0xfeed:w,a5:l:1)", MIPOST },
622: { "a3@(0x1234abcd:l)@(0xfeed:w,a5:l:2)", MIPOST },
623: { "a3@(0x1234abcd:l)@(0xfeed:w,a5:l:4)", MIPOST },
624: { "a3@(0x1234abcd:l)@(0xfeed:w,a5:l:8)", MIPOST },
625: { "@(0)@(0xfeed:w)", MIPOST },
626: { "@(0)@(0xfeed:w,d2:w:1)", MIPOST },
627: { "@(0)@(0xfeed:w,d2:w:2)", MIPOST },
628: { "@(0)@(0xfeed:w,d2:w:4)", MIPOST },
629: { "@(0)@(0xfeed:w,d2:w:8)", MIPOST },
630: { "@(0)@(0xfeed:w,d2:l:1)", MIPOST },
631: { "@(0)@(0xfeed:w,d2:l:2)", MIPOST },
632: { "@(0)@(0xfeed:w,d2:l:4)", MIPOST },
633: { "@(0)@(0xfeed:w,d2:l:8)", MIPOST },
634: { "@(0)@(0xfeed:w,a5:w:1)", MIPOST },
635: { "@(0)@(0xfeed:w,a5:w:2)", MIPOST },
636: { "@(0)@(0xfeed:w,a5:w:4)", MIPOST },
637: { "@(0)@(0xfeed:w,a5:w:8)", MIPOST },
638: { "@(0)@(0xfeed:w,a5:l:1)", MIPOST },
639: { "@(0)@(0xfeed:w,a5:l:2)", MIPOST },
640: { "@(0)@(0xfeed:w,a5:l:4)", MIPOST },
641: { "@(0)@(0xfeed:w,a5:l:8)", MIPOST },
642: { "@(0x1234:w)@(0xfeed:w,d2:w:1)", MIPOST },
643: { "@(0x1234:w)@(0xfeed:w,d2:w:2)", MIPOST },
644: { "@(0x1234:w)@(0xfeed:w,d2:w:4)", MIPOST },
645: { "@(0x1234:w)@(0xfeed:w,d2:w:8)", MIPOST },
646: { "@(0x1234:w)@(0xfeed:w,d2:l:1)", MIPOST },
647: { "@(0x1234:w)@(0xfeed:w,d2:l:2)", MIPOST },
648: { "@(0x1234:w)@(0xfeed:w,d2:l:4)", MIPOST },
649: { "@(0x1234:w)@(0xfeed:w,d2:l:8)", MIPOST },
650: { "@(0x1234:w)@(0xfeed:w,a5:w:1)", MIPOST },
651: { "@(0x1234:w)@(0xfeed:w,a5:w:2)", MIPOST },
652: { "@(0x1234:w)@(0xfeed:w,a5:w:4)", MIPOST },
653: { "@(0x1234:w)@(0xfeed:w,a5:w:8)", MIPOST },
654: { "@(0x1234:w)@(0xfeed:w,a5:l:1)", MIPOST },
655: { "@(0x1234:w)@(0xfeed:w,a5:l:2)", MIPOST },
656: { "@(0x1234:w)@(0xfeed:w,a5:l:4)", MIPOST },
657: { "@(0x1234:w)@(0xfeed:w,a5:l:8)", MIPOST },
658: { "@(0x1234abcd:l)@(0xfeed:w,d2:w:1)", MIPOST },
659: { "@(0x1234abcd:l)@(0xfeed:w,d2:w:2)", MIPOST },
660: { "@(0x1234abcd:l)@(0xfeed:w,d2:w:4)", MIPOST },
661: { "@(0x1234abcd:l)@(0xfeed:w,d2:w:8)", MIPOST },
662: { "@(0x1234abcd:l)@(0xfeed:w,d2:l:1)", MIPOST },
663: { "@(0x1234abcd:l)@(0xfeed:w,d2:l:2)", MIPOST },
664: { "@(0x1234abcd:l)@(0xfeed:w,d2:l:4)", MIPOST },
665: { "@(0x1234abcd:l)@(0xfeed:w,d2:l:8)", MIPOST },
666: { "@(0x1234abcd:l)@(0xfeed:w,a5:w:1)", MIPOST },
667: { "@(0x1234abcd:l)@(0xfeed:w,a5:w:2)", MIPOST },
668: { "@(0x1234abcd:l)@(0xfeed:w,a5:w:4)", MIPOST },
669: { "@(0x1234abcd:l)@(0xfeed:w,a5:w:8)", MIPOST },
670: { "@(0x1234abcd:l)@(0xfeed:w,a5:l:1)", MIPOST },
671: { "@(0x1234abcd:l)@(0xfeed:w,a5:l:2)", MIPOST },
672: { "@(0x1234abcd:l)@(0xfeed:w,a5:l:4)", MIPOST },
673: { "@(0x1234abcd:l)@(0xfeed:w,a5:l:8)", MIPOST },
674: { "a3@(0)@(0xfeedface:l)", MIPOST },
675: { "a3@(0)@(0xfeedface:l,d2:w:1)", MIPOST },
676: { "a3@(0)@(0xfeedface:l,d2:w:2)", MIPOST },
677: { "a3@(0)@(0xfeedface:l,d2:w:4)", MIPOST },
678: { "a3@(0)@(0xfeedface:l,d2:w:8)", MIPOST },
679: { "a3@(0)@(0xfeedface:l,d2:l:1)", MIPOST },
680: { "a3@(0)@(0xfeedface:l,d2:l:2)", MIPOST },
681: { "a3@(0)@(0xfeedface:l,d2:l:4)", MIPOST },
682: { "a3@(0)@(0xfeedface:l,d2:l:8)", MIPOST },
683: { "a3@(0)@(0xfeedface:l,a5:w:1)", MIPOST },
684: { "a3@(0)@(0xfeedface:l,a5:w:2)", MIPOST },
685: { "a3@(0)@(0xfeedface:l,a5:w:4)", MIPOST },
686: { "a3@(0)@(0xfeedface:l,a5:w:8)", MIPOST },
687: { "a3@(0)@(0xfeedface:l,a5:l:1)", MIPOST },
688: { "a3@(0)@(0xfeedface:l,a5:l:2)", MIPOST },
689: { "a3@(0)@(0xfeedface:l,a5:l:4)", MIPOST },
690: { "a3@(0)@(0xfeedface:l,a5:l:8)", MIPOST },
691: { "a3@(0x1234:w)@(0xfeedface:l,d2:w:1)", MIPOST },
692: { "a3@(0x1234:w)@(0xfeedface:l,d2:w:2)", MIPOST },
693: { "a3@(0x1234:w)@(0xfeedface:l,d2:w:4)", MIPOST },
694: { "a3@(0x1234:w)@(0xfeedface:l,d2:w:8)", MIPOST },
695: { "a3@(0x1234:w)@(0xfeedface:l,d2:l:1)", MIPOST },
696: { "a3@(0x1234:w)@(0xfeedface:l,d2:l:2)", MIPOST },
697: { "a3@(0x1234:w)@(0xfeedface:l,d2:l:4)", MIPOST },
698: { "a3@(0x1234:w)@(0xfeedface:l,d2:l:8)", MIPOST },
699: { "a3@(0x1234:w)@(0xfeedface:l,a5:w:1)", MIPOST },
700: { "a3@(0x1234:w)@(0xfeedface:l,a5:w:2)", MIPOST },
701: { "a3@(0x1234:w)@(0xfeedface:l,a5:w:4)", MIPOST },
702: { "a3@(0x1234:w)@(0xfeedface:l,a5:w:8)", MIPOST },
703: { "a3@(0x1234:w)@(0xfeedface:l,a5:l:1)", MIPOST },
704: { "a3@(0x1234:w)@(0xfeedface:l,a5:l:2)", MIPOST },
705: { "a3@(0x1234:w)@(0xfeedface:l,a5:l:4)", MIPOST },
706: { "a3@(0x1234:w)@(0xfeedface:l,a5:l:8)", MIPOST },
707: { "a3@(0x1234abcd:l)@(0xfeedface:l,d2:w:1)", MIPOST },
708: { "a3@(0x1234abcd:l)@(0xfeedface:l,d2:w:2)", MIPOST },
709: { "a3@(0x1234abcd:l)@(0xfeedface:l,d2:w:4)", MIPOST },
710: { "a3@(0x1234abcd:l)@(0xfeedface:l,d2:w:8)", MIPOST },
711: { "a3@(0x1234abcd:l)@(0xfeedface:l,d2:l:1)", MIPOST },
712: { "a3@(0x1234abcd:l)@(0xfeedface:l,d2:l:2)", MIPOST },
713: { "a3@(0x1234abcd:l)@(0xfeedface:l,d2:l:4)", MIPOST },
714: { "a3@(0x1234abcd:l)@(0xfeedface:l,d2:l:8)", MIPOST },
715: { "a3@(0x1234abcd:l)@(0xfeedface:l,a5:w:1)", MIPOST },
716: { "a3@(0x1234abcd:l)@(0xfeedface:l,a5:w:2)", MIPOST },
717: { "a3@(0x1234abcd:l)@(0xfeedface:l,a5:w:4)", MIPOST },
718: { "a3@(0x1234abcd:l)@(0xfeedface:l,a5:w:8)", MIPOST },
719: { "a3@(0x1234abcd:l)@(0xfeedface:l,a5:l:1)", MIPOST },
720: { "a3@(0x1234abcd:l)@(0xfeedface:l,a5:l:2)", MIPOST },
721: { "a3@(0x1234abcd:l)@(0xfeedface:l,a5:l:4)", MIPOST },
722: #endif ALL_OPERANDS
723: { "a3@(0x1234abcd:l)@(0xfeedface:l,a5:l:8)", MIPOST },
724: #ifdef ALL_OPERANDS
725: { "@(0)@(0xfeedface:l)", MIPOST },
726: { "@(0)@(0xfeedface:l,d2:w:1)", MIPOST },
727: { "@(0)@(0xfeedface:l,d2:w:2)", MIPOST },
728: { "@(0)@(0xfeedface:l,d2:w:4)", MIPOST },
729: { "@(0)@(0xfeedface:l,d2:w:8)", MIPOST },
730: { "@(0)@(0xfeedface:l,d2:l:1)", MIPOST },
731: { "@(0)@(0xfeedface:l,d2:l:2)", MIPOST },
732: { "@(0)@(0xfeedface:l,d2:l:4)", MIPOST },
733: { "@(0)@(0xfeedface:l,d2:l:8)", MIPOST },
734: { "@(0)@(0xfeedface:l,a5:w:1)", MIPOST },
735: { "@(0)@(0xfeedface:l,a5:w:2)", MIPOST },
736: { "@(0)@(0xfeedface:l,a5:w:4)", MIPOST },
737: { "@(0)@(0xfeedface:l,a5:w:8)", MIPOST },
738: { "@(0)@(0xfeedface:l,a5:l:1)", MIPOST },
739: { "@(0)@(0xfeedface:l,a5:l:2)", MIPOST },
740: { "@(0)@(0xfeedface:l,a5:l:4)", MIPOST },
741: { "@(0)@(0xfeedface:l,a5:l:8)", MIPOST },
742: { "@(0x1234:w)@(0xfeedface:l,d2:w:1)", MIPOST },
743: { "@(0x1234:w)@(0xfeedface:l,d2:w:2)", MIPOST },
744: { "@(0x1234:w)@(0xfeedface:l,d2:w:4)", MIPOST },
745: { "@(0x1234:w)@(0xfeedface:l,d2:w:8)", MIPOST },
746: { "@(0x1234:w)@(0xfeedface:l,d2:l:1)", MIPOST },
747: { "@(0x1234:w)@(0xfeedface:l,d2:l:2)", MIPOST },
748: { "@(0x1234:w)@(0xfeedface:l,d2:l:4)", MIPOST },
749: { "@(0x1234:w)@(0xfeedface:l,d2:l:8)", MIPOST },
750: { "@(0x1234:w)@(0xfeedface:l,a5:w:1)", MIPOST },
751: { "@(0x1234:w)@(0xfeedface:l,a5:w:2)", MIPOST },
752: { "@(0x1234:w)@(0xfeedface:l,a5:w:4)", MIPOST },
753: { "@(0x1234:w)@(0xfeedface:l,a5:w:8)", MIPOST },
754: { "@(0x1234:w)@(0xfeedface:l,a5:l:1)", MIPOST },
755: { "@(0x1234:w)@(0xfeedface:l,a5:l:2)", MIPOST },
756: { "@(0x1234:w)@(0xfeedface:l,a5:l:4)", MIPOST },
757: { "@(0x1234:w)@(0xfeedface:l,a5:l:8)", MIPOST },
758: { "@(0x1234abcd:l)@(0xfeedface:l,d2:w:1)", MIPOST },
759: { "@(0x1234abcd:l)@(0xfeedface:l,d2:w:2)", MIPOST },
760: { "@(0x1234abcd:l)@(0xfeedface:l,d2:w:4)", MIPOST },
761: { "@(0x1234abcd:l)@(0xfeedface:l,d2:w:8)", MIPOST },
762: { "@(0x1234abcd:l)@(0xfeedface:l,d2:l:1)", MIPOST },
763: { "@(0x1234abcd:l)@(0xfeedface:l,d2:l:2)", MIPOST },
764: { "@(0x1234abcd:l)@(0xfeedface:l,d2:l:4)", MIPOST },
765: { "@(0x1234abcd:l)@(0xfeedface:l,d2:l:8)", MIPOST },
766: { "@(0x1234abcd:l)@(0xfeedface:l,a5:w:1)", MIPOST },
767: { "@(0x1234abcd:l)@(0xfeedface:l,a5:w:2)", MIPOST },
768: { "@(0x1234abcd:l)@(0xfeedface:l,a5:w:4)", MIPOST },
769: { "@(0x1234abcd:l)@(0xfeedface:l,a5:w:8)", MIPOST },
770: { "@(0x1234abcd:l)@(0xfeedface:l,a5:l:1)", MIPOST },
771: { "@(0x1234abcd:l)@(0xfeedface:l,a5:l:2)", MIPOST },
772: { "@(0x1234abcd:l)@(0xfeedface:l,a5:l:4)", MIPOST },
773: { "@(0x1234abcd:l)@(0xfeedface:l,a5:l:8)", MIPOST },
774: #endif ALL_OPERANDS
775:
776: /* xxx:w "Absolute Short" (xxx).W */
777: { "0x1bad:w", ABSW },
778: /* xxx:l "Absolute Long" (xxx).L */
779: { "0xbad1add2:l", ABSL },
780: /* #data "Immediate" #<data> */
781: { "#0x3", IMMED },
782:
783: /* pc@(d16) "Program Counter Indirect with Displacement" (d16,PC)
784: { "pc@(0x1234)", PCd16 },
785: /* pc@(d8,Xn) "Program Counter Indirect with Index (8-Bit Displacement)"
786: uses Brief Format Extension Word (d8,PC,Xn) */
787: #ifdef ALL_OPERANDS
788: { "pc@(0x12:b,d2:w:1)", PCd8Xn },
789: { "pc@(0x12:b,d2:w:2)", PCd8Xn },
790: { "pc@(0x12:b,d2:w:4)", PCd8Xn },
791: { "pc@(0x12:b,d2:w:8)", PCd8Xn },
792: { "pc@(0x12:b,d2:l:1)", PCd8Xn },
793: { "pc@(0x12:b,d2:l:2)", PCd8Xn },
794: { "pc@(0x12:b,d2:l:4)", PCd8Xn },
795: { "pc@(0x12:b,d2:l:8)", PCd8Xn },
796: { "pc@(0x12:b,a5:w:1)", PCd8Xn },
797: { "pc@(0x12:b,a5:w:2)", PCd8Xn },
798: { "pc@(0x12:b,a5:w:4)", PCd8Xn },
799: { "pc@(0x12:b,a5:w:8)", PCd8Xn },
800: { "pc@(0x12:b,a5:l:1)", PCd8Xn },
801: { "pc@(0x12:b,a5:l:2)", PCd8Xn },
802: { "pc@(0x12:b,a5:l:4)", PCd8Xn },
803: #endif ALL_OPERANDS
804: { "pc@(0x12:b,a5:l:8)", PCd8Xn },
805:
806: /* pc@(bd,Xn) "Program Counter Indirect with Index (Base Displacement)"
807: uses Full Format Extension Word(s) (bd,PC,Xn) */
808: #ifdef ALL_OPERANDS
809: /* the form of pc@(bd,Xn) with bd (base displacement) encoded as a null
810: displacement will not be generated by the assembler because it will use
811: the form pc(d8,Xn).
812: { "pc@(0)", PCbdXn },
813: { "pc@(0,d2:w:1)", PCbdXn },
814: { "pc@(0,d2:w:2)", PCbdXn },
815: { "pc@(0,d2:w:4)", PCbdXn },
816: { "pc@(0,d2:w:8)", PCbdXn },
817: { "pc@(0,d2:l:1)", PCbdXn },
818: { "pc@(0,d2:l:2)", PCbdXn },
819: { "pc@(0,d2:l:4)", PCbdXn },
820: { "pc@(0,d2:l:8)", PCbdXn },
821: { "pc@(0,a5:w:1)", PCbdXn },
822: { "pc@(0,a5:w:2)", PCbdXn },
823: { "pc@(0,a5:w:4)", PCbdXn },
824: { "pc@(0,a5:w:8)", PCbdXn },
825: { "pc@(0,a5:l:1)", PCbdXn },
826: { "pc@(0,a5:l:2)", PCbdXn },
827: { "pc@(0,a5:l:4)", PCbdXn },
828: { "pc@(0,a5:l:8)", PCbdXn },
829: */
830: { "pc@(0x1234:w,d2:w:1)", PCbdXn },
831: { "pc@(0x1234:w,d2:w:2)", PCbdXn },
832: { "pc@(0x1234:w,d2:w:4)", PCbdXn },
833: { "pc@(0x1234:w,d2:w:8)", PCbdXn },
834: { "pc@(0x1234:w,d2:l:1)", PCbdXn },
835: { "pc@(0x1234:w,d2:l:2)", PCbdXn },
836: { "pc@(0x1234:w,d2:l:4)", PCbdXn },
837: { "pc@(0x1234:w,d2:l:8)", PCbdXn },
838: { "pc@(0x1234:w,a5:w:1)", PCbdXn },
839: { "pc@(0x1234:w,a5:w:2)", PCbdXn },
840: { "pc@(0x1234:w,a5:w:4)", PCbdXn },
841: { "pc@(0x1234:w,a5:w:8)", PCbdXn },
842: { "pc@(0x1234:w,a5:l:1)", PCbdXn },
843: { "pc@(0x1234:w,a5:l:2)", PCbdXn },
844: { "pc@(0x1234:w,a5:l:4)", PCbdXn },
845: { "pc@(0x1234:w,a5:l:8)", PCbdXn },
846: { "pc@(0x1234abcd:l,d2:w:1)", PCbdXn },
847: { "pc@(0x1234abcd:l,d2:w:2)", PCbdXn },
848: { "pc@(0x1234abcd:l,d2:w:4)", PCbdXn },
849: { "pc@(0x1234abcd:l,d2:w:8)", PCbdXn },
850: { "pc@(0x1234abcd:l,d2:l:1)", PCbdXn },
851: { "pc@(0x1234abcd:l,d2:l:2)", PCbdXn },
852: { "pc@(0x1234abcd:l,d2:l:4)", PCbdXn },
853: { "pc@(0x1234abcd:l,d2:l:8)", PCbdXn },
854: { "pc@(0x1234abcd:l,a5:w:1)", PCbdXn },
855: { "pc@(0x1234abcd:l,a5:w:2)", PCbdXn },
856: { "pc@(0x1234abcd:l,a5:w:4)", PCbdXn },
857: { "pc@(0x1234abcd:l,a5:w:8)", PCbdXn },
858: { "pc@(0x1234abcd:l,a5:l:1)", PCbdXn },
859: { "pc@(0x1234abcd:l,a5:l:2)", PCbdXn },
860: { "pc@(0x1234abcd:l,a5:l:4)", PCbdXn },
861: #endif ALL_OPERANDS
862: { "pc@(0x1234abcd:l,a5:l:8)", PCbdXn },
863: #ifdef ALL_OPERANDS
864: { "zpc@(0)", PCbdXn },
865: { "zpc@(0,d2:w:1)", PCbdXn },
866: { "zpc@(0,d2:w:2)", PCbdXn },
867: { "zpc@(0,d2:w:4)", PCbdXn },
868: { "zpc@(0,d2:w:8)", PCbdXn },
869: { "zpc@(0,d2:l:1)", PCbdXn },
870: { "zpc@(0,d2:l:2)", PCbdXn },
871: { "zpc@(0,d2:l:4)", PCbdXn },
872: { "zpc@(0,d2:l:8)", PCbdXn },
873: { "zpc@(0,a5:w:1)", PCbdXn },
874: { "zpc@(0,a5:w:2)", PCbdXn },
875: { "zpc@(0,a5:w:4)", PCbdXn },
876: { "zpc@(0,a5:w:8)", PCbdXn },
877: { "zpc@(0,a5:l:1)", PCbdXn },
878: { "zpc@(0,a5:l:2)", PCbdXn },
879: { "zpc@(0,a5:l:4)", PCbdXn },
880: { "zpc@(0,a5:l:8)", PCbdXn },
881: { "zpc@(0x1234:w,d2:w:1)", PCbdXn },
882: { "zpc@(0x1234:w,d2:w:2)", PCbdXn },
883: { "zpc@(0x1234:w,d2:w:4)", PCbdXn },
884: { "zpc@(0x1234:w,d2:w:8)", PCbdXn },
885: { "zpc@(0x1234:w,d2:l:1)", PCbdXn },
886: { "zpc@(0x1234:w,d2:l:2)", PCbdXn },
887: { "zpc@(0x1234:w,d2:l:4)", PCbdXn },
888: { "zpc@(0x1234:w,d2:l:8)", PCbdXn },
889: { "zpc@(0x1234:w,a5:w:1)", PCbdXn },
890: { "zpc@(0x1234:w,a5:w:2)", PCbdXn },
891: { "zpc@(0x1234:w,a5:w:4)", PCbdXn },
892: { "zpc@(0x1234:w,a5:w:8)", PCbdXn },
893: { "zpc@(0x1234:w,a5:l:1)", PCbdXn },
894: { "zpc@(0x1234:w,a5:l:2)", PCbdXn },
895: { "zpc@(0x1234:w,a5:l:4)", PCbdXn },
896: { "zpc@(0x1234:w,a5:l:8)", PCbdXn },
897: { "zpc@(0x1234abcd:l,d2:w:1)", PCbdXn },
898: { "zpc@(0x1234abcd:l,d2:w:2)", PCbdXn },
899: { "zpc@(0x1234abcd:l,d2:w:4)", PCbdXn },
900: { "zpc@(0x1234abcd:l,d2:w:8)", PCbdXn },
901: { "zpc@(0x1234abcd:l,d2:l:1)", PCbdXn },
902: { "zpc@(0x1234abcd:l,d2:l:2)", PCbdXn },
903: { "zpc@(0x1234abcd:l,d2:l:4)", PCbdXn },
904: { "zpc@(0x1234abcd:l,d2:l:8)", PCbdXn },
905: { "zpc@(0x1234abcd:l,a5:w:1)", PCbdXn },
906: { "zpc@(0x1234abcd:l,a5:w:2)", PCbdXn },
907: { "zpc@(0x1234abcd:l,a5:w:4)", PCbdXn },
908: { "zpc@(0x1234abcd:l,a5:w:8)", PCbdXn },
909: { "zpc@(0x1234abcd:l,a5:l:1)", PCbdXn },
910: { "zpc@(0x1234abcd:l,a5:l:2)", PCbdXn },
911: { "zpc@(0x1234abcd:l,a5:l:4)", PCbdXn },
912: #endif ALL_OPERANDS
913: { "zpc@(0x1234abcd:l,a5:l:8)", PCbdXn },
914: /* pc@(bd,Xn)@(od) "Program Counter Memory Indirect with Preindexed"
915: uses Full Format Extension Word(s) ([bd,PC,Xn],od) */
916: #ifdef ALL_OPERANDS
917: { "pc@(0)@(0)", PCMIPRE },
918: { "pc@(0,d2:w:1)@(0)", PCMIPRE },
919: { "pc@(0,d2:w:2)@(0)", PCMIPRE },
920: { "pc@(0,d2:w:4)@(0)", PCMIPRE },
921: { "pc@(0,d2:w:8)@(0)", PCMIPRE },
922: { "pc@(0,d2:l:1)@(0)", PCMIPRE },
923: { "pc@(0,d2:l:2)@(0)", PCMIPRE },
924: { "pc@(0,d2:l:4)@(0)", PCMIPRE },
925: { "pc@(0,d2:l:8)@(0)", PCMIPRE },
926: { "pc@(0,a5:w:1)@(0)", PCMIPRE },
927: { "pc@(0,a5:w:2)@(0)", PCMIPRE },
928: { "pc@(0,a5:w:4)@(0)", PCMIPRE },
929: { "pc@(0,a5:w:8)@(0)", PCMIPRE },
930: { "pc@(0,a5:l:1)@(0)", PCMIPRE },
931: { "pc@(0,a5:l:2)@(0)", PCMIPRE },
932: { "pc@(0,a5:l:4)@(0)", PCMIPRE },
933: { "pc@(0,a5:l:8)@(0)", PCMIPRE },
934: { "pc@(0x1234:w,d2:w:1)@(0)", PCMIPRE },
935: { "pc@(0x1234:w,d2:w:2)@(0)", PCMIPRE },
936: { "pc@(0x1234:w,d2:w:4)@(0)", PCMIPRE },
937: { "pc@(0x1234:w,d2:w:8)@(0)", PCMIPRE },
938: { "pc@(0x1234:w,d2:l:1)@(0)", PCMIPRE },
939: { "pc@(0x1234:w,d2:l:2)@(0)", PCMIPRE },
940: { "pc@(0x1234:w,d2:l:4)@(0)", PCMIPRE },
941: { "pc@(0x1234:w,d2:l:8)@(0)", PCMIPRE },
942: { "pc@(0x1234:w,a5:w:1)@(0)", PCMIPRE },
943: { "pc@(0x1234:w,a5:w:2)@(0)", PCMIPRE },
944: { "pc@(0x1234:w,a5:w:4)@(0)", PCMIPRE },
945: { "pc@(0x1234:w,a5:w:8)@(0)", PCMIPRE },
946: { "pc@(0x1234:w,a5:l:1)@(0)", PCMIPRE },
947: { "pc@(0x1234:w,a5:l:2)@(0)", PCMIPRE },
948: { "pc@(0x1234:w,a5:l:4)@(0)", PCMIPRE },
949: { "pc@(0x1234:w,a5:l:8)@(0)", PCMIPRE },
950: { "pc@(0x1234abcd:l,d2:w:1)@(0)", PCMIPRE },
951: { "pc@(0x1234abcd:l,d2:w:2)@(0)", PCMIPRE },
952: { "pc@(0x1234abcd:l,d2:w:4)@(0)", PCMIPRE },
953: { "pc@(0x1234abcd:l,d2:w:8)@(0)", PCMIPRE },
954: { "pc@(0x1234abcd:l,d2:l:1)@(0)", PCMIPRE },
955: { "pc@(0x1234abcd:l,d2:l:2)@(0)", PCMIPRE },
956: { "pc@(0x1234abcd:l,d2:l:4)@(0)", PCMIPRE },
957: { "pc@(0x1234abcd:l,d2:l:8)@(0)", PCMIPRE },
958: { "pc@(0x1234abcd:l,a5:w:1)@(0)", PCMIPRE },
959: { "pc@(0x1234abcd:l,a5:w:2)@(0)", PCMIPRE },
960: { "pc@(0x1234abcd:l,a5:w:4)@(0)", PCMIPRE },
961: { "pc@(0x1234abcd:l,a5:w:8)@(0)", PCMIPRE },
962: { "pc@(0x1234abcd:l,a5:l:1)@(0)", PCMIPRE },
963: { "pc@(0x1234abcd:l,a5:l:2)@(0)", PCMIPRE },
964: { "pc@(0x1234abcd:l,a5:l:4)@(0)", PCMIPRE },
965: { "pc@(0x1234abcd:l,a5:l:8)@(0)", PCMIPRE },
966: { "zpc@(0)@(0)", PCMIPRE },
967: { "zpc@(0,d2:w:1)@(0)", PCMIPRE },
968: { "zpc@(0,d2:w:2)@(0)", PCMIPRE },
969: { "zpc@(0,d2:w:4)@(0)", PCMIPRE },
970: { "zpc@(0,d2:w:8)@(0)", PCMIPRE },
971: { "zpc@(0,d2:l:1)@(0)", PCMIPRE },
972: { "zpc@(0,d2:l:2)@(0)", PCMIPRE },
973: { "zpc@(0,d2:l:4)@(0)", PCMIPRE },
974: { "zpc@(0,d2:l:8)@(0)", PCMIPRE },
975: { "zpc@(0,a5:w:1)@(0)", PCMIPRE },
976: { "zpc@(0,a5:w:2)@(0)", PCMIPRE },
977: { "zpc@(0,a5:w:4)@(0)", PCMIPRE },
978: { "zpc@(0,a5:w:8)@(0)", PCMIPRE },
979: { "zpc@(0,a5:l:1)@(0)", PCMIPRE },
980: { "zpc@(0,a5:l:2)@(0)", PCMIPRE },
981: { "zpc@(0,a5:l:4)@(0)", PCMIPRE },
982: { "zpc@(0,a5:l:8)@(0)", PCMIPRE },
983: { "zpc@(0x1234:w,d2:w:1)@(0)", PCMIPRE },
984: { "zpc@(0x1234:w,d2:w:2)@(0)", PCMIPRE },
985: { "zpc@(0x1234:w,d2:w:4)@(0)", PCMIPRE },
986: { "zpc@(0x1234:w,d2:w:8)@(0)", PCMIPRE },
987: { "zpc@(0x1234:w,d2:l:1)@(0)", PCMIPRE },
988: { "zpc@(0x1234:w,d2:l:2)@(0)", PCMIPRE },
989: { "zpc@(0x1234:w,d2:l:4)@(0)", PCMIPRE },
990: { "zpc@(0x1234:w,d2:l:8)@(0)", PCMIPRE },
991: { "zpc@(0x1234:w,a5:w:1)@(0)", PCMIPRE },
992: { "zpc@(0x1234:w,a5:w:2)@(0)", PCMIPRE },
993: { "zpc@(0x1234:w,a5:w:4)@(0)", PCMIPRE },
994: { "zpc@(0x1234:w,a5:w:8)@(0)", PCMIPRE },
995: { "zpc@(0x1234:w,a5:l:1)@(0)", PCMIPRE },
996: { "zpc@(0x1234:w,a5:l:2)@(0)", PCMIPRE },
997: { "zpc@(0x1234:w,a5:l:4)@(0)", PCMIPRE },
998: { "zpc@(0x1234:w,a5:l:8)@(0)", PCMIPRE },
999: { "zpc@(0x1234abcd:l,d2:w:1)@(0)", PCMIPRE },
1000: { "zpc@(0x1234abcd:l,d2:w:2)@(0)", PCMIPRE },
1001: { "zpc@(0x1234abcd:l,d2:w:4)@(0)", PCMIPRE },
1002: { "zpc@(0x1234abcd:l,d2:w:8)@(0)", PCMIPRE },
1003: { "zpc@(0x1234abcd:l,d2:l:1)@(0)", PCMIPRE },
1004: { "zpc@(0x1234abcd:l,d2:l:2)@(0)", PCMIPRE },
1005: { "zpc@(0x1234abcd:l,d2:l:4)@(0)", PCMIPRE },
1006: { "zpc@(0x1234abcd:l,d2:l:8)@(0)", PCMIPRE },
1007: { "zpc@(0x1234abcd:l,a5:w:1)@(0)", PCMIPRE },
1008: { "zpc@(0x1234abcd:l,a5:w:2)@(0)", PCMIPRE },
1009: { "zpc@(0x1234abcd:l,a5:w:4)@(0)", PCMIPRE },
1010: { "zpc@(0x1234abcd:l,a5:w:8)@(0)", PCMIPRE },
1011: { "zpc@(0x1234abcd:l,a5:l:1)@(0)", PCMIPRE },
1012: { "zpc@(0x1234abcd:l,a5:l:2)@(0)", PCMIPRE },
1013: { "zpc@(0x1234abcd:l,a5:l:4)@(0)", PCMIPRE },
1014: { "zpc@(0x1234abcd:l,a5:l:8)@(0)", PCMIPRE },
1015: { "pc@(0)@(0xfeed:w)", PCMIPRE },
1016: { "pc@(0,d2:w:1)@(0xfeed:w)", PCMIPRE },
1017: { "pc@(0,d2:w:2)@(0xfeed:w)", PCMIPRE },
1018: { "pc@(0,d2:w:4)@(0xfeed:w)", PCMIPRE },
1019: { "pc@(0,d2:w:8)@(0xfeed:w)", PCMIPRE },
1020: { "pc@(0,d2:l:1)@(0xfeed:w)", PCMIPRE },
1021: { "pc@(0,d2:l:2)@(0xfeed:w)", PCMIPRE },
1022: { "pc@(0,d2:l:4)@(0xfeed:w)", PCMIPRE },
1023: { "pc@(0,d2:l:8)@(0xfeed:w)", PCMIPRE },
1024: { "pc@(0,a5:w:1)@(0xfeed:w)", PCMIPRE },
1025: { "pc@(0,a5:w:2)@(0xfeed:w)", PCMIPRE },
1026: { "pc@(0,a5:w:4)@(0xfeed:w)", PCMIPRE },
1027: { "pc@(0,a5:w:8)@(0xfeed:w)", PCMIPRE },
1028: { "pc@(0,a5:l:1)@(0xfeed:w)", PCMIPRE },
1029: { "pc@(0,a5:l:2)@(0xfeed:w)", PCMIPRE },
1030: { "pc@(0,a5:l:4)@(0xfeed:w)", PCMIPRE },
1031: { "pc@(0,a5:l:8)@(0xfeed:w)", PCMIPRE },
1032: { "pc@(0x1234:w,d2:w:1)@(0xfeed:w)", PCMIPRE },
1033: { "pc@(0x1234:w,d2:w:2)@(0xfeed:w)", PCMIPRE },
1034: { "pc@(0x1234:w,d2:w:4)@(0xfeed:w)", PCMIPRE },
1035: { "pc@(0x1234:w,d2:w:8)@(0xfeed:w)", PCMIPRE },
1036: { "pc@(0x1234:w,d2:l:1)@(0xfeed:w)", PCMIPRE },
1037: { "pc@(0x1234:w,d2:l:2)@(0xfeed:w)", PCMIPRE },
1038: { "pc@(0x1234:w,d2:l:4)@(0xfeed:w)", PCMIPRE },
1039: { "pc@(0x1234:w,d2:l:8)@(0xfeed:w)", PCMIPRE },
1040: { "pc@(0x1234:w,a5:w:1)@(0xfeed:w)", PCMIPRE },
1041: { "pc@(0x1234:w,a5:w:2)@(0xfeed:w)", PCMIPRE },
1042: { "pc@(0x1234:w,a5:w:4)@(0xfeed:w)", PCMIPRE },
1043: { "pc@(0x1234:w,a5:w:8)@(0xfeed:w)", PCMIPRE },
1044: { "pc@(0x1234:w,a5:l:1)@(0xfeed:w)", PCMIPRE },
1045: { "pc@(0x1234:w,a5:l:2)@(0xfeed:w)", PCMIPRE },
1046: { "pc@(0x1234:w,a5:l:4)@(0xfeed:w)", PCMIPRE },
1047: { "pc@(0x1234:w,a5:l:8)@(0xfeed:w)", PCMIPRE },
1048: { "pc@(0x1234abcd:l,d2:w:1)@(0xfeed:w)", PCMIPRE },
1049: { "pc@(0x1234abcd:l,d2:w:2)@(0xfeed:w)", PCMIPRE },
1050: { "pc@(0x1234abcd:l,d2:w:4)@(0xfeed:w)", PCMIPRE },
1051: { "pc@(0x1234abcd:l,d2:w:8)@(0xfeed:w)", PCMIPRE },
1052: { "pc@(0x1234abcd:l,d2:l:1)@(0xfeed:w)", PCMIPRE },
1053: { "pc@(0x1234abcd:l,d2:l:2)@(0xfeed:w)", PCMIPRE },
1054: { "pc@(0x1234abcd:l,d2:l:4)@(0xfeed:w)", PCMIPRE },
1055: { "pc@(0x1234abcd:l,d2:l:8)@(0xfeed:w)", PCMIPRE },
1056: { "pc@(0x1234abcd:l,a5:w:1)@(0xfeed:w)", PCMIPRE },
1057: { "pc@(0x1234abcd:l,a5:w:2)@(0xfeed:w)", PCMIPRE },
1058: { "pc@(0x1234abcd:l,a5:w:4)@(0xfeed:w)", PCMIPRE },
1059: { "pc@(0x1234abcd:l,a5:w:8)@(0xfeed:w)", PCMIPRE },
1060: { "pc@(0x1234abcd:l,a5:l:1)@(0xfeed:w)", PCMIPRE },
1061: { "pc@(0x1234abcd:l,a5:l:2)@(0xfeed:w)", PCMIPRE },
1062: { "pc@(0x1234abcd:l,a5:l:4)@(0xfeed:w)", PCMIPRE },
1063: { "pc@(0x1234abcd:l,a5:l:8)@(0xfeed:w)", PCMIPRE },
1064: { "zpc@(0)@(0xfeed:w)", PCMIPRE },
1065: { "zpc@(0,d2:w:1)@(0xfeed:w)", PCMIPRE },
1066: { "zpc@(0,d2:w:2)@(0xfeed:w)", PCMIPRE },
1067: { "zpc@(0,d2:w:4)@(0xfeed:w)", PCMIPRE },
1068: { "zpc@(0,d2:w:8)@(0xfeed:w)", PCMIPRE },
1069: { "zpc@(0,d2:l:1)@(0xfeed:w)", PCMIPRE },
1070: { "zpc@(0,d2:l:2)@(0xfeed:w)", PCMIPRE },
1071: { "zpc@(0,d2:l:4)@(0xfeed:w)", PCMIPRE },
1072: { "zpc@(0,d2:l:8)@(0xfeed:w)", PCMIPRE },
1073: { "zpc@(0,a5:w:1)@(0xfeed:w)", PCMIPRE },
1074: { "zpc@(0,a5:w:2)@(0xfeed:w)", PCMIPRE },
1075: { "zpc@(0,a5:w:4)@(0xfeed:w)", PCMIPRE },
1076: { "zpc@(0,a5:w:8)@(0xfeed:w)", PCMIPRE },
1077: { "zpc@(0,a5:l:1)@(0xfeed:w)", PCMIPRE },
1078: { "zpc@(0,a5:l:2)@(0xfeed:w)", PCMIPRE },
1079: { "zpc@(0,a5:l:4)@(0xfeed:w)", PCMIPRE },
1080: { "zpc@(0,a5:l:8)@(0xfeed:w)", PCMIPRE },
1081: { "zpc@(0x1234:w,d2:w:1)@(0xfeed:w)", PCMIPRE },
1082: { "zpc@(0x1234:w,d2:w:2)@(0xfeed:w)", PCMIPRE },
1083: { "zpc@(0x1234:w,d2:w:4)@(0xfeed:w)", PCMIPRE },
1084: { "zpc@(0x1234:w,d2:w:8)@(0xfeed:w)", PCMIPRE },
1085: { "zpc@(0x1234:w,d2:l:1)@(0xfeed:w)", PCMIPRE },
1086: { "zpc@(0x1234:w,d2:l:2)@(0xfeed:w)", PCMIPRE },
1087: { "zpc@(0x1234:w,d2:l:4)@(0xfeed:w)", PCMIPRE },
1088: { "zpc@(0x1234:w,d2:l:8)@(0xfeed:w)", PCMIPRE },
1089: { "zpc@(0x1234:w,a5:w:1)@(0xfeed:w)", PCMIPRE },
1090: { "zpc@(0x1234:w,a5:w:2)@(0xfeed:w)", PCMIPRE },
1091: { "zpc@(0x1234:w,a5:w:4)@(0xfeed:w)", PCMIPRE },
1092: { "zpc@(0x1234:w,a5:w:8)@(0xfeed:w)", PCMIPRE },
1093: { "zpc@(0x1234:w,a5:l:1)@(0xfeed:w)", PCMIPRE },
1094: { "zpc@(0x1234:w,a5:l:2)@(0xfeed:w)", PCMIPRE },
1095: { "zpc@(0x1234:w,a5:l:4)@(0xfeed:w)", PCMIPRE },
1096: { "zpc@(0x1234:w,a5:l:8)@(0xfeed:w)", PCMIPRE },
1097: { "zpc@(0x1234abcd:l,d2:w:1)@(0xfeed:w)", PCMIPRE },
1098: { "zpc@(0x1234abcd:l,d2:w:2)@(0xfeed:w)", PCMIPRE },
1099: { "zpc@(0x1234abcd:l,d2:w:4)@(0xfeed:w)", PCMIPRE },
1100: { "zpc@(0x1234abcd:l,d2:w:8)@(0xfeed:w)", PCMIPRE },
1101: { "zpc@(0x1234abcd:l,d2:l:1)@(0xfeed:w)", PCMIPRE },
1102: { "zpc@(0x1234abcd:l,d2:l:2)@(0xfeed:w)", PCMIPRE },
1103: { "zpc@(0x1234abcd:l,d2:l:4)@(0xfeed:w)", PCMIPRE },
1104: { "zpc@(0x1234abcd:l,d2:l:8)@(0xfeed:w)", PCMIPRE },
1105: { "zpc@(0x1234abcd:l,a5:w:1)@(0xfeed:w)", PCMIPRE },
1106: { "zpc@(0x1234abcd:l,a5:w:2)@(0xfeed:w)", PCMIPRE },
1107: { "zpc@(0x1234abcd:l,a5:w:4)@(0xfeed:w)", PCMIPRE },
1108: { "zpc@(0x1234abcd:l,a5:w:8)@(0xfeed:w)", PCMIPRE },
1109: { "zpc@(0x1234abcd:l,a5:l:1)@(0xfeed:w)", PCMIPRE },
1110: { "zpc@(0x1234abcd:l,a5:l:2)@(0xfeed:w)", PCMIPRE },
1111: { "zpc@(0x1234abcd:l,a5:l:4)@(0xfeed:w)", PCMIPRE },
1112: { "zpc@(0x1234abcd:l,a5:l:8)@(0xfeed:w)", PCMIPRE },
1113: { "pc@(0)@(0xfeedface:l)", PCMIPRE },
1114: { "pc@(0,d2:w:1)@(0xfeedface:l)", PCMIPRE },
1115: { "pc@(0,d2:w:2)@(0xfeedface:l)", PCMIPRE },
1116: { "pc@(0,d2:w:4)@(0xfeedface:l)", PCMIPRE },
1117: { "pc@(0,d2:w:8)@(0xfeedface:l)", PCMIPRE },
1118: { "pc@(0,d2:l:1)@(0xfeedface:l)", PCMIPRE },
1119: { "pc@(0,d2:l:2)@(0xfeedface:l)", PCMIPRE },
1120: { "pc@(0,d2:l:4)@(0xfeedface:l)", PCMIPRE },
1121: { "pc@(0,d2:l:8)@(0xfeedface:l)", PCMIPRE },
1122: { "pc@(0,a5:w:1)@(0xfeedface:l)", PCMIPRE },
1123: { "pc@(0,a5:w:2)@(0xfeedface:l)", PCMIPRE },
1124: { "pc@(0,a5:w:4)@(0xfeedface:l)", PCMIPRE },
1125: { "pc@(0,a5:w:8)@(0xfeedface:l)", PCMIPRE },
1126: { "pc@(0,a5:l:1)@(0xfeedface:l)", PCMIPRE },
1127: { "pc@(0,a5:l:2)@(0xfeedface:l)", PCMIPRE },
1128: { "pc@(0,a5:l:4)@(0xfeedface:l)", PCMIPRE },
1129: { "pc@(0,a5:l:8)@(0xfeedface:l)", PCMIPRE },
1130: { "pc@(0x1234:w,d2:w:1)@(0xfeedface:l)", PCMIPRE },
1131: { "pc@(0x1234:w,d2:w:2)@(0xfeedface:l)", PCMIPRE },
1132: { "pc@(0x1234:w,d2:w:4)@(0xfeedface:l)", PCMIPRE },
1133: { "pc@(0x1234:w,d2:w:8)@(0xfeedface:l)", PCMIPRE },
1134: { "pc@(0x1234:w,d2:l:1)@(0xfeedface:l)", PCMIPRE },
1135: { "pc@(0x1234:w,d2:l:2)@(0xfeedface:l)", PCMIPRE },
1136: { "pc@(0x1234:w,d2:l:4)@(0xfeedface:l)", PCMIPRE },
1137: { "pc@(0x1234:w,d2:l:8)@(0xfeedface:l)", PCMIPRE },
1138: { "pc@(0x1234:w,a5:w:1)@(0xfeedface:l)", PCMIPRE },
1139: { "pc@(0x1234:w,a5:w:2)@(0xfeedface:l)", PCMIPRE },
1140: { "pc@(0x1234:w,a5:w:4)@(0xfeedface:l)", PCMIPRE },
1141: { "pc@(0x1234:w,a5:w:8)@(0xfeedface:l)", PCMIPRE },
1142: { "pc@(0x1234:w,a5:l:1)@(0xfeedface:l)", PCMIPRE },
1143: { "pc@(0x1234:w,a5:l:2)@(0xfeedface:l)", PCMIPRE },
1144: { "pc@(0x1234:w,a5:l:4)@(0xfeedface:l)", PCMIPRE },
1145: { "pc@(0x1234:w,a5:l:8)@(0xfeedface:l)", PCMIPRE },
1146: { "pc@(0x1234abcd:l,d2:w:1)@(0xfeedface:l)", PCMIPRE },
1147: { "pc@(0x1234abcd:l,d2:w:2)@(0xfeedface:l)", PCMIPRE },
1148: { "pc@(0x1234abcd:l,d2:w:4)@(0xfeedface:l)", PCMIPRE },
1149: { "pc@(0x1234abcd:l,d2:w:8)@(0xfeedface:l)", PCMIPRE },
1150: { "pc@(0x1234abcd:l,d2:l:1)@(0xfeedface:l)", PCMIPRE },
1151: { "pc@(0x1234abcd:l,d2:l:2)@(0xfeedface:l)", PCMIPRE },
1152: { "pc@(0x1234abcd:l,d2:l:4)@(0xfeedface:l)", PCMIPRE },
1153: { "pc@(0x1234abcd:l,d2:l:8)@(0xfeedface:l)", PCMIPRE },
1154: { "pc@(0x1234abcd:l,a5:w:1)@(0xfeedface:l)", PCMIPRE },
1155: { "pc@(0x1234abcd:l,a5:w:2)@(0xfeedface:l)", PCMIPRE },
1156: { "pc@(0x1234abcd:l,a5:w:4)@(0xfeedface:l)", PCMIPRE },
1157: { "pc@(0x1234abcd:l,a5:w:8)@(0xfeedface:l)", PCMIPRE },
1158: { "pc@(0x1234abcd:l,a5:l:1)@(0xfeedface:l)", PCMIPRE },
1159: { "pc@(0x1234abcd:l,a5:l:2)@(0xfeedface:l)", PCMIPRE },
1160: { "pc@(0x1234abcd:l,a5:l:4)@(0xfeedface:l)", PCMIPRE },
1161: #endif ALL_OPERANDS
1162: { "pc@(0x1234abcd:l,a5:l:8)@(0xfeedface:l)", PCMIPRE },
1163: #ifdef ALL_OPERANDS
1164: { "zpc@(0)@(0xfeedface:l)", PCMIPRE },
1165: { "zpc@(0,d2:w:1)@(0xfeedface:l)", PCMIPRE },
1166: { "zpc@(0,d2:w:2)@(0xfeedface:l)", PCMIPRE },
1167: { "zpc@(0,d2:w:4)@(0xfeedface:l)", PCMIPRE },
1168: { "zpc@(0,d2:w:8)@(0xfeedface:l)", PCMIPRE },
1169: { "zpc@(0,d2:l:1)@(0xfeedface:l)", PCMIPRE },
1170: { "zpc@(0,d2:l:2)@(0xfeedface:l)", PCMIPRE },
1171: { "zpc@(0,d2:l:4)@(0xfeedface:l)", PCMIPRE },
1172: { "zpc@(0,d2:l:8)@(0xfeedface:l)", PCMIPRE },
1173: { "zpc@(0,a5:w:1)@(0xfeedface:l)", PCMIPRE },
1174: { "zpc@(0,a5:w:2)@(0xfeedface:l)", PCMIPRE },
1175: { "zpc@(0,a5:w:4)@(0xfeedface:l)", PCMIPRE },
1176: { "zpc@(0,a5:w:8)@(0xfeedface:l)", PCMIPRE },
1177: { "zpc@(0,a5:l:1)@(0xfeedface:l)", PCMIPRE },
1178: { "zpc@(0,a5:l:2)@(0xfeedface:l)", PCMIPRE },
1179: { "zpc@(0,a5:l:4)@(0xfeedface:l)", PCMIPRE },
1180: { "zpc@(0,a5:l:8)@(0xfeedface:l)", PCMIPRE },
1181: { "zpc@(0x1234:w,d2:w:1)@(0xfeedface:l)", PCMIPRE },
1182: { "zpc@(0x1234:w,d2:w:2)@(0xfeedface:l)", PCMIPRE },
1183: { "zpc@(0x1234:w,d2:w:4)@(0xfeedface:l)", PCMIPRE },
1184: { "zpc@(0x1234:w,d2:w:8)@(0xfeedface:l)", PCMIPRE },
1185: { "zpc@(0x1234:w,d2:l:1)@(0xfeedface:l)", PCMIPRE },
1186: { "zpc@(0x1234:w,d2:l:2)@(0xfeedface:l)", PCMIPRE },
1187: { "zpc@(0x1234:w,d2:l:4)@(0xfeedface:l)", PCMIPRE },
1188: { "zpc@(0x1234:w,d2:l:8)@(0xfeedface:l)", PCMIPRE },
1189: { "zpc@(0x1234:w,a5:w:1)@(0xfeedface:l)", PCMIPRE },
1190: { "zpc@(0x1234:w,a5:w:2)@(0xfeedface:l)", PCMIPRE },
1191: { "zpc@(0x1234:w,a5:w:4)@(0xfeedface:l)", PCMIPRE },
1192: { "zpc@(0x1234:w,a5:w:8)@(0xfeedface:l)", PCMIPRE },
1193: { "zpc@(0x1234:w,a5:l:1)@(0xfeedface:l)", PCMIPRE },
1194: { "zpc@(0x1234:w,a5:l:2)@(0xfeedface:l)", PCMIPRE },
1195: { "zpc@(0x1234:w,a5:l:4)@(0xfeedface:l)", PCMIPRE },
1196: { "zpc@(0x1234:w,a5:l:8)@(0xfeedface:l)", PCMIPRE },
1197: { "zpc@(0x1234abcd:l,d2:w:1)@(0xfeedface:l)", PCMIPRE },
1198: { "zpc@(0x1234abcd:l,d2:w:2)@(0xfeedface:l)", PCMIPRE },
1199: { "zpc@(0x1234abcd:l,d2:w:4)@(0xfeedface:l)", PCMIPRE },
1200: { "zpc@(0x1234abcd:l,d2:w:8)@(0xfeedface:l)", PCMIPRE },
1201: { "zpc@(0x1234abcd:l,d2:l:1)@(0xfeedface:l)", PCMIPRE },
1202: { "zpc@(0x1234abcd:l,d2:l:2)@(0xfeedface:l)", PCMIPRE },
1203: { "zpc@(0x1234abcd:l,d2:l:4)@(0xfeedface:l)", PCMIPRE },
1204: { "zpc@(0x1234abcd:l,d2:l:8)@(0xfeedface:l)", PCMIPRE },
1205: { "zpc@(0x1234abcd:l,a5:w:1)@(0xfeedface:l)", PCMIPRE },
1206: { "zpc@(0x1234abcd:l,a5:w:2)@(0xfeedface:l)", PCMIPRE },
1207: { "zpc@(0x1234abcd:l,a5:w:4)@(0xfeedface:l)", PCMIPRE },
1208: { "zpc@(0x1234abcd:l,a5:w:8)@(0xfeedface:l)", PCMIPRE },
1209: { "zpc@(0x1234abcd:l,a5:l:1)@(0xfeedface:l)", PCMIPRE },
1210: { "zpc@(0x1234abcd:l,a5:l:2)@(0xfeedface:l)", PCMIPRE },
1211: { "zpc@(0x1234abcd:l,a5:l:4)@(0xfeedface:l)", PCMIPRE },
1212: #endif ALL_OPERANDS
1213: { "zpc@(0x1234abcd:l,a5:l:8)@(0xfeedface:l)", PCMIPRE },
1214: /* pc@(bd)@(od,Xn) "Program Counter Memory Indirect with Postindexed"
1215: uses Full Format Extension Word(s) ([bd,PC],Xn,od) */
1216: #ifdef ALL_OPERANDS
1217: { "pc@(0)@(0)", PCMIPOST },
1218: { "pc@(0)@(0,d2:w:1)", PCMIPOST },
1219: { "pc@(0)@(0,d2:w:2)", PCMIPOST },
1220: { "pc@(0)@(0,d2:w:4)", PCMIPOST },
1221: { "pc@(0)@(0,d2:w:8)", PCMIPOST },
1222: { "pc@(0)@(0,d2:l:1)", PCMIPOST },
1223: { "pc@(0)@(0,d2:l:2)", PCMIPOST },
1224: { "pc@(0)@(0,d2:l:4)", PCMIPOST },
1225: { "pc@(0)@(0,d2:l:8)", PCMIPOST },
1226: { "pc@(0)@(0,a5:w:1)", PCMIPOST },
1227: { "pc@(0)@(0,a5:w:2)", PCMIPOST },
1228: { "pc@(0)@(0,a5:w:4)", PCMIPOST },
1229: { "pc@(0)@(0,a5:w:8)", PCMIPOST },
1230: { "pc@(0)@(0,a5:l:1)", PCMIPOST },
1231: { "pc@(0)@(0,a5:l:2)", PCMIPOST },
1232: { "pc@(0)@(0,a5:l:4)", PCMIPOST },
1233: { "pc@(0)@(0,a5:l:8)", PCMIPOST },
1234: { "pc@(0x1234:w)@(0,d2:w:1)", PCMIPOST },
1235: { "pc@(0x1234:w)@(0,d2:w:2)", PCMIPOST },
1236: { "pc@(0x1234:w)@(0,d2:w:4)", PCMIPOST },
1237: { "pc@(0x1234:w)@(0,d2:w:8)", PCMIPOST },
1238: { "pc@(0x1234:w)@(0,d2:l:1)", PCMIPOST },
1239: { "pc@(0x1234:w)@(0,d2:l:2)", PCMIPOST },
1240: { "pc@(0x1234:w)@(0,d2:l:4)", PCMIPOST },
1241: { "pc@(0x1234:w)@(0,d2:l:8)", PCMIPOST },
1242: { "pc@(0x1234:w)@(0,a5:w:1)", PCMIPOST },
1243: { "pc@(0x1234:w)@(0,a5:w:2)", PCMIPOST },
1244: { "pc@(0x1234:w)@(0,a5:w:4)", PCMIPOST },
1245: { "pc@(0x1234:w)@(0,a5:w:8)", PCMIPOST },
1246: { "pc@(0x1234:w)@(0,a5:l:1)", PCMIPOST },
1247: { "pc@(0x1234:w)@(0,a5:l:2)", PCMIPOST },
1248: { "pc@(0x1234:w)@(0,a5:l:4)", PCMIPOST },
1249: { "pc@(0x1234:w)@(0,a5:l:8)", PCMIPOST },
1250: { "pc@(0x1234abcd:l)@(0,d2:w:1)", PCMIPOST },
1251: { "pc@(0x1234abcd:l)@(0,d2:w:2)", PCMIPOST },
1252: { "pc@(0x1234abcd:l)@(0,d2:w:4)", PCMIPOST },
1253: { "pc@(0x1234abcd:l)@(0,d2:w:8)", PCMIPOST },
1254: { "pc@(0x1234abcd:l)@(0,d2:l:1)", PCMIPOST },
1255: { "pc@(0x1234abcd:l)@(0,d2:l:2)", PCMIPOST },
1256: { "pc@(0x1234abcd:l)@(0,d2:l:4)", PCMIPOST },
1257: { "pc@(0x1234abcd:l)@(0,d2:l:8)", PCMIPOST },
1258: { "pc@(0x1234abcd:l)@(0,a5:w:1)", PCMIPOST },
1259: { "pc@(0x1234abcd:l)@(0,a5:w:2)", PCMIPOST },
1260: { "pc@(0x1234abcd:l)@(0,a5:w:4)", PCMIPOST },
1261: { "pc@(0x1234abcd:l)@(0,a5:w:8)", PCMIPOST },
1262: { "pc@(0x1234abcd:l)@(0,a5:l:1)", PCMIPOST },
1263: { "pc@(0x1234abcd:l)@(0,a5:l:2)", PCMIPOST },
1264: { "pc@(0x1234abcd:l)@(0,a5:l:4)", PCMIPOST },
1265: { "pc@(0x1234abcd:l)@(0,a5:l:8)", PCMIPOST },
1266: { "zpc@(0)@(0)", PCMIPOST },
1267: { "zpc@(0)@(0,d2:w:1)", PCMIPOST },
1268: { "zpc@(0)@(0,d2:w:2)", PCMIPOST },
1269: { "zpc@(0)@(0,d2:w:4)", PCMIPOST },
1270: { "zpc@(0)@(0,d2:w:8)", PCMIPOST },
1271: { "zpc@(0)@(0,d2:l:1)", PCMIPOST },
1272: { "zpc@(0)@(0,d2:l:2)", PCMIPOST },
1273: { "zpc@(0)@(0,d2:l:4)", PCMIPOST },
1274: { "zpc@(0)@(0,d2:l:8)", PCMIPOST },
1275: { "zpc@(0)@(0,a5:w:1)", PCMIPOST },
1276: { "zpc@(0)@(0,a5:w:2)", PCMIPOST },
1277: { "zpc@(0)@(0,a5:w:4)", PCMIPOST },
1278: { "zpc@(0)@(0,a5:w:8)", PCMIPOST },
1279: { "zpc@(0)@(0,a5:l:1)", PCMIPOST },
1280: { "zpc@(0)@(0,a5:l:2)", PCMIPOST },
1281: { "zpc@(0)@(0,a5:l:4)", PCMIPOST },
1282: { "zpc@(0)@(0,a5:l:8)", PCMIPOST },
1283: { "zpc@(0x1234:w)@(0,d2:w:1)", PCMIPOST },
1284: { "zpc@(0x1234:w)@(0,d2:w:2)", PCMIPOST },
1285: { "zpc@(0x1234:w)@(0,d2:w:4)", PCMIPOST },
1286: { "zpc@(0x1234:w)@(0,d2:w:8)", PCMIPOST },
1287: { "zpc@(0x1234:w)@(0,d2:l:1)", PCMIPOST },
1288: { "zpc@(0x1234:w)@(0,d2:l:2)", PCMIPOST },
1289: { "zpc@(0x1234:w)@(0,d2:l:4)", PCMIPOST },
1290: { "zpc@(0x1234:w)@(0,d2:l:8)", PCMIPOST },
1291: { "zpc@(0x1234:w)@(0,a5:w:1)", PCMIPOST },
1292: { "zpc@(0x1234:w)@(0,a5:w:2)", PCMIPOST },
1293: { "zpc@(0x1234:w)@(0,a5:w:4)", PCMIPOST },
1294: { "zpc@(0x1234:w)@(0,a5:w:8)", PCMIPOST },
1295: { "zpc@(0x1234:w)@(0,a5:l:1)", PCMIPOST },
1296: { "zpc@(0x1234:w)@(0,a5:l:2)", PCMIPOST },
1297: { "zpc@(0x1234:w)@(0,a5:l:4)", PCMIPOST },
1298: { "zpc@(0x1234:w)@(0,a5:l:8)", PCMIPOST },
1299: { "zpc@(0x1234abcd:l)@(0,d2:w:1)", PCMIPOST },
1300: { "zpc@(0x1234abcd:l)@(0,d2:w:2)", PCMIPOST },
1301: { "zpc@(0x1234abcd:l)@(0,d2:w:4)", PCMIPOST },
1302: { "zpc@(0x1234abcd:l)@(0,d2:w:8)", PCMIPOST },
1303: { "zpc@(0x1234abcd:l)@(0,d2:l:1)", PCMIPOST },
1304: { "zpc@(0x1234abcd:l)@(0,d2:l:2)", PCMIPOST },
1305: { "zpc@(0x1234abcd:l)@(0,d2:l:4)", PCMIPOST },
1306: { "zpc@(0x1234abcd:l)@(0,d2:l:8)", PCMIPOST },
1307: { "zpc@(0x1234abcd:l)@(0,a5:w:1)", PCMIPOST },
1308: { "zpc@(0x1234abcd:l)@(0,a5:w:2)", PCMIPOST },
1309: { "zpc@(0x1234abcd:l)@(0,a5:w:4)", PCMIPOST },
1310: { "zpc@(0x1234abcd:l)@(0,a5:w:8)", PCMIPOST },
1311: { "zpc@(0x1234abcd:l)@(0,a5:l:1)", PCMIPOST },
1312: { "zpc@(0x1234abcd:l)@(0,a5:l:2)", PCMIPOST },
1313: { "zpc@(0x1234abcd:l)@(0,a5:l:4)", PCMIPOST },
1314: { "zpc@(0x1234abcd:l)@(0,a5:l:8)", PCMIPOST },
1315: { "pc@(0)@(0xfeed:w)", PCMIPOST },
1316: { "pc@(0)@(0xfeed:w,d2:w:1)", PCMIPOST },
1317: { "pc@(0)@(0xfeed:w,d2:w:2)", PCMIPOST },
1318: { "pc@(0)@(0xfeed:w,d2:w:4)", PCMIPOST },
1319: { "pc@(0)@(0xfeed:w,d2:w:8)", PCMIPOST },
1320: { "pc@(0)@(0xfeed:w,d2:l:1)", PCMIPOST },
1321: { "pc@(0)@(0xfeed:w,d2:l:2)", PCMIPOST },
1322: { "pc@(0)@(0xfeed:w,d2:l:4)", PCMIPOST },
1323: { "pc@(0)@(0xfeed:w,d2:l:8)", PCMIPOST },
1324: { "pc@(0)@(0xfeed:w,a5:w:1)", PCMIPOST },
1325: { "pc@(0)@(0xfeed:w,a5:w:2)", PCMIPOST },
1326: { "pc@(0)@(0xfeed:w,a5:w:4)", PCMIPOST },
1327: { "pc@(0)@(0xfeed:w,a5:w:8)", PCMIPOST },
1328: { "pc@(0)@(0xfeed:w,a5:l:1)", PCMIPOST },
1329: { "pc@(0)@(0xfeed:w,a5:l:2)", PCMIPOST },
1330: { "pc@(0)@(0xfeed:w,a5:l:4)", PCMIPOST },
1331: { "pc@(0)@(0xfeed:w,a5:l:8)", PCMIPOST },
1332: { "pc@(0x1234:w)@(0xfeed:w,d2:w:1)", PCMIPOST },
1333: { "pc@(0x1234:w)@(0xfeed:w,d2:w:2)", PCMIPOST },
1334: { "pc@(0x1234:w)@(0xfeed:w,d2:w:4)", PCMIPOST },
1335: { "pc@(0x1234:w)@(0xfeed:w,d2:w:8)", PCMIPOST },
1336: { "pc@(0x1234:w)@(0xfeed:w,d2:l:1)", PCMIPOST },
1337: { "pc@(0x1234:w)@(0xfeed:w,d2:l:2)", PCMIPOST },
1338: { "pc@(0x1234:w)@(0xfeed:w,d2:l:4)", PCMIPOST },
1339: { "pc@(0x1234:w)@(0xfeed:w,d2:l:8)", PCMIPOST },
1340: { "pc@(0x1234:w)@(0xfeed:w,a5:w:1)", PCMIPOST },
1341: { "pc@(0x1234:w)@(0xfeed:w,a5:w:2)", PCMIPOST },
1342: { "pc@(0x1234:w)@(0xfeed:w,a5:w:4)", PCMIPOST },
1343: { "pc@(0x1234:w)@(0xfeed:w,a5:w:8)", PCMIPOST },
1344: { "pc@(0x1234:w)@(0xfeed:w,a5:l:1)", PCMIPOST },
1345: { "pc@(0x1234:w)@(0xfeed:w,a5:l:2)", PCMIPOST },
1346: { "pc@(0x1234:w)@(0xfeed:w,a5:l:4)", PCMIPOST },
1347: { "pc@(0x1234:w)@(0xfeed:w,a5:l:8)", PCMIPOST },
1348: { "pc@(0x1234abcd:l)@(0xfeed:w,d2:w:1)", PCMIPOST },
1349: { "pc@(0x1234abcd:l)@(0xfeed:w,d2:w:2)", PCMIPOST },
1350: { "pc@(0x1234abcd:l)@(0xfeed:w,d2:w:4)", PCMIPOST },
1351: { "pc@(0x1234abcd:l)@(0xfeed:w,d2:w:8)", PCMIPOST },
1352: { "pc@(0x1234abcd:l)@(0xfeed:w,d2:l:1)", PCMIPOST },
1353: { "pc@(0x1234abcd:l)@(0xfeed:w,d2:l:2)", PCMIPOST },
1354: { "pc@(0x1234abcd:l)@(0xfeed:w,d2:l:4)", PCMIPOST },
1355: { "pc@(0x1234abcd:l)@(0xfeed:w,d2:l:8)", PCMIPOST },
1356: { "pc@(0x1234abcd:l)@(0xfeed:w,a5:w:1)", PCMIPOST },
1357: { "pc@(0x1234abcd:l)@(0xfeed:w,a5:w:2)", PCMIPOST },
1358: { "pc@(0x1234abcd:l)@(0xfeed:w,a5:w:4)", PCMIPOST },
1359: { "pc@(0x1234abcd:l)@(0xfeed:w,a5:w:8)", PCMIPOST },
1360: { "pc@(0x1234abcd:l)@(0xfeed:w,a5:l:1)", PCMIPOST },
1361: { "pc@(0x1234abcd:l)@(0xfeed:w,a5:l:2)", PCMIPOST },
1362: { "pc@(0x1234abcd:l)@(0xfeed:w,a5:l:4)", PCMIPOST },
1363: { "pc@(0x1234abcd:l)@(0xfeed:w,a5:l:8)", PCMIPOST },
1364: { "zpc@(0)@(0xfeed:w)", PCMIPOST },
1365: { "zpc@(0)@(0xfeed:w,d2:w:1)", PCMIPOST },
1366: { "zpc@(0)@(0xfeed:w,d2:w:2)", PCMIPOST },
1367: { "zpc@(0)@(0xfeed:w,d2:w:4)", PCMIPOST },
1368: { "zpc@(0)@(0xfeed:w,d2:w:8)", PCMIPOST },
1369: { "zpc@(0)@(0xfeed:w,d2:l:1)", PCMIPOST },
1370: { "zpc@(0)@(0xfeed:w,d2:l:2)", PCMIPOST },
1371: { "zpc@(0)@(0xfeed:w,d2:l:4)", PCMIPOST },
1372: { "zpc@(0)@(0xfeed:w,d2:l:8)", PCMIPOST },
1373: { "zpc@(0)@(0xfeed:w,a5:w:1)", PCMIPOST },
1374: { "zpc@(0)@(0xfeed:w,a5:w:2)", PCMIPOST },
1375: { "zpc@(0)@(0xfeed:w,a5:w:4)", PCMIPOST },
1376: { "zpc@(0)@(0xfeed:w,a5:w:8)", PCMIPOST },
1377: { "zpc@(0)@(0xfeed:w,a5:l:1)", PCMIPOST },
1378: { "zpc@(0)@(0xfeed:w,a5:l:2)", PCMIPOST },
1379: { "zpc@(0)@(0xfeed:w,a5:l:4)", PCMIPOST },
1380: { "zpc@(0)@(0xfeed:w,a5:l:8)", PCMIPOST },
1381: { "zpc@(0x1234:w)@(0xfeed:w,d2:w:1)", PCMIPOST },
1382: { "zpc@(0x1234:w)@(0xfeed:w,d2:w:2)", PCMIPOST },
1383: { "zpc@(0x1234:w)@(0xfeed:w,d2:w:4)", PCMIPOST },
1384: { "zpc@(0x1234:w)@(0xfeed:w,d2:w:8)", PCMIPOST },
1385: { "zpc@(0x1234:w)@(0xfeed:w,d2:l:1)", PCMIPOST },
1386: { "zpc@(0x1234:w)@(0xfeed:w,d2:l:2)", PCMIPOST },
1387: { "zpc@(0x1234:w)@(0xfeed:w,d2:l:4)", PCMIPOST },
1388: { "zpc@(0x1234:w)@(0xfeed:w,d2:l:8)", PCMIPOST },
1389: { "zpc@(0x1234:w)@(0xfeed:w,a5:w:1)", PCMIPOST },
1390: { "zpc@(0x1234:w)@(0xfeed:w,a5:w:2)", PCMIPOST },
1391: { "zpc@(0x1234:w)@(0xfeed:w,a5:w:4)", PCMIPOST },
1392: { "zpc@(0x1234:w)@(0xfeed:w,a5:w:8)", PCMIPOST },
1393: { "zpc@(0x1234:w)@(0xfeed:w,a5:l:1)", PCMIPOST },
1394: { "zpc@(0x1234:w)@(0xfeed:w,a5:l:2)", PCMIPOST },
1395: { "zpc@(0x1234:w)@(0xfeed:w,a5:l:4)", PCMIPOST },
1396: { "zpc@(0x1234:w)@(0xfeed:w,a5:l:8)", PCMIPOST },
1397: { "zpc@(0x1234abcd:l)@(0xfeed:w,d2:w:1)", PCMIPOST },
1398: { "zpc@(0x1234abcd:l)@(0xfeed:w,d2:w:2)", PCMIPOST },
1399: { "zpc@(0x1234abcd:l)@(0xfeed:w,d2:w:4)", PCMIPOST },
1400: { "zpc@(0x1234abcd:l)@(0xfeed:w,d2:w:8)", PCMIPOST },
1401: { "zpc@(0x1234abcd:l)@(0xfeed:w,d2:l:1)", PCMIPOST },
1402: { "zpc@(0x1234abcd:l)@(0xfeed:w,d2:l:2)", PCMIPOST },
1403: { "zpc@(0x1234abcd:l)@(0xfeed:w,d2:l:4)", PCMIPOST },
1404: { "zpc@(0x1234abcd:l)@(0xfeed:w,d2:l:8)", PCMIPOST },
1405: { "zpc@(0x1234abcd:l)@(0xfeed:w,a5:w:1)", PCMIPOST },
1406: { "zpc@(0x1234abcd:l)@(0xfeed:w,a5:w:2)", PCMIPOST },
1407: { "zpc@(0x1234abcd:l)@(0xfeed:w,a5:w:4)", PCMIPOST },
1408: { "zpc@(0x1234abcd:l)@(0xfeed:w,a5:w:8)", PCMIPOST },
1409: { "zpc@(0x1234abcd:l)@(0xfeed:w,a5:l:1)", PCMIPOST },
1410: { "zpc@(0x1234abcd:l)@(0xfeed:w,a5:l:2)", PCMIPOST },
1411: { "zpc@(0x1234abcd:l)@(0xfeed:w,a5:l:4)", PCMIPOST },
1412: { "zpc@(0x1234abcd:l)@(0xfeed:w,a5:l:8)", PCMIPOST },
1413: { "pc@(0)@(0xfeedface:l)", PCMIPOST },
1414: { "pc@(0)@(0xfeedface:l,d2:w:1)", PCMIPOST },
1415: { "pc@(0)@(0xfeedface:l,d2:w:2)", PCMIPOST },
1416: { "pc@(0)@(0xfeedface:l,d2:w:4)", PCMIPOST },
1417: { "pc@(0)@(0xfeedface:l,d2:w:8)", PCMIPOST },
1418: { "pc@(0)@(0xfeedface:l,d2:l:1)", PCMIPOST },
1419: { "pc@(0)@(0xfeedface:l,d2:l:2)", PCMIPOST },
1420: { "pc@(0)@(0xfeedface:l,d2:l:4)", PCMIPOST },
1421: { "pc@(0)@(0xfeedface:l,d2:l:8)", PCMIPOST },
1422: { "pc@(0)@(0xfeedface:l,a5:w:1)", PCMIPOST },
1423: { "pc@(0)@(0xfeedface:l,a5:w:2)", PCMIPOST },
1424: { "pc@(0)@(0xfeedface:l,a5:w:4)", PCMIPOST },
1425: { "pc@(0)@(0xfeedface:l,a5:w:8)", PCMIPOST },
1426: { "pc@(0)@(0xfeedface:l,a5:l:1)", PCMIPOST },
1427: { "pc@(0)@(0xfeedface:l,a5:l:2)", PCMIPOST },
1428: { "pc@(0)@(0xfeedface:l,a5:l:4)", PCMIPOST },
1429: { "pc@(0)@(0xfeedface:l,a5:l:8)", PCMIPOST },
1430: { "pc@(0x1234:w)@(0xfeedface:l,d2:w:1)", PCMIPOST },
1431: { "pc@(0x1234:w)@(0xfeedface:l,d2:w:2)", PCMIPOST },
1432: { "pc@(0x1234:w)@(0xfeedface:l,d2:w:4)", PCMIPOST },
1433: { "pc@(0x1234:w)@(0xfeedface:l,d2:w:8)", PCMIPOST },
1434: { "pc@(0x1234:w)@(0xfeedface:l,d2:l:1)", PCMIPOST },
1435: { "pc@(0x1234:w)@(0xfeedface:l,d2:l:2)", PCMIPOST },
1436: { "pc@(0x1234:w)@(0xfeedface:l,d2:l:4)", PCMIPOST },
1437: { "pc@(0x1234:w)@(0xfeedface:l,d2:l:8)", PCMIPOST },
1438: { "pc@(0x1234:w)@(0xfeedface:l,a5:w:1)", PCMIPOST },
1439: { "pc@(0x1234:w)@(0xfeedface:l,a5:w:2)", PCMIPOST },
1440: { "pc@(0x1234:w)@(0xfeedface:l,a5:w:4)", PCMIPOST },
1441: { "pc@(0x1234:w)@(0xfeedface:l,a5:w:8)", PCMIPOST },
1442: { "pc@(0x1234:w)@(0xfeedface:l,a5:l:1)", PCMIPOST },
1443: { "pc@(0x1234:w)@(0xfeedface:l,a5:l:2)", PCMIPOST },
1444: { "pc@(0x1234:w)@(0xfeedface:l,a5:l:4)", PCMIPOST },
1445: { "pc@(0x1234:w)@(0xfeedface:l,a5:l:8)", PCMIPOST },
1446: { "pc@(0x1234abcd:l)@(0xfeedface:l,d2:w:1)", PCMIPOST },
1447: { "pc@(0x1234abcd:l)@(0xfeedface:l,d2:w:2)", PCMIPOST },
1448: { "pc@(0x1234abcd:l)@(0xfeedface:l,d2:w:4)", PCMIPOST },
1449: { "pc@(0x1234abcd:l)@(0xfeedface:l,d2:w:8)", PCMIPOST },
1450: { "pc@(0x1234abcd:l)@(0xfeedface:l,d2:l:1)", PCMIPOST },
1451: { "pc@(0x1234abcd:l)@(0xfeedface:l,d2:l:2)", PCMIPOST },
1452: { "pc@(0x1234abcd:l)@(0xfeedface:l,d2:l:4)", PCMIPOST },
1453: { "pc@(0x1234abcd:l)@(0xfeedface:l,d2:l:8)", PCMIPOST },
1454: { "pc@(0x1234abcd:l)@(0xfeedface:l,a5:w:1)", PCMIPOST },
1455: { "pc@(0x1234abcd:l)@(0xfeedface:l,a5:w:2)", PCMIPOST },
1456: { "pc@(0x1234abcd:l)@(0xfeedface:l,a5:w:4)", PCMIPOST },
1457: { "pc@(0x1234abcd:l)@(0xfeedface:l,a5:w:8)", PCMIPOST },
1458: { "pc@(0x1234abcd:l)@(0xfeedface:l,a5:l:1)", PCMIPOST },
1459: { "pc@(0x1234abcd:l)@(0xfeedface:l,a5:l:2)", PCMIPOST },
1460: { "pc@(0x1234abcd:l)@(0xfeedface:l,a5:l:4)", PCMIPOST },
1461: #endif ALL_OPERANDS
1462: { "pc@(0x1234abcd:l)@(0xfeedface:l,a5:l:8)", PCMIPOST },
1463: #ifdef ALL_OPERANDS
1464: { "zpc@(0)@(0xfeedface:l)", PCMIPOST },
1465: { "zpc@(0)@(0xfeedface:l,d2:w:1)", PCMIPOST },
1466: { "zpc@(0)@(0xfeedface:l,d2:w:2)", PCMIPOST },
1467: { "zpc@(0)@(0xfeedface:l,d2:w:4)", PCMIPOST },
1468: { "zpc@(0)@(0xfeedface:l,d2:w:8)", PCMIPOST },
1469: { "zpc@(0)@(0xfeedface:l,d2:l:1)", PCMIPOST },
1470: { "zpc@(0)@(0xfeedface:l,d2:l:2)", PCMIPOST },
1471: { "zpc@(0)@(0xfeedface:l,d2:l:4)", PCMIPOST },
1472: { "zpc@(0)@(0xfeedface:l,d2:l:8)", PCMIPOST },
1473: { "zpc@(0)@(0xfeedface:l,a5:w:1)", PCMIPOST },
1474: { "zpc@(0)@(0xfeedface:l,a5:w:2)", PCMIPOST },
1475: { "zpc@(0)@(0xfeedface:l,a5:w:4)", PCMIPOST },
1476: { "zpc@(0)@(0xfeedface:l,a5:w:8)", PCMIPOST },
1477: { "zpc@(0)@(0xfeedface:l,a5:l:1)", PCMIPOST },
1478: { "zpc@(0)@(0xfeedface:l,a5:l:2)", PCMIPOST },
1479: { "zpc@(0)@(0xfeedface:l,a5:l:4)", PCMIPOST },
1480: { "zpc@(0)@(0xfeedface:l,a5:l:8)", PCMIPOST },
1481: { "zpc@(0x1234:w)@(0xfeedface:l,d2:w:1)", PCMIPOST },
1482: { "zpc@(0x1234:w)@(0xfeedface:l,d2:w:2)", PCMIPOST },
1483: { "zpc@(0x1234:w)@(0xfeedface:l,d2:w:4)", PCMIPOST },
1484: { "zpc@(0x1234:w)@(0xfeedface:l,d2:w:8)", PCMIPOST },
1485: { "zpc@(0x1234:w)@(0xfeedface:l,d2:l:1)", PCMIPOST },
1486: { "zpc@(0x1234:w)@(0xfeedface:l,d2:l:2)", PCMIPOST },
1487: { "zpc@(0x1234:w)@(0xfeedface:l,d2:l:4)", PCMIPOST },
1488: { "zpc@(0x1234:w)@(0xfeedface:l,d2:l:8)", PCMIPOST },
1489: { "zpc@(0x1234:w)@(0xfeedface:l,a5:w:1)", PCMIPOST },
1490: { "zpc@(0x1234:w)@(0xfeedface:l,a5:w:2)", PCMIPOST },
1491: { "zpc@(0x1234:w)@(0xfeedface:l,a5:w:4)", PCMIPOST },
1492: { "zpc@(0x1234:w)@(0xfeedface:l,a5:w:8)", PCMIPOST },
1493: { "zpc@(0x1234:w)@(0xfeedface:l,a5:l:1)", PCMIPOST },
1494: { "zpc@(0x1234:w)@(0xfeedface:l,a5:l:2)", PCMIPOST },
1495: { "zpc@(0x1234:w)@(0xfeedface:l,a5:l:4)", PCMIPOST },
1496: { "zpc@(0x1234:w)@(0xfeedface:l,a5:l:8)", PCMIPOST },
1497: { "zpc@(0x1234abcd:l)@(0xfeedface:l,d2:w:1)", PCMIPOST },
1498: { "zpc@(0x1234abcd:l)@(0xfeedface:l,d2:w:2)", PCMIPOST },
1499: { "zpc@(0x1234abcd:l)@(0xfeedface:l,d2:w:4)", PCMIPOST },
1500: { "zpc@(0x1234abcd:l)@(0xfeedface:l,d2:w:8)", PCMIPOST },
1501: { "zpc@(0x1234abcd:l)@(0xfeedface:l,d2:l:1)", PCMIPOST },
1502: { "zpc@(0x1234abcd:l)@(0xfeedface:l,d2:l:2)", PCMIPOST },
1503: { "zpc@(0x1234abcd:l)@(0xfeedface:l,d2:l:4)", PCMIPOST },
1504: { "zpc@(0x1234abcd:l)@(0xfeedface:l,d2:l:8)", PCMIPOST },
1505: { "zpc@(0x1234abcd:l)@(0xfeedface:l,a5:w:1)", PCMIPOST },
1506: { "zpc@(0x1234abcd:l)@(0xfeedface:l,a5:w:2)", PCMIPOST },
1507: { "zpc@(0x1234abcd:l)@(0xfeedface:l,a5:w:4)", PCMIPOST },
1508: { "zpc@(0x1234abcd:l)@(0xfeedface:l,a5:w:8)", PCMIPOST },
1509: { "zpc@(0x1234abcd:l)@(0xfeedface:l,a5:l:1)", PCMIPOST },
1510: { "zpc@(0x1234abcd:l)@(0xfeedface:l,a5:l:2)", PCMIPOST },
1511: { "zpc@(0x1234abcd:l)@(0xfeedface:l,a5:l:4)", PCMIPOST },
1512: #endif ALL_OPERANDS
1513: { "zpc@(0x1234abcd:l)@(0xfeedface:l,a5:l:8)", PCMIPOST },
1514:
1515: /* These are used by the movec instruction */
1516: { "sfc", MOVEC_REG },
1517: { "dfc", MOVEC_REG },
1518: { "cacr", MOVEC_REG },
1519: { "usp", MOVEC_REG },
1520: { "vbr", MOVEC_REG },
1521: { "caar", MOVEC_REG },
1522: { "msp", MOVEC_REG },
1523: { "isp", MOVEC_REG },
1524: { "tc", MOVEC_REG },
1525: { "itt0", MOVEC_REG },
1526: { "itt1", MOVEC_REG },
1527: { "dtt0", MOVEC_REG },
1528: { "dtt1", MOVEC_REG },
1529: { "mmusr", MOVEC_REG },
1530: { "urp", MOVEC_REG },
1531: { "srp", MOVEC_REG },
1532: /* These are used by special case operand types */
1533: { "special 1", SPECIAL_1 },
1534: { "special 2", SPECIAL_2 },
1535: { "special 3", SPECIAL_3 },
1536:
1537: { 0, 0 }
1538: };
1539:
1540: /*
1541: bs = An, PC, ZPC or nothing (not present)
1542: bdsize = null (0), word, long displacement
1543: Xn = An, Dn or nothing (not present) (followed by :scale = 1 (assumed), 2, 4, 8)
1544:
1545: IS = 0 (index register not suppressed, present)
1546: "bs@(bd:bdsize,Xn)", "No Memory Indirection"
1547: "bs@(bd:bdsize,Xn)@", "Indirect Preindexed with Null Displacement"
1548: "bs@(bd:bdsize,Xn)@(od:w)", "Indirect Preindexed with Word Displacement"
1549: "bs@(bd:bdsize,Xn)@(od:l)", "Indirect Preindexed with Long Displacement"
1550: "bs@(bd:bdsize)@(Xn)", "Indirect Postindexed with Null Displacement"
1551: "bs@(bd:bdsize)@(od:w,Xn)", "Indirect Postindexed with Word Displacement"
1552: "bs@(bd:bdsize)@(od:l,Xn)", "Indirect Postindexed with Long Displacement"
1553:
1554: IS = 1 (index register suppressed, not present)
1555: "bs@(bd:bdsize)", "No Memory Indirection"
1556: "bs@(bd:bdsize)@", "Memory Indirect with Null Displacement"
1557: "bs@(bd:bdsize)@(od:w)", "Memory Indirect with Word Displacement"
1558: "bs@(bd:bdsize)@(od:l)", "Memory Indirect with Long Displacement"
1559: */
1560:
1561: #if 1
1562:
1563: #include "m68k-opcode.h"
1564:
1565: #else
1566: struct m68k_opcode
1567: {
1568: char *name;
1569: unsigned long opcode;
1570: unsigned long match;
1571: char *args;
1572: char *cpus;
1573: };
1574:
1575: #define one(x) ((x) << 16)
1576: struct m68k_opcode m68k_opcodes[] =
1577: {
1578: {"abcd", one(0140400), one(0170770), "DsDd"},
1579: {"addal", one(0150700), one(0170700), "*lAd"},
1580: };
1581:
1582: int numopcodes=sizeof(m68k_opcodes)/sizeof(m68k_opcodes[0]);
1583: #endif
1584:
1585: long types[128]; /* initialized to zero */
1586:
1587: static void print_op(
1588: struct operand *op,
1589: char *arg,
1590: char end_char);
1591:
1592: void
1593: main(
1594: int argc,
1595: char *argv[],
1596: char *envp[])
1597: {
1598: struct m68k_opcode *opcode;
1599: char *args;
1600: struct operand *op1, *op2, *op3, *op4, *op5, *op6;
1601:
1602: /* Kinds of operands: */
1603: /* D data register only. Stored as 3 bits. */
1604: types['D'] = DREG;
1605: /* A address register only. Stored as 3 bits. */
1606: types['A'] = AREG;
1607: /* R either kind of register. Stored as 4 bits. */
1608: types['R'] = DREG | AREG;
1609: /* F floating point coprocessor register only. Stored as 3 bits. */
1610: types['F'] = SPECIAL_1;
1611: /* O an offset (or width): immediate data 0-31 or data register.
1612: Stored as 6 bits in special format for BF... insns. */
1613: types['O'] = SPECIAL_1 | DREG;
1614: /* + autoincrement only. Stored as 3 bits (number of the address
1615: register). */
1616: types['+'] = AINC;
1617: /* - autodecrement only. Stored as 3 bits (number of the address
1618: register). */
1619: types['-'] = ADEC;
1620: /* Q quick immediate data. Stored as 3 bits. This matches an
1621: immediate operand only when value is in range 1 .. 8. */
1622: types['Q'] = SPECIAL_1;
1623: /* M moveq immediate data. Stored as 8 bits. This matches an
1624: immediate operand only when value is in range -128..127 */
1625: types['M'] = SPECIAL_1;
1626: /* T trap vector immediate data. Stored as 4 bits. */
1627: types['T'] = SPECIAL_1;
1628: /* k K-factor for fmove.p instruction. Stored as a 7-bit constant or
1629: a three bit register offset, depending on the field type. */
1630: types['k'] = SPECIAL_1 | SPECIAL_2;
1631: /* # immediate data. Stored in special places (b, w or l)
1632: which say how many bits to store. */
1633: types['#'] = SPECIAL_1;
1634: /* ^ immediate data for floating point instructions. Special places
1635: are offset by 2 bytes from '#'... */
1636: types['^'] = SPECIAL_1;
1637: /* B pc-relative address, converted to an offset
1638: that is treated as immediate data. */
1639: types['B'] = SPECIAL_1;
1640: /* d displacement and register. Stores the register as 3 bits
1641: and stores the displacement in the entire second word. */
1642: types['d'] = SPECIAL_1;
1643: /* C the CCR. No need to store it; this is just for filtering
1644: validity. */
1645: types['C'] = SPECIAL_1;
1646: /* S the SR. No need to store, just as with CCR.
1647: types['S'] = SPECIAL_1;
1648: /* U the USP. No need to store, just as with CCR.
1649: types['U'] = SPECIAL_1;
1650: /* I Coprocessor ID. Not printed if 1. The Coprocessor ID is
1651: always extracted from the 'd' field of word one, which means that an
1652: extended coprocessor opcode can be skipped using the 'i' place, if
1653: needed. */
1654: types['I'] = SPECIAL_1;
1655: /* s System Control register for the floating point coprocessor. */
1656: types['s'] = SPECIAL_1 | SPECIAL_2 | SPECIAL_3;
1657: /* S List of system control registers for floating point coprocessor.*/
1658: types['S'] = SPECIAL_1;
1659: /* J Misc register for movec instruction, stored in 'j' format. */
1660: types['J'] = MOVEC_REG;
1661: /* L Register list of the type d0-d7/a0-a7 etc. Can also hold
1662: fp0-fp7, as well. */
1663: types['L'] = SPECIAL_1;
1664: /* l Register list like L, but with all the bits reversed.
1665: Used for going the other way. . . */
1666: types['l'] = SPECIAL_1;
1667: /* 0 Address register indirect only */
1668: types['0'] = AINDR;
1669:
1670: /* * all (modes 0-6,7.*) */
1671: types['*'] = DREG | AREG | AINDR | AINC | ADEC | Ad16 | Ad8Xn | AbdXn |
1672: MIPRE | MIPOST | ABSW | ABSL | IMMED | PCd16 | PCd8Xn |
1673: PCbdXn | PCMIPRE | PCMIPOST;
1674: /* ~ alterable memory (modes 2-6,7.0,7.1)(not 0,1,7.~) */
1675: types['~'] = AINDR | AINC | ADEC | Ad16 | Ad8Xn | AbdXn | MIPRE |
1676: MIPOST | ABSW | ABSL;
1677: /* % alterable (modes 0-6,7.0,7.1)(not 7.~) */
1678: types['%'] = DREG | AREG | AINDR | AINC | ADEC | Ad16 | Ad8Xn | AbdXn |
1679: MIPRE | MIPOST | ABSW | ABSL;
1680: /* ; data (modes 0,2-6,7.*)(not 1) */
1681: types[';'] = DREG | AINDR | AINC | ADEC | Ad16 | Ad8Xn | AbdXn |
1682: MIPRE | MIPOST | ABSW | ABSL | IMMED | PCd16 | PCd8Xn |
1683: PCbdXn | PCMIPRE | PCMIPOST;
1684: /* @ data, but not immediate (modes 0,2-6,7.? ? ?)(not 1,7.4) */
1685: types['@'] = DREG | AINDR | AINC | ADEC | Ad16 | Ad8Xn | AbdXn |
1686: MIPRE | MIPOST | ABSW | ABSL | PCd16 | PCd8Xn |
1687: PCbdXn | PCMIPRE | PCMIPOST;
1688: /* ! control (modes 2,5,6,7.*-)(not 0,1,3,4,7.4) */
1689: types['!'] = AINDR | Ad16 | Ad8Xn | AbdXn | MIPRE | MIPOST | ABSW |
1690: ABSL | PCd16 | PCd8Xn | PCbdXn | PCMIPRE | PCMIPOST;
1691: /* & alterable control (modes 2,5,6,7.0,7.1)(not 0,1,7.? ? ?) */
1692: types['&'] = AINDR | Ad16 | Ad8Xn | AbdXn | MIPRE | MIPOST | ABSW |
1693: ABSL;
1694: /* $ alterable data (modes 0,2-6,7.0,7.1)(not 1,7.~) */
1695: types['$'] = DREG | AINDR | AINC | ADEC | Ad16 | Ad8Xn | AbdXn |
1696: MIPRE | MIPOST | ABSW | ABSL;
1697: /* ? alterable control, or data register (modes 0,2,5,6,7.0,7.1) (not 1,3,4,7.~) */
1698: types['?'] = DREG | AINDR | Ad16 | Ad8Xn | AbdXn |
1699: MIPRE | MIPOST | ABSW | ABSL;
1700: /* / control, or data register (modes 0,2,5,6,7.0,7.1,7.2,7.3)
1701: (not 1,3,4,7.4) */
1702: types['/'] = DREG | AINDR | Ad16 | Ad8Xn | AbdXn | MIPRE | MIPOST |
1703: ABSW | ABSL | PCd16 | PCd8Xn | PCbdXn | PCMIPRE | PCMIPOST;
1704:
1705: /* f function code register (sfc or dfc) */
1706: types['f'] = SPECIAL_1 | SPECIAL_2;
1707: /* a 030 mmu registers srp, crp or tc */
1708: types['a'] = SPECIAL_1 | SPECIAL_2 | SPECIAL_3;
1709: /* b 030 mmu register mmusr */
1710: types['b'] = SPECIAL_1;
1711: /* c 040 cache indicators ic, dc or bc */
1712: types['c'] = SPECIAL_1 | SPECIAL_2 | SPECIAL_3;
1713: /* e 030 mmu registers tt0 or tt1 */
1714: types['e'] = SPECIAL_1 | SPECIAL_2;
1715:
1716: for(opcode = (struct m68k_opcode *)m68k_opcodes;
1717: opcode != endop;
1718: opcode++){
1719: args = opcode->args;
1720:
1721: if(args[0] == '\0'){
1722: printf("\t%s\n", opcode->name);
1723: continue;
1724: }
1725: for(op1 = ops; op1->type; op1++){
1726: if((types[(int)args[0]] & op1->type) == 0)
1727: continue;
1728: if(args[2] == '\0'){
1729: printf("\t%s\t", opcode->name);
1730: print_op(op1, &(args[0]), '\n');
1731: continue;
1732: }
1733: for(op2 = ops; op2->type; op2++){
1734: if((types[(int)args[2]] & op2->type) == 0)
1735: continue;
1736: if(args[4] == '\0'){
1737: printf("\t%s\t", opcode->name);
1738: print_op(op1, &(args[0]), ',');
1739: print_op(op2, &(args[2]), '\n');
1740: continue;
1741: }
1742: for(op3 = ops; op3->type; op3++){
1743: if((types[(int)args[4]] & op3->type) == 0)
1744: continue;
1745: if(args[6] == '\0'){
1746: printf("\t%s\t", opcode->name);
1747: print_op(op1, &(args[0]), ',');
1748: print_op(op2, &(args[2]), ',');
1749: print_op(op3, &(args[4]), '\n');
1750: continue;
1751: }
1752: for(op4 = ops; op4->type; op4++){
1753: if((types[(int)args[6]] & op4->type) == 0)
1754: continue;
1755: if(args[8] == '\0'){
1756: printf("\t%s\t", opcode->name);
1757: print_op(op1, &(args[0]), ',');
1758: print_op(op2, &(args[2]), ',');
1759: print_op(op3, &(args[4]), ',');
1760: print_op(op4, &(args[6]), '\n');
1761: continue;
1762: }
1763: for(op5 = ops; op5->type; op5++){
1764: if((types[(int)args[8]] & op5->type) == 0)
1765: continue;
1766: if(args[10] == '\0'){
1767: printf("\t%s\t", opcode->name);
1768: print_op(op1, &(args[0]), ',');
1769: print_op(op2, &(args[2]), ',');
1770: print_op(op3, &(args[4]), ',');
1771: print_op(op4, &(args[6]), ',');
1772: print_op(op5, &(args[8]), '\n');
1773: continue;
1774: }
1775: for(op6 = ops; op6->type; op6++){
1776: if((types[(int)args[10]] & op6->type) == 0)
1777: continue;
1778: if(args[12] == '\0'){
1779: printf("\t%s\t", opcode->name);
1780: print_op(op1, &(args[0]), ',');
1781: print_op(op2, &(args[2]), ',');
1782: print_op(op3, &(args[4]), ',');
1783: print_op(op4, &(args[6]), ',');
1784: print_op(op5, &(args[8]), ',');
1785: print_op(op6, &(args[10]), '\n');
1786: continue;
1787: }
1788: printf("# more than 6 operands %s %s\n",
1789: opcode->name, args);
1790: printf(".abort\n");
1791: exit(1);
1792: }
1793: }
1794: }
1795: }
1796: }
1797: }
1798: }
1799: }
1800:
1801: static
1802: void
1803: print_op(
1804: struct operand *op,
1805: char *arg,
1806: char end_char)
1807: {
1808: switch(*arg){
1809: case 'F':
1810: /* F floating point coprocessor register only. Stored as 3 bits. */
1811: printf("fp7");
1812: break;
1813:
1814: case 'O':
1815: /* O an offset (or width): immediate data 0-31 or data register.
1816: Stored as 6 bits in special format for BF... insns. */
1817: if(op->type == DREG)
1818: printf("%s", op->string);
1819: else
1820: printf("#0x13");
1821: break;
1822:
1823: case 'Q':
1824: /* Q quick immediate data. Stored as 3 bits. This matches an
1825: immediate operand only when value is in range 1 .. 8. */
1826: printf("#0x7");
1827: break;
1828:
1829: case 'M':
1830: /* M moveq immediate data. Stored as 8 bits. This matches an
1831: immediate operand only when value is in range -128..127 */
1832: printf("#0x7e");
1833: break;
1834:
1835: case 'T':
1836: /* T trap vector immediate data. Stored as 4 bits. */
1837: printf("#0xe");
1838: break;
1839:
1840: case 'k':
1841: /* k K-factor for fmove.p instruction. Stored as a 7-bit constant or
1842: a three bit register offset, depending on the field type. */
1843: if(op->type == SPECIAL_1)
1844: printf("{d4}");
1845: else
1846: printf("{#0x3f}");
1847: break;
1848:
1849: case '#':
1850: /* # immediate data. Stored in special places (b, w or l)
1851: which say how many bits to store. */
1852: if(arg[1] == 'b')
1853: printf("#0x81");
1854: else if(arg[1] == 'w' || arg[1] == 'z')
1855: printf("#0x8001");
1856: else if(arg[1] == 'l')
1857: printf("#0x80000001");
1858: /* Used with the fmovecr (7 bits) */
1859: else if(arg[1] == 'C')
1860: printf("#0x7f");
1861: /* Used with the fmovemx (8 bits) */
1862: else if(arg[1] == '3')
1863: printf("#0xff");
1864: /* Used with the fmoveml (3 bits) */
1865: else if(arg[1] == '8')
1866: printf("#0x3");
1867: /* Used with the movec (12 bits) */
1868: else if(arg[1] == 'j')
1869: printf("#0x801"); /* vbr register # */
1870: else
1871: printf("#???");
1872: break;
1873:
1874: case '^':
1875: /* ^ immediate data for floating point instructions. Special places
1876: are offset by 2 bytes from '#'... */
1877: printf("#0x3");
1878: break;
1879:
1880: case 'B':
1881: /* B pc-relative address, converted to an offset
1882: that is treated as immediate data. */
1883: if(arg[1] == 'w')
1884: printf("0x7ace");
1885: else
1886: printf("0x1badface");
1887: break;
1888:
1889: case 'd':
1890: /* d displacement and register. Stores the register as 3 bits
1891: and stores the displacement in the entire second word. */
1892: /* This is used for the movep instruction "movep Dx,(d,Ay) where
1893: the displacement d is 16 bits */
1894: printf("(0x4321,a6)");
1895: break;
1896:
1897: case 'C':
1898: /* C the CCR. No need to store it; this is just for filtering
1899: validity. */
1900: printf("ccr");
1901: break;
1902:
1903: case 'S':
1904: /* S the SR. No need to store, just as with CCR. */
1905: printf("sr");
1906: break;
1907:
1908: case 'U':
1909: /* U the USP. No need to store, just as with CCR. */
1910: printf("usp");
1911: break;
1912:
1913: case 'I':
1914: /* I Coprocessor ID. Not printed if 1. The Coprocessor ID is
1915: always extracted from the 'd' field of word one, which means that an
1916: extended coprocessor opcode can be skipped using the 'i' place, if
1917: needed. */
1918: break;
1919:
1920: case 's':
1921: /* s System Control register for the floating point coprocessor. */
1922: if(op->type == SPECIAL_1)
1923: printf("fpi");
1924: else if(op->type == SPECIAL_2)
1925: printf("fpc");
1926: else
1927: printf("fps");
1928: break;
1929:
1930: #if 0
1931: case 'S':
1932: /* S List of system control registers for floating point coprocessor.*/
1933: printf("fpc/fps/fpi");
1934: break;
1935: #endif 0
1936:
1937: case 'J':
1938: /* J Misc register for movec instruction, stored in 'j' format. */
1939: printf("%s", op->string);
1940: break;
1941:
1942: case 'f':
1943: /* f function code register (sfc or dfc) */
1944: if(op->type == SPECIAL_1)
1945: printf("sfc");
1946: else
1947: printf("dfc");
1948: break;
1949:
1950: case 'a':
1951: /* a 030 mmu registers srp, crp or tc */
1952: if(op->type == SPECIAL_1)
1953: printf("srp");
1954: else if(op->type == SPECIAL_2)
1955: printf("crp");
1956: else
1957: printf("tc");
1958: break;
1959:
1960: case 'b':
1961: /* b 030 mmu register mmusr */
1962: printf("mmusr");
1963: break;
1964:
1965: case 'c':
1966: /* c 040 cache indicators ic, dc or bc */
1967: if(op->type == SPECIAL_1)
1968: printf("ic");
1969: else if(op->type == SPECIAL_2)
1970: printf("dc");
1971: else
1972: printf("bc");
1973: break;
1974:
1975: case 'e':
1976: /* e 030 mmu registers tt0 or tt1 */
1977: if(op->type == SPECIAL_1)
1978: printf("tt0");
1979: else
1980: printf("tt1");
1981: break;
1982:
1983: case 'L':
1984: case 'l':
1985: /* L Register list of the type d0-d7/a0-a7 etc. Can also hold
1986: fp0-fp7, as well. */
1987: /* l Register list like L, but with all the bits reversed.
1988: Used for going the other way. . . */
1989: if(arg[1] == 'w')
1990: printf("a0/a1/a2/a3/a4/a5/a6/sp/d0/d1/d2/d3/d4/d5/d6/d7");
1991: else if(arg[1] == '3')
1992: printf("fp0/fp1/fp2/fp3/fp4/fp5/fp6/fp7");
1993: else if(arg[1] == '8')
1994: printf("fpc/fps/fpi");
1995: else
1996: printf("???%c", arg[0]);
1997: break;
1998:
1999: default:
2000: printf("%s", op->string);
2001: break;
2002: }
2003: if((arg[2] != 'k' && arg[0] != 'I') ||
2004: (arg[0] == 'I' && arg[2] == '\0'))
2005: printf("%c", end_char);
2006: }
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