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Annotation of GNUtools/debug/gdb/include/opcode/hppa.h, revision 1.1

1.1     ! root        1: /* Table of opcodes for the PA-RISC.
        !             2:    Copyright (C) 1990, 1991, 1993 Free Software Foundation, Inc.
        !             3: 
        !             4:    Contributed by the Center for Software Science at the
        !             5:    University of Utah ([email protected]).
        !             6: 
        !             7: This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
        !             8: 
        !             9: GAS/GDB is free software; you can redistribute it and/or modify
        !            10: it under the terms of the GNU General Public License as published by
        !            11: the Free Software Foundation; either version 1, or (at your option)
        !            12: any later version.
        !            13: 
        !            14: GAS/GDB is distributed in the hope that it will be useful,
        !            15: but WITHOUT ANY WARRANTY; without even the implied warranty of
        !            16: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
        !            17: GNU General Public License for more details.
        !            18: 
        !            19: You should have received a copy of the GNU General Public License
        !            20: along with GAS or GDB; see the file COPYING.  If not, write to
        !            21: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
        !            22: 
        !            23: #if !defined(__STDC__) && !defined(const)
        !            24: #define const
        !            25: #endif
        !            26: 
        !            27: /*
        !            28:  * Structure of an opcode table entry.
        !            29:  */
        !            30: 
        !            31: /* There are two kinds of delay slot nullification: normal which is
        !            32:  * controled by the nullification bit, and conditional, which depends
        !            33:  * on the direction of the branch and its success or failure.
        !            34:  */
        !            35: enum delay_type {NONE, NORMAL, CONDITIONAL};
        !            36: struct pa_opcode
        !            37: {
        !            38:     const char *name;
        !            39:     unsigned long int match;   /* Bits that must be set...  */
        !            40:     unsigned long int mask;    /* ... in these bits. */
        !            41:     char *args;
        !            42:     /* Nonzero if this is a delayed branch instruction.  */
        !            43:     /* What uses this field?  Nothing in opcodes or gas that I saw.
        !            44:        If nothing needs it, we could reduce this table by 20% (for
        !            45:        most machines).  KR */
        !            46:     char delayed;
        !            47: };
        !            48: 
        !            49: /*
        !            50:    All hppa opcodes are 32 bits.
        !            51: 
        !            52:    The match component is a mask saying which bits must match a
        !            53:    particular opcode in order for an instruction to be an instance
        !            54:    of that opcode.
        !            55: 
        !            56:    The args component is a string containing one character
        !            57:    for each operand of the instruction.
        !            58: 
        !            59:    Bit positions in this description follow HP usage of lsb = 31,
        !            60:    "at" is lsb of field.
        !            61: 
        !            62:    In the args field, the following characters must match exactly:
        !            63: 
        !            64:        '+,() '
        !            65: 
        !            66:    In the args field, the following characters are unused:
        !            67: 
        !            68:        '  "#$%    *+- ./   3      :; =  @'
        !            69:        ' B         L N            [\] _'
        !            70:        '    e gh   lm   qr        { } '
        !            71: 
        !            72:    Here are all the characters:
        !            73: 
        !            74:        ' !"#$%&'()*+-,./0123456789:;<=>?@'
        !            75:        'ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
        !            76:        'abcdefghijklmnopqrstuvwxyz{|}~'
        !            77: 
        !            78: Kinds of operands:
        !            79:    x    integer register field at 15.
        !            80:    b    integer register field at 10.
        !            81:    t    integer register field at 31.
        !            82:    y    floating point register field at 31
        !            83:    5    5 bit immediate at 15.
        !            84:    s    2 bit space specifier at 17.
        !            85:    S    3 bit space specifier at 18.
        !            86:    c    indexed load completer.
        !            87:    C    short load and store completer.
        !            88:    Y   Store Bytes Short completer
        !            89:    <    non-negated compare/subtract conditions.
        !            90:    a   compare/subtract conditions
        !            91:    d    non-negated add conditions
        !            92:    &    logical instruction conditions
        !            93:    U    unit instruction conditions
        !            94:    >    shift/extract/deposit conditions.
        !            95:    ~    bvb,bb conditions
        !            96:    V    5 bit immediate value at 31
        !            97:    i    11 bit immediate value at 31
        !            98:    j    14 bit immediate value at 31
        !            99:    k    21 bit immediate value at 31
        !           100:    n   nullification for branch instructions
        !           101:    w    12 bit branch displacement
        !           102:    W    17 bit branch displacement (PC relative)
        !           103:    z    17 bit branch displacement (just a number, not an address)
        !           104: 
        !           105: Also these:
        !           106: 
        !           107:    p    5 bit shift count at 26 (to support the SHD instruction) encoded as
        !           108:         31-p
        !           109:    P    5 bit bit position at 26
        !           110:    T    5 bit field length at 31 (encoded as 32-T)
        !           111:    A    13 bit immediate at 18 (to support the BREAK instruction)
        !           112:    ^   like b, but describes a control register
        !           113:    Z    System Control Completer (to support LPA, LHA, etc.)
        !           114:    D    26 bit immediate at 31 (to support the DIAG instruction)
        !           115: 
        !           116:    f    3 bit Special Function Unit identifier at 25
        !           117:    O    20 bit Special Function Unit operation split between 15 bits at 20
        !           118:         and 5 bits at 31
        !           119:    o    15 bit Special Function Unit operation at 20
        !           120:    2    22 bit Special Function Unit operation split between 17 bits at 20
        !           121:         and 5 bits at 31
        !           122:    1    15 bit Special Function Unit operation split between 10 bits at 20
        !           123:         and 5 bits at 31
        !           124:    0    10 bit Special Function Unit operation split between 5 bits at 20
        !           125:         and 5 bits at 31
        !           126:    u    3 bit coprocessor unit identifier at 25
        !           127:    F    Source Floating Point Operand Format Completer encoded 2 bits at 20
        !           128:    I    Source Floating Point Operand Format Completer encoded 1 bits at 20
        !           129:        (for 0xe format FP instructions)
        !           130:    G    Destination Floating Point Operand Format Completer encoded 2 bits at 18
        !           131:    M    Floating-Point Compare Conditions (encoded as 5 bits at 31)
        !           132:    ?    negated compare/subtract conditions.
        !           133:    !    non-negated add conditions.
        !           134: 
        !           135:    s    2 bit space specifier at 17.
        !           136:    b    register field at 10.
        !           137:    r   5 bit immediate value at 31 (for the break instruction)
        !           138:        (very similar to V above, except the value is unsigned instead of
        !           139:        low_sign_ext)
        !           140:    R   5 bit immediate value at 15 (for the ssm, rsm instruction)
        !           141:        (same as r above, except the value is in a different location)
        !           142:    Q   5 bit immediate value at 10 (a bit position specified in
        !           143:        the bb instruction. It's the same as r above, except the
        !           144:         value is in a different location)
        !           145:    |   shift/extract/deposit conditions when used in a conditional branch
        !           146: 
        !           147: And these (PJH) for PA-89 F.P. registers and instructions:
        !           148: 
        !           149:    v    a 't' operand type extended to handle L/R register halves.
        !           150:    E    a 'b' operand type extended to handle L/R register halves.
        !           151:    X    an 'x' operand type extended to handle L/R register halves.
        !           152:    J    a 'b' operand type further extended to handle extra 1.1 registers
        !           153:    K    a 'x' operand type further extended to handle extra 1.1 registers
        !           154:    4    a variation of the 'b' operand type for 'fmpyadd' and 'fmpysub'
        !           155:    6    a variation of the 'x' operand type for 'fmpyadd' and 'fmpysub'
        !           156:    7    a variation of the 't' operand type for 'fmpyadd' and 'fmpysub'
        !           157:    8    5 bit register field at 20 (used in 'fmpyadd' and 'fmpysub')
        !           158:    9    5 bit register field at 25 (used in 'fmpyadd' and 'fmpysub')
        !           159:    H    Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
        !           160:         (very similar to 'F')
        !           161: */
        !           162: 
        !           163: /* The order of the opcodes in this table is significant:
        !           164: 
        !           165:    * The assembler requires that all instances of the same mnemonic must be
        !           166:    consecutive.  If they aren't, the assembler will bomb at runtime.
        !           167: 
        !           168:    * The disassembler should not care about the order of the opcodes.  */
        !           169: 
        !           170: static const struct pa_opcode pa_opcodes[] =
        !           171: {
        !           172: 
        !           173: /* pseudo-instructions */
        !           174: 
        !           175: { "b",         0xe8000000, 0xffe0e000, "nW", NORMAL}, /* bl foo,r0 */
        !           176: { "ldi",       0x34000000, 0xffe0c000, "j,x"}, /* ldo val(r0),r */
        !           177: { "comib",     0x84000000, 0xfc000000, "?n5,b,w", CONDITIONAL}, /* comib{tf}*/
        !           178: { "comb",      0x80000000, 0xfc000000, "?nx,b,w", CONDITIONAL}, /* comb{tf} */
        !           179: { "addb",      0xa0000000, 0xfc000000, "!nx,b,w", CONDITIONAL}, /* addb{tf} */
        !           180: { "addib",     0xa4000000, 0xfc000000, "!n5,b,w", CONDITIONAL}, /* addib{tf}*/
        !           181: { "nop",        0x08000240, 0xffffffff, ""},      /* or 0,0,0 */
        !           182: { "copy",       0x08000240, 0xffe0ffe0, "x,t"},   /* or r,0,t */
        !           183: { "mtsar",      0x01601840, 0xffe0ffff, "x"}, /* mtctl r,cr11 */
        !           184: 
        !           185: /* Loads and Stores for integer registers.  */
        !           186: { "ldw",        0x48000000, 0xfc000000, "j(s,b),x"},
        !           187: { "ldw",        0x48000000, 0xfc000000, "j(b),x"},
        !           188: { "ldh",        0x44000000, 0xfc000000, "j(s,b),x"},
        !           189: { "ldh",        0x44000000, 0xfc000000, "j(b),x"},
        !           190: { "ldb",        0x40000000, 0xfc000000, "j(s,b),x"},
        !           191: { "ldb",        0x40000000, 0xfc000000, "j(b),x"},
        !           192: { "stw",        0x68000000, 0xfc000000, "x,j(s,b)"},
        !           193: { "stw",        0x68000000, 0xfc000000, "x,j(b)"},
        !           194: { "sth",        0x64000000, 0xfc000000, "x,j(s,b)"},
        !           195: { "sth",        0x64000000, 0xfc000000, "x,j(b)"},
        !           196: { "stb",        0x60000000, 0xfc000000, "x,j(s,b)"},
        !           197: { "stb",        0x60000000, 0xfc000000, "x,j(b)"},
        !           198: { "ldwm",       0x4c000000, 0xfc000000, "j(s,b),x"},
        !           199: { "ldwm",       0x4c000000, 0xfc000000, "j(b),x"},
        !           200: { "stwm",       0x6c000000, 0xfc000000, "x,j(s,b)"},
        !           201: { "stwm",       0x6c000000, 0xfc000000, "x,j(b)"},
        !           202: { "ldwx",       0x0c000080, 0xfc001fc0, "cx(s,b),t"},
        !           203: { "ldwx",       0x0c000080, 0xfc001fc0, "cx(b),t"},
        !           204: { "ldhx",       0x0c000040, 0xfc001fc0, "cx(s,b),t"},
        !           205: { "ldhx",       0x0c000040, 0xfc001fc0, "cx(b),t"},
        !           206: { "ldbx",       0x0c000000, 0xfc001fc0, "cx(s,b),t"},
        !           207: { "ldbx",       0x0c000000, 0xfc001fc0, "cx(b),t"},
        !           208: { "ldwax",      0x0c000180, 0xfc00dfc0, "cx(b),t"},
        !           209: { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cx(s,b),t"},
        !           210: { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cx(b),t"},
        !           211: { "ldws",      0x0c001080, 0xfc001fc0, "C5(s,b),t"},
        !           212: { "ldws",      0x0c001080, 0xfc001fc0, "C5(b),t"},
        !           213: { "ldhs",      0x0c001040, 0xfc001fc0, "C5(s,b),t"},
        !           214: { "ldhs",      0x0c001040, 0xfc001fc0, "C5(b),t"},
        !           215: { "ldbs",      0x0c001000, 0xfc001fc0, "C5(s,b),t"},
        !           216: { "ldbs",      0x0c001000, 0xfc001fc0, "C5(b),t"},
        !           217: { "ldwas",     0x0c001180, 0xfc00dfc0, "C5(b),t"},
        !           218: { "ldcws",     0x0c0011c0, 0xfc001fc0, "C5(s,b),t"},
        !           219: { "ldcws",     0x0c0011c0, 0xfc001fc0, "C5(b),t"},
        !           220: { "stws",      0x0c001280, 0xfc001fc0, "Cx,V(s,b)"},
        !           221: { "stws",      0x0c001280, 0xfc001fc0, "Cx,V(b)"},
        !           222: { "sths",      0x0c001240, 0xfc001fc0, "Cx,V(s,b)"},
        !           223: { "sths",      0x0c001240, 0xfc001fc0, "Cx,V(b)"},
        !           224: { "stbs",      0x0c001200, 0xfc001fc0, "Cx,V(s,b)"},
        !           225: { "stbs",      0x0c001200, 0xfc001fc0, "Cx,V(b)"},
        !           226: { "stwas",     0x0c001380, 0xfc00dfc0, "Cx,V(b)"},
        !           227: { "stbys",     0x0c001300, 0xfc001fc0, "Yx,V(s,b)"},
        !           228: { "stbys",     0x0c001300, 0xfc001fc0, "Yx,V(b)"},
        !           229: 
        !           230: /* Immediate instructions.  */
        !           231: { "ldo",       0x34000000, 0xfc00c000, "j(b),x"},
        !           232: { "ldil",      0x20000000, 0xfc000000, "k,b"},
        !           233: { "addil",     0x28000000, 0xfc000000, "k,b"},
        !           234: 
        !           235: /* Branching instructions. */
        !           236: { "bl",                0xe8000000, 0xfc00e000, "nW,b", NORMAL},
        !           237: { "gate",      0xe8002000, 0xfc00e000, "nW,b", NORMAL},
        !           238: { "blr",       0xe8004000, 0xfc00e001, "nx,b", NORMAL},
        !           239: { "bv",                0xe800c000, 0xfc00e001, "nx(b)", NORMAL},
        !           240: { "bv",                0xe800c000, 0xfc00e001, "n(b)", NORMAL},
        !           241: { "be",                0xe0000000, 0xfc000000, "nz(S,b)", NORMAL},
        !           242: { "ble",       0xe4000000, 0xfc000000, "nz(S,b)", NORMAL},
        !           243: { "movb",      0xc8000000, 0xfc000000, "|nx,b,w", CONDITIONAL},
        !           244: { "movib",     0xcc000000, 0xfc000000, "|n5,b,w", CONDITIONAL},
        !           245: { "combt",     0x80000000, 0xfc000000, "<nx,b,w", CONDITIONAL},
        !           246: { "combf",     0x88000000, 0xfc000000, "<nx,b,w", CONDITIONAL},
        !           247: { "comibt",    0x84000000, 0xfc000000, "<n5,b,w", CONDITIONAL},
        !           248: { "comibf",    0x8c000000, 0xfc000000, "<n5,b,w", CONDITIONAL},
        !           249: { "addbt",     0xa0000000, 0xfc000000, "!nx,b,w", CONDITIONAL},
        !           250: { "addbf",     0xa8000000, 0xfc000000, "!nx,b,w", CONDITIONAL},
        !           251: { "addibt",    0xa4000000, 0xfc000000, "!n5,b,w", CONDITIONAL},
        !           252: { "addibf",    0xac000000, 0xfc000000, "!n5,b,w", CONDITIONAL},
        !           253: { "bvb",       0xc0000000, 0xffe00000, "~nx,w", CONDITIONAL},
        !           254: { "bb",                0xc4000000, 0xfc000000, "~nx,Q,w", CONDITIONAL}, 
        !           255: 
        !           256: /* Computation Instructions */
        !           257: 
        !           258: { "add",        0x08000600, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           259: { "addl",       0x08000a00, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           260: { "addo",       0x08000e00, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           261: { "addc",       0x08000700, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           262: { "addco",      0x08000f00, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           263: { "sh1add",     0x08000640, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           264: { "sh1addl",    0x08000a40, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           265: { "sh1addo",    0x08000e40, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           266: { "sh2add",     0x08000680, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           267: { "sh2addl",    0x08000a80, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           268: { "sh2addo",    0x08000e80, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           269: { "sh3add",     0x080006c0, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           270: { "sh3addl",    0x08000ac0, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           271: { "sh3addo",    0x08000ec0, 0xfc000fe0, "dx,b,t", CONDITIONAL},
        !           272: { "sub",        0x08000400, 0xfc000fe0, "ax,b,t", CONDITIONAL},
        !           273: { "subo",       0x08000c00, 0xfc000fe0, "ax,b,t", CONDITIONAL},
        !           274: { "subb",       0x08000500, 0xfc000fe0, "ax,b,t", CONDITIONAL},
        !           275: { "subbo",      0x08000d00, 0xfc000fe0, "ax,b,t", CONDITIONAL},
        !           276: { "subt",       0x080004c0, 0xfc000fe0, "ax,b,t", CONDITIONAL},
        !           277: { "subto",      0x08000cc0, 0xfc000fe0, "ax,b,t", CONDITIONAL},
        !           278: { "ds",         0x08000440, 0xfc000fe0, "ax,b,t", CONDITIONAL},
        !           279: { "comclr",     0x08000880, 0xfc000fe0, "ax,b,t", CONDITIONAL},
        !           280: { "or",         0x08000240, 0xfc000fe0, "&x,b,t", CONDITIONAL},
        !           281: { "xor",        0x08000280, 0xfc000fe0, "&x,b,t", CONDITIONAL},
        !           282: { "and",        0x08000200, 0xfc000fe0, "&x,b,t", CONDITIONAL},
        !           283: { "andcm",      0x08000000, 0xfc000fe0, "&x,b,t", CONDITIONAL},
        !           284: { "uxor",       0x08000380, 0xfc000fe0, "Ux,b,t", CONDITIONAL},
        !           285: { "uaddcm",     0x08000980, 0xfc000fe0, "Ux,b,t", CONDITIONAL},
        !           286: { "uaddcmt",    0x080009c0, 0xfc000fe0, "Ux,b,t", CONDITIONAL},
        !           287: { "dcor",       0x08000b80, 0xfc1f0fe0, "Ub,t",   CONDITIONAL},
        !           288: { "idcor",      0x08000bc0, 0xfc1f0fe0, "Ub,t",   CONDITIONAL},
        !           289: { "addi",       0xb4000000, 0xfc000800, "di,b,x", CONDITIONAL},
        !           290: { "addio",      0xb4000800, 0xfc000800, "di,b,x", CONDITIONAL},
        !           291: { "addit",      0xb0000000, 0xfc000800, "di,b,x", CONDITIONAL},
        !           292: { "addito",     0xb0000800, 0xfc000800, "di,b,x", CONDITIONAL},
        !           293: { "subi",       0x94000000, 0xfc000800, "ai,b,x", CONDITIONAL},
        !           294: { "subio",      0x94000800, 0xfc000800, "ai,b,x", CONDITIONAL},
        !           295: { "comiclr",    0x90000000, 0xfc000800, "ai,b,x", CONDITIONAL},
        !           296: 
        !           297: /* Extract and Deposit Instructions */
        !           298: 
        !           299: { "vshd",       0xd0000000, 0xfc001fe0, ">x,b,t", CONDITIONAL},
        !           300: { "shd",        0xd0000800, 0xfc001c00, ">x,b,p,t", CONDITIONAL},
        !           301: { "vextru",     0xd0001000, 0xfc001fe0, ">b,T,x", CONDITIONAL},
        !           302: { "vextrs",     0xd0001400, 0xfc001fe0, ">b,T,x", CONDITIONAL},
        !           303: { "extru",      0xd0001800, 0xfc001c00, ">b,P,T,x", CONDITIONAL},
        !           304: { "extrs",      0xd0001c00, 0xfc001c00, ">b,P,T,x", CONDITIONAL},
        !           305: { "zvdep",      0xd4000000, 0xfc001fe0, ">x,T,b", CONDITIONAL},
        !           306: { "vdep",       0xd4000400, 0xfc001fe0, ">x,T,b", CONDITIONAL},
        !           307: { "zdep",       0xd4000800, 0xfc001c00, ">x,p,T,b", CONDITIONAL},
        !           308: { "dep",        0xd4000c00, 0xfc001c00, ">x,p,T,b", CONDITIONAL},
        !           309: { "zvdepi",     0xd4001000, 0xfc001fe0, ">5,T,b", CONDITIONAL},
        !           310: { "vdepi",      0xd4001400, 0xfc001fe0, ">5,T,b", CONDITIONAL},
        !           311: { "zdepi",      0xd4001800, 0xfc001c00, ">5,p,T,b", CONDITIONAL},
        !           312: { "depi",       0xd4001c00, 0xfc001c00, ">5,p,T,b", CONDITIONAL},
        !           313: 
        !           314: /* System Control Instructions */
        !           315: 
        !           316: { "break",      0x00000000, 0xfc001fe0, "r,A"},
        !           317: { "rfi",        0x00000c00, 0xffffffff, ""},
        !           318: { "rfir",       0x00000ca0, 0xffffffff, ""},
        !           319: { "ssm",        0x00000d60, 0xffe0ffe0, "R,t"},
        !           320: { "rsm",        0x00000e60, 0xffe0ffe0, "R,t"},
        !           321: { "mtsm",       0x00001860, 0xffe0ffff, "x"},
        !           322: { "ldsid",      0x000010a0, 0xfc1f3fe0, "(s,b),t"},
        !           323: { "ldsid",      0x000010a0, 0xfc1f3fe0, "(b),t"},
        !           324: { "mtsp",       0x00001820, 0xffe01fff, "x,S"},
        !           325: { "mtctl",      0x00001840, 0xfc00ffff, "x,^"},
        !           326: { "mfsp",       0x000004a0, 0xffff1fe0, "S,t"},
        !           327: { "mfctl",      0x000008a0, 0xfc1fffe0, "^,t"},
        !           328: { "sync",       0x00000400, 0xffffffff, ""},
        !           329: { "prober",     0x04001180, 0xfc003fe0, "(s,b),x,t"},
        !           330: { "prober",     0x04001180, 0xfc003fe0, "(b),x,t"},
        !           331: { "proberi",    0x04003180, 0xfc003fe0, "(s,b),5,t"},
        !           332: { "proberi",    0x04003180, 0xfc003fe0, "(b),5,t"},
        !           333: { "probew",     0x040011c0, 0xfc003fe0, "(s,b),x,t"},
        !           334: { "probew",     0x040011c0, 0xfc003fe0, "(b),x,t"},
        !           335: { "probewi",    0x040031c0, 0xfc003fe0, "(s,b),5,t"},
        !           336: { "probewi",    0x040031c0, 0xfc003fe0, "(b),5,t"},
        !           337: { "lpa",        0x04001340, 0xfc003fc0, "Zx(s,b),t"},
        !           338: { "lpa",        0x04001340, 0xfc003fc0, "Zx(b),t"},
        !           339: { "lha",        0x04001300, 0xfc003fc0, "Zx(s,b),t"},
        !           340: { "lha",        0x04001300, 0xfc003fc0, "Zx(b),t"},
        !           341: { "pdtlb",      0x04001200, 0xfc003fdf, "Zx(s,b)"},
        !           342: { "pdtlb",      0x04001200, 0xfc003fdf, "Zx(b)"},
        !           343: { "pitlb",      0x04000200, 0xfc003fdf, "Zx(s,b)"},
        !           344: { "pitlb",      0x04000200, 0xfc003fdf, "Zx(b)"},
        !           345: { "pdtlbe",     0x04001240, 0xfc003fdf, "Zx(s,b)"},
        !           346: { "pdtlbe",     0x04001240, 0xfc003fdf, "Zx(b)"},
        !           347: { "pitlbe",     0x04000240, 0xfc003fdf, "Zx(s,b)"},
        !           348: { "pitlbe",     0x04000240, 0xfc003fdf, "Zx(b)"},
        !           349: { "idtlba",     0x04001040, 0xfc003fff, "x,(s,b)"},
        !           350: { "idtlba",     0x04001040, 0xfc003fff, "x,(b)"},
        !           351: { "iitlba",     0x04000040, 0xfc003fff, "x,(s,b)"},
        !           352: { "iitlba",     0x04000040, 0xfc003fff, "x,(b)"},
        !           353: { "idtlbp",     0x04001000, 0xfc003fff, "x,(s,b)"},
        !           354: { "idtlbp",     0x04001000, 0xfc003fff, "x,(b)"},
        !           355: { "iitlbp",     0x04000000, 0xfc003fff, "x,(s,b)"},
        !           356: { "iitlbp",     0x04000000, 0xfc003fff, "x,(b)"},
        !           357: { "pdc",        0x04001380, 0xfc003fdf, "Zx(s,b)"},
        !           358: { "pdc",        0x04001380, 0xfc003fdf, "Zx(b)"},
        !           359: { "fdc",        0x04001280, 0xfc003fdf, "Zx(s,b)"},
        !           360: { "fdc",        0x04001280, 0xfc003fdf, "Zx(b)"},
        !           361: { "fic",        0x04000280, 0xfc003fdf, "Zx(s,b)"},
        !           362: { "fic",        0x04000280, 0xfc003fdf, "Zx(b)"},
        !           363: { "fdce",       0x040012c0, 0xfc003fdf, "Zx(s,b)"},
        !           364: { "fdce",       0x040012c0, 0xfc003fdf, "Zx(b)"},
        !           365: { "fice",       0x040002c0, 0xfc003fdf, "Zx(s,b)"},
        !           366: { "fice",       0x040002c0, 0xfc003fdf, "Zx(b)"},
        !           367: { "diag",       0x14000000, 0xfc000000, "D"},
        !           368: 
        !           369: /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
        !           370:    the Timex FPU or the Mustang ERS (not sure which) manual.  */
        !           371: { "gfw",       0x04001680, 0xfc003fdf, "Zx(s,b)"},
        !           372: { "gfw",       0x04001680, 0xfc003fdf, "Zx(b)"},
        !           373: { "gfr",       0x04001a80, 0xfc003fdf, "Zx(s,b)"},
        !           374: { "gfr",       0x04001a80, 0xfc003fdf, "Zx(b)"},
        !           375: 
        !           376: /* Floating Point Coprocessor Instructions */
        !           377:   
        !           378: { "fldwx",      0x24000000, 0xfc001f80, "cx(s,b),v"},
        !           379: { "fldwx",      0x24000000, 0xfc001f80, "cx(b),v"},
        !           380: { "flddx",      0x2c000000, 0xfc001fc0, "cx(s,b),y"},
        !           381: { "flddx",      0x2c000000, 0xfc001fc0, "cx(b),y"},
        !           382: { "fstwx",      0x24000200, 0xfc001fc0, "cv,x(s,b)"},
        !           383: { "fstwx",      0x24000200, 0xfc001fc0, "cv,x(b)"},
        !           384: { "fstdx",      0x2c000200, 0xfc001fc0, "cy,x(s,b)"},
        !           385: { "fstdx",      0x2c000200, 0xfc001fc0, "cy,x(b)"},
        !           386: { "fldws",      0x24001000, 0xfc001f80, "C5(s,b),v"},
        !           387: { "fldws",      0x24001000, 0xfc001f80, "C5(b),v"},
        !           388: { "fldds",      0x2c001000, 0xfc001fc0, "C5(s,b),y"},
        !           389: { "fldds",      0x2c001000, 0xfc001fc0, "C5(b),y"},
        !           390: { "fstws",      0x24001200, 0xfc001f80, "Cv,5(s,b)"},
        !           391: { "fstws",      0x24001200, 0xfc001f80, "Cy,5(b)"},
        !           392: { "fstds",      0x2c001200, 0xfc001fc0, "Cy,5(s,b)"},
        !           393: { "fstds",      0x2c001200, 0xfc001fc0, "Cy,5(b)"},
        !           394: { "fadd",       0x30000600, 0xfc00e7e0, "FE,X,v"},
        !           395: { "fadd",       0x38000600, 0xfc00e720, "IJ,K,v"},
        !           396: { "fsub",       0x30002600, 0xfc00e7e0, "FE,X,v"},
        !           397: { "fsub",       0x38002600, 0xfc00e720, "IJ,K,v"},
        !           398: { "fmpy",       0x30004600, 0xfc00e7e0, "FE,X,v"},
        !           399: { "fmpy",       0x38004600, 0xfc00e720, "IJ,K,v"},
        !           400: { "fdiv",       0x30006600, 0xfc00e7e0, "FE,X,v"},
        !           401: { "fdiv",       0x38006600, 0xfc00e720, "IJ,K,v"},
        !           402: { "fsqrt",      0x30008000, 0xfc1fe7e0, "FE,v"},
        !           403: { "fsqrt",      0x38008000, 0xfc1fe720, "FJ,v"},
        !           404: { "fabs",       0x30006000, 0xfc1fe7e0, "FE,v"},
        !           405: { "fabs",       0x38006000, 0xfc1fe720, "FJ,v"},
        !           406: { "frem",       0x30008600, 0xfc00e7e0, "FE,X,v"},
        !           407: { "frem",       0x38008600, 0xfc00e720, "FJ,K,v"},
        !           408: { "frnd",       0x3000a000, 0xfc1fe7e0, "FE,v"},
        !           409: { "frnd",       0x3800a000, 0xfc1fe720, "FJ,v"},
        !           410: { "fcpy",       0x30004000, 0xfc1fe7e0, "FE,v"},
        !           411: { "fcpy",       0x38004000, 0xfc1fe720, "FJ,v"},
        !           412: { "fcnvff",     0x30000200, 0xfc1f87e0, "FGE,v"},
        !           413: { "fcnvff",     0x38000200, 0xfc1f8720, "FGJ,v"},
        !           414: { "fcnvxf",     0x30008200, 0xfc1f87e0, "FGE,v"},
        !           415: { "fcnvxf",     0x38008200, 0xfc1f8720, "FGJ,v"},
        !           416: { "fcnvfx",     0x30010200, 0xfc1f87e0, "FGE,v"},
        !           417: { "fcnvfx",     0x38010200, 0xfc1f8720, "FGJ,v"},
        !           418: { "fcnvfxt",    0x30018200, 0xfc1f87e0, "FGE,v"},
        !           419: { "fcnvfxt",    0x38018200, 0xfc1f8720, "FGJ,v"},
        !           420: { "fcmp",       0x30000400, 0xfc00e7e0, "FME,X"},
        !           421: { "fcmp",       0x38000400, 0xfc00e720, "IMJ,K"},
        !           422: { "xmpyu",     0x38004700, 0xfc00e720, "FE,X,v"},
        !           423: { "fmpyadd",   0x18000000, 0xfc000000, "H4,6,7,9,8"},
        !           424: { "fmpysub",   0x98000000, 0xfc000000, "H4,6,7,9,8"},
        !           425: { "ftest",      0x30002420, 0xffffffff, ""},
        !           426: 
        !           427: 
        !           428: /* Assist Instructions */
        !           429: 
        !           430: { "spop0",      0x10000000, 0xfc000600, ",f,On", NORMAL},
        !           431: { "spop1",      0x10000200, 0xfc000600, ",f,ont", NORMAL},
        !           432: { "spop2",      0x10000400, 0xfc000600, ",f,1nb", NORMAL},
        !           433: { "spop3",      0x10000600, 0xfc000600, ",f,0nx,b", NORMAL},
        !           434: { "copr",       0x30000000, 0xfc000000, ",u,2n", NORMAL},
        !           435: { "cldwx",      0x24000000, 0xfc001e00, ",u,Zx(s,b),t"},
        !           436: { "cldwx",      0x24000000, 0xfc001e00, ",u,Zx(b),t"},
        !           437: { "clddx",      0x2c000000, 0xfc001e00, ",u,Zx(s,b),t"},
        !           438: { "clddx",      0x2c000000, 0xfc001e00, ",u,Zx(b),t"},
        !           439: { "cstwx",      0x24000200, 0xfc001e00, ",u,Zt,x(s,b)"},
        !           440: { "cstwx",      0x24000200, 0xfc001e00, ",u,Zt,x(b)"},
        !           441: { "cstdx",      0x2c000200, 0xfc001e00, ",u,Zt,x(s,b)"},
        !           442: { "cstdx",      0x2c000200, 0xfc001e00, ",u,Zt,x(b)"},
        !           443: { "cldws",      0x24001000, 0xfc001e00, ",u,Z5(s,b),t"},
        !           444: { "cldws",      0x24001000, 0xfc001e00, ",u,Z5(b),t"},
        !           445: { "cldds",      0x2c001000, 0xfc001e00, ",u,Z5(s,b),t"},
        !           446: { "cldds",      0x2c001000, 0xfc001e00, ",u,Z5(b),t"},
        !           447: { "cstws",      0x24001200, 0xfc001e00, ",u,Zt,5(s,b)"},
        !           448: { "cstws",      0x24001200, 0xfc001e00, ",u,Zt,5(b)"},
        !           449: { "cstds",      0x2c001200, 0xfc001e00, ",u,Zt,5(s,b)"},
        !           450: { "cstds",      0x2c001200, 0xfc001e00, ",u,Zt,5(b)"},
        !           451: };
        !           452: 
        !           453: #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
        !           454: 
        !           455: /* SKV 12/18/92. Added some denotations for various operands. */
        !           456: 
        !           457: #define PA_IMM11_AT_31 'i'
        !           458: #define PA_IMM14_AT_31 'j'
        !           459: #define PA_IMM21_AT_31 'k'
        !           460: #define PA_DISP12 'w'
        !           461: #define PA_DISP17 'W'
        !           462: 
        !           463: #define N_HPPA_OPERAND_FORMATS 5

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