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1.1 root 1: /*
2: * Mach Operating System
3: * Copyright (c) 1992 Carnegie Mellon University
4: * All Rights Reserved.
5: *
6: * Permission to use, copy, modify and distribute this software and its
7: * documentation is hereby granted, provided that both the copyright
8: * notice and this permission notice appear in all copies of the
9: * software, derivative works or modified versions, and any portions
10: * thereof, and that both notices appear in supporting documentation.
11: *
12: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15: *
16: * Carnegie Mellon requests users of this software to return to
17: *
18: * Software Distribution Coordinator or [email protected]
19: * School of Computer Science
20: * Carnegie Mellon University
21: * Pittsburgh PA 15213-3890
22: *
23: * any improvements or extensions that they make and grant Carnegie Mellon
24: * the rights to redistribute these changes.
25: */
26:
27: #include <atm.h>
28:
29: #if NATM > 0
30:
31: #include <vm/vm_kern.h>
32: #include <machine/machspl.h> /* spl definitions */
33: #include <kern/time_out.h> /* ? maybe */
34: #include <device/errno.h>
35: #include <device/io_req.h>
36: #include <device/net_status.h>
37:
38: #include <chips/busses.h>
39: #include <chips/atmreg.h>
40:
41: #include <kern/eventcount.h>
42:
43: #include <mips/mips_cpu.h>
44:
45:
46: struct bus_device *atm_info[NATM];
47: int atm_probe();
48: static void atm_attach();
49:
50: struct bus_driver atm_driver =
51: { atm_probe, 0, atm_attach, 0, /* csr */ 0, "atm", atm_info,
52: "", 0, /* flags */ 0 }; /* ENABLED BUS INTR? */
53:
54: /* XX "", 0, BUS_INTR_DISABLED}; */
55:
56: typedef struct atm_softc {
57: struct atm_device *atm_dev;
58: struct evc atm_eventcounter;
59: mapped_atm_info_t atm_mapped_info;
60: } atm_softc_t;
61:
62:
63: natural_t atm_nintrs = 0;
64:
65: atm_softc_t atm_softc[NATM];
66:
67: atm_probe(reg, ui)
68: vm_offset_t reg;
69: register struct bus_device *ui;
70: {
71: register atm_softc_t *atm;
72: mapped_atm_info_t info; /* info struct to hand to users */
73: vm_offset_t addr;
74: int unit = ui->unit;
75:
76: if (check_memory(reg, 0)) {
77: return 0;
78: }
79:
80: atm_info[unit] = ui;
81: atm = &atm_softc[unit];
82: atm->atm_dev = (struct atm_device *) reg; /* k1 address */
83:
84: evc_init(&atm->atm_eventcounter);
85:
86: printf("evc_init of atm: event counter id is %d\n", atm->atm_eventcounter.ev_id);
87:
88: /* initialize the interface to deliver. No interrupts by default */
89: atm->atm_dev->sreg = 0;
90: atm->atm_dev->creg = (CR_RX_RESET | CR_TX_RESET);
91: atm->atm_dev->creg = 0;
92: atm->atm_dev->creg_set = (CR_RX_ENABLE | CR_TX_ENABLE);
93: #ifdef notdef
94: atm->atm_dev->rxthresh = 0;
95: atm->atm_dev->rxtimerv = 0;
96: atm->atm_dev->creg_s = RX_EOM_INTR; /* enable interrupt on end of message */
97: #endif
98:
99: /*
100: * Grab a page to be mapped later to users
101: */
102: (void) kmem_alloc_wired(kernel_map, &addr, PAGE_SIZE); /* kseg2 */
103: bzero(addr, PAGE_SIZE);
104: addr = pmap_extract(pmap_kernel(), addr); /* phys */
105: info = (mapped_atm_info_t) PHYS_TO_K0SEG(addr);
106: atm->atm_mapped_info = info;
107:
108: /*
109: * Set some permanent info
110: */
111: info->hello_world = 0xdeadbeef;
112: info->interrupt_count = 0;
113: info->wait_event = atm->atm_eventcounter.ev_id;
114: info->saved_status_reg = 0;
115:
116: return 1;
117: }
118:
119: static void
120: atm_attach(ui)
121: register struct bus_device *ui;
122: {
123: }
124:
125: int atm_disable_interrupts_after_each = 1;
126:
127:
128: #define ATM_INTERRUPTS (RX_COUNT_INTR | RX_EOM_INTR | RX_TIME_INTR)
129:
130: atm_intr(unit, spllevel)
131: int unit;
132: int spllevel;
133: {
134: register struct atm_softc *atm = &atm_softc[unit];
135: struct atm_device *atm_dev = atm->atm_dev;
136: unsigned int intr;
137:
138: if (atm_dev == 0) {
139: printf("atm: stray interrupt\n");
140: return;
141: }
142:
143: /* Acknowledge interrupt request */
144: intr = ATM_READ_REG(atm_dev->sreg);
145: atm_dev->sreg = ~(intr & ATM_INTERRUPTS);
146:
147: /* clear the reason for the interrupt */
148: if (atm_disable_interrupts_after_each)
149: atm_dev->creg &= ~intr;
150:
151: splx(spllevel); /* drop priority now */
152:
153: atm_intr_occurred();
154:
155:
156: /* Pass status info up to user */
157: if (atm->atm_mapped_info) {
158: atm->atm_mapped_info->interrupt_count++;
159: atm->atm_mapped_info->saved_status_reg = intr;
160: }
161:
162: /* Awake user thread */
163:
164: evc_signal(&atm->atm_eventcounter);
165:
166: /* NOTE: INTERRUPTS ARE DISABLED. */
167: }
168:
169: atm_intr_occurred()
170: {
171: atm_nintrs++;
172: }
173:
174:
175: atm_output(dev, ior)
176: int dev;
177: io_req_t ior;
178: {
179: }
180:
181: atm_start(unit)
182: int unit;
183: {
184: }
185:
186: atm_open(dev, flag, ior)
187: int dev;
188: int flag;
189: io_req_t ior;
190: {
191: register int unit = dev;
192: register atm_softc_t *atm = &atm_softc[unit];
193:
194: if (unit >= NATM)
195: return EINVAL;
196: if (!atm->atm_dev)
197: return ENXIO;
198:
199: return KERN_SUCCESS;
200: }
201:
202: atm_close(dev, flag)
203: int dev;
204: {
205: }
206:
207: atm_read(dev, ior)
208: int dev;
209: io_req_t ior;
210: {
211: }
212:
213: atm_write(dev, ior)
214: int dev;
215: io_req_t ior;
216: {
217: }
218:
219: atm_get_status(dev, flavor, status, status_count)
220: int dev;
221: int flavor;
222: dev_status_t status; /* pointer to OUT array */
223: natural_t *status_count; /* out */
224: {
225: switch (flavor) {
226: case NET_STATUS:
227: {
228: register struct net_status *ns = (struct net_status *)status;
229:
230: ns->min_packet_size = sizeof(struct sar_data);
231: ns->max_packet_size = sizeof(struct sar_data);
232: ns->header_format = 999; /* XX */
233: ns->header_size = sizeof(int); /* XX */
234: ns->address_size = 0;
235: ns->flags = 0;
236: ns->mapped_size = sizeof(struct atm_device) + PAGE_SIZE;
237: *status_count = NET_STATUS_COUNT;
238: break;
239: }
240: case NET_ADDRESS:
241: /* This would be a good place for it */
242: default:
243: return (D_INVALID_OPERATION);
244: }
245: return (D_SUCCESS);
246: }
247:
248: atm_set_status(dev, flavor, status, status_count)
249: int dev;
250: int flavor;
251: dev_status_t status;
252: natural_t status_count;
253: {
254: }
255:
256: atm_mmap(dev, off, prot)
257: int dev;
258: vm_offset_t off;
259: int prot;
260: {
261: int unit = dev;
262: vm_offset_t addr;
263:
264: /*
265: * Layout of mapped area is:
266: * 000 -- FA_END: DEVICE
267: * FA_END -- FA_END + PAGE_SIZE: SHARED STATE
268: */
269: if (off < sizeof(struct atm_device)) {
270: addr = K1SEG_TO_PHYS((vm_offset_t)(atm_softc[unit].atm_dev)) + off;
271: } else if (off < sizeof(struct atm_device) + PAGE_SIZE) {
272: addr = K0SEG_TO_PHYS(atm_softc[unit].atm_mapped_info);
273: } else return -1;
274: return mips_btop(addr);
275: }
276:
277: atm_setinput(dev, receive_port, priority, filter, filter_count)
278: int dev;
279: ipc_port_t receive_port;
280: int priority;
281: /*filter_t *filter;*/
282: natural_t filter_count;
283: {
284: }
285:
286: atm_restart(ifp)
287: /* register struct ifnet *ifp; */
288: {
289: }
290:
291: atm_portdeath(dev, port)
292: int dev;
293: mach_port_t port;
294: {
295: }
296:
297: #endif NATM > 0
298:
299:
300:
301:
302:
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