|
|
1.1 ! root 1: /* ! 2: * Mach Operating System ! 3: * Copyright (c) 1992 Carnegie Mellon University ! 4: * All Rights Reserved. ! 5: * ! 6: * Permission to use, copy, modify and distribute this software and its ! 7: * documentation is hereby granted, provided that both the copyright ! 8: * notice and this permission notice appear in all copies of the ! 9: * software, derivative works or modified versions, and any portions ! 10: * thereof, and that both notices appear in supporting documentation. ! 11: * ! 12: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" ! 13: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR ! 14: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. ! 15: * ! 16: * Carnegie Mellon requests users of this software to return to ! 17: * ! 18: * Software Distribution Coordinator or [email protected] ! 19: * School of Computer Science ! 20: * Carnegie Mellon University ! 21: * Pittsburgh PA 15213-3890 ! 22: * ! 23: * any improvements or extensions that they make and grant Carnegie Mellon ! 24: * the rights to redistribute these changes. ! 25: */ ! 26: /* ! 27: * Here platform specific code to define sample_t & co ! 28: * [to cope with weird DMA engines], and other customs ! 29: */ ! 30: #ifdef FLAMINGO ! 31: #define splaudio splbio ! 32: #define sample_t unsigned char /* later */ ! 33: #define samples_to_chars bcopy ! 34: #define chars_to_samples bcopy ! 35: /* Sparse space ! */ ! 36: typedef struct { ! 37: volatile unsigned long cr; /* command register (wo) */ ! 38: /*#define ir cr /* interrupt register (ro) */ ! 39: volatile unsigned long dr; /* data register (rw) */ ! 40: volatile unsigned long dsr1; /* D-channel status register 1 (ro) */ ! 41: volatile unsigned long der; /* D-channel error register (ro) */ ! 42: volatile unsigned long dctb; /* D-channel transmit register (wo) */ ! 43: /*#define dcrb dctb /* D-channel receive register (ro) */ ! 44: volatile unsigned long bbtb; /* Bb-channel transmit register (wo) */ ! 45: /*#define bbrb bbtb /* Bb-channel receive register (ro) */ ! 46: volatile unsigned long bctb; /* Bc-channel transmit register (wo)*/ ! 47: /*#define bcrb bctb /* Bc-channel receive register (ro) */ ! 48: volatile unsigned long dsr2; /* D-channel status register 2 (ro) */ ! 49: } amd79c30_padded_regs_t; ! 50: ! 51: /* give the chip 400ns in between accesses */ ! 52: #define read_reg(r,v) \ ! 53: { (v) = ((r) >> 8) & 0xff; delay(1); } ! 54: ! 55: #define write_reg(r,v) \ ! 56: { (r) = (((v) & 0xff) << 8) | \ ! 57: 0x200000000L; /*bytemask*/ \ ! 58: delay(1); wbflush(); \ ! 59: } ! 60: ! 61: /* Write 16 bits of data from variable v to the data port of the audio chip */ ! 62: #define WAMD16(regs, v) \ ! 63: { write_reg((regs)->dr,v); \ ! 64: write_reg((regs)->dr,v>>8); } ! 65: ! 66: #define mb() wbflush() ! 67: ! 68: #endif /* FLAMINGO */ ! 69: ! 70: ! 71: #ifdef MAXINE ! 72: #define splaudio splhigh ! 73: typedef struct { ! 74: volatile unsigned char cr; /* command register (wo) */ ! 75: /*#define ir cr /* interrupt register (ro) */ ! 76: char pad0[63]; ! 77: volatile unsigned char dr; /* data register (rw) */ ! 78: char pad1[63]; ! 79: volatile unsigned char dsr1; /* D-channel status register 1 (ro) */ ! 80: char pad2[63]; ! 81: volatile unsigned char der; /* D-channel error register (ro) */ ! 82: char pad3[63]; ! 83: volatile unsigned char dctb; /* D-channel transmit register (wo) */ ! 84: /*#define dcrb dctb /* D-channel receive register (ro) */ ! 85: char pad4[63]; ! 86: volatile unsigned char bbtb; /* Bb-channel transmit register (wo) */ ! 87: /*#define bbrb bbtb /* Bb-channel receive register (ro) */ ! 88: char pad5[63]; ! 89: volatile unsigned char bctb; /* Bc-channel transmit register (wo)*/ ! 90: /*#define bcrb bctb /* Bc-channel receive register (ro) */ ! 91: char pad6[63]; ! 92: volatile unsigned char dsr2; /* D-channel status register 2 (ro) */ ! 93: char pad7[63]; ! 94: } amd79c30_padded_regs_t; ! 95: ! 96: /* give the chip 400ns in between accesses */ ! 97: #define read_reg(r,v) \ ! 98: { (v) = (r); delay(1); } ! 99: ! 100: #define write_reg(r,v) \ ! 101: { (r) = (v); delay(1); wbflush(); } ! 102: ! 103: /* Write 16 bits of data from variable v to the data port of the audio chip */ ! 104: #define WAMD16(regs, v) \ ! 105: { write_reg((regs)->dr,v); \ ! 106: write_reg((regs)->dr,v>>8); } ! 107: ! 108: #define mb() ! 109: ! 110: #endif /* MAXINE */ ! 111: ! 112: ! 113: #ifndef sample_t ! 114: #define sample_t unsigned char ! 115: #define samples_to_chars bcopy ! 116: #define chars_to_samples bcopy ! 117: #endif ! 118: ! 119: /* ! 120: * More architecture-specific customizations ! 121: */ ! 122: #ifdef alpha ! 123: #define sample_rpt_int(x) (((x)<<24)|((x)<<16)|((x)<<8)|((x)<<0)) ! 124: #define sample_rpt_long(x) ((sample_rpt_int(x)<<32)|sample_rpt_int(x)) ! 125: #endif ! 126: ! 127: #ifndef sample_rpt_long ! 128: #define sample_rpt_long(x) (((x)<<24)|((x)<<16)|((x)<<8)|((x)<<0)) ! 129: #endif ! 130:
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.