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Annotation of Gnu-Mach/chips/mc_clock.h, revision 1.1

1.1     ! root        1: /* 
        !             2:  * Mach Operating System
        !             3:  * Copyright (c) 1991,1990 Carnegie Mellon University
        !             4:  * All Rights Reserved.
        !             5:  * 
        !             6:  * Permission to use, copy, modify and distribute this software and its
        !             7:  * documentation is hereby granted, provided that both the copyright
        !             8:  * notice and this permission notice appear in all copies of the
        !             9:  * software, derivative works or modified versions, and any portions
        !            10:  * thereof, and that both notices appear in supporting documentation.
        !            11:  * 
        !            12:  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
        !            13:  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
        !            14:  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
        !            15:  * 
        !            16:  * Carnegie Mellon requests users of this software to return to
        !            17:  * 
        !            18:  *  Software Distribution Coordinator  or  [email protected]
        !            19:  *  School of Computer Science
        !            20:  *  Carnegie Mellon University
        !            21:  *  Pittsburgh PA 15213-3890
        !            22:  * 
        !            23:  * any improvements or extensions that they make and grant Carnegie Mellon
        !            24:  * the rights to redistribute these changes.
        !            25:  */
        !            26: /*
        !            27:  *     File:   mc_clock.h
        !            28:  *     Author: Alessandro Forin
        !            29:  *     Date:   8/90
        !            30:  *
        !            31:  *     Definitions for the MC146818 Clock Driver
        !            32:  */
        !            33: 
        !            34: /*
        !            35:  *     Functions this module implements
        !            36:  */
        !            37: 
        !            38: extern void    resettodr(/* */);       /* reset time-of-day register */
        !            39: extern void    startrtclock(/* */);    /* start real-time clock */
        !            40: extern void    stopclocks(/* */);      /* stop  real-time clock */
        !            41: extern boolean_t ackrtclock(/* */);    /* acknowledge interrupt, if any */
        !            42: extern boolean_t todr_running;         /* status */
        !            43: 
        !            44: extern boolean_t mc_new_century;       /* patch this after year 2000 (honest!) */
        !            45: 
        !            46: extern void    delay(/* int usecs */); /* waste that many microseconds */
        !            47: extern void    config_delay(/* int speed */);          /* for delay() */
        !            48: #define                MC_DELAY_PMAX   8
        !            49: #define                MC_DELAY_3MAX   12
        !            50: 
        !            51: extern void    set_clock_addr(/* vm_offset_t addr */); /* RAM location */
        !            52: 
        !            53: /*
        !            54:  *     Real-Time Clock plus RAM device (MC146818)
        !            55:  */
        !            56: 
        !            57: /*
        !            58:  * RAM Memory Map (as seen by the chip)
        !            59:  */
        !            60: typedef struct {
        !            61:        volatile unsigned char  mc_second;
        !            62:        volatile unsigned char  mc_alarm_second;
        !            63:        volatile unsigned char  mc_minute;
        !            64:        volatile unsigned char  mc_alarm_minute;
        !            65:        volatile unsigned char  mc_hour;
        !            66:        volatile unsigned char  mc_alarm_hour;
        !            67:        volatile unsigned char  mc_day_of_week;
        !            68:        volatile unsigned char  mc_day_of_month;
        !            69:        volatile unsigned char  mc_month;
        !            70:        volatile unsigned char  mc_year;
        !            71:        volatile unsigned char  mc_register_A;
        !            72:        volatile unsigned char  mc_register_B;
        !            73:        volatile unsigned char  mc_register_C;
        !            74:        volatile unsigned char  mc_register_D;
        !            75:        unsigned char           mc_non_volatile_ram[50];
        !            76: } mc_clock_t;
        !            77: 
        !            78: /*
        !            79:  * Register A defines (read/write)
        !            80:  */
        !            81: 
        !            82: #define        MC_REG_A_RS     0x0f            /* Interrupt rate (and SQwave) select */
        !            83: #define        MC_REG_A_DV     0x70            /* Divider select */
        !            84: #define        MC_REG_A_UIP    0x80            /* Update In Progress (read-only bit) */
        !            85: 
        !            86: /* Time base configuration */
        !            87: #define        MC_BASE_4_MHz   0x00
        !            88: #define        MC_BASE_1_MHz   0x10
        !            89: #define        MC_BASE_32_KHz  0x20
        !            90: #define        MC_BASE_NONE    0x60            /* actually, both of these reset */
        !            91: #define        MC_BASE_RESET   0x70
        !            92: 
        !            93: /* Interrupt rate table */
        !            94: #define        MC_RATE_NONE    0x0             /* disabled */
        !            95: #define        MC_RATE_1       0x1             /* 256Hz if MC_BASE_32_KHz, else 32768Hz */
        !            96: #define        MC_RATE_2       0x2             /* 128Hz if MC_BASE_32_KHz, else 16384Hz */
        !            97: #define        MC_RATE_8192_Hz 0x3             /* Tpi: 122.070 usecs */
        !            98: #define        MC_RATE_4096_Hz 0x4             /* Tpi: 244.141 usecs */
        !            99: #define        MC_RATE_2048_Hz 0x5             /* Tpi: 488.281 usecs */
        !           100: #define        MC_RATE_1024_Hz 0x6             /* Tpi: 976.562 usecs */
        !           101: #define        MC_RATE_512_Hz  0x7             /* Tpi: 1.953125 ms */
        !           102: #define        MC_RATE_256_Hz  0x8             /* Tpi: 3.90625 ms */
        !           103: #define        MC_RATE_128_Hz  0x9             /* Tpi: 7.8125 ms */
        !           104: #define        MC_RATE_64_Hz   0xa             /* Tpi: 15.625 ms */
        !           105: #define        MC_RATE_32_Hz   0xb             /* Tpi: 31.25 ms */
        !           106: #define        MC_RATE_16_Hz   0xc             /* Tpi: 62.5 ms */
        !           107: #define        MC_RATE_8_Hz    0xd             /* Tpi: 125 ms */
        !           108: #define        MC_RATE_4_Hz    0xe             /* Tpi: 250 ms */
        !           109: #define        MC_RATE_2_Hz    0xf             /* Tpi: 500 ms */
        !           110: 
        !           111: /* Update cycle time */
        !           112: #define MC_UPD_4_MHz    248            /* usecs */
        !           113: #define MC_UPD_1_MHz    248            /* usecs */
        !           114: #define MC_UPD_32_KHz  1984            /* usecs */
        !           115: #define MC_UPD_MINIMUM  244            /* usecs, guaranteed if UIP=0 */
        !           116: 
        !           117: /*
        !           118:  * Register B defines (read/write)
        !           119:  */
        !           120: 
        !           121: #define MC_REG_B_DSE   0x01            /* Daylight Savings Enable */
        !           122: #define MC_REG_B_24HM  0x02            /* 24/12 Hour Mode */
        !           123: #define MC_REG_B_DM    0x04            /* Data Mode, 1=Binary 0=BCD */
        !           124: #define MC_REG_B_SQWE  0x08            /* Sqare Wave Enable */
        !           125: #define MC_REG_B_UIE   0x10            /* Update-ended Interrupt Enable */
        !           126: #define MC_REG_B_AIE   0x20            /* Alarm Interrupt Enable */
        !           127: #define MC_REG_B_PIE   0x40            /* Periodic Interrupt Enable */
        !           128: #define MC_REG_B_SET   0x80            /* Set NVram info, e.g. update time or ..*/
        !           129: #define MC_REG_B_STOP  MC_REG_B_SET    /* Stop updating the timing info */
        !           130: 
        !           131: /*
        !           132:  * Register C defines (read-only)
        !           133:  */
        !           134: 
        !           135: #define MC_REG_C_ZEROES        0x0f            /* Reads as zero bits  */
        !           136: #define MC_REG_C_UF    0x10            /* Update-ended interrupt flag */
        !           137: #define MC_REG_C_AF    0x20            /* Alarm interrupt flag */
        !           138: #define MC_REG_C_PF    0x40            /* Periodic interrupt flag */
        !           139: #define MC_REG_C_IRQF  0x80            /* Interrupt request flag */
        !           140: 
        !           141: /*
        !           142:  * Register D defines (read-only)
        !           143:  */
        !           144: 
        !           145: #define MC_REG_D_ZEROES        0x7f            /* Reads as zero bits  */
        !           146: #define MC_REG_D_VRT   0x80            /* Valid RAM and Time */
        !           147: 

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