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1.1 root 1: /*
2: * Mach Operating System
3: * Copyright (c) 1992 Carnegie Mellon University
4: * All Rights Reserved.
5: *
6: * Permission to use, copy, modify and distribute this software and its
7: * documentation is hereby granted, provided that both the copyright
8: * notice and this permission notice appear in all copies of the
9: * software, derivative works or modified versions, and any portions
10: * thereof, and that both notices appear in supporting documentation.
11: *
12: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15: *
16: * Carnegie Mellon requests users of this software to return to
17: *
18: * Software Distribution Coordinator or [email protected]
19: * School of Computer Science
20: * Carnegie Mellon University
21: * Pittsburgh PA 15213-3890
22: *
23: * any improvements or extensions that they make and grant Carnegie Mellon
24: * the rights to redistribute these changes.
25: */
26:
27: #ifndef _TCA100_H_
28: #define _TCA100_H_ 1
29:
30: #ifndef STUB
31: #include <chips/nw.h>
32: #else
33: #include "nw.h"
34: #endif
35:
36: /*** FORE TCA-100 Turbochannel ATM computer interface ***/
37:
38: /*** HARDWARE REGISTERS ***/
39:
40: typedef volatile unsigned int vol_u_int;
41:
42: typedef struct atm_device {
43: unsigned int prom[64 * 1024 / 4];
44: vol_u_int sreg;
45: vol_u_int creg_set;
46: vol_u_int creg_clr;
47: vol_u_int creg;
48: vol_u_int rxtimer;
49: unsigned int pad1;
50: vol_u_int rxtimerv;
51: unsigned int pad2;
52: vol_u_int rxcount;
53: unsigned int pad3;
54: vol_u_int rxthresh;
55: unsigned int pad4;
56: vol_u_int txcount;
57: unsigned int pad5;
58: vol_u_int txthresh;
59: unsigned int pad6[64*1024/4 - 15];
60: vol_u_int rxfifo[14];
61: unsigned int pad7[64*1024/4 - 14];
62: vol_u_int txfifo[14];
63: unsigned int pad8[64*1024/4 - 14];
64: } atm_device_s, *atm_device_t;
65:
66:
67: /*** DEFINITION OF BITS IN THE STATUS AND CONTROL REGISTERS ***/
68:
69: #define RX_COUNT_INTR 0x0001
70: #define RX_EOM_INTR 0x0002
71: #define RX_TIME_INTR 0x0004
72: #define TX_COUNT_INTR 0x0008
73: #define RX_CELL_LOST 0x0010
74: #define RX_NO_CARRIER 0x0020
75: #define CR_RX_ENABLE 0x0040
76: #define CR_TX_ENABLE 0x0080
77: #define CR_RX_RESET 0x0100
78: #define CR_TX_RESET 0x0200
79:
80: #define RX_COUNTER_MASK 0x03ff
81:
82: /*** DEFINITION OF FIELDS FOR AAL3/4 WITH THE TCA-100 PADDING ***/
83:
84: /*Header -- ATM header*/
85:
86: #define VPI 0x0ff00000
87: #define VCI 0x000ffff0
88:
89: #define ATM_HEADER_RSV_BITS 0x00000004
90:
91: #define PERMANENT_VIRTUAL_CONNECTIONS 1
92:
93: #if PERMANENT_VIRTUAL_CONNECTIONS
94: #define ATM_VPVC_MASK 0x3ff00000
95: #define ATM_VPVC_SHIFT 20
96: #else
97: #define ATM_VPVC_MASK 0x00003ff0
98: #define ATM_VPVC_SHIFT 4
99: #endif
100:
101:
102: /*First payload word -- SAR header*/
103:
104: #define ATM_HEADER_CRC 0xff000000
105: #define ATM_HEADER_CRC_SYNDROME 0x00ff0000
106:
107: #define SEG_TYPE 0x0000c000
108: #define BOM 0x00008000
109: #define COM 0x00000000
110: #define EOM 0x00004000
111: #define SSM 0x0000c000
112:
113: #define BOM_DATA_SIZE 40
114: #define COM_DATA_SIZE 44
115: #define EOM_DATA_SIZE 40
116: #define SSM_DATA_SIZE 36
117:
118: #define SEQ_NO 0x00003c00
119: #define SEQ_INC 0x00000400
120:
121: #define MID 0x000003ff
122: #define MID_INC 0x00000001
123:
124: #define SAR_HEADER_MASK (ATM_HEADER_CRC_SYNDROME | SEG_TYPE | SEQ_NO | MID)
125:
126: /*Trailer -- SAR trailer and error flags*/
127:
128: #define PAYLOAD_LENGTH 0xfc000000
129: #define FULL_SEGMENT_TRAILER (44 << 26)
130: #define EMPTY_SEGMENT_TRAILER (4 << 26)
131: #define SYNCH_SEGMENT_TRAILER (16 << 26)
132:
133: #define FRAMING_ERROR 0x0001
134: #define HEADER_CRC_ERROR 0x0002
135: #define PAYLOAD_CRC_ERROR 0x0004
136: #define PAD2_ERROR 0x0007
137:
138: #define SAR_TRAILER_MASK (PAYLOAD_LENGTH | PAD2_ERROR)
139: /*This field should be FULL_SEGMENT_TRAILER IN BOM OR COM*/
140:
141:
142: /*CS header and trailer fields*/
143:
144: #define CS_PDU_TYPE 0xff000000
145: #define BE_TAG 0x00ff0000
146: #define BA_SIZE 0x0000ffff
147:
148: #define CS_PROTOCOL_CONTROL_FIELD 0xff000000
149: #define CS_LENGTH 0x0000ffff
150:
151: /*** DEVICE STATUS ***/
152:
153: typedef enum { /*"Flavors" for device_get_status and device_set_status*/
154: ATM_MAP_SIZE, /* device_get_status options */
155: ATM_MTU_SIZE,
156: ATM_EVC_ID, /* ID of event counter assigned to device */
157: ATM_ASSIGNMENT, /* Returns two words indicating whether device is mapped
158: and number of tasks with the device open */
159: /* device_set_status options */
160: ATM_INITIALIZE, /* Restarts hardware and low-level driver */
161: ATM_PVC_SET /* Sets up a permanent virtual connection --
162: the status argument array is cast to a nw_pvc_s
163: structure */
164:
165: } atm_status;
166:
167: typedef struct {
168: nw_peer_s pvc; /* Permanent virtual connection */
169: u_int tx_vp; /* VPI used for transmissions to permanent virtual
170: connection. The VPI used for reception is the
171: local endpoint number. VCIs are 0 */
172: nw_protocol protocol; /* Protocol of connection (possibly NW_LINE) */
173: } nw_pvc_s, *nw_pvc_t;
174:
175: /*** BYTE ORDER ***/
176:
177: /*The ATM header and SAR header and trailer are converted to and from
178: host byte order by hardware. CS headers and trailers and
179: signaling messages need byte order conversion in software.
180: Conversion in software is also necessary for application messages
181: if the communicating hosts have different byte orders (e.g. DECstation
182: and SPARCstation). */
183:
184: #define HTONL(x) \
185: ((x << 24) | ((x & 0xff00) << 8) | ((x >> 8) & 0xff00) | ((u_int) x >> 24))
186:
187: #define NTOHL(x) HTONL(x)
188:
189: #if 0
190: unsigned int htonl(unsigned int x) {
191:
192: return ((x << 24) | ((x & 0xff00) << 8) | ((x >> 8) & 0xff00) | (x >> 24));
193: }
194:
195: #define ntohl(x) htonl(x)
196:
197: #endif
198:
199: #endif /* _TCA100_H_ */
200:
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