|
|
1.1 root 1: /* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux.
2:
3: Written 1994, 1995 by David C. Davies.
4:
5:
6: Copyright 1994 David C. Davies
7: and
8: United States Government
9: (as represented by the Director, National Security Agency).
10:
11: Copyright 1995 Digital Equipment Corporation.
12:
13:
14: This software may be used and distributed according to the terms of
15: the GNU Public License, incorporated herein by reference.
16:
17: This driver is written for the Digital Equipment Corporation series
18: of DEPCA and EtherWORKS ethernet cards:
19:
20: DEPCA (the original)
21: DE100
22: DE101
23: DE200 Turbo
24: DE201 Turbo
25: DE202 Turbo (TP BNC)
26: DE210
27: DE422 (EISA)
28:
29: The driver has been tested on DE100, DE200 and DE202 cards in a
30: relatively busy network. The DE422 has been tested a little.
31:
32: This driver will NOT work for the DE203, DE204 and DE205 series of
33: cards, since they have a new custom ASIC in place of the AMD LANCE
34: chip. See the 'ewrk3.c' driver in the Linux source tree for running
35: those cards.
36:
37: I have benchmarked the driver with a DE100 at 595kB/s to (542kB/s from)
38: a DECstation 5000/200.
39:
40: The author may be reached at [email protected] or
41: [email protected] or Digital Equipment Corporation, 550 King
42: Street, Littleton MA 01460.
43:
44: =========================================================================
45:
46: The driver was originally based on the 'lance.c' driver from Donald
47: Becker which is included with the standard driver distribution for
48: linux. V0.4 is a complete re-write with only the kernel interface
49: remaining from the original code.
50:
51: 1) Lance.c code in /linux/drivers/net/
52: 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook",
53: AMD, 1992 [(800) 222-9323].
54: 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
55: AMD, Pub. #17881, May 1993.
56: 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA",
57: AMD, Pub. #16907, May 1992
58: 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual",
59: Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003
60: 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual",
61: Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003
62: 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR
63: Digital Equipment Corporation, 1989
64: 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual",
65: Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001
66:
67:
68: Peter Bauer's depca.c (V0.5) was referred to when debugging V0.1 of this
69: driver.
70:
71: The original DEPCA card requires that the ethernet ROM address counter
72: be enabled to count and has an 8 bit NICSR. The ROM counter enabling is
73: only done when a 0x08 is read as the first address octet (to minimise
74: the chances of writing over some other hardware's I/O register). The
75: NICSR accesses have been changed to byte accesses for all the cards
76: supported by this driver, since there is only one useful bit in the MSB
77: (remote boot timeout) and it is not used. Also, there is a maximum of
78: only 48kB network RAM for this card. My thanks to Torbjorn Lindh for
79: help debugging all this (and holding my feet to the fire until I got it
80: right).
81:
82: The DE200 series boards have on-board 64kB RAM for use as a shared
83: memory network buffer. Only the DE100 cards make use of a 2kB buffer
84: mode which has not been implemented in this driver (only the 32kB and
85: 64kB modes are supported [16kB/48kB for the original DEPCA]).
86:
87: At the most only 2 DEPCA cards can be supported on the ISA bus because
88: there is only provision for two I/O base addresses on each card (0x300
89: and 0x200). The I/O address is detected by searching for a byte sequence
90: in the Ethernet station address PROM at the expected I/O address for the
91: Ethernet PROM. The shared memory base address is 'autoprobed' by
92: looking for the self test PROM and detecting the card name. When a
93: second DEPCA is detected, information is placed in the base_addr
94: variable of the next device structure (which is created if necessary),
95: thus enabling ethif_probe initialization for the device. More than 2
96: EISA cards can be supported, but care will be needed assigning the
97: shared memory to ensure that each slot has the correct IRQ, I/O address
98: and shared memory address assigned.
99:
100: ************************************************************************
101:
102: NOTE: If you are using two ISA DEPCAs, it is important that you assign
103: the base memory addresses correctly. The driver autoprobes I/O 0x300
104: then 0x200. The base memory address for the first device must be less
105: than that of the second so that the auto probe will correctly assign the
106: I/O and memory addresses on the same card. I can't think of a way to do
107: this unambiguously at the moment, since there is nothing on the cards to
108: tie I/O and memory information together.
109:
110: I am unable to test 2 cards together for now, so this code is
111: unchecked. All reports, good or bad, are welcome.
112:
113: ************************************************************************
114:
115: The board IRQ setting must be at an unused IRQ which is auto-probed
116: using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are
117: {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is
118: really IRQ9 in machines with 16 IRQ lines.
119:
120: No 16MB memory limitation should exist with this driver as DMA is not
121: used and the common memory area is in low memory on the network card (my
122: current system has 20MB and I've not had problems yet).
123:
124: The ability to load this driver as a loadable module has been added. To
125: utilise this ability, you have to do <8 things:
126:
127: 0) have a copy of the loadable modules code installed on your system.
128: 1) copy depca.c from the /linux/drivers/net directory to your favourite
129: temporary directory.
130: 2) if you wish, edit the source code near line 1530 to reflect the I/O
131: address and IRQ you're using (see also 5).
132: 3) compile depca.c, but include -DMODULE in the command line to ensure
133: that the correct bits are compiled (see end of source code).
134: 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
135: kernel with the depca configuration turned off and reboot.
136: 5) insmod depca.o [irq=7] [io=0x200] [mem=0xd0000] [adapter_name=DE100]
137: [Alan Cox: Changed the code to allow command line irq/io assignments]
138: [Dave Davies: Changed the code to allow command line mem/name
139: assignments]
140: 6) run the net startup bits for your eth?? interface manually
141: (usually /etc/rc.inet[12] at boot time).
142: 7) enjoy!
143:
144: Note that autoprobing is not allowed in loadable modules - the system is
145: already up and running and you're messing with interrupts.
146:
147: To unload a module, turn off the associated interface
148: 'ifconfig eth?? down' then 'rmmod depca'.
149:
150: To assign a base memory address for the shared memory when running as a
151: loadable module, see 5 above. To include the adapter name (if you have
152: no PROM but know the card name) also see 5 above. Note that this last
153: option will not work with kernel built-in depca's.
154:
155: The shared memory assignment for a loadable module makes sense to avoid
156: the 'memory autoprobe' picking the wrong shared memory (for the case of
157: 2 depca's in a PC).
158:
159:
160: TO DO:
161: ------
162:
163:
164: Revision History
165: ----------------
166:
167: Version Date Description
168:
169: 0.1 25-jan-94 Initial writing.
170: 0.2 27-jan-94 Added LANCE TX hardware buffer chaining.
171: 0.3 1-feb-94 Added multiple DEPCA support.
172: 0.31 4-feb-94 Added DE202 recognition.
173: 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support.
174: 0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable.
175: Add jabber packet fix from [email protected]
176: and [email protected]
177: 0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access.
178: 0.35 8-mar-94 Added DE201 recognition. Tidied up.
179: 0.351 30-apr-94 Added EISA support. Added DE422 recognition.
180: 0.36 16-may-94 DE422 fix released.
181: 0.37 22-jul-94 Added MODULE support
182: 0.38 15-aug-94 Added DBR ROM switch in depca_close().
183: Multi DEPCA bug fix.
184: 0.38axp 15-sep-94 Special version for Alpha AXP Linux V1.0.
185: 0.381 12-dec-94 Added DE101 recognition, fix multicast bug.
186: 0.382 9-feb-95 Fix recognition bug reported by <[email protected]>.
187: 0.383 22-feb-95 Fix for conflict with VESA SCSI reported by
188: <[email protected]>
189: 0.384 17-mar-95 Fix a ring full bug reported by <[email protected]>
190: 0.385 3-apr-95 Fix a recognition bug reported by
191: <[email protected]>
192: 0.386 21-apr-95 Fix the last fix...sorry, must be galloping senility
193: 0.40 25-May-95 Rewrite for portability & updated.
194: ALPHA support from <[email protected]>
195: 0.41 26-Jun-95 Added verify_area() calls in depca_ioctl() from
196: suggestion by <[email protected]>
197: 0.42 27-Dec-95 Add 'mem' shared memory assigment for loadable
198: modules.
199: Add 'adapter_name' for loadable modules when no PROM.
200: Both above from a suggestion by
201: <[email protected]>.
202: Add new multicasting code.
203:
204: =========================================================================
205: */
206:
207: static const char *version = "depca.c:v0.42 95/12/27 [email protected]\n";
208:
209: #include <linux/module.h>
210:
211: #include <linux/kernel.h>
212: #include <linux/sched.h>
213: #include <linux/string.h>
214: #include <linux/ptrace.h>
215: #include <linux/errno.h>
216: #include <linux/ioport.h>
217: #include <linux/malloc.h>
218: #include <linux/interrupt.h>
219: #include <linux/delay.h>
220: #include <asm/segment.h>
221: #include <asm/bitops.h>
222: #include <asm/io.h>
223: #include <asm/dma.h>
224:
225: #include <linux/netdevice.h>
226: #include <linux/etherdevice.h>
227: #include <linux/skbuff.h>
228:
229: #include <linux/time.h>
230: #include <linux/types.h>
231: #include <linux/unistd.h>
232:
233: #include "depca.h"
234:
235: #ifdef DEPCA_DEBUG
236: static int depca_debug = DEPCA_DEBUG;
237: #else
238: static int depca_debug = 1;
239: #endif
240:
241: #define DEPCA_NDA 0xffe0 /* No Device Address */
242:
243: /*
244: ** Ethernet PROM defines
245: */
246: #define PROBE_LENGTH 32
247: #define ETH_PROM_SIG 0xAA5500FFUL
248:
249: /*
250: ** Set the number of Tx and Rx buffers. Ensure that the memory requested
251: ** here is <= to the amount of shared memory set up by the board switches.
252: ** The number of descriptors MUST BE A POWER OF 2.
253: **
254: ** total_memory = NUM_RX_DESC*(8+RX_BUFF_SZ) + NUM_TX_DESC*(8+TX_BUFF_SZ)
255: */
256: #define NUM_RX_DESC 8 /* Number of RX descriptors */
257: #define NUM_TX_DESC 8 /* Number of TX descriptors */
258: #define RX_BUFF_SZ 1536 /* Buffer size for each Rx buffer */
259: #define TX_BUFF_SZ 1536 /* Buffer size for each Tx buffer */
260:
261: #define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
262: #define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
263:
264: /*
265: ** EISA bus defines
266: */
267: #define DEPCA_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
268: #define MAX_EISA_SLOTS 16
269: #define EISA_SLOT_INC 0x1000
270:
271: /*
272: ** ISA Bus defines
273: */
274: #define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
275: #define DEPCA_IO_PORTS {0x300, 0x200, 0}
276: #define DEPCA_TOTAL_SIZE 0x10
277: static short mem_chkd = 0;
278:
279: /*
280: ** Name <-> Adapter mapping
281: */
282: #define DEPCA_SIGNATURE {"DEPCA",\
283: "DE100","DE101",\
284: "DE200","DE201","DE202",\
285: "DE210",\
286: "DE422",\
287: ""}
288: static enum {DEPCA, de100, de101, de200, de201, de202, de210, de422, unknown} adapter;
289:
290: /*
291: ** Miscellaneous info...
292: */
293: #define DEPCA_STRLEN 16
294: #define MAX_NUM_DEPCAS 2
295:
296: /*
297: ** Memory Alignment. Each descriptor is 4 longwords long. To force a
298: ** particular alignment on the TX descriptor, adjust DESC_SKIP_LEN and
299: ** DESC_ALIGN. ALIGN aligns the start address of the private memory area
300: ** and hence the RX descriptor ring's first entry.
301: */
302: #define ALIGN4 ((u_long)4 - 1) /* 1 longword align */
303: #define ALIGN8 ((u_long)8 - 1) /* 2 longword (quadword) align */
304: #define ALIGN ALIGN8 /* Keep the LANCE happy... */
305:
306: /*
307: ** The DEPCA Rx and Tx ring descriptors.
308: */
309: struct depca_rx_desc {
310: volatile s32 base;
311: s16 buf_length; /* This length is negative 2's complement! */
312: s16 msg_length; /* This length is "normal". */
313: };
314:
315: struct depca_tx_desc {
316: volatile s32 base;
317: s16 length; /* This length is negative 2's complement! */
318: s16 misc; /* Errors and TDR info */
319: };
320:
321: #define LA_MASK 0x0000ffff /* LANCE address mask for mapping network RAM
322: to LANCE memory address space */
323:
324: /*
325: ** The Lance initialization block, described in databook, in common memory.
326: */
327: struct depca_init {
328: u16 mode; /* Mode register */
329: u8 phys_addr[ETH_ALEN]; /* Physical ethernet address */
330: u8 mcast_table[8]; /* Multicast Hash Table. */
331: u32 rx_ring; /* Rx ring base pointer & ring length */
332: u32 tx_ring; /* Tx ring base pointer & ring length */
333: };
334:
335: #define DEPCA_PKT_STAT_SZ 16
336: #define DEPCA_PKT_BIN_SZ 128 /* Should be >=100 unless you
337: increase DEPCA_PKT_STAT_SZ */
338: struct depca_private {
339: char devname[DEPCA_STRLEN]; /* Device Product String */
340: char adapter_name[DEPCA_STRLEN];/* /proc/ioports string */
341: char adapter; /* Adapter type */
342: struct depca_rx_desc *rx_ring; /* Pointer to start of RX descriptor ring */
343: struct depca_tx_desc *tx_ring; /* Pointer to start of TX descriptor ring */
344: struct depca_init init_block;/* Shadow Initialization block */
345: char *rx_memcpy[NUM_RX_DESC]; /* CPU virt address of sh'd memory buffs */
346: char *tx_memcpy[NUM_TX_DESC]; /* CPU virt address of sh'd memory buffs */
347: u_long bus_offset; /* (E)ISA bus address offset vs LANCE */
348: u_long sh_mem; /* Physical start addr of shared mem area */
349: u_long dma_buffs; /* LANCE Rx and Tx buffers start address. */
350: int rx_new, tx_new; /* The next free ring entry */
351: int rx_old, tx_old; /* The ring entries to be free()ed. */
352: struct enet_statistics stats;
353: struct { /* Private stats counters */
354: u32 bins[DEPCA_PKT_STAT_SZ];
355: u32 unicast;
356: u32 multicast;
357: u32 broadcast;
358: u32 excessive_collisions;
359: u32 tx_underruns;
360: u32 excessive_underruns;
361: } pktStats;
362: int txRingMask; /* TX ring mask */
363: int rxRingMask; /* RX ring mask */
364: s32 rx_rlen; /* log2(rxRingMask+1) for the descriptors */
365: s32 tx_rlen; /* log2(txRingMask+1) for the descriptors */
366: };
367:
368: /*
369: ** The transmit ring full condition is described by the tx_old and tx_new
370: ** pointers by:
371: ** tx_old = tx_new Empty ring
372: ** tx_old = tx_new+1 Full ring
373: ** tx_old+txRingMask = tx_new Full ring (wrapped condition)
374: */
375: #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
376: lp->tx_old+lp->txRingMask-lp->tx_new:\
377: lp->tx_old -lp->tx_new-1)
378:
379: /*
380: ** Public Functions
381: */
382: static int depca_open(struct device *dev);
383: static int depca_start_xmit(struct sk_buff *skb, struct device *dev);
384: static void depca_interrupt(int irq, struct pt_regs * regs);
385: static int depca_close(struct device *dev);
386: static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd);
387: static struct enet_statistics *depca_get_stats(struct device *dev);
388: static void set_multicast_list(struct device *dev);
389:
390: /*
391: ** Private functions
392: */
393: static int depca_hw_init(struct device *dev, u_long ioaddr);
394: static void depca_init_ring(struct device *dev);
395: static int depca_rx(struct device *dev);
396: static int depca_tx(struct device *dev);
397:
398: static void LoadCSRs(struct device *dev);
399: static int InitRestartDepca(struct device *dev);
400: static void DepcaSignature(char *name, u_long paddr);
401: static int DevicePresent(u_long ioaddr);
402: static int get_hw_addr(struct device *dev);
403: static int EISA_signature(char *name, s32 eisa_id);
404: static void SetMulticastFilter(struct device *dev);
405: static void isa_probe(struct device *dev, u_long iobase);
406: static void eisa_probe(struct device *dev, u_long iobase);
407: static struct device *alloc_device(struct device *dev, u_long iobase);
408: static int load_packet(struct device *dev, struct sk_buff *skb);
409: static void depca_dbg_open(struct device *dev);
410:
411: #ifdef MODULE
412: int init_module(void);
413: void cleanup_module(void);
414: static int autoprobed = 1, loading_module = 1;
415: # else
416: static u_char de1xx_irq[] = {2,3,4,5,7,0};
417: static u_char de2xx_irq[] = {5,9,10,11,15,0};
418: static u_char de422_irq[] = {5,9,10,11,0};
419: static u_char *depca_irq;
420: static int autoprobed = 0, loading_module = 0;
421: #endif /* MODULE */
422:
423: static char name[DEPCA_STRLEN];
424: static int num_depcas = 0, num_eth = 0;
425: static int mem=0; /* For loadable module assignment
426: use insmod mem=0x????? .... */
427: static char *adapter_name = '\0'; /* If no PROM when loadable module
428: use insmod adapter_name=DE??? ...
429: */
430: /*
431: ** Miscellaneous defines...
432: */
433: #define STOP_DEPCA \
434: outw(CSR0, DEPCA_ADDR);\
435: outw(STOP, DEPCA_DATA)
436:
437:
438:
439: int depca_probe(struct device *dev)
440: {
441: int tmp = num_depcas, status = -ENODEV;
442: u_long iobase = dev->base_addr;
443:
444: if ((iobase == 0) && loading_module){
445: printk("Autoprobing is not supported when loading a module based driver.\n");
446: status = -EIO;
447: } else {
448: isa_probe(dev, iobase);
449: eisa_probe(dev, iobase);
450:
451: if ((tmp == num_depcas) && (iobase != 0) && loading_module) {
452: printk("%s: depca_probe() cannot find device at 0x%04lx.\n", dev->name,
453: iobase);
454: }
455:
456: /*
457: ** Walk the device list to check that at least one device
458: ** initialised OK
459: */
460: for (; (dev->priv == NULL) && (dev->next != NULL); dev = dev->next);
461:
462: if (dev->priv) status = 0;
463: if (iobase == 0) autoprobed = 1;
464: }
465:
466: return status;
467: }
468:
469: static int
470: depca_hw_init(struct device *dev, u_long ioaddr)
471: {
472: struct depca_private *lp;
473: int i, j, offset, netRAM, mem_len, status=0;
474: s16 nicsr;
475: u_long mem_start=0, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
476:
477: STOP_DEPCA;
478:
479: nicsr = inb(DEPCA_NICSR);
480: nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
481: outb(nicsr, DEPCA_NICSR);
482:
483: if (inw(DEPCA_DATA) == STOP) {
484: if (mem == 0) {
485: for (; mem_base[mem_chkd]; mem_chkd++) {
486: mem_start = mem_base[mem_chkd];
487: DepcaSignature(name, mem_start);
488: if (*name != '\0') break;
489: }
490: } else {
491: mem_start = mem;
492: if (adapter_name) {
493: strcpy(name, adapter_name);
494: } else{
495: DepcaSignature(name, mem_start);
496: }
497: }
498:
499: if ((*name != '\0') && mem_start) { /* found a DEPCA device */
500: dev->base_addr = ioaddr;
501:
502: if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {/* EISA slot address */
503: printk("%s: %s at 0x%04lx (EISA slot %d)",
504: dev->name, name, ioaddr, (int)((ioaddr>>12)&0x0f));
505: } else { /* ISA port address */
506: printk("%s: %s at 0x%04lx", dev->name, name, ioaddr);
507: }
508:
509: printk(", h/w address ");
510: status = get_hw_addr(dev);
511: for (i=0; i<ETH_ALEN - 1; i++) { /* get the ethernet address */
512: printk("%2.2x:", dev->dev_addr[i]);
513: }
514: printk("%2.2x", dev->dev_addr[i]);
515:
516: if (status == 0) {
517: /* Set up the maximum amount of network RAM(kB) */
518: netRAM = ((adapter != DEPCA) ? 64 : 48);
519: if ((nicsr & _128KB) && (adapter == de422)) netRAM = 128;
520: offset = 0x0000;
521:
522: /* Shared Memory Base Address */
523: if (nicsr & BUF) {
524: offset = 0x8000; /* 32kbyte RAM offset*/
525: nicsr &= ~BS; /* DEPCA RAM in top 32k */
526: netRAM -= 32;
527: }
528: mem_start += offset; /* (E)ISA start address */
529: if ((mem_len = (NUM_RX_DESC*(sizeof(struct depca_rx_desc)+RX_BUFF_SZ) +
530: NUM_TX_DESC*(sizeof(struct depca_tx_desc)+TX_BUFF_SZ) +
531: sizeof(struct depca_init))) <=
532: (netRAM<<10)) {
533: printk(",\n has %dkB RAM at 0x%.5lx", netRAM, mem_start);
534:
535: /* Enable the shadow RAM. */
536: if (adapter != DEPCA) {
537: nicsr |= SHE;
538: outb(nicsr, DEPCA_NICSR);
539: }
540:
541: /* Define the device private memory */
542: dev->priv = (void *) kmalloc(sizeof(struct depca_private), GFP_KERNEL);
543: if (dev->priv == NULL)
544: return -ENOMEM;
545: lp = (struct depca_private *)dev->priv;
546: memset((char *)dev->priv, 0, sizeof(struct depca_private));
547: lp->adapter = adapter;
548: sprintf(lp->adapter_name,"%s (%s)", name, dev->name);
549: request_region(ioaddr, DEPCA_TOTAL_SIZE, lp->adapter_name);
550:
551: /* Initialisation Block */
552: lp->sh_mem = mem_start;
553: mem_start += sizeof(struct depca_init);
554:
555: /* Tx & Rx descriptors (aligned to a quadword boundary) */
556: mem_start = (mem_start + ALIGN) & ~ALIGN;
557: lp->rx_ring = (struct depca_rx_desc *)mem_start;
558:
559: mem_start += (sizeof(struct depca_rx_desc) * NUM_RX_DESC);
560: lp->tx_ring = (struct depca_tx_desc *)mem_start;
561:
562: mem_start += (sizeof(struct depca_tx_desc) * NUM_TX_DESC);
563: lp->bus_offset = mem_start & 0x00ff0000;
564: mem_start &= LA_MASK; /* LANCE re-mapped start address */
565:
566: lp->dma_buffs = mem_start;
567:
568: /* Finish initialising the ring information. */
569: lp->rxRingMask = NUM_RX_DESC - 1;
570: lp->txRingMask = NUM_TX_DESC - 1;
571:
572: /* Calculate Tx/Rx RLEN size for the descriptors. */
573: for (i=0, j = lp->rxRingMask; j>0; i++) {
574: j >>= 1;
575: }
576: lp->rx_rlen = (s32)(i << 29);
577: for (i=0, j = lp->txRingMask; j>0; i++) {
578: j >>= 1;
579: }
580: lp->tx_rlen = (s32)(i << 29);
581:
582: /* Load the initialisation block */
583: depca_init_ring(dev);
584:
585: /* Initialise the control and status registers */
586: LoadCSRs(dev);
587:
588: /* Enable DEPCA board interrupts for autoprobing */
589: nicsr = ((nicsr & ~IM)|IEN);
590: outb(nicsr, DEPCA_NICSR);
591:
592: /* To auto-IRQ we enable the initialization-done and DMA err,
593: interrupts. For now we will always get a DMA error. */
594: if (dev->irq < 2) {
595: #ifndef MODULE
596: unsigned char irqnum;
597: autoirq_setup(0);
598:
599: /* Assign the correct irq list */
600: switch (lp->adapter) {
601: case DEPCA:
602: case de100:
603: case de101:
604: depca_irq = de1xx_irq;
605: break;
606: case de200:
607: case de201:
608: case de202:
609: case de210:
610: depca_irq = de2xx_irq;
611: break;
612: case de422:
613: depca_irq = de422_irq;
614: break;
615: }
616:
617: /* Trigger an initialization just for the interrupt. */
618: outw(INEA | INIT, DEPCA_DATA);
619:
620: irqnum = autoirq_report(1);
621: if (!irqnum) {
622: printk(" and failed to detect IRQ line.\n");
623: status = -ENXIO;
624: } else {
625: for (dev->irq=0,i=0; (depca_irq[i]) && (!dev->irq); i++) {
626: if (irqnum == depca_irq[i]) {
627: dev->irq = irqnum;
628: printk(" and uses IRQ%d.\n", dev->irq);
629: }
630: }
631:
632: if (!dev->irq) {
633: printk(" but incorrect IRQ line detected.\n");
634: status = -ENXIO;
635: }
636: }
637: #endif /* MODULE */
638: } else {
639: printk(" and assigned IRQ%d.\n", dev->irq);
640: }
641: if (status) release_region(ioaddr, DEPCA_TOTAL_SIZE);
642: } else {
643: printk(",\n requests %dkB RAM: only %dkB is available!\n",
644: (mem_len>>10), netRAM);
645: status = -ENXIO;
646: }
647: } else {
648: printk(" which has an Ethernet PROM CRC error.\n");
649: status = -ENXIO;
650: }
651: }
652: if (!status) {
653: if (depca_debug > 0) {
654: printk(version);
655: }
656:
657: /* The DEPCA-specific entries in the device structure. */
658: dev->open = &depca_open;
659: dev->hard_start_xmit = &depca_start_xmit;
660: dev->stop = &depca_close;
661: dev->get_stats = &depca_get_stats;
662: dev->set_multicast_list = &set_multicast_list;
663: dev->do_ioctl = &depca_ioctl;
664:
665: dev->mem_start = 0;
666:
667: /* Fill in the generic field of the device structure. */
668: ether_setup(dev);
669: } else { /* Incorrectly initialised hardware */
670: if (dev->priv) {
671: kfree_s(dev->priv, sizeof(struct depca_private));
672: dev->priv = NULL;
673: }
674: }
675: } else {
676: status = -ENXIO;
677: }
678:
679: return status;
680: }
681:
682:
683: static int
684: depca_open(struct device *dev)
685: {
686: struct depca_private *lp = (struct depca_private *)dev->priv;
687: u_long ioaddr = dev->base_addr;
688: s16 nicsr;
689: int status = 0;
690:
691: irq2dev_map[dev->irq] = dev;
692: STOP_DEPCA;
693: nicsr = inb(DEPCA_NICSR);
694:
695: /* Make sure the shadow RAM is enabled */
696: if (adapter != DEPCA) {
697: nicsr |= SHE;
698: outb(nicsr, DEPCA_NICSR);
699: }
700:
701: /* Re-initialize the DEPCA... */
702: depca_init_ring(dev);
703: LoadCSRs(dev);
704:
705: depca_dbg_open(dev);
706:
707: if (request_irq(dev->irq, &depca_interrupt, 0, lp->adapter_name)) {
708: printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
709: status = -EAGAIN;
710: } else {
711:
712: /* Enable DEPCA board interrupts and turn off LED */
713: nicsr = ((nicsr & ~IM & ~LED)|IEN);
714: outb(nicsr, DEPCA_NICSR);
715: outw(CSR0,DEPCA_ADDR);
716:
717: dev->tbusy = 0;
718: dev->interrupt = 0;
719: dev->start = 1;
720:
721: status = InitRestartDepca(dev);
722:
723: if (depca_debug > 1){
724: printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
725: printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
726: }
727: }
728:
729: MOD_INC_USE_COUNT;
730:
731: return status;
732: }
733:
734: /* Initialize the lance Rx and Tx descriptor rings. */
735: static void
736: depca_init_ring(struct device *dev)
737: {
738: struct depca_private *lp = (struct depca_private *)dev->priv;
739: u_int i;
740: u_long p;
741:
742: /* Lock out other processes whilst setting up the hardware */
743: set_bit(0, (void *)&dev->tbusy);
744:
745: lp->rx_new = lp->tx_new = 0;
746: lp->rx_old = lp->tx_old = 0;
747:
748: /* Initialize the base addresses and length of each buffer in the ring */
749: for (i = 0; i <= lp->rxRingMask; i++) {
750: writel((p=lp->dma_buffs+i*RX_BUFF_SZ) | R_OWN, &lp->rx_ring[i].base);
751: writew(-RX_BUFF_SZ, &lp->rx_ring[i].buf_length);
752: lp->rx_memcpy[i]=(char *)(p+lp->bus_offset);
753: }
754: for (i = 0; i <= lp->txRingMask; i++) {
755: writel((p=lp->dma_buffs+(i+lp->txRingMask+1)*TX_BUFF_SZ) & 0x00ffffff,
756: &lp->tx_ring[i].base);
757: lp->tx_memcpy[i]=(char *)(p+lp->bus_offset);
758: }
759:
760: /* Set up the initialization block */
761: lp->init_block.rx_ring = ((u32)((u_long)lp->rx_ring)&LA_MASK) | lp->rx_rlen;
762: lp->init_block.tx_ring = ((u32)((u_long)lp->tx_ring)&LA_MASK) | lp->tx_rlen;
763:
764: SetMulticastFilter(dev);
765:
766: for (i = 0; i < ETH_ALEN; i++) {
767: lp->init_block.phys_addr[i] = dev->dev_addr[i];
768: }
769:
770: lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */
771:
772: return;
773: }
774:
775: /*
776: ** Writes a socket buffer to TX descriptor ring and starts transmission
777: */
778: static int
779: depca_start_xmit(struct sk_buff *skb, struct device *dev)
780: {
781: struct depca_private *lp = (struct depca_private *)dev->priv;
782: u_long ioaddr = dev->base_addr;
783: int status = 0;
784:
785: /* Transmitter timeout, serious problems. */
786: if (dev->tbusy) {
787: int tickssofar = jiffies - dev->trans_start;
788: if (tickssofar < 1*HZ) {
789: status = -1;
790: } else {
791: printk("%s: transmit timed out, status %04x, resetting.\n",
792: dev->name, inw(DEPCA_DATA));
793:
794: STOP_DEPCA;
795: depca_init_ring(dev);
796: LoadCSRs(dev);
797: dev->interrupt = UNMASK_INTERRUPTS;
798: dev->start = 1;
799: dev->tbusy=0;
800: dev->trans_start = jiffies;
801: InitRestartDepca(dev);
802: }
803: return status;
804: } else if (skb == NULL) {
805: dev_tint(dev);
806: } else if (skb->len > 0) {
807: /* Enforce 1 process per h/w access */
808: if (set_bit(0, (void*)&dev->tbusy) != 0) {
809: printk("%s: Transmitter access conflict.\n", dev->name);
810: status = -1;
811: } else {
812: if (TX_BUFFS_AVAIL) { /* Fill in a Tx ring entry */
813: status = load_packet(dev, skb);
814:
815: if (!status) {
816: /* Trigger an immediate send demand. */
817: outw(CSR0, DEPCA_ADDR);
818: outw(INEA | TDMD, DEPCA_DATA);
819:
820: dev->trans_start = jiffies;
821: dev_kfree_skb(skb, FREE_WRITE);
822: }
823: if (TX_BUFFS_AVAIL) {
824: dev->tbusy=0;
825: }
826: } else {
827: status = -1;
828: }
829: }
830: }
831:
832: return status;
833: }
834:
835: /*
836: ** The DEPCA interrupt handler.
837: */
838: static void
839: depca_interrupt(int irq, struct pt_regs * regs)
840: {
841: struct device *dev = (struct device *)(irq2dev_map[irq]);
842: struct depca_private *lp;
843: s16 csr0, nicsr;
844: u_long ioaddr;
845:
846: if (dev == NULL) {
847: printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
848: } else {
849: lp = (struct depca_private *)dev->priv;
850: ioaddr = dev->base_addr;
851:
852: if (dev->interrupt)
853: printk("%s: Re-entering the interrupt handler.\n", dev->name);
854:
855: dev->interrupt = MASK_INTERRUPTS;
856:
857: /* mask the DEPCA board interrupts and turn on the LED */
858: nicsr = inb(DEPCA_NICSR);
859: nicsr |= (IM|LED);
860: outb(nicsr, DEPCA_NICSR);
861:
862: outw(CSR0, DEPCA_ADDR);
863: csr0 = inw(DEPCA_DATA);
864:
865: /* Acknowledge all of the current interrupt sources ASAP. */
866: outw(csr0 & INTE, DEPCA_DATA);
867:
868: if (csr0 & RINT) /* Rx interrupt (packet arrived) */
869: depca_rx(dev);
870:
871: if (csr0 & TINT) /* Tx interrupt (packet sent) */
872: depca_tx(dev);
873:
874: if ((TX_BUFFS_AVAIL >= 0) && dev->tbusy) { /* any resources available? */
875: dev->tbusy = 0; /* clear TX busy flag */
876: mark_bh(NET_BH);
877: }
878:
879: /* Unmask the DEPCA board interrupts and turn off the LED */
880: nicsr = (nicsr & ~IM & ~LED);
881: outb(nicsr, DEPCA_NICSR);
882:
883: dev->interrupt = UNMASK_INTERRUPTS;
884: }
885:
886: return;
887: }
888:
889: static int
890: depca_rx(struct device *dev)
891: {
892: struct depca_private *lp = (struct depca_private *)dev->priv;
893: int i, entry;
894: s32 status;
895:
896: for (entry=lp->rx_new;
897: !(readl(&lp->rx_ring[entry].base) & R_OWN);
898: entry=lp->rx_new){
899: status = readl(&lp->rx_ring[entry].base) >> 16 ;
900: if (status & R_STP) { /* Remember start of frame */
901: lp->rx_old = entry;
902: }
903: if (status & R_ENP) { /* Valid frame status */
904: if (status & R_ERR) { /* There was an error. */
905: lp->stats.rx_errors++; /* Update the error stats. */
906: if (status & R_FRAM) lp->stats.rx_frame_errors++;
907: if (status & R_OFLO) lp->stats.rx_over_errors++;
908: if (status & R_CRC) lp->stats.rx_crc_errors++;
909: if (status & R_BUFF) lp->stats.rx_fifo_errors++;
910: } else {
911: short len, pkt_len = readw(&lp->rx_ring[entry].msg_length);
912: struct sk_buff *skb;
913:
914: skb = dev_alloc_skb(pkt_len+2);
915: if (skb != NULL) {
916: unsigned char *buf;
917: skb_reserve(skb,2); /* 16 byte align the IP header */
918: buf = skb_put(skb,pkt_len);
919: skb->dev = dev;
920: if (entry < lp->rx_old) { /* Wrapped buffer */
921: len = (lp->rxRingMask - lp->rx_old + 1) * RX_BUFF_SZ;
922: memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], len);
923: memcpy_fromio(buf + len, lp->rx_memcpy[0], pkt_len-len);
924: } else { /* Linear buffer */
925: memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], pkt_len);
926: }
927:
928: /*
929: ** Notify the upper protocol layers that there is another
930: ** packet to handle
931: */
932: skb->protocol=eth_type_trans(skb,dev);
933: netif_rx(skb);
934:
935: /*
936: ** Update stats
937: */
938: lp->stats.rx_packets++;
939: for (i=1; i<DEPCA_PKT_STAT_SZ-1; i++) {
940: if (pkt_len < (i*DEPCA_PKT_BIN_SZ)) {
941: lp->pktStats.bins[i]++;
942: i = DEPCA_PKT_STAT_SZ;
943: }
944: }
945: if (buf[0] & 0x01) { /* Multicast/Broadcast */
946: if ((*(s16 *)&buf[0] == -1) &&
947: (*(s16 *)&buf[2] == -1) &&
948: (*(s16 *)&buf[4] == -1)) {
949: lp->pktStats.broadcast++;
950: } else {
951: lp->pktStats.multicast++;
952: }
953: } else if ((*(s16 *)&buf[0] == *(s16 *)&dev->dev_addr[0]) &&
954: (*(s16 *)&buf[2] == *(s16 *)&dev->dev_addr[2]) &&
955: (*(s16 *)&buf[4] == *(s16 *)&dev->dev_addr[4])) {
956: lp->pktStats.unicast++;
957: }
958:
959: lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
960: if (lp->pktStats.bins[0] == 0) { /* Reset counters */
961: memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats));
962: }
963: } else {
964: printk("%s: Memory squeeze, deferring packet.\n", dev->name);
965: lp->stats.rx_dropped++; /* Really, deferred. */
966: break;
967: }
968: }
969: /* Change buffer ownership for this last frame, back to the adapter */
970: for (; lp->rx_old!=entry; lp->rx_old=(++lp->rx_old)&lp->rxRingMask) {
971: writel(readl(&lp->rx_ring[lp->rx_old].base) | R_OWN,
972: &lp->rx_ring[lp->rx_old].base);
973: }
974: writel(readl(&lp->rx_ring[entry].base) | R_OWN, &lp->rx_ring[entry].base);
975: }
976:
977: /*
978: ** Update entry information
979: */
980: lp->rx_new = (++lp->rx_new) & lp->rxRingMask;
981: }
982:
983: return 0;
984: }
985:
986: /*
987: ** Buffer sent - check for buffer errors.
988: */
989: static int
990: depca_tx(struct device *dev)
991: {
992: struct depca_private *lp = (struct depca_private *)dev->priv;
993: int entry;
994: s32 status;
995: u_long ioaddr = dev->base_addr;
996:
997: for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) {
998: status = readl(&lp->tx_ring[entry].base) >> 16 ;
999:
1000: if (status < 0) { /* Packet not yet sent! */
1001: break;
1002: } else if (status & T_ERR) { /* An error occured. */
1003: status = readl(&lp->tx_ring[entry].misc);
1004: lp->stats.tx_errors++;
1005: if (status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1006: if (status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1007: if (status & TMD3_LCOL) lp->stats.tx_window_errors++;
1008: if (status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1009: if (status & (TMD3_BUFF | TMD3_UFLO)) {
1010: /* Trigger an immediate send demand. */
1011: outw(CSR0, DEPCA_ADDR);
1012: outw(INEA | TDMD, DEPCA_DATA);
1013: }
1014: } else if (status & (T_MORE | T_ONE)) {
1015: lp->stats.collisions++;
1016: } else {
1017: lp->stats.tx_packets++;
1018: }
1019:
1020: /* Update all the pointers */
1021: lp->tx_old = (++lp->tx_old) & lp->txRingMask;
1022: }
1023:
1024: return 0;
1025: }
1026:
1027: static int
1028: depca_close(struct device *dev)
1029: {
1030: struct depca_private *lp = (struct depca_private *)dev->priv;
1031: s16 nicsr;
1032: u_long ioaddr = dev->base_addr;
1033:
1034: dev->start = 0;
1035: dev->tbusy = 1;
1036:
1037: outw(CSR0, DEPCA_ADDR);
1038:
1039: if (depca_debug > 1) {
1040: printk("%s: Shutting down ethercard, status was %2.2x.\n",
1041: dev->name, inw(DEPCA_DATA));
1042: }
1043:
1044: /*
1045: ** We stop the DEPCA here -- it occasionally polls
1046: ** memory if we don't.
1047: */
1048: outw(STOP, DEPCA_DATA);
1049:
1050: /*
1051: ** Give back the ROM in case the user wants to go to DOS
1052: */
1053: if (lp->adapter != DEPCA) {
1054: nicsr = inb(DEPCA_NICSR);
1055: nicsr &= ~SHE;
1056: outb(nicsr, DEPCA_NICSR);
1057: }
1058:
1059: /*
1060: ** Free the associated irq
1061: */
1062: free_irq(dev->irq);
1063: irq2dev_map[dev->irq] = NULL;
1064:
1065: MOD_DEC_USE_COUNT;
1066:
1067: return 0;
1068: }
1069:
1070: static void LoadCSRs(struct device *dev)
1071: {
1072: struct depca_private *lp = (struct depca_private *)dev->priv;
1073: u_long ioaddr = dev->base_addr;
1074:
1075: outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */
1076: outw((u16)(lp->sh_mem & LA_MASK), DEPCA_DATA);
1077: outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */
1078: outw((u16)((lp->sh_mem & LA_MASK) >> 16), DEPCA_DATA);
1079: outw(CSR3, DEPCA_ADDR); /* ALE control */
1080: outw(ACON, DEPCA_DATA);
1081:
1082: outw(CSR0, DEPCA_ADDR); /* Point back to CSR0 */
1083:
1084: return;
1085: }
1086:
1087: static int InitRestartDepca(struct device *dev)
1088: {
1089: struct depca_private *lp = (struct depca_private *)dev->priv;
1090: u_long ioaddr = dev->base_addr;
1091: int i, status=0;
1092:
1093: /* Copy the shadow init_block to shared memory */
1094: memcpy_toio((char *)lp->sh_mem, &lp->init_block, sizeof(struct depca_init));
1095:
1096: outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */
1097: outw(INIT, DEPCA_DATA); /* initialize DEPCA */
1098:
1099: /* wait for lance to complete initialisation */
1100: for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1101:
1102: if (i!=100) {
1103: /* clear IDON by writing a "1", enable interrupts and start lance */
1104: outw(IDON | INEA | STRT, DEPCA_DATA);
1105: if (depca_debug > 2) {
1106: printk("%s: DEPCA open after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1107: dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1108: }
1109: } else {
1110: printk("%s: DEPCA unopen after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1111: dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1112: status = -1;
1113: }
1114:
1115: return status;
1116: }
1117:
1118: static struct enet_statistics *
1119: depca_get_stats(struct device *dev)
1120: {
1121: struct depca_private *lp = (struct depca_private *)dev->priv;
1122:
1123: /* Null body since there is no framing error counter */
1124:
1125: return &lp->stats;
1126: }
1127:
1128: /*
1129: ** Set or clear the multicast filter for this adaptor.
1130: */
1131: static void
1132: set_multicast_list(struct device *dev)
1133: {
1134: struct depca_private *lp = (struct depca_private *)dev->priv;
1135: u_long ioaddr = dev->base_addr;
1136:
1137: if (irq2dev_map[dev->irq] != NULL) {
1138: while(dev->tbusy); /* Stop ring access */
1139: set_bit(0, (void*)&dev->tbusy);
1140: while(lp->tx_old != lp->tx_new); /* Wait for the ring to empty */
1141:
1142: STOP_DEPCA; /* Temporarily stop the depca. */
1143: depca_init_ring(dev); /* Initialize the descriptor rings */
1144:
1145: if (dev->flags & IFF_PROMISC) { /* Set promiscuous mode */
1146: lp->init_block.mode |= PROM;
1147: } else {
1148: SetMulticastFilter(dev);
1149: lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */
1150: }
1151:
1152: LoadCSRs(dev); /* Reload CSR3 */
1153: InitRestartDepca(dev); /* Resume normal operation. */
1154: dev->tbusy = 0; /* Unlock the TX ring */
1155: }
1156: }
1157:
1158: /*
1159: ** Calculate the hash code and update the logical address filter
1160: ** from a list of ethernet multicast addresses.
1161: ** Big endian crc one liner is mine, all mine, ha ha ha ha!
1162: ** LANCE calculates its hash codes big endian.
1163: */
1164: static void SetMulticastFilter(struct device *dev)
1165: {
1166: struct depca_private *lp = (struct depca_private *)dev->priv;
1167: struct dev_mc_list *dmi=dev->mc_list;
1168: char *addrs;
1169: int i, j, bit, byte;
1170: u16 hashcode;
1171: s32 crc, poly = CRC_POLYNOMIAL_BE;
1172:
1173: if (dev->flags & IFF_ALLMULTI) { /* Set all multicast bits */
1174: for (i=0; i<(HASH_TABLE_LEN>>3); i++) {
1175: lp->init_block.mcast_table[i] = (char)0xff;
1176: }
1177: } else {
1178: for (i=0; i<(HASH_TABLE_LEN>>3); i++){ /* Clear the multicast table */
1179: lp->init_block.mcast_table[i]=0;
1180: }
1181: /* Add multicast addresses */
1182: for (i=0;i<dev->mc_count;i++) { /* for each address in the list */
1183: addrs=dmi->dmi_addr;
1184: dmi=dmi->next;
1185: if ((*addrs & 0x01) == 1) { /* multicast address? */
1186: crc = 0xffffffff; /* init CRC for each address */
1187: for (byte=0;byte<ETH_ALEN;byte++) {/* for each address byte */
1188: /* process each address bit */
1189: for (bit = *addrs++,j=0;j<8;j++, bit>>=1) {
1190: crc = (crc << 1) ^ ((((crc<0?1:0) ^ bit) & 0x01) ? poly : 0);
1191: }
1192: }
1193: hashcode = (crc & 1); /* hashcode is 6 LSb of CRC ... */
1194: for (j=0;j<5;j++) { /* ... in reverse order. */
1195: hashcode = (hashcode << 1) | ((crc>>=1) & 1);
1196: }
1197:
1198:
1199: byte = hashcode >> 3; /* bit[3-5] -> byte in filter */
1200: bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1201: lp->init_block.mcast_table[byte] |= bit;
1202: }
1203: }
1204: }
1205:
1206: return;
1207: }
1208:
1209: /*
1210: ** ISA bus I/O device probe
1211: */
1212: static void isa_probe(struct device *dev, u_long ioaddr)
1213: {
1214: int i = num_depcas, maxSlots;
1215: s32 ports[] = DEPCA_IO_PORTS;
1216:
1217: if (!ioaddr && autoprobed) return ; /* Been here before ! */
1218: if (ioaddr > 0x400) return; /* EISA Address */
1219: if (i >= MAX_NUM_DEPCAS) return; /* Too many ISA adapters */
1220:
1221: if (ioaddr == 0) { /* Autoprobing */
1222: maxSlots = MAX_NUM_DEPCAS;
1223: } else { /* Probe a specific location */
1224: ports[i] = ioaddr;
1225: maxSlots = i + 1;
1226: }
1227:
1228: for (; (i<maxSlots) && (dev!=NULL) && ports[i]; i++) {
1229: if (DevicePresent(ports[i]) == 0) {
1230: if (check_region(ports[i], DEPCA_TOTAL_SIZE) == 0) {
1231: if ((dev = alloc_device(dev, ports[i])) != NULL) {
1232: if (depca_hw_init(dev, ports[i]) == 0) {
1233: num_depcas++;
1234: }
1235: num_eth++;
1236: }
1237: } else if (autoprobed) {
1238: printk("%s: region already allocated at 0x%04x.\n", dev->name,ports[i]);
1239: }
1240: }
1241: }
1242:
1243: return;
1244: }
1245:
1246: /*
1247: ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1248: ** the motherboard. Upto 15 EISA devices are supported.
1249: */
1250: static void eisa_probe(struct device *dev, u_long ioaddr)
1251: {
1252: int i, maxSlots;
1253: u_long iobase;
1254: char name[DEPCA_STRLEN];
1255:
1256: if (!ioaddr && autoprobed) return ; /* Been here before ! */
1257: if ((ioaddr < 0x400) && (ioaddr > 0)) return; /* ISA Address */
1258:
1259: if (ioaddr == 0) { /* Autoprobing */
1260: iobase = EISA_SLOT_INC; /* Get the first slot address */
1261: i = 1;
1262: maxSlots = MAX_EISA_SLOTS;
1263: } else { /* Probe a specific location */
1264: iobase = ioaddr;
1265: i = (ioaddr >> 12);
1266: maxSlots = i + 1;
1267: }
1268: if ((iobase & 0x0fff) == 0) iobase += DEPCA_EISA_IO_PORTS;
1269:
1270: for (; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) {
1271: if (EISA_signature(name, EISA_ID)) {
1272: if (DevicePresent(iobase) == 0) {
1273: if (check_region(iobase, DEPCA_TOTAL_SIZE) == 0) {
1274: if ((dev = alloc_device(dev, iobase)) != NULL) {
1275: if (depca_hw_init(dev, iobase) == 0) {
1276: num_depcas++;
1277: }
1278: num_eth++;
1279: }
1280: } else if (autoprobed) {
1281: printk("%s: region already allocated at 0x%04lx.\n",dev->name,iobase);
1282: }
1283: }
1284: }
1285: }
1286:
1287: return;
1288: }
1289:
1290: /*
1291: ** Allocate the device by pointing to the next available space in the
1292: ** device structure. Should one not be available, it is created.
1293: */
1294: static struct device *alloc_device(struct device *dev, u_long iobase)
1295: {
1296: int addAutoProbe = 0;
1297: struct device *tmp = NULL, *ret;
1298: int (*init)(struct device *) = NULL;
1299:
1300: /*
1301: ** Check the device structures for an end of list or unused device
1302: */
1303: if (!loading_module) {
1304: while (dev->next != NULL) {
1305: if ((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0)) break;
1306: dev = dev->next; /* walk through eth device list */
1307: num_eth++; /* increment eth device number */
1308: }
1309:
1310: /*
1311: ** If an autoprobe is requested for another device, we must re-insert
1312: ** the request later in the list. Remember the current information.
1313: */
1314: if ((dev->base_addr == 0) && (num_depcas > 0)) {
1315: addAutoProbe++;
1316: tmp = dev->next; /* point to the next device */
1317: init = dev->init; /* remember the probe function */
1318: }
1319:
1320: /*
1321: ** If at end of list and can't use current entry, malloc one up.
1322: ** If memory could not be allocated, print an error message.
1323: */
1324: if ((dev->next == NULL) &&
1325: !((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0))){
1326: dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1327: GFP_KERNEL);
1328:
1329: dev = dev->next; /* point to the new device */
1330: if (dev == NULL) {
1331: printk("eth%d: Device not initialised, insufficient memory\n",
1332: num_eth);
1333: } else {
1334: /*
1335: ** If the memory was allocated, point to the new memory area
1336: ** and initialize it (name, I/O address, next device (NULL) and
1337: ** initialisation probe routine).
1338: */
1339: dev->name = (char *)(dev + sizeof(struct device));
1340: if (num_eth > 9999) {
1341: sprintf(dev->name,"eth????"); /* New device name */
1342: } else {
1343: sprintf(dev->name,"eth%d", num_eth);/* New device name */
1344: }
1345: dev->base_addr = iobase; /* assign the io address */
1346: dev->next = NULL; /* mark the end of list */
1347: dev->init = &depca_probe; /* initialisation routine */
1348: num_depcas++;
1349: }
1350: }
1351: ret = dev; /* return current struct, or NULL */
1352:
1353: /*
1354: ** Now figure out what to do with the autoprobe that has to be inserted.
1355: ** Firstly, search the (possibly altered) list for an empty space.
1356: */
1357: if (ret != NULL) {
1358: if (addAutoProbe) {
1359: for (;(tmp->next!=NULL) && (tmp->base_addr!=DEPCA_NDA); tmp=tmp->next);
1360:
1361: /*
1362: ** If no more device structures and can't use the current one, malloc
1363: ** one up. If memory could not be allocated, print an error message.
1364: */
1365: if ((tmp->next == NULL) && !(tmp->base_addr == DEPCA_NDA)) {
1366: tmp->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1367: GFP_KERNEL);
1368: tmp = tmp->next; /* point to the new device */
1369: if (tmp == NULL) {
1370: printk("%s: Insufficient memory to extend the device list.\n",
1371: dev->name);
1372: } else {
1373: /*
1374: ** If the memory was allocated, point to the new memory area
1375: ** and initialize it (name, I/O address, next device (NULL) and
1376: ** initialisation probe routine).
1377: */
1378: tmp->name = (char *)(tmp + sizeof(struct device));
1379: if (num_eth > 9999) {
1380: sprintf(tmp->name,"eth????"); /* New device name */
1381: } else {
1382: sprintf(tmp->name,"eth%d", num_eth);/* New device name */
1383: }
1384: tmp->base_addr = 0; /* re-insert the io address */
1385: tmp->next = NULL; /* mark the end of list */
1386: tmp->init = init; /* initialisation routine */
1387: }
1388: } else { /* structure already exists */
1389: tmp->base_addr = 0; /* re-insert the io address */
1390: }
1391: }
1392: }
1393: } else {
1394: ret = dev;
1395: }
1396:
1397: return ret;
1398: }
1399:
1400: /*
1401: ** Look for a particular board name in the on-board Remote Diagnostics
1402: ** and Boot (readb) ROM. This will also give us a clue to the network RAM
1403: ** base address.
1404: */
1405: static void DepcaSignature(char *name, u_long paddr)
1406: {
1407: u_int i,j,k;
1408: const char *signatures[] = DEPCA_SIGNATURE;
1409: char tmpstr[16];
1410:
1411: for (i=0;i<16;i++) { /* copy the first 16 bytes of ROM to */
1412: tmpstr[i] = readb(paddr+0xc000+i); /* a temporary string */
1413: }
1414:
1415: strcpy(name,"");
1416: for (i=0;*signatures[i]!='\0' && *name=='\0';i++) {
1417: for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {
1418: if (signatures[i][k] == tmpstr[j]) { /* track signature */
1419: k++;
1420: } else { /* lost signature; begin search again */
1421: k=0;
1422: }
1423: }
1424: if (k == strlen(signatures[i])) {
1425: strcpy(name,signatures[i]);
1426: }
1427: }
1428:
1429: adapter = i - 1;
1430:
1431: return;
1432: }
1433:
1434: /*
1435: ** Look for a special sequence in the Ethernet station address PROM that
1436: ** is common across all DEPCA products. Note that the original DEPCA needs
1437: ** its ROM address counter to be initialized and enabled. Only enable
1438: ** if the first address octet is a 0x08 - this minimises the chances of
1439: ** messing around with some other hardware, but it assumes that this DEPCA
1440: ** card initialized itself correctly.
1441: **
1442: ** Search the Ethernet address ROM for the signature. Since the ROM address
1443: ** counter can start at an arbitrary point, the search must include the entire
1444: ** probe sequence length plus the (length_of_the_signature - 1).
1445: ** Stop the search IMMEDIATELY after the signature is found so that the
1446: ** PROM address counter is correctly positioned at the start of the
1447: ** ethernet address for later read out.
1448: */
1449: static int DevicePresent(u_long ioaddr)
1450: {
1451: union {
1452: struct {
1453: u32 a;
1454: u32 b;
1455: } llsig;
1456: char Sig[sizeof(u32) << 1];
1457: } dev;
1458: short sigLength=0;
1459: s8 data;
1460: s16 nicsr;
1461: int i, j, status = 0;
1462:
1463: data = inb(DEPCA_PROM); /* clear counter on DEPCA */
1464: data = inb(DEPCA_PROM); /* read data */
1465:
1466: if (data == 0x08) { /* Enable counter on DEPCA */
1467: nicsr = inb(DEPCA_NICSR);
1468: nicsr |= AAC;
1469: outb(nicsr, DEPCA_NICSR);
1470: }
1471:
1472: dev.llsig.a = ETH_PROM_SIG;
1473: dev.llsig.b = ETH_PROM_SIG;
1474: sigLength = sizeof(u32) << 1;
1475:
1476: for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1477: data = inb(DEPCA_PROM);
1478: if (dev.Sig[j] == data) { /* track signature */
1479: j++;
1480: } else { /* lost signature; begin search again */
1481: if (data == dev.Sig[0]) { /* rare case.... */
1482: j=1;
1483: } else {
1484: j=0;
1485: }
1486: }
1487: }
1488:
1489: if (j!=sigLength) {
1490: status = -ENODEV; /* search failed */
1491: }
1492:
1493: return status;
1494: }
1495:
1496: /*
1497: ** The DE100 and DE101 PROM accesses were made non-standard for some bizarre
1498: ** reason: access the upper half of the PROM with x=0; access the lower half
1499: ** with x=1.
1500: */
1501: static int get_hw_addr(struct device *dev)
1502: {
1503: u_long ioaddr = dev->base_addr;
1504: int i, k, tmp, status = 0;
1505: u_short j, x, chksum;
1506:
1507: x = (((adapter == de100) || (adapter == de101)) ? 1 : 0);
1508:
1509: for (i=0,k=0,j=0;j<3;j++) {
1510: k <<= 1 ;
1511: if (k > 0xffff) k-=0xffff;
1512:
1513: k += (u_char) (tmp = inb(DEPCA_PROM + x));
1514: dev->dev_addr[i++] = (u_char) tmp;
1515: k += (u_short) ((tmp = inb(DEPCA_PROM + x)) << 8);
1516: dev->dev_addr[i++] = (u_char) tmp;
1517:
1518: if (k > 0xffff) k-=0xffff;
1519: }
1520: if (k == 0xffff) k=0;
1521:
1522: chksum = (u_char) inb(DEPCA_PROM + x);
1523: chksum |= (u_short) (inb(DEPCA_PROM + x) << 8);
1524: if (k != chksum) status = -1;
1525:
1526: return status;
1527: }
1528:
1529: /*
1530: ** Load a packet into the shared memory
1531: */
1532: static int load_packet(struct device *dev, struct sk_buff *skb)
1533: {
1534: struct depca_private *lp = (struct depca_private *)dev->priv;
1535: int i, entry, end, len, status = 0;
1536:
1537: entry = lp->tx_new; /* Ring around buffer number. */
1538: end = (entry + (skb->len - 1) / TX_BUFF_SZ) & lp->txRingMask;
1539: if (!(readl(&lp->tx_ring[end].base) & T_OWN)) {/* Enough room? */
1540: /*
1541: ** Caution: the write order is important here... don't set up the
1542: ** ownership rights until all the other information is in place.
1543: */
1544: if (end < entry) { /* wrapped buffer */
1545: len = (lp->txRingMask - entry + 1) * TX_BUFF_SZ;
1546: memcpy_toio(lp->tx_memcpy[entry], skb->data, len);
1547: memcpy_toio(lp->tx_memcpy[0], skb->data + len, skb->len - len);
1548: } else { /* linear buffer */
1549: memcpy_toio(lp->tx_memcpy[entry], skb->data, skb->len);
1550: }
1551:
1552: /* set up the buffer descriptors */
1553: len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
1554: for (i = entry; i != end; i = (++i) & lp->txRingMask) {
1555: /* clean out flags */
1556: writel(readl(&lp->tx_ring[i].base) & ~T_FLAGS, &lp->tx_ring[i].base);
1557: writew(0x0000, &lp->tx_ring[i].misc); /* clears other error flags */
1558: writew(-TX_BUFF_SZ, &lp->tx_ring[i].length);/* packet length in buffer */
1559: len -= TX_BUFF_SZ;
1560: }
1561: /* clean out flags */
1562: writel(readl(&lp->tx_ring[end].base) & ~T_FLAGS, &lp->tx_ring[end].base);
1563: writew(0x0000, &lp->tx_ring[end].misc); /* clears other error flags */
1564: writew(-len, &lp->tx_ring[end].length); /* packet length in last buff */
1565:
1566: /* start of packet */
1567: writel(readl(&lp->tx_ring[entry].base) | T_STP, &lp->tx_ring[entry].base);
1568: /* end of packet */
1569: writel(readl(&lp->tx_ring[end].base) | T_ENP, &lp->tx_ring[end].base);
1570:
1571: for (i=end; i!=entry; --i) {
1572: /* ownership of packet */
1573: writel(readl(&lp->tx_ring[i].base) | T_OWN, &lp->tx_ring[i].base);
1574: if (i == 0) i=lp->txRingMask+1;
1575: }
1576: writel(readl(&lp->tx_ring[entry].base) | T_OWN, &lp->tx_ring[entry].base);
1577:
1578: lp->tx_new = (++end) & lp->txRingMask; /* update current pointers */
1579: } else {
1580: status = -1;
1581: }
1582:
1583: return status;
1584: }
1585:
1586: /*
1587: ** Look for a particular board name in the EISA configuration space
1588: */
1589: static int EISA_signature(char *name, s32 eisa_id)
1590: {
1591: u_int i;
1592: const char *signatures[] = DEPCA_SIGNATURE;
1593: char ManCode[DEPCA_STRLEN];
1594: union {
1595: s32 ID;
1596: char Id[4];
1597: } Eisa;
1598: int status = 0;
1599:
1600: *name = '\0';
1601: Eisa.ID = inl(eisa_id);
1602:
1603: ManCode[0]=(((Eisa.Id[0]>>2)&0x1f)+0x40);
1604: ManCode[1]=(((Eisa.Id[1]&0xe0)>>5)+((Eisa.Id[0]&0x03)<<3)+0x40);
1605: ManCode[2]=(((Eisa.Id[2]>>4)&0x0f)+0x30);
1606: ManCode[3]=(( Eisa.Id[2]&0x0f)+0x30);
1607: ManCode[4]=(((Eisa.Id[3]>>4)&0x0f)+0x30);
1608: ManCode[5]='\0';
1609:
1610: for (i=0;(*signatures[i] != '\0') && (*name == '\0');i++) {
1611: if (strstr(ManCode, signatures[i]) != NULL) {
1612: strcpy(name,ManCode);
1613: status = 1;
1614: }
1615: }
1616:
1617: return status;
1618: }
1619:
1620: static void depca_dbg_open(struct device *dev)
1621: {
1622: struct depca_private *lp = (struct depca_private *)dev->priv;
1623: u_long ioaddr = dev->base_addr;
1624: struct depca_init *p = (struct depca_init *)lp->sh_mem;
1625: int i;
1626:
1627: if (depca_debug > 1){
1628: /* Copy the shadow init_block to shared memory */
1629: memcpy_toio((char *)lp->sh_mem,&lp->init_block,sizeof(struct depca_init));
1630:
1631: printk("%s: depca open with irq %d\n",dev->name,dev->irq);
1632: printk("Descriptor head addresses:\n");
1633: printk("\t0x%lx 0x%lx\n",(u_long)lp->rx_ring, (u_long)lp->tx_ring);
1634: printk("Descriptor addresses:\nRX: ");
1635: for (i=0;i<lp->rxRingMask;i++){
1636: if (i < 3) {
1637: printk("0x%8.8lx ", (long) &lp->rx_ring[i].base);
1638: }
1639: }
1640: printk("...0x%8.8lx\n", (long) &lp->rx_ring[i].base);
1641: printk("TX: ");
1642: for (i=0;i<lp->txRingMask;i++){
1643: if (i < 3) {
1644: printk("0x%8.8lx ", (long) &lp->tx_ring[i].base);
1645: }
1646: }
1647: printk("...0x%8.8lx\n", (long) &lp->tx_ring[i].base);
1648: printk("\nDescriptor buffers:\nRX: ");
1649: for (i=0;i<lp->rxRingMask;i++){
1650: if (i < 3) {
1651: printk("0x%8.8x ", (u32) readl(&lp->rx_ring[i].base));
1652: }
1653: }
1654: printk("...0x%8.8x\n", (u32) readl(&lp->rx_ring[i].base));
1655: printk("TX: ");
1656: for (i=0;i<lp->txRingMask;i++){
1657: if (i < 3) {
1658: printk("0x%8.8x ", (u32) readl(&lp->tx_ring[i].base));
1659: }
1660: }
1661: printk("...0x%8.8x\n", (u32) readl(&lp->tx_ring[i].base));
1662: printk("Initialisation block at 0x%8.8lx\n",lp->sh_mem);
1663: printk("\tmode: 0x%4.4x\n", (u16) readw(&p->mode));
1664: printk("\tphysical address: ");
1665: for (i=0;i<ETH_ALEN-1;i++){
1666: printk("%2.2x:",(u_char)readb(&p->phys_addr[i]));
1667: }
1668: printk("%2.2x\n",(u_char)readb(&p->phys_addr[i]));
1669: printk("\tmulticast hash table: ");
1670: for (i=0;i<(HASH_TABLE_LEN >> 3)-1;i++){
1671: printk("%2.2x:",(u_char)readb(&p->mcast_table[i]));
1672: }
1673: printk("%2.2x\n",(u_char)readb(&p->mcast_table[i]));
1674: printk("\trx_ring at: 0x%8.8x\n", (u32) readl(&p->rx_ring));
1675: printk("\ttx_ring at: 0x%8.8x\n", (u32) readl(&p->tx_ring));
1676: printk("dma_buffs: 0x%8.8lx\n",lp->dma_buffs);
1677: printk("Ring size:\nRX: %d Log2(rxRingMask): 0x%8.8x\n",
1678: (int)lp->rxRingMask + 1,
1679: lp->rx_rlen);
1680: printk("TX: %d Log2(txRingMask): 0x%8.8x\n",
1681: (int)lp->txRingMask + 1,
1682: lp->tx_rlen);
1683: outw(CSR2,DEPCA_ADDR);
1684: printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
1685: outw(CSR1,DEPCA_ADDR);
1686: printk("%4.4x\n",inw(DEPCA_DATA));
1687: outw(CSR3,DEPCA_ADDR);
1688: printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
1689: }
1690:
1691: return;
1692: }
1693:
1694: /*
1695: ** Perform IOCTL call functions here. Some are privileged operations and the
1696: ** effective uid is checked in those cases.
1697: ** All MCA IOCTLs will not work here and are for testing purposes only.
1698: */
1699: static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd)
1700: {
1701: struct depca_private *lp = (struct depca_private *)dev->priv;
1702: struct depca_ioctl *ioc = (struct depca_ioctl *) &rq->ifr_data;
1703: int i, status = 0;
1704: u_long ioaddr = dev->base_addr;
1705: union {
1706: u8 addr[(HASH_TABLE_LEN * ETH_ALEN)];
1707: u16 sval[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1708: u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];
1709: } tmp;
1710:
1711: switch(ioc->cmd) {
1712: case DEPCA_GET_HWADDR: /* Get the hardware address */
1713: for (i=0; i<ETH_ALEN; i++) {
1714: tmp.addr[i] = dev->dev_addr[i];
1715: }
1716: ioc->len = ETH_ALEN;
1717: if (!(status = verify_area(VERIFY_WRITE, (void *)ioc->data, ioc->len))) {
1718: memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1719: }
1720:
1721: break;
1722: case DEPCA_SET_HWADDR: /* Set the hardware address */
1723: if (suser()) {
1724: if (!(status = verify_area(VERIFY_READ, (void *)ioc->data, ETH_ALEN))) {
1725: memcpy_fromfs(tmp.addr,ioc->data,ETH_ALEN);
1726: for (i=0; i<ETH_ALEN; i++) {
1727: dev->dev_addr[i] = tmp.addr[i];
1728: }
1729: while(dev->tbusy); /* Stop ring access */
1730: set_bit(0, (void*)&dev->tbusy);
1731: while(lp->tx_old != lp->tx_new);/* Wait for the ring to empty */
1732:
1733: STOP_DEPCA; /* Temporarily stop the depca. */
1734: depca_init_ring(dev); /* Initialize the descriptor rings */
1735: LoadCSRs(dev); /* Reload CSR3 */
1736: InitRestartDepca(dev); /* Resume normal operation. */
1737: dev->tbusy = 0; /* Unlock the TX ring */
1738: }
1739: } else {
1740: status = -EPERM;
1741: }
1742:
1743: break;
1744: case DEPCA_SET_PROM: /* Set Promiscuous Mode */
1745: if (suser()) {
1746: while(dev->tbusy); /* Stop ring access */
1747: set_bit(0, (void*)&dev->tbusy);
1748: while(lp->tx_old != lp->tx_new); /* Wait for the ring to empty */
1749:
1750: STOP_DEPCA; /* Temporarily stop the depca. */
1751: depca_init_ring(dev); /* Initialize the descriptor rings */
1752: lp->init_block.mode |= PROM; /* Set promiscuous mode */
1753:
1754: LoadCSRs(dev); /* Reload CSR3 */
1755: InitRestartDepca(dev); /* Resume normal operation. */
1756: dev->tbusy = 0; /* Unlock the TX ring */
1757: } else {
1758: status = -EPERM;
1759: }
1760:
1761: break;
1762: case DEPCA_CLR_PROM: /* Clear Promiscuous Mode */
1763: if (suser()) {
1764: while(dev->tbusy); /* Stop ring access */
1765: set_bit(0, (void*)&dev->tbusy);
1766: while(lp->tx_old != lp->tx_new); /* Wait for the ring to empty */
1767:
1768: STOP_DEPCA; /* Temporarily stop the depca. */
1769: depca_init_ring(dev); /* Initialize the descriptor rings */
1770: lp->init_block.mode &= ~PROM; /* Clear promiscuous mode */
1771:
1772: LoadCSRs(dev); /* Reload CSR3 */
1773: InitRestartDepca(dev); /* Resume normal operation. */
1774: dev->tbusy = 0; /* Unlock the TX ring */
1775: } else {
1776: status = -EPERM;
1777: }
1778:
1779: break;
1780: case DEPCA_SAY_BOO: /* Say "Boo!" to the kernel log file */
1781: printk("%s: Boo!\n", dev->name);
1782:
1783: break;
1784: case DEPCA_GET_MCA: /* Get the multicast address table */
1785: ioc->len = (HASH_TABLE_LEN >> 3);
1786: if (!(status = verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1787: memcpy_tofs(ioc->data, lp->init_block.mcast_table, ioc->len);
1788: }
1789:
1790: break;
1791: case DEPCA_SET_MCA: /* Set a multicast address */
1792: if (suser()) {
1793: if (!(status=verify_area(VERIFY_READ, ioc->data, ETH_ALEN*ioc->len))) {
1794: memcpy_fromfs(tmp.addr, ioc->data, ETH_ALEN * ioc->len);
1795: set_multicast_list(dev);
1796: }
1797: } else {
1798: status = -EPERM;
1799: }
1800:
1801: break;
1802: case DEPCA_CLR_MCA: /* Clear all multicast addresses */
1803: if (suser()) {
1804: set_multicast_list(dev);
1805: } else {
1806: status = -EPERM;
1807: }
1808:
1809: break;
1810: case DEPCA_MCA_EN: /* Enable pass all multicast addressing */
1811: if (suser()) {
1812: set_multicast_list(dev);
1813: } else {
1814: status = -EPERM;
1815: }
1816:
1817: break;
1818: case DEPCA_GET_STATS: /* Get the driver statistics */
1819: cli();
1820: ioc->len = sizeof(lp->pktStats);
1821: if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1822: memcpy_tofs(ioc->data, &lp->pktStats, ioc->len);
1823: }
1824: sti();
1825:
1826: break;
1827: case DEPCA_CLR_STATS: /* Zero out the driver statistics */
1828: if (suser()) {
1829: cli();
1830: memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1831: sti();
1832: } else {
1833: status = -EPERM;
1834: }
1835:
1836: break;
1837: case DEPCA_GET_REG: /* Get the DEPCA Registers */
1838: i=0;
1839: tmp.sval[i++] = inw(DEPCA_NICSR);
1840: outw(CSR0, DEPCA_ADDR); /* status register */
1841: tmp.sval[i++] = inw(DEPCA_DATA);
1842: memcpy(&tmp.sval[i], &lp->init_block, sizeof(struct depca_init));
1843: ioc->len = i+sizeof(struct depca_init);
1844: if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1845: memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1846: }
1847:
1848: break;
1849: default:
1850: status = -EOPNOTSUPP;
1851: }
1852:
1853: return status;
1854: }
1855:
1856: #ifdef MODULE
1857: static char devicename[9] = { 0, };
1858: static struct device thisDepca = {
1859: devicename, /* device name is inserted by /linux/drivers/net/net_init.c */
1860: 0, 0, 0, 0,
1861: 0x200, 7, /* I/O address, IRQ */
1862: 0, 0, 0, NULL, depca_probe };
1863:
1864: static int irq=7; /* EDIT THESE LINE FOR YOUR CONFIGURATION */
1865: static int io=0x200; /* Or use the irq= io= options to insmod */
1866:
1867: /* See depca_probe() for autoprobe messages when a module */
1868: int
1869: init_module(void)
1870: {
1871: thisDepca.irq=irq;
1872: thisDepca.base_addr=io;
1873:
1874: if (register_netdev(&thisDepca) != 0)
1875: return -EIO;
1876:
1877: return 0;
1878: }
1879:
1880: void
1881: cleanup_module(void)
1882: {
1883: release_region(thisDepca.base_addr, DEPCA_TOTAL_SIZE);
1884: if (thisDepca.priv) {
1885: kfree(thisDepca.priv);
1886: thisDepca.priv = NULL;
1887: }
1888: thisDepca.irq=0;
1889:
1890: unregister_netdev(&thisDepca);
1891: }
1892: #endif /* MODULE */
1893:
1894:
1895: /*
1896: * Local variables:
1897: * kernel-compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"
1898: *
1899: * module-compile-command: "gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c depca.c"
1900: * End:
1901: */
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.