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1.1 root 1: /* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
2:
3: Written 1994 by David C. Davies.
4:
5: Copyright 1994 Digital Equipment Corporation.
6:
7: This software may be used and distributed according to the terms of
8: the GNU Public License, incorporated herein by reference.
9:
10: This driver is written for the Digital Equipment Corporation series
11: of EtherWORKS ethernet cards:
12:
13: DE203 Turbo (BNC)
14: DE204 Turbo (TP)
15: DE205 Turbo (TP BNC)
16:
17: The driver has been tested on a relatively busy network using the DE205
18: card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s
19: (7.8Mb/s) to a DECstation 5000/200.
20:
21: The author may be reached at [email protected] or
22: [email protected] or Digital Equipment Corporation, 550 King
23: Street, Littleton MA 01460.
24:
25: =========================================================================
26: This driver has been written substantially from scratch, although its
27: inheritance of style and stack interface from 'depca.c' and in turn from
28: Donald Becker's 'lance.c' should be obvious.
29:
30: The DE203/4/5 boards all use a new proprietary chip in place of the
31: LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422).
32: Use the depca.c driver in the standard distribution for the LANCE based
33: cards from DIGITAL; this driver will not work with them.
34:
35: The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O
36: only makes all the card accesses through I/O transactions and no high
37: (shared) memory is used. This mode provides a >48% performance penalty
38: and is deprecated in this driver, although allowed to provide initial
39: setup when hardstrapped.
40:
41: The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
42: no point in using any mode other than the 2kB mode - their performances
43: are virtually identical, although the driver has been tested in the 2kB
44: and 32kB modes. I would suggest you uncomment the line:
45:
46: FORCE_2K_MODE;
47:
48: to allow the driver to configure the card as a 2kB card at your current
49: base address, thus leaving more room to clutter your system box with
50: other memory hungry boards.
51:
52: As many ISA and EISA cards can be supported under this driver as you
53: wish, limited primarily by the available IRQ lines, rather than by the
54: available I/O addresses (24 ISA, 16 EISA). I have checked different
55: configurations of multiple depca cards and ewrk3 cards and have not
56: found a problem yet (provided you have at least depca.c v0.38) ...
57:
58: The board IRQ setting must be at an unused IRQ which is auto-probed
59: using Donald Becker's autoprobe routines. All these cards are at
60: {5,10,11,15}.
61:
62: No 16MB memory limitation should exist with this driver as DMA is not
63: used and the common memory area is in low memory on the network card (my
64: current system has 20MB and I've not had problems yet).
65:
66: The ability to load this driver as a loadable module has been included
67: and used extensively during the driver development (to save those long
68: reboot sequences). To utilise this ability, you have to do 8 things:
69:
70: 0) have a copy of the loadable modules code installed on your system.
71: 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite
72: temporary directory.
73: 2) edit the source code near line 1880 to reflect the I/O address and
74: IRQ you're using.
75: 3) compile ewrk3.c, but include -DMODULE in the command line to ensure
76: that the correct bits are compiled (see end of source code).
77: 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
78: kernel with the ewrk3 configuration turned off and reboot.
79: 5) insmod ewrk3.o
80: [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
81: 6) run the net startup bits for your new eth?? interface manually
82: (usually /etc/rc.inet[12] at boot time).
83: 7) enjoy!
84:
85: Note that autoprobing is not allowed in loadable modules - the system is
86: already up and running and you're messing with interrupts.
87:
88: To unload a module, turn off the associated interface
89: 'ifconfig eth?? down' then 'rmmod ewrk3'.
90:
91: Promiscuous mode has been turned off in this driver, but all the
92: multicast address bits have been turned on. This improved the send
93: performance on a busy network by about 13%.
94:
95: Ioctl's have now been provided (primarily because I wanted to grab some
96: packet size statistics). They are patterned after 'plipconfig.c' from a
97: suggestion by Alan Cox. Using these ioctls, you can enable promiscuous
98: mode, add/delete multicast addresses, change the hardware address, get
99: packet size distribution statistics and muck around with the control and
100: status register. I'll add others if and when the need arises.
101:
102: TO DO:
103: ------
104:
105:
106: Revision History
107: ----------------
108:
109: Version Date Description
110:
111: 0.1 26-aug-94 Initial writing. ALPHA code release.
112: 0.11 31-aug-94 Fixed: 2k mode memory base calc.,
113: LeMAC version calc.,
114: IRQ vector assignments during autoprobe.
115: 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card.
116: Fixed up MCA hash table algorithm.
117: 0.20 4-sep-94 Added IOCTL functionality.
118: 0.21 14-sep-94 Added I/O mode.
119: 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0.
120: 0.22 16-sep-94 Added more IOCTLs & tidied up.
121: 0.23 21-sep-94 Added transmit cut through.
122: 0.24 31-oct-94 Added uid checks in some ioctls.
123: 0.30 1-nov-94 BETA code release.
124: 0.31 5-dec-94 Added check/allocate region code.
125: 0.32 16-jan-95 Broadcast packet fix.
126: 0.33 10-Feb-95 Fix recognition bug reported by <[email protected]>.
127: 0.40 27-Dec-95 Rationalise MODULE and autoprobe code.
128: Rewrite for portability & updated.
129: ALPHA support from <[email protected]>
130: Added verify_area() calls in depca_ioctl() from
131: suggestion by <[email protected]>.
132: Add new multicasting code.
133:
134: =========================================================================
135: */
136:
137: static const char *version = "ewrk3.c:v0.40 95/12/27 [email protected]\n";
138:
139: #include <linux/module.h>
140:
141: #include <linux/kernel.h>
142: #include <linux/sched.h>
143: #include <linux/string.h>
144: #include <linux/ptrace.h>
145: #include <linux/errno.h>
146: #include <linux/ioport.h>
147: #include <linux/malloc.h>
148: #include <linux/interrupt.h>
149: #include <linux/delay.h>
150: #include <asm/bitops.h>
151: #include <asm/io.h>
152: #include <asm/dma.h>
153: #include <asm/segment.h>
154:
155: #include <linux/netdevice.h>
156: #include <linux/etherdevice.h>
157: #include <linux/skbuff.h>
158:
159: #include <linux/time.h>
160: #include <linux/types.h>
161: #include <linux/unistd.h>
162:
163: #include "ewrk3.h"
164:
165: #ifdef EWRK3_DEBUG
166: static int ewrk3_debug = EWRK3_DEBUG;
167: #else
168: static int ewrk3_debug = 1;
169: #endif
170:
171: #define EWRK3_NDA 0xffe0 /* No Device Address */
172:
173: #define PROBE_LENGTH 32
174: #define ETH_PROM_SIG 0xAA5500FFUL
175:
176: #ifndef EWRK3_SIGNATURE
177: #define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
178: #define EWRK3_STRLEN 8
179: #endif
180:
181: #ifndef EWRK3_RAM_BASE_ADDRESSES
182: #define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
183: #endif
184:
185: /*
186: ** Sets up the I/O area for the autoprobe.
187: */
188: #define EWRK3_IO_BASE 0x100 /* Start address for probe search */
189: #define EWRK3_IOP_INC 0x20 /* I/O address increment */
190: #define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */
191:
192: #ifndef MAX_NUM_EWRK3S
193: #define MAX_NUM_EWRK3S 21
194: #endif
195:
196: #ifndef EWRK3_EISA_IO_PORTS
197: #define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
198: #endif
199:
200: #ifndef MAX_EISA_SLOTS
201: #define MAX_EISA_SLOTS 16
202: #define EISA_SLOT_INC 0x1000
203: #endif
204:
205: #define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
206: #define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
207:
208: #define QUEUE_PKT_TIMEOUT (100) /* Jiffies */
209:
210: /*
211: ** EtherWORKS 3 shared memory window sizes
212: */
213: #define IO_ONLY 0x00
214: #define SHMEM_2K 0x800
215: #define SHMEM_32K 0x8000
216: #define SHMEM_64K 0x10000
217:
218: /*
219: ** EtherWORKS 3 IRQ ENABLE/DISABLE
220: */
221: #define ENABLE_IRQs { \
222: icr |= lp->irq_mask;\
223: outb(icr, EWRK3_ICR); /* Enable the IRQs */\
224: }
225:
226: #define DISABLE_IRQs { \
227: icr = inb(EWRK3_ICR);\
228: icr &= ~lp->irq_mask;\
229: outb(icr, EWRK3_ICR); /* Disable the IRQs */\
230: }
231:
232: /*
233: ** EtherWORKS 3 START/STOP
234: */
235: #define START_EWRK3 { \
236: csr = inb(EWRK3_CSR);\
237: csr &= ~(CSR_TXD|CSR_RXD);\
238: outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\
239: }
240:
241: #define STOP_EWRK3 { \
242: csr = (CSR_TXD|CSR_RXD);\
243: outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\
244: }
245:
246: /*
247: ** The EtherWORKS 3 private structure
248: */
249: #define EWRK3_PKT_STAT_SZ 16
250: #define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you
251: increase EWRK3_PKT_STAT_SZ */
252:
253: struct ewrk3_private {
254: char adapter_name[80]; /* Name exported to /proc/ioports */
255: u_long shmem_base; /* Shared memory start address */
256: u_long shmem_length; /* Shared memory window length */
257: struct enet_statistics stats; /* Public stats */
258: struct {
259: u32 bins[EWRK3_PKT_STAT_SZ]; /* Private stats counters */
260: u32 unicast;
261: u32 multicast;
262: u32 broadcast;
263: u32 excessive_collisions;
264: u32 tx_underruns;
265: u32 excessive_underruns;
266: } pktStats;
267: u_char irq_mask; /* Adapter IRQ mask bits */
268: u_char mPage; /* Maximum 2kB Page number */
269: u_char lemac; /* Chip rev. level */
270: u_char hard_strapped; /* Don't allow a full open */
271: u_char lock; /* Lock the page register */
272: u_char txc; /* Transmit cut through */
273: u_char *mctbl; /* Pointer to the multicast table */
274: };
275:
276: /*
277: ** Force the EtherWORKS 3 card to be in 2kB MODE
278: */
279: #define FORCE_2K_MODE { \
280: shmem_length = SHMEM_2K;\
281: outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
282: }
283:
284: /*
285: ** Public Functions
286: */
287: static int ewrk3_open(struct device *dev);
288: static int ewrk3_queue_pkt(struct sk_buff *skb, struct device *dev);
289: static void ewrk3_interrupt(int irq, struct pt_regs *regs);
290: static int ewrk3_close(struct device *dev);
291: static struct enet_statistics *ewrk3_get_stats(struct device *dev);
292: static void set_multicast_list(struct device *dev);
293: static int ewrk3_ioctl(struct device *dev, struct ifreq *rq, int cmd);
294:
295: /*
296: ** Private functions
297: */
298: static int ewrk3_hw_init(struct device *dev, u_long iobase);
299: static void ewrk3_init(struct device *dev);
300: static int ewrk3_rx(struct device *dev);
301: static int ewrk3_tx(struct device *dev);
302:
303: static void EthwrkSignature(char * name, char *eeprom_image);
304: static int DevicePresent(u_long iobase);
305: static void SetMulticastFilter(struct device *dev);
306: static int EISA_signature(char *name, s32 eisa_id);
307:
308: static int Read_EEPROM(u_long iobase, u_char eaddr);
309: static int Write_EEPROM(short data, u_long iobase, u_char eaddr);
310: static u_char get_hw_addr (struct device *dev, u_char *eeprom_image, char chipType);
311:
312: static void isa_probe(struct device *dev, u_long iobase);
313: static void eisa_probe(struct device *dev, u_long iobase);
314: static struct device *alloc_device(struct device *dev, u_long iobase);
315:
316:
317: #ifdef MODULE
318: int init_module(void);
319: void cleanup_module(void);
320: static int autoprobed = 1, loading_module = 1;
321:
322: # else
323: static u_char irq[] = {5,0,10,3,11,9,15,12};
324: static int autoprobed = 0, loading_module = 0;
325:
326: #endif /* MODULE */
327:
328: static char name[EWRK3_STRLEN + 1];
329: static int num_ewrk3s = 0, num_eth = 0;
330:
331: /*
332: ** Miscellaneous defines...
333: */
334: #define INIT_EWRK3 {\
335: outb(EEPROM_INIT, EWRK3_IOPR);\
336: udelay(1000);\
337: }
338:
339:
340:
341:
342: int ewrk3_probe(struct device *dev)
343: {
344: int tmp = num_ewrk3s, status = -ENODEV;
345: u_long iobase = dev->base_addr;
346:
347: if ((iobase == 0) && loading_module){
348: printk("Autoprobing is not supported when loading a module based driver.\n");
349: status = -EIO;
350: } else { /* First probe for the Ethernet */
351: /* Address PROM pattern */
352: isa_probe(dev, iobase);
353: eisa_probe(dev, iobase);
354:
355: if ((tmp == num_ewrk3s) && (iobase != 0) && loading_module) {
356: printk("%s: ewrk3_probe() cannot find device at 0x%04lx.\n", dev->name,
357: iobase);
358: }
359:
360: /*
361: ** Walk the device list to check that at least one device
362: ** initialised OK
363: */
364: for (; (dev->priv == NULL) && (dev->next != NULL); dev = dev->next);
365:
366: if (dev->priv) status = 0;
367: if (iobase == 0) autoprobed = 1;
368: }
369:
370: return status;
371: }
372:
373: static int
374: ewrk3_hw_init(struct device *dev, u_long iobase)
375: {
376: struct ewrk3_private *lp;
377: int i, status=0;
378: u_long mem_start, shmem_length;
379: u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
380: u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
381:
382: /*
383: ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
384: ** This also disables the EISA_ENABLE bit in the EISA Control Register.
385: */
386: if (iobase > 0x400) eisa_cr = inb(EISA_CR);
387: INIT_EWRK3;
388:
389: nicsr = inb(EWRK3_CSR);
390:
391: icr = inb(EWRK3_ICR);
392: icr |= 0xf0;
393: outb(icr, EWRK3_ICR); /* Disable all the IRQs */
394:
395: if (nicsr == CSR_TXD|CSR_RXD) {
396:
397: /* Check that the EEPROM is alive and well and not living on Pluto... */
398: for (chksum=0, i=0; i<EEPROM_MAX; i+=2) {
399: union {
400: short val;
401: char c[2];
402: } tmp;
403:
404: tmp.val = (short)Read_EEPROM(iobase, (i>>1));
405: eeprom_image[i] = tmp.c[0];
406: eeprom_image[i+1] = tmp.c[1];
407: chksum += eeprom_image[i] + eeprom_image[i+1];
408: }
409:
410: if (chksum != 0) { /* Bad EEPROM Data! */
411: printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
412: status = -ENXIO;
413: } else {
414: EthwrkSignature(name, eeprom_image);
415: if (*name != '\0') { /* found a EWRK3 device */
416: dev->base_addr = iobase;
417:
418: if (iobase > 0x400) {
419: outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */
420: }
421:
422: lemac = eeprom_image[EEPROM_CHIPVER];
423: cmr = inb(EWRK3_CMR);
424:
425: if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
426: ((lemac == LeMAC2) && !(cmr & CMR_HS))) {
427: printk("%s: %s at %#4lx", dev->name, name, iobase);
428: hard_strapped = 1;
429: } else if ((iobase&0x0fff)==EWRK3_EISA_IO_PORTS) {
430: /* EISA slot address */
431: printk("%s: %s at %#4lx (EISA slot %ld)",
432: dev->name, name, iobase, ((iobase>>12)&0x0f));
433: } else { /* ISA port address */
434: printk("%s: %s at %#4lx", dev->name, name, iobase);
435: }
436:
437: if (!status) {
438: printk(", h/w address ");
439: if (lemac!=LeMAC2) DevicePresent(iobase);/* need after EWRK3_INIT */
440: status = get_hw_addr(dev, eeprom_image, lemac);
441: for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
442: printk("%2.2x:", dev->dev_addr[i]);
443: }
444: printk("%2.2x,\n", dev->dev_addr[i]);
445:
446: if (status) {
447: printk(" which has an EEPROM CRC error.\n");
448: status = -ENXIO;
449: } else {
450: if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */
451: cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
452: if (eeprom_image[EEPROM_MISC0] & READ_AHEAD) cmr |= CMR_RA;
453: if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND) cmr |= CMR_WB;
454: if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL) cmr |= CMR_POLARITY;
455: if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK) cmr |= CMR_LINK;
456: if (eeprom_image[EEPROM_MISC0] & _0WS_ENA) cmr |= CMR_0WS;
457: }
458: if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM) cmr |= CMR_DRAM;
459: outb(cmr, EWRK3_CMR);
460:
461: cr = inb(EWRK3_CR); /* Set up the Control Register */
462: cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
463: if (cr & SETUP_APD) cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
464: cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
465: cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
466: outb(cr, EWRK3_CR);
467:
468: /*
469: ** Determine the base address and window length for the EWRK3
470: ** RAM from the memory base register.
471: */
472: mem_start = inb(EWRK3_MBR);
473: shmem_length = 0;
474: if (mem_start != 0) {
475: if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
476: mem_start *= SHMEM_64K;
477: shmem_length = SHMEM_64K;
478: } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
479: mem_start *= SHMEM_32K;
480: shmem_length = SHMEM_32K;
481: } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
482: mem_start = mem_start * SHMEM_2K + 0x80000;
483: shmem_length = SHMEM_2K;
484: } else {
485: status = -ENXIO;
486: }
487: }
488:
489: /*
490: ** See the top of this source code for comments about
491: ** uncommenting this line.
492: */
493: /* FORCE_2K_MODE;*/
494:
495: if (!status) {
496: if (hard_strapped) {
497: printk(" is hard strapped.\n");
498: } else if (mem_start) {
499: printk(" has a %dk RAM window", (int)(shmem_length >> 10));
500: printk(" at 0x%.5lx", mem_start);
501: } else {
502: printk(" is in I/O only mode");
503: }
504:
505: /* private area & initialise */
506: dev->priv = (void *) kmalloc(sizeof(struct ewrk3_private),
507: GFP_KERNEL);
508: if (dev->priv == NULL) {
509: return -ENOMEM;
510: }
511: lp = (struct ewrk3_private *)dev->priv;
512: memset(dev->priv, 0, sizeof(struct ewrk3_private));
513: lp->shmem_base = mem_start;
514: lp->shmem_length = shmem_length;
515: lp->lemac = lemac;
516: lp->hard_strapped = hard_strapped;
517:
518: lp->mPage = 64;
519: if (cmr & CMR_DRAM) lp->mPage <<= 1 ;/* 2 DRAMS on module */
520:
521: sprintf(lp->adapter_name,"%s (%s)", name, dev->name);
522: request_region(iobase, EWRK3_TOTAL_SIZE, lp->adapter_name);
523:
524: lp->irq_mask = ICR_TNEM|ICR_TXDM|ICR_RNEM|ICR_RXDM;
525:
526: if (!hard_strapped) {
527: /*
528: ** Enable EWRK3 board interrupts for autoprobing
529: */
530: icr |= ICR_IE; /* Enable interrupts */
531: outb(icr, EWRK3_ICR);
532:
533: /* The DMA channel may be passed in on this parameter. */
534: dev->dma = 0;
535:
536: /* To auto-IRQ we enable the initialization-done and DMA err,
537: interrupts. For now we will always get a DMA error. */
538: if (dev->irq < 2) {
539: #ifndef MODULE
540: u_char irqnum;
541:
542: autoirq_setup(0);
543:
544: /*
545: ** Trigger a TNE interrupt.
546: */
547: icr |=ICR_TNEM;
548: outb(1,EWRK3_TDQ); /* Write to the TX done queue */
549: outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */
550:
551: irqnum = irq[((icr & IRQ_SEL) >> 4)];
552:
553: dev->irq = autoirq_report(1);
554: if ((dev->irq) && (irqnum == dev->irq)) {
555: printk(" and uses IRQ%d.\n", dev->irq);
556: } else {
557: if (!dev->irq) {
558: printk(" and failed to detect IRQ line.\n");
559: } else if ((irqnum == 1) && (lemac == LeMAC2)) {
560: printk(" and an illegal IRQ line detected.\n");
561: } else {
562: printk(", but incorrect IRQ line detected.\n");
563: }
564: status = -ENXIO;
565: }
566:
567: DISABLE_IRQs; /* Mask all interrupts */
568:
569: #endif /* MODULE */
570: } else {
571: printk(" and requires IRQ%d.\n", dev->irq);
572: }
573: }
574: if (status) release_region(iobase, EWRK3_TOTAL_SIZE);
575: } else {
576: status = -ENXIO;
577: }
578: }
579: }
580: } else {
581: status = -ENXIO;
582: }
583: }
584:
585: if (!status) {
586: if (ewrk3_debug > 0) {
587: printk(version);
588: }
589:
590: /* The EWRK3-specific entries in the device structure. */
591: dev->open = &ewrk3_open;
592: dev->hard_start_xmit = &ewrk3_queue_pkt;
593: dev->stop = &ewrk3_close;
594: dev->get_stats = &ewrk3_get_stats;
595: dev->set_multicast_list = &set_multicast_list;
596: dev->do_ioctl = &ewrk3_ioctl;
597:
598: dev->mem_start = 0;
599:
600: /* Fill in the generic field of the device structure. */
601: ether_setup(dev);
602: }
603: } else {
604: status = -ENXIO;
605: }
606:
607: return status;
608: }
609:
610:
611: static int
612: ewrk3_open(struct device *dev)
613: {
614: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
615: u_long iobase = dev->base_addr;
616: int i, status = 0;
617: u_char icr, csr;
618:
619: /*
620: ** Stop the TX and RX...
621: */
622: STOP_EWRK3;
623:
624: if (!lp->hard_strapped) {
625: irq2dev_map[dev->irq] = dev; /* For latched interrupts */
626:
627: if (request_irq(dev->irq, (void *)ewrk3_interrupt, 0, "ewrk3")) {
628: printk("ewrk3_open(): Requested IRQ%d is busy\n",dev->irq);
629: status = -EAGAIN;
630: } else {
631:
632: /*
633: ** Re-initialize the EWRK3...
634: */
635: ewrk3_init(dev);
636:
637: if (ewrk3_debug > 1){
638: printk("%s: ewrk3 open with irq %d\n",dev->name,dev->irq);
639: printk(" physical address: ");
640: for (i=0;i<5;i++){
641: printk("%2.2x:",(u_char)dev->dev_addr[i]);
642: }
643: printk("%2.2x\n",(u_char)dev->dev_addr[i]);
644: if (lp->shmem_length == 0) {
645: printk(" no shared memory, I/O only mode\n");
646: } else {
647: printk(" start of shared memory: 0x%08lx\n",lp->shmem_base);
648: printk(" window length: 0x%04lx\n",lp->shmem_length);
649: }
650: printk(" # of DRAMS: %d\n",((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
651: printk(" csr: 0x%02x\n", inb(EWRK3_CSR));
652: printk(" cr: 0x%02x\n", inb(EWRK3_CR));
653: printk(" icr: 0x%02x\n", inb(EWRK3_ICR));
654: printk(" cmr: 0x%02x\n", inb(EWRK3_CMR));
655: printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC));
656: }
657:
658: dev->tbusy = 0;
659: dev->start = 1;
660: dev->interrupt = UNMASK_INTERRUPTS;
661:
662: /*
663: ** Unmask EWRK3 board interrupts
664: */
665: icr = inb(EWRK3_ICR);
666: ENABLE_IRQs;
667:
668: }
669: } else {
670: dev->start = 0;
671: dev->tbusy = 1;
672: printk("%s: ewrk3 available for hard strapped set up only.\n", dev->name);
673: printk(" Run the 'ewrk3setup' utility or remove the hard straps.\n");
674: }
675:
676: MOD_INC_USE_COUNT;
677:
678: return status;
679: }
680:
681: /*
682: ** Initialize the EtherWORKS 3 operating conditions
683: */
684: static void
685: ewrk3_init(struct device *dev)
686: {
687: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
688: u_char csr, page;
689: u_long iobase = dev->base_addr;
690:
691: /*
692: ** Enable any multicasts
693: */
694: set_multicast_list(dev);
695:
696: /*
697: ** Clean out any remaining entries in all the queues here
698: */
699: while (inb(EWRK3_TQ));
700: while (inb(EWRK3_TDQ));
701: while (inb(EWRK3_RQ));
702: while (inb(EWRK3_FMQ));
703:
704: /*
705: ** Write a clean free memory queue
706: */
707: for (page=1;page<lp->mPage;page++) { /* Write the free page numbers */
708: outb(page, EWRK3_FMQ); /* to the Free Memory Queue */
709: }
710:
711: lp->lock = 0; /* Ensure there are no locks */
712:
713: START_EWRK3; /* Enable the TX and/or RX */
714: }
715:
716: /*
717: ** Writes a socket buffer to the free page queue
718: */
719: static int
720: ewrk3_queue_pkt(struct sk_buff *skb, struct device *dev)
721: {
722: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
723: u_long iobase = dev->base_addr;
724: int status = 0;
725: u_char icr, csr;
726:
727: /* Transmitter timeout, serious problems. */
728: if (dev->tbusy || lp->lock) {
729: int tickssofar = jiffies - dev->trans_start;
730: if (tickssofar < QUEUE_PKT_TIMEOUT) {
731: status = -1;
732: } else if (!lp->hard_strapped) {
733: printk("%s: transmit timed/locked out, status %04x, resetting.\n",
734: dev->name, inb(EWRK3_CSR));
735:
736: /*
737: ** Mask all board interrupts
738: */
739: DISABLE_IRQs;
740:
741: /*
742: ** Stop the TX and RX...
743: */
744: STOP_EWRK3;
745:
746: ewrk3_init(dev);
747:
748: /*
749: ** Unmask EWRK3 board interrupts
750: */
751: ENABLE_IRQs;
752:
753: dev->tbusy=0;
754: dev->trans_start = jiffies;
755: }
756: } else if (skb == NULL) {
757: dev_tint(dev);
758: } else if (skb->len > 0) {
759:
760: /*
761: ** Block a timer-based transmit from overlapping. This could better be
762: ** done with atomic_swap(1, dev->tbusy), but set_bit() works as well.
763: */
764: if (set_bit(0, (void*)&dev->tbusy) != 0)
765: printk("%s: Transmitter access conflict.\n", dev->name);
766:
767: DISABLE_IRQs; /* So that the page # remains correct */
768:
769: /*
770: ** Get a free page from the FMQ when resources are available
771: */
772: if (inb(EWRK3_FMQC) > 0) {
773: u_long buf = 0;
774: u_char page;
775:
776: if ((page = inb(EWRK3_FMQ)) < lp->mPage) {
777: /*
778: ** Set up shared memory window and pointer into the window
779: */
780: while (set_bit(0, (void *)&lp->lock) != 0); /* Wait for lock to free */
781: if (lp->shmem_length == IO_ONLY) {
782: outb(page, EWRK3_IOPR);
783: } else if (lp->shmem_length == SHMEM_2K) {
784: buf = lp->shmem_base;
785: outb(page, EWRK3_MPR);
786: } else if (lp->shmem_length == SHMEM_32K) {
787: buf = ((((short)page << 11) & 0x7800) + lp->shmem_base);
788: outb((page >> 4), EWRK3_MPR);
789: } else if (lp->shmem_length == SHMEM_64K) {
790: buf = ((((short)page << 11) & 0xf800) + lp->shmem_base);
791: outb((page >> 5), EWRK3_MPR);
792: } else {
793: status = -1;
794: printk("%s: Oops - your private data area is hosed!\n",dev->name);
795: }
796:
797: if (!status) {
798:
799: /*
800: ** Set up the buffer control structures and copy the data from
801: ** the socket buffer to the shared memory .
802: */
803:
804: if (lp->shmem_length == IO_ONLY) {
805: int i;
806: u_char *p = skb->data;
807:
808: outb((char)(TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
809: outb((char)(skb->len & 0xff), EWRK3_DATA);
810: outb((char)((skb->len >> 8) & 0xff), EWRK3_DATA);
811: outb((char)0x04, EWRK3_DATA);
812: for (i=0; i<skb->len; i++) {
813: outb(*p++, EWRK3_DATA);
814: }
815: outb(page, EWRK3_TQ); /* Start sending pkt */
816: } else {
817: writeb((char)(TCR_QMODE|TCR_PAD|TCR_IFC), (char *)buf);/* ctrl byte*/
818: buf+=1;
819: writeb((char)(skb->len & 0xff), (char *)buf);/* length (16 bit xfer)*/
820: buf+=1;
821: if (lp->txc) {
822: writeb((char)(((skb->len >> 8) & 0xff) | XCT), (char *)buf);
823: buf+=1;
824: writeb(0x04, (char *)buf); /* index byte */
825: buf+=1;
826: writeb(0x00, (char *)(buf + skb->len)); /* Write the XCT flag */
827: memcpy_toio(buf, skb->data, PRELOAD);/* Write PRELOAD bytes*/
828: outb(page, EWRK3_TQ); /* Start sending pkt */
829: memcpy_toio(buf+PRELOAD, skb->data+PRELOAD, skb->len-PRELOAD);
830: writeb(0xff, (char *)(buf + skb->len)); /* Write the XCT flag */
831: } else {
832: writeb((char)((skb->len >> 8) & 0xff), (char *)buf);
833: buf+=1;
834: writeb(0x04, (char *)buf); /* index byte */
835: buf+=1;
836: memcpy_toio((char *)buf, skb->data, skb->len);/* Write data bytes */
837: outb(page, EWRK3_TQ); /* Start sending pkt */
838: }
839: }
840:
841: dev->trans_start = jiffies;
842: dev_kfree_skb (skb, FREE_WRITE);
843:
844: } else { /* return unused page to the free memory queue */
845: outb(page, EWRK3_FMQ);
846: }
847: lp->lock = 0; /* unlock the page register */
848: } else {
849: printk("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
850: (u_char) page);
851: }
852: } else {
853: printk("ewrk3_queue_pkt(): No free resources...\n");
854: printk("ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",inb(EWRK3_CSR),inb(EWRK3_ICR),inb(EWRK3_FMQC));
855: }
856:
857: /* Check for free resources: clear 'tbusy' if there are some */
858: if (inb(EWRK3_FMQC) > 0) {
859: dev->tbusy = 0;
860: }
861:
862: ENABLE_IRQs;
863: }
864:
865: return status;
866: }
867:
868: /*
869: ** The EWRK3 interrupt handler.
870: */
871: static void
872: ewrk3_interrupt(int irq, struct pt_regs * regs)
873: {
874: struct device *dev = (struct device *)(irq2dev_map[irq]);
875: struct ewrk3_private *lp;
876: u_long iobase;
877: u_char icr, cr, csr;
878:
879: if (dev == NULL) {
880: printk ("ewrk3_interrupt(): irq %d for unknown device.\n", irq);
881: } else {
882: lp = (struct ewrk3_private *)dev->priv;
883: iobase = dev->base_addr;
884:
885: if (dev->interrupt)
886: printk("%s: Re-entering the interrupt handler.\n", dev->name);
887:
888: dev->interrupt = MASK_INTERRUPTS;
889:
890: /* get the interrupt information */
891: csr = inb(EWRK3_CSR);
892:
893: /*
894: ** Mask the EWRK3 board interrupts and turn on the LED
895: */
896: DISABLE_IRQs;
897:
898: cr = inb(EWRK3_CR);
899: cr |= CR_LED;
900: outb(cr, EWRK3_CR);
901:
902: if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */
903: ewrk3_rx(dev);
904:
905: if (csr & CSR_TNE) /* Tx interrupt (packet sent) */
906: ewrk3_tx(dev);
907:
908: /*
909: ** Now deal with the TX/RX disable flags. These are set when there
910: ** are no more resources. If resources free up then enable these
911: ** interrupts, otherwise mask them - failure to do this will result
912: ** in the system hanging in an interrupt loop.
913: */
914: if (inb(EWRK3_FMQC)) { /* any resources available? */
915: lp->irq_mask |= ICR_TXDM|ICR_RXDM;/* enable the interrupt source */
916: csr &= ~(CSR_TXD|CSR_RXD);/* ensure restart of a stalled TX or RX */
917: outb(csr, EWRK3_CSR);
918: dev->tbusy = 0; /* clear TX busy flag */
919: mark_bh(NET_BH);
920: } else {
921: lp->irq_mask &= ~(ICR_TXDM|ICR_RXDM);/* disable the interrupt source */
922: }
923:
924: /* Unmask the EWRK3 board interrupts and turn off the LED */
925: cr &= ~CR_LED;
926: outb(cr, EWRK3_CR);
927:
928: dev->interrupt = UNMASK_INTERRUPTS;
929: ENABLE_IRQs;
930: }
931:
932: return;
933: }
934:
935: static int
936: ewrk3_rx(struct device *dev)
937: {
938: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
939: u_long iobase = dev->base_addr;
940: int i, status = 0;
941: u_char page, tmpPage = 0, tmpLock = 0;
942: u_long buf = 0;
943:
944: while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */
945: if ((page = inb(EWRK3_RQ)) < lp->mPage) {/* Get next entry's buffer page */
946: /*
947: ** Preempt any process using the current page register. Check for
948: ** an existing lock to reduce time taken in I/O transactions.
949: */
950: if ((tmpLock = set_bit(0, (void *)&lp->lock)) == 1) { /* Assert lock */
951: if (lp->shmem_length == IO_ONLY) { /* Get existing page */
952: tmpPage = inb(EWRK3_IOPR);
953: } else {
954: tmpPage = inb(EWRK3_MPR);
955: }
956: }
957:
958: /*
959: ** Set up shared memory window and pointer into the window
960: */
961: if (lp->shmem_length == IO_ONLY) {
962: outb(page, EWRK3_IOPR);
963: } else if (lp->shmem_length == SHMEM_2K) {
964: buf = lp->shmem_base;
965: outb(page, EWRK3_MPR);
966: } else if (lp->shmem_length == SHMEM_32K) {
967: buf = ((((short)page << 11) & 0x7800) + lp->shmem_base);
968: outb((page >> 4), EWRK3_MPR);
969: } else if (lp->shmem_length == SHMEM_64K) {
970: buf = ((((short)page << 11) & 0xf800) + lp->shmem_base);
971: outb((page >> 5), EWRK3_MPR);
972: } else {
973: status = -1;
974: printk("%s: Oops - your private data area is hosed!\n",dev->name);
975: }
976:
977: if (!status) {
978: char rx_status;
979: int pkt_len;
980:
981: if (lp->shmem_length == IO_ONLY) {
982: rx_status = inb(EWRK3_DATA);
983: pkt_len = inb(EWRK3_DATA);
984: pkt_len |= ((u_short)inb(EWRK3_DATA) << 8);
985: } else {
986: rx_status = readb(buf);
987: buf+=1;
988: pkt_len = readw(buf);
989: buf+=3;
990: }
991:
992: if (!(rx_status & R_ROK)) { /* There was an error. */
993: lp->stats.rx_errors++; /* Update the error stats. */
994: if (rx_status & R_DBE) lp->stats.rx_frame_errors++;
995: if (rx_status & R_CRC) lp->stats.rx_crc_errors++;
996: if (rx_status & R_PLL) lp->stats.rx_fifo_errors++;
997: } else {
998: struct sk_buff *skb;
999:
1000: if ((skb = dev_alloc_skb(pkt_len+2)) != NULL) {
1001: unsigned char *p;
1002: skb->dev = dev;
1003: skb_reserve(skb,2); /* Align to 16 bytes */
1004: p = skb_put(skb,pkt_len);
1005:
1006: if (lp->shmem_length == IO_ONLY) {
1007: *p = inb(EWRK3_DATA); /* dummy read */
1008: for (i=0; i<pkt_len; i++) {
1009: *p++ = inb(EWRK3_DATA);
1010: }
1011: } else {
1012: memcpy_fromio(p, buf, pkt_len);
1013: }
1014:
1015: /*
1016: ** Notify the upper protocol layers that there is another
1017: ** packet to handle
1018: */
1019: skb->protocol=eth_type_trans(skb,dev);
1020: netif_rx(skb);
1021:
1022: /*
1023: ** Update stats
1024: */
1025: lp->stats.rx_packets++;
1026: for (i=1; i<EWRK3_PKT_STAT_SZ-1; i++) {
1027: if (pkt_len < i*EWRK3_PKT_BIN_SZ) {
1028: lp->pktStats.bins[i]++;
1029: i = EWRK3_PKT_STAT_SZ;
1030: }
1031: }
1032: p = skb->data; /* Look at the dest addr */
1033: if (p[0] & 0x01) { /* Multicast/Broadcast */
1034: if ((*(s32 *)&p[0] == -1) && (*(s16 *)&p[4] == -1)) {
1035: lp->pktStats.broadcast++;
1036: } else {
1037: lp->pktStats.multicast++;
1038: }
1039: } else if ((*(s32 *)&p[0] == *(s32 *)&dev->dev_addr[0]) &&
1040: (*(s16 *)&p[4] == *(s16 *)&dev->dev_addr[4])) {
1041: lp->pktStats.unicast++;
1042: }
1043:
1044: lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1045: if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1046: memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1047: }
1048: } else {
1049: printk("%s: Insufficient memory; nuking packet.\n", dev->name);
1050: lp->stats.rx_dropped++; /* Really, deferred. */
1051: break;
1052: }
1053: }
1054: }
1055: /*
1056: ** Return the received buffer to the free memory queue
1057: */
1058: outb(page, EWRK3_FMQ);
1059:
1060: if (tmpLock) { /* If a lock was preempted */
1061: if (lp->shmem_length == IO_ONLY) { /* Replace old page */
1062: outb(tmpPage, EWRK3_IOPR);
1063: } else {
1064: outb(tmpPage, EWRK3_MPR);
1065: }
1066: }
1067: lp->lock = 0; /* Unlock the page register */
1068: } else {
1069: printk("ewrk3_rx(): Illegal page number, page %d\n",page);
1070: printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n",inb(EWRK3_CSR),inb(EWRK3_ICR),inb(EWRK3_FMQC));
1071: }
1072: }
1073: return status;
1074: }
1075:
1076: /*
1077: ** Buffer sent - check for TX buffer errors.
1078: */
1079: static int
1080: ewrk3_tx(struct device *dev)
1081: {
1082: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1083: u_long iobase = dev->base_addr;
1084: u_char tx_status;
1085:
1086: while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */
1087: if (tx_status & T_VSTS) { /* The status is valid */
1088: if (tx_status & T_TXE) {
1089: lp->stats.tx_errors++;
1090: if (tx_status & T_NCL) lp->stats.tx_carrier_errors++;
1091: if (tx_status & T_LCL) lp->stats.tx_window_errors++;
1092: if (tx_status & T_CTU) {
1093: if ((tx_status & T_COLL) ^ T_XUR) {
1094: lp->pktStats.tx_underruns++;
1095: } else {
1096: lp->pktStats.excessive_underruns++;
1097: }
1098: } else if (tx_status & T_COLL) {
1099: if ((tx_status & T_COLL) ^ T_XCOLL) {
1100: lp->stats.collisions++;
1101: } else {
1102: lp->pktStats.excessive_collisions++;
1103: }
1104: }
1105: } else {
1106: lp->stats.tx_packets++;
1107: }
1108: }
1109: }
1110:
1111: return 0;
1112: }
1113:
1114: static int
1115: ewrk3_close(struct device *dev)
1116: {
1117: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1118: u_long iobase = dev->base_addr;
1119: u_char icr, csr;
1120:
1121: dev->start = 0;
1122: dev->tbusy = 1;
1123:
1124: if (ewrk3_debug > 1) {
1125: printk("%s: Shutting down ethercard, status was %2.2x.\n",
1126: dev->name, inb(EWRK3_CSR));
1127: }
1128:
1129: /*
1130: ** We stop the EWRK3 here... mask interrupts and stop TX & RX
1131: */
1132: DISABLE_IRQs;
1133:
1134: STOP_EWRK3;
1135:
1136: /*
1137: ** Clean out the TX and RX queues here (note that one entry
1138: ** may get added to either the TXD or RX queues if the the TX or RX
1139: ** just starts processing a packet before the STOP_EWRK3 command
1140: ** is received. This will be flushed in the ewrk3_open() call).
1141: */
1142: while (inb(EWRK3_TQ));
1143: while (inb(EWRK3_TDQ));
1144: while (inb(EWRK3_RQ));
1145:
1146: if (!lp->hard_strapped) {
1147: free_irq(dev->irq);
1148:
1149: irq2dev_map[dev->irq] = 0;
1150: }
1151:
1152: MOD_DEC_USE_COUNT;
1153:
1154: return 0;
1155: }
1156:
1157: static struct enet_statistics *
1158: ewrk3_get_stats(struct device *dev)
1159: {
1160: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1161:
1162: /* Null body since there is no framing error counter */
1163:
1164: return &lp->stats;
1165: }
1166:
1167: /*
1168: ** Set or clear the multicast filter for this adaptor.
1169: */
1170: static void
1171: set_multicast_list(struct device *dev)
1172: {
1173: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1174: u_long iobase = dev->base_addr;
1175: u_char csr;
1176:
1177: if (irq2dev_map[dev->irq] != NULL) {
1178: csr = inb(EWRK3_CSR);
1179:
1180: if (lp->shmem_length == IO_ONLY) {
1181: lp->mctbl = (char *) PAGE0_HTE;
1182: } else {
1183: lp->mctbl = (char *)(lp->shmem_base + PAGE0_HTE);
1184: }
1185:
1186: csr &= ~(CSR_PME | CSR_MCE);
1187: if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
1188: csr |= CSR_PME;
1189: outb(csr, EWRK3_CSR);
1190: } else {
1191: SetMulticastFilter(dev);
1192: csr |= CSR_MCE;
1193: outb(csr, EWRK3_CSR);
1194: }
1195: }
1196: }
1197:
1198: /*
1199: ** Calculate the hash code and update the logical address filter
1200: ** from a list of ethernet multicast addresses.
1201: ** Little endian crc one liner from Matt Thomas, DEC.
1202: **
1203: ** Note that when clearing the table, the broadcast bit must remain asserted
1204: ** to receive broadcast messages.
1205: */
1206: static void SetMulticastFilter(struct device *dev)
1207: {
1208: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1209: struct dev_mc_list *dmi=dev->mc_list;
1210: u_long iobase = dev->base_addr;
1211: int i;
1212: char *addrs, j, bit, byte;
1213: short *p = (short *) lp->mctbl;
1214: u16 hashcode;
1215: s32 crc, poly = CRC_POLYNOMIAL_LE;
1216:
1217: while (set_bit(0, (void *)&lp->lock) != 0); /* Wait for lock to free */
1218:
1219: if (lp->shmem_length == IO_ONLY) {
1220: outb(0, EWRK3_IOPR);
1221: outw(EEPROM_OFFSET(lp->mctbl), EWRK3_PIR1);
1222: } else {
1223: outb(0, EWRK3_MPR);
1224: }
1225:
1226: if (dev->flags & IFF_ALLMULTI) {
1227: for (i=0; i<(HASH_TABLE_LEN >> 3); i++) {
1228: if (lp->shmem_length == IO_ONLY) {
1229: outb(0xff, EWRK3_DATA);
1230: } else { /* memset didn't work here */
1231: writew(0xffff, p);
1232: p++; i++;
1233: }
1234: }
1235: } else {
1236: /* Clear table except for broadcast bit */
1237: if (lp->shmem_length == IO_ONLY) {
1238: for (i=0; i<(HASH_TABLE_LEN >> 4) - 1; i++) {
1239: outb(0x00, EWRK3_DATA);
1240: }
1241: outb(0x80, EWRK3_DATA); i++; /* insert the broadcast bit */
1242: for (; i<(HASH_TABLE_LEN >> 3); i++) {
1243: outb(0x00, EWRK3_DATA);
1244: }
1245: } else {
1246: memset_io(lp->mctbl, 0, (HASH_TABLE_LEN >> 3));
1247: writeb(0x80, (char *)(lp->mctbl + (HASH_TABLE_LEN >> 4) - 1));
1248: }
1249:
1250: /* Update table */
1251: for (i=0;i<dev->mc_count;i++) { /* for each address in the list */
1252: addrs=dmi->dmi_addr;
1253: dmi=dmi->next;
1254: if ((*addrs & 0x01) == 1) { /* multicast address? */
1255: crc = 0xffffffff; /* init CRC for each address */
1256: for (byte=0;byte<ETH_ALEN;byte++) { /* for each address byte */
1257: /* process each address bit */
1258: for (bit = *addrs++,j=0;j<8;j++, bit>>=1) {
1259: crc = (crc >> 1) ^ (((crc ^ bit) & 0x01) ? poly : 0);
1260: }
1261: }
1262: hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */
1263:
1264: byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
1265: bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1266:
1267: if (lp->shmem_length == IO_ONLY) {
1268: u_char tmp;
1269:
1270: outw((short)((long)lp->mctbl) + byte, EWRK3_PIR1);
1271: tmp = inb(EWRK3_DATA);
1272: tmp |= bit;
1273: outw((short)((long)lp->mctbl) + byte, EWRK3_PIR1);
1274: outb(tmp, EWRK3_DATA);
1275: } else {
1276: writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte);
1277: }
1278: }
1279: }
1280: }
1281:
1282: lp->lock = 0; /* Unlock the page register */
1283:
1284: return;
1285: }
1286:
1287: /*
1288: ** ISA bus I/O device probe
1289: */
1290: static void isa_probe(struct device *dev, u_long ioaddr)
1291: {
1292: int i = num_ewrk3s, maxSlots;
1293: u_long iobase;
1294:
1295: if (!ioaddr && autoprobed) return ; /* Been here before ! */
1296: if (ioaddr >= 0x400) return; /* Not ISA */
1297:
1298: if (ioaddr == 0) { /* Autoprobing */
1299: iobase = EWRK3_IO_BASE; /* Get the first slot address */
1300: maxSlots = 24;
1301: } else { /* Probe a specific location */
1302: iobase = ioaddr;
1303: maxSlots = i + 1;
1304: }
1305:
1306: for (; (i<maxSlots) && (dev!=NULL);iobase+=EWRK3_IOP_INC, i++) {
1307: if (!check_region(iobase, EWRK3_TOTAL_SIZE)) {
1308: if (DevicePresent(iobase) == 0) {
1309: if ((dev = alloc_device(dev, iobase)) != NULL) {
1310: if (ewrk3_hw_init(dev, iobase) == 0) {
1311: num_ewrk3s++;
1312: }
1313: num_eth++;
1314: }
1315: }
1316: } else if (autoprobed) {
1317: printk("%s: region already allocated at 0x%04lx.\n", dev->name, iobase);
1318: }
1319: }
1320:
1321: return;
1322: }
1323:
1324: /*
1325: ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1326: ** the motherboard.
1327: */
1328: static void eisa_probe(struct device *dev, u_long ioaddr)
1329: {
1330: int i, maxSlots;
1331: u_long iobase;
1332: char name[EWRK3_STRLEN];
1333:
1334: if (!ioaddr && autoprobed) return ; /* Been here before ! */
1335: if (ioaddr < 0x1000) return; /* Not EISA */
1336:
1337: if (ioaddr == 0) { /* Autoprobing */
1338: iobase = EISA_SLOT_INC; /* Get the first slot address */
1339: i = 1;
1340: maxSlots = MAX_EISA_SLOTS;
1341: } else { /* Probe a specific location */
1342: iobase = ioaddr;
1343: i = (ioaddr >> 12);
1344: maxSlots = i + 1;
1345: }
1346:
1347: for (i=1; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) {
1348: if (EISA_signature(name, EISA_ID) == 0) {
1349: if (!check_region(iobase, EWRK3_TOTAL_SIZE)) {
1350: if (DevicePresent(iobase) == 0) {
1351: if ((dev = alloc_device(dev, iobase)) != NULL) {
1352: if (ewrk3_hw_init(dev, iobase) == 0) {
1353: num_ewrk3s++;
1354: }
1355: num_eth++;
1356: }
1357: }
1358: } else if (autoprobed) {
1359: printk("%s: region already allocated at 0x%04lx.\n", dev->name, iobase);
1360: }
1361: }
1362: }
1363:
1364: return;
1365: }
1366:
1367: /*
1368: ** Allocate the device by pointing to the next available space in the
1369: ** device structure. Should one not be available, it is created.
1370: */
1371: static struct device *alloc_device(struct device *dev, u_long iobase)
1372: {
1373: int addAutoProbe = 0;
1374: struct device *tmp = NULL, *ret;
1375: int (*init)(struct device *) = NULL;
1376:
1377: /*
1378: ** Check the device structures for an end of list or unused device
1379: */
1380: if (!loading_module) {
1381: while (dev->next != NULL) {
1382: if ((dev->base_addr == EWRK3_NDA) || (dev->base_addr == 0)) break;
1383: dev = dev->next; /* walk through eth device list */
1384: num_eth++; /* increment eth device number */
1385: }
1386:
1387: /*
1388: ** If an autoprobe is requested for another device, we must re-insert
1389: ** the request later in the list. Remember the current position first.
1390: */
1391: if ((dev->base_addr == 0) && (num_ewrk3s > 0)) {
1392: addAutoProbe++;
1393: tmp = dev->next; /* point to the next device */
1394: init = dev->init; /* remember the probe function */
1395: }
1396:
1397: /*
1398: ** If at end of list and can't use current entry, malloc one up.
1399: ** If memory could not be allocated, print an error message.
1400: */
1401: if ((dev->next == NULL) &&
1402: !((dev->base_addr == EWRK3_NDA) || (dev->base_addr == 0))){
1403: dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1404: GFP_KERNEL);
1405:
1406: dev = dev->next; /* point to the new device */
1407: if (dev == NULL) {
1408: printk("eth%d: Device not initialised, insufficient memory\n",
1409: num_eth);
1410: } else {
1411: /*
1412: ** If the memory was allocated, point to the new memory area
1413: ** and initialize it (name, I/O address, next device (NULL) and
1414: ** initialisation probe routine).
1415: */
1416: dev->name = (char *)(dev + sizeof(struct device));
1417: if (num_eth > 9999) {
1418: sprintf(dev->name,"eth????"); /* New device name */
1419: } else {
1420: sprintf(dev->name,"eth%d", num_eth);/* New device name */
1421: }
1422: dev->base_addr = iobase; /* assign the io address */
1423: dev->next = NULL; /* mark the end of list */
1424: dev->init = &ewrk3_probe; /* initialisation routine */
1425: num_ewrk3s++;
1426: }
1427: }
1428: ret = dev; /* return current struct, or NULL */
1429:
1430: /*
1431: ** Now figure out what to do with the autoprobe that has to be inserted.
1432: ** Firstly, search the (possibly altered) list for an empty space.
1433: */
1434: if (ret != NULL) {
1435: if (addAutoProbe) {
1436: for (;(tmp->next!=NULL) && (tmp->base_addr!=EWRK3_NDA); tmp=tmp->next);
1437:
1438: /*
1439: ** If no more device structures and can't use the current one, malloc
1440: ** one up. If memory could not be allocated, print an error message.
1441: */
1442: if ((tmp->next == NULL) && !(tmp->base_addr == EWRK3_NDA)) {
1443: tmp->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1444: GFP_KERNEL);
1445: tmp = tmp->next; /* point to the new device */
1446: if (tmp == NULL) {
1447: printk("%s: Insufficient memory to extend the device list.\n",
1448: dev->name);
1449: } else {
1450: /*
1451: ** If the memory was allocated, point to the new memory area
1452: ** and initialize it (name, I/O address, next device (NULL) and
1453: ** initialisation probe routine).
1454: */
1455: tmp->name = (char *)(tmp + sizeof(struct device));
1456: if (num_eth > 9999) {
1457: sprintf(tmp->name,"eth????"); /* New device name */
1458: } else {
1459: sprintf(tmp->name,"eth%d", num_eth);/* New device name */
1460: }
1461: tmp->base_addr = 0; /* re-insert the io address */
1462: tmp->next = NULL; /* mark the end of list */
1463: tmp->init = init; /* initialisation routine */
1464: }
1465: } else { /* structure already exists */
1466: tmp->base_addr = 0; /* re-insert the io address */
1467: }
1468: }
1469: }
1470: } else {
1471: ret = dev;
1472: }
1473:
1474: return ret;
1475: }
1476:
1477: /*
1478: ** Read the EWRK3 EEPROM using this routine
1479: */
1480: static int Read_EEPROM(u_long iobase, u_char eaddr)
1481: {
1482: int i;
1483:
1484: outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1485: outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */
1486: for (i=0;i<5000;i++) inb(EWRK3_CSR); /* wait 1msec */
1487:
1488: return inw(EWRK3_EPROM1); /* 16 bits data return */
1489: }
1490:
1491: /*
1492: ** Write the EWRK3 EEPROM using this routine
1493: */
1494: static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
1495: {
1496: int i;
1497:
1498: outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */
1499: for (i=0;i<5000;i++) inb(EWRK3_CSR); /* wait 1msec */
1500: outw(data, EWRK3_EPROM1); /* write data to register */
1501: outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1502: outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */
1503: for (i=0;i<75000;i++) inb(EWRK3_CSR); /* wait 15msec */
1504: outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */
1505: for (i=0;i<5000;i++) inb(EWRK3_CSR); /* wait 1msec */
1506:
1507: return 0;
1508: }
1509:
1510: /*
1511: ** Look for a particular board name in the on-board EEPROM.
1512: */
1513: static void EthwrkSignature(char *name, char *eeprom_image)
1514: {
1515: u_long i,j,k;
1516: char *signatures[] = EWRK3_SIGNATURE;
1517:
1518: strcpy(name, "");
1519: for (i=0;*signatures[i] != '\0' && *name == '\0';i++) {
1520: for (j=EEPROM_PNAME7,k=0;j<=EEPROM_PNAME0 && k<strlen(signatures[i]);j++) {
1521: if (signatures[i][k] == eeprom_image[j]) { /* track signature */
1522: k++;
1523: } else { /* lost signature; begin search again */
1524: k=0;
1525: }
1526: }
1527: if (k == strlen(signatures[i])) {
1528: for (k=0; k<EWRK3_STRLEN; k++) {
1529: name[k] = eeprom_image[EEPROM_PNAME7 + k];
1530: name[EWRK3_STRLEN] = '\0';
1531: }
1532: }
1533: }
1534:
1535: return; /* return the device name string */
1536: }
1537:
1538: /*
1539: ** Look for a special sequence in the Ethernet station address PROM that
1540: ** is common across all EWRK3 products.
1541: **
1542: ** Search the Ethernet address ROM for the signature. Since the ROM address
1543: ** counter can start at an arbitrary point, the search must include the entire
1544: ** probe sequence length plus the (length_of_the_signature - 1).
1545: ** Stop the search IMMEDIATELY after the signature is found so that the
1546: ** PROM address counter is correctly positioned at the start of the
1547: ** ethernet address for later read out.
1548: */
1549:
1550: static int DevicePresent(u_long iobase)
1551: {
1552: union {
1553: struct {
1554: u32 a;
1555: u32 b;
1556: } llsig;
1557: char Sig[sizeof(u32) << 1];
1558: } dev;
1559: short sigLength;
1560: char data;
1561: int i, j, status = 0;
1562:
1563: dev.llsig.a = ETH_PROM_SIG;
1564: dev.llsig.b = ETH_PROM_SIG;
1565: sigLength = sizeof(u32) << 1;
1566:
1567: for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1568: data = inb(EWRK3_APROM);
1569: if (dev.Sig[j] == data) { /* track signature */
1570: j++;
1571: } else { /* lost signature; begin search again */
1572: if (data == dev.Sig[0]) {
1573: j=1;
1574: } else {
1575: j=0;
1576: }
1577: }
1578: }
1579:
1580: if (j!=sigLength) {
1581: status = -ENODEV; /* search failed */
1582: }
1583:
1584: return status;
1585: }
1586:
1587: static u_char get_hw_addr(struct device *dev, u_char *eeprom_image, char chipType)
1588: {
1589: int i, j, k;
1590: u_short chksum;
1591: u_char crc, lfsr, sd, status = 0;
1592: u_long iobase = dev->base_addr;
1593: u16 tmp;
1594:
1595: if (chipType == LeMAC2) {
1596: for (crc=0x6a, j=0; j<ETH_ALEN; j++) {
1597: sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
1598: outb(dev->dev_addr[j], EWRK3_PAR0 + j);
1599: for (k=0; k<8; k++, sd >>= 1) {
1600: lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
1601: crc = (crc >> 1) + lfsr;
1602: }
1603: }
1604: if (crc != eeprom_image[EEPROM_PA_CRC]) status = -1;
1605: } else {
1606: for (i=0,k=0;i<ETH_ALEN;) {
1607: k <<= 1 ;
1608: if (k > 0xffff) k-=0xffff;
1609:
1610: k += (u_char) (tmp = inb(EWRK3_APROM));
1611: dev->dev_addr[i] = (u_char) tmp;
1612: outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1613: i++;
1614: k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
1615: dev->dev_addr[i] = (u_char) tmp;
1616: outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1617: i++;
1618:
1619: if (k > 0xffff) k-=0xffff;
1620: }
1621: if (k == 0xffff) k=0;
1622: chksum = inb(EWRK3_APROM);
1623: chksum |= (inb(EWRK3_APROM)<<8);
1624: if (k != chksum) status = -1;
1625: }
1626:
1627: return status;
1628: }
1629:
1630: /*
1631: ** Look for a particular board name in the EISA configuration space
1632: */
1633: static int EISA_signature(char *name, s32 eisa_id)
1634: {
1635: u_long i;
1636: char *signatures[] = EWRK3_SIGNATURE;
1637: char ManCode[EWRK3_STRLEN];
1638: union {
1639: s32 ID;
1640: char Id[4];
1641: } Eisa;
1642: int status = 0;
1643:
1644: *name = '\0';
1645: for (i=0; i<4; i++) {
1646: Eisa.Id[i] = inb(eisa_id + i);
1647: }
1648:
1649: ManCode[0]=(((Eisa.Id[0]>>2)&0x1f)+0x40);
1650: ManCode[1]=(((Eisa.Id[1]&0xe0)>>5)+((Eisa.Id[0]&0x03)<<3)+0x40);
1651: ManCode[2]=(((Eisa.Id[2]>>4)&0x0f)+0x30);
1652: ManCode[3]=((Eisa.Id[2]&0x0f)+0x30);
1653: ManCode[4]=(((Eisa.Id[3]>>4)&0x0f)+0x30);
1654: ManCode[5]='\0';
1655:
1656: for (i=0;(*signatures[i] != '\0') && (*name == '\0');i++) {
1657: if (strstr(ManCode, signatures[i]) != NULL) {
1658: strcpy(name,ManCode);
1659: status = 1;
1660: }
1661: }
1662:
1663: return status; /* return the device name string */
1664: }
1665:
1666: /*
1667: ** Perform IOCTL call functions here. Some are privileged operations and the
1668: ** effective uid is checked in those cases.
1669: */
1670: static int ewrk3_ioctl(struct device *dev, struct ifreq *rq, int cmd)
1671: {
1672: struct ewrk3_private *lp = (struct ewrk3_private *)dev->priv;
1673: struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_data;
1674: u_long iobase = dev->base_addr;
1675: int i, j, status = 0;
1676: u_char csr;
1677: union {
1678: u_char addr[HASH_TABLE_LEN * ETH_ALEN];
1679: u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1680: } tmp;
1681:
1682: switch(ioc->cmd) {
1683: case EWRK3_GET_HWADDR: /* Get the hardware address */
1684: for (i=0; i<ETH_ALEN; i++) {
1685: tmp.addr[i] = dev->dev_addr[i];
1686: }
1687: ioc->len = ETH_ALEN;
1688: if (!(status = verify_area(VERIFY_WRITE, (void *)ioc->data, ioc->len))) {
1689: memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1690: }
1691:
1692: break;
1693: case EWRK3_SET_HWADDR: /* Set the hardware address */
1694: if (suser()) {
1695: if (!(status = verify_area(VERIFY_READ, (void *)ioc->data, ETH_ALEN))) {
1696: csr = inb(EWRK3_CSR);
1697: csr |= (CSR_TXD|CSR_RXD);
1698: outb(csr, EWRK3_CSR); /* Disable the TX and RX */
1699:
1700: memcpy_fromfs(tmp.addr,ioc->data,ETH_ALEN);
1701: for (i=0; i<ETH_ALEN; i++) {
1702: dev->dev_addr[i] = tmp.addr[i];
1703: outb(tmp.addr[i], EWRK3_PAR0 + i);
1704: }
1705:
1706: csr &= ~(CSR_TXD|CSR_RXD); /* Enable the TX and RX */
1707: outb(csr, EWRK3_CSR);
1708: }
1709: } else {
1710: status = -EPERM;
1711: }
1712:
1713: break;
1714: case EWRK3_SET_PROM: /* Set Promiscuous Mode */
1715: if (suser()) {
1716: csr = inb(EWRK3_CSR);
1717: csr |= CSR_PME;
1718: csr &= ~CSR_MCE;
1719: outb(csr, EWRK3_CSR);
1720: } else {
1721: status = -EPERM;
1722: }
1723:
1724: break;
1725: case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */
1726: if (suser()) {
1727: csr = inb(EWRK3_CSR);
1728: csr &= ~CSR_PME;
1729: outb(csr, EWRK3_CSR);
1730: } else {
1731: status = -EPERM;
1732: }
1733:
1734: break;
1735: case EWRK3_SAY_BOO: /* Say "Boo!" to the kernel log file */
1736: printk("%s: Boo!\n", dev->name);
1737:
1738: break;
1739: case EWRK3_GET_MCA: /* Get the multicast address table */
1740: if (!(status = verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1741: while (set_bit(0, (void *)&lp->lock) != 0); /* Wait for lock to free */
1742: if (lp->shmem_length == IO_ONLY) {
1743: outb(0, EWRK3_IOPR);
1744: outw(PAGE0_HTE, EWRK3_PIR1);
1745: for (i=0; i<(HASH_TABLE_LEN >> 3); i++) {
1746: tmp.addr[i] = inb(EWRK3_DATA);
1747: }
1748: } else {
1749: outb(0, EWRK3_MPR);
1750: memcpy_fromio(tmp.addr, (char *)(lp->shmem_base + PAGE0_HTE), (HASH_TABLE_LEN >> 3));
1751: }
1752: ioc->len = (HASH_TABLE_LEN >> 3);
1753: memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1754: }
1755: lp->lock = 0; /* Unlock the page register */
1756:
1757: break;
1758: case EWRK3_SET_MCA: /* Set a multicast address */
1759: if (suser()) {
1760: if (!(status=verify_area(VERIFY_READ, ioc->data, ETH_ALEN*ioc->len))) {
1761: memcpy_fromfs(tmp.addr, ioc->data, ETH_ALEN * ioc->len);
1762: set_multicast_list(dev);
1763: }
1764: } else {
1765: status = -EPERM;
1766: }
1767:
1768: break;
1769: case EWRK3_CLR_MCA: /* Clear all multicast addresses */
1770: if (suser()) {
1771: set_multicast_list(dev);
1772: } else {
1773: status = -EPERM;
1774: }
1775:
1776: break;
1777: case EWRK3_MCA_EN: /* Enable multicast addressing */
1778: if (suser()) {
1779: csr = inb(EWRK3_CSR);
1780: csr |= CSR_MCE;
1781: csr &= ~CSR_PME;
1782: outb(csr, EWRK3_CSR);
1783: } else {
1784: status = -EPERM;
1785: }
1786:
1787: break;
1788: case EWRK3_GET_STATS: /* Get the driver statistics */
1789: cli();
1790: ioc->len = sizeof(lp->pktStats);
1791: if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1792: memcpy_tofs(ioc->data, &lp->pktStats, ioc->len);
1793: }
1794: sti();
1795:
1796: break;
1797: case EWRK3_CLR_STATS: /* Zero out the driver statistics */
1798: if (suser()) {
1799: cli();
1800: memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1801: sti();
1802: } else {
1803: status = -EPERM;
1804: }
1805:
1806: break;
1807: case EWRK3_GET_CSR: /* Get the CSR Register contents */
1808: tmp.addr[0] = inb(EWRK3_CSR);
1809: ioc->len = 1;
1810: if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1811: memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1812: }
1813:
1814: break;
1815: case EWRK3_SET_CSR: /* Set the CSR Register contents */
1816: if (suser()) {
1817: if (!(status=verify_area(VERIFY_READ, ioc->data, 1))) {
1818: memcpy_fromfs(tmp.addr, ioc->data, 1);
1819: outb(tmp.addr[0], EWRK3_CSR);
1820: }
1821: } else {
1822: status = -EPERM;
1823: }
1824:
1825: break;
1826: case EWRK3_GET_EEPROM: /* Get the EEPROM contents */
1827: if (suser()) {
1828: for (i=0; i<(EEPROM_MAX>>1); i++) {
1829: tmp.val[i] = (short)Read_EEPROM(iobase, i);
1830: }
1831: i = EEPROM_MAX;
1832: tmp.addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */
1833: for (j=0;j<ETH_ALEN;j++) {
1834: tmp.addr[i++] = inb(EWRK3_PAR0 + j);
1835: }
1836: ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
1837: if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1838: memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1839: }
1840: } else {
1841: status = -EPERM;
1842: }
1843:
1844: break;
1845: case EWRK3_SET_EEPROM: /* Set the EEPROM contents */
1846: if (suser()) {
1847: if (!(status=verify_area(VERIFY_READ, ioc->data, EEPROM_MAX))) {
1848: memcpy_fromfs(tmp.addr, ioc->data, EEPROM_MAX);
1849: for (i=0; i<(EEPROM_MAX>>1); i++) {
1850: Write_EEPROM(tmp.val[i], iobase, i);
1851: }
1852: }
1853: } else {
1854: status = -EPERM;
1855: }
1856:
1857: break;
1858: case EWRK3_GET_CMR: /* Get the CMR Register contents */
1859: tmp.addr[0] = inb(EWRK3_CMR);
1860: ioc->len = 1;
1861: if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1862: memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1863: }
1864:
1865: break;
1866: case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */
1867: if (suser()) {
1868: lp->txc = 1;
1869: } else {
1870: status = -EPERM;
1871: }
1872:
1873: break;
1874: case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */
1875: if (suser()) {
1876: lp->txc = 0;
1877: } else {
1878: status = -EPERM;
1879: }
1880:
1881: break;
1882: default:
1883: status = -EOPNOTSUPP;
1884: }
1885:
1886: return status;
1887: }
1888:
1889: #ifdef MODULE
1890: static char devicename[9] = { 0, };
1891: static struct device thisEthwrk = {
1892: devicename, /* device name is inserted by /linux/drivers/net/net_init.c */
1893: 0, 0, 0, 0,
1894: 0x300, 5, /* I/O address, IRQ */
1895: 0, 0, 0, NULL, ewrk3_probe };
1896:
1897: static int io=0x300; /* <--- EDIT THESE LINES FOR YOUR CONFIGURATION */
1898: static int irq=5; /* or use the insmod io= irq= options */
1899:
1900: int
1901: init_module(void)
1902: {
1903: thisEthwrk.base_addr=io;
1904: thisEthwrk.irq=irq;
1905: if (register_netdev(&thisEthwrk) != 0)
1906: return -EIO;
1907: return 0;
1908: }
1909:
1910: void
1911: cleanup_module(void)
1912: {
1913: release_region(thisEthwrk.base_addr, EWRK3_TOTAL_SIZE);
1914:
1915: if (thisEthwrk.priv) {
1916: kfree(thisEthwrk.priv);
1917: thisEthwrk.priv = NULL;
1918: }
1919: thisEthwrk.irq = 0;
1920:
1921: unregister_netdev(&thisEthwrk);
1922: }
1923: #endif /* MODULE */
1924:
1925:
1926: /*
1927: * Local variables:
1928: * kernel-compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c ewrk3.c"
1929: *
1930: * module-compile-command: "gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O2 -m486 -c ewrk3.c"
1931: * End:
1932: */
1933:
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