![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to hp100.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [GnuMach] / Gnu-Mach / i386 / i386at / gpl / linux / net|
Return to hp100.h CVS log | Up to [GnuMach] / Gnu-Mach / i386 / i386at / gpl / linux / net |
1.1 root 1: /*
2: * hp100.h: Hewlett Packard HP10/100VG ANY LAN ethernet driver for Linux.
3: *
4: * Author: Jaroslav Kysela, <[email protected]>
5: *
6: * Header file...
7: *
8: * This driver is based on the 'hpfepkt' crynwr packet driver.
9: *
10: * This source/code is public free; you can distribute it and/or modify
11: * it under terms of the GNU General Public License (published by the
12: * Free Software Foundation) either version two of this License, or any
13: * later version.
14: */
15:
16: /****************************************************************************
17: * Hardware Constants
18: ****************************************************************************/
19:
20: /*
21: * ATT2MD01 Register Page Constants
22: */
23:
24: #define HP100_PAGE_PERFORMANCE 0x0 /* Page 0 */
25: #define HP100_PAGE_MAC_ADDRESS 0x1 /* Page 1 */
26: #define HP100_PAGE_HW_MAP 0x2 /* Page 2 */
27: #define HP100_PAGE_EEPROM_CTRL 0x3 /* Page 3 */
28: #define HP100_PAGE_MAC_CTRL 0x4 /* Page 4 */
29: #define HP100_PAGE_MMU_CFG 0x5 /* Page 5 */
30: #define HP100_PAGE_ID_MAC_ADDR 0x6 /* Page 6 */
31: #define HP100_PAGE_MMU_POINTER 0x7 /* Page 7 */
32:
33: /*
34: * ATT2MD01 Register Addresses
35: */
36:
37: /* Present on all pages */
38:
39: #define HP100_REG_HW_ID 0x00 /* R: (16) Unique card ID */
40: #define HP100_REG_TRACE 0x00 /* W: (16) Used for debug output */
41: #define HP100_REG_PAGING 0x02 /* R: (16),15:4 Card ID */
42: /* W: (16),3:0 Switch pages */
43: #define HP100_REG_OPTION_LSW 0x04 /* RW: (16) Select card functions */
44: #define HP100_REG_OPTION_MSW 0x06 /* RW: (16) Select card functions */
45:
46: /* Page 0 - Performance */
47:
48: #define HP100_REG_IRQ_STATUS 0x08 /* RW: (16) Which ints are pending */
49: #define HP100_REG_IRQ_MASK 0x0a /* RW: (16) Select ints to allow */
50: #define HP100_REG_FRAGMENT_LEN 0x0c /* RW: (16)12:0 Current fragment len */
51: #define HP100_REG_OFFSET 0x0e /* RW: (16)12:0 Offset to start read */
52: #define HP100_REG_DATA32 0x10 /* RW: (32) I/O mode data port */
53: #define HP100_REG_DATA16 0x12 /* RW: WORDs must be read from here */
54: #define HP100_REG_TX_MEM_FREE 0x14 /* RD: (32) Amount of free Tx mem */
55: #define HP100_REG_RX_PKT_CNT 0x18 /* RD: (8) Rx count of pkts on card */
56: #define HP100_REG_TX_PKT_CNT 0x19 /* RD: (8) Tx count of pkts on card */
57:
58: /* Page 1 - MAC Address/Hash Table */
59:
60: #define HP100_REG_MAC_ADDR 0x08 /* RW: (8) Cards MAC address */
61: #define HP100_REG_HASH_BYTE0 0x10 /* RW: (8) Cards multicast filter */
62:
63: /* Page 2 - Hardware Mapping */
64:
65: #define HP100_REG_MEM_MAP_LSW 0x08 /* RW: (16) LSW of cards mem addr */
66: #define HP100_REG_MEM_MAP_MSW 0x0a /* RW: (16) MSW of cards mem addr */
67: #define HP100_REG_IO_MAP 0x0c /* RW: (8) Cards I/O address */
68: #define HP100_REG_IRQ_CHANNEL 0x0d /* RW: (8) IRQ and edge/level int */
69: #define HP100_REG_SRAM 0x0e /* RW: (8) How much RAM on card */
70: #define HP100_REG_BM 0x0f /* RW: (8) Controls BM functions */
71:
72: /* Page 3 - EEPROM/Boot ROM */
73:
74: #define HP100_REG_EEPROM_CTRL 0x08 /* RW: (16) Used to load EEPROM */
75:
76: /* Page 4 - LAN Configuration */
77:
78: #define HP100_REG_LAN_CFG_10 0x08 /* RW: (16) Set 10M XCVR functions */
79: #define HP100_REG_LAN_CFG_VG 0x0a /* RW: (16) Set 100M XCVR functions */
80: #define HP100_REG_MAC_CFG_1 0x0c /* RW: (8) Types of pkts to accept */
81: #define HP100_REG_MAC_CFG_2 0x0d /* RW: (8) Misc MAC functions */
82: /* The follow clear when read: */
83: #define HP100_REG_DROPPED 0x10 /* R: (16),11:0 Pkts cant fit in mem*/
84: #define HP100_REG_CRC 0x12 /* R: (8) Pkts with CRC */
85: #define HP100_REG_ABORT 0x13 /* R: (8) Aborted Tx pkts */
86:
87: /* Page 5 - MMU */
88:
89: #define HP100_REG_RX_MEM_STOP 0x0c /* RW: (16) End of Rx ring addr */
90: #define HP100_REG_TX_MEM_STOP 0x0e /* RW: (16) End of Tx ring addr */
91:
92: /* Page 6 - Card ID/Physical LAN Address */
93:
94: #define HP100_REG_BOARD_ID 0x08 /* R: (8) EISA/ISA card ID */
95: #define HP100_REG_BOARD_IO_CHCK 0x0c /* R: (8) Added to ID to get FFh */
96: #define HP100_REG_SOFT_MODEL 0x0d /* R: (8) Config program defined */
97: #define HP100_REG_LAN_ADDR 0x10 /* R: (8) MAC addr of card */
98: #define HP100_REG_LAN_ADDR_CHCK 0x16 /* R: (8) Added to addr to get FFh */
99:
100: /* Page 7 - MMU Current Pointers */
101:
102: #define HP100_REG_RX_MEM_BR 0x08 /* R: (16) Current begin of Rx ring */
103: #define HP100_REG_RX_MEM_ER 0x0a /* R: (16) Current end of Rx ring */
104: #define HP100_REG_TX_MEM_BR 0x0c /* R: (16) Current begin of Tx ring */
105: #define HP100_REG_TX_MEM_ER 0x0e /* R: (16) Current end of Rx ring */
106: #define HP100_REG_MEM_DEBUG 0x1a /* RW: (16) Used for memory tests */
107:
108: /*
109: * HardwareIDReg bits/masks
110: */
111:
112: #define HP100_HW_ID_0 0x50 /* Hardware ID bytes. */
113: #define HP100_HW_ID_1 0x48
114: #define HP100_HW_ID_2_REVA 0x50 /* Rev. A ID. NOTE: lower nibble not used */
115: #define HP100_HW_ID_3 0x53
116:
117: /*
118: * OptionLSWReg bits/masks
119: */
120:
121: #define HP100_DEBUG_EN 0x8000 /* 0:Disable, 1:Enable Debug Dump Pointer */
122: #define HP100_RX_HDR 0x4000 /* 0:Disable, 1:Enable putting pkt into */
123: /* system memory before Rx interrupt */
124: #define HP100_MMAP_DIS 0x2000 /* 0:Enable, 1:Disable memory mapping. */
125: /* MMAP_DIS must be 0 and MEM_EN must */
126: /* be 1 for memory-mapped mode to be */
127: /* enabled */
128: #define HP100_EE_EN 0x1000 /* 0:Disable,1:Enable EEPROM writing */
129: #define HP100_BM_WRITE 0x0800 /* 0:Slave, 1:Bus Master for Tx data */
130: #define HP100_BM_READ 0x0400 /* 0:Slave, 1:Bus Master for Rx data */
131: #define HP100_TRI_INT 0x0200 /* 0:Dont, 1:Do tri-state the int */
132: #define HP100_MEM_EN 0x0040 /* Config program set this to */
133: /* 0:Disable, 1:Enable mem map. */
134: /* See MMAP_DIS. */
135: #define HP100_IO_EN 0x0020 /* 0:Disable, 1:Enable I/O transfers */
136: #define HP100_BOOT_EN 0x0010 /* 0:Disable, 1:Enable boot ROM access */
137: #define HP100_FAKE_INT 0x0008 /* 0:No int, 1:int */
138: #define HP100_INT_EN 0x0004 /* 0:Disable, 1:Enable ints from card */
139: #define HP100_HW_RST 0x0002 /* 0:Reset, 1:Out of reset */
140:
141: /*
142: * OptionMSWReg bits/masks
143: */
144: #define HP100_PRIORITY_TX 0x0080 /* 0:Don't, 1:Do all Tx pkts as priority */
145: #define HP100_EE_LOAD 0x0040 /* 1:EEPROM loading, 0 when done */
146: #define HP100_ADV_NXT_PKT 0x0004 /* 1:Advance to next pkt in Rx queue, */
147: /* h/w will set to 0 when done */
148: #define HP100_TX_CMD 0x0002 /* 1:Tell h/w download done, h/w will set */
149: /* to 0 when done */
150:
151: /*
152: * InterruptStatusReg/InterruptMaskReg bits/masks. These bits will 0 when a 1
153: * is written to them.
154: */
155: #define HP100_RX_PACKET 0x0400 /* 0:No, 1:Yes pkt has been Rx */
156: #define HP100_RX_ERROR 0x0200 /* 0:No, 1:Yes Rx pkt had error */
157: #define HP100_TX_SPACE_AVAIL 0x0010 /* 0:<8192, 1:>=8192 Tx free bytes */
158: #define HP100_TX_COMPLETE 0x0008 /* 0:No, 1:Yes a Tx has completed */
159: #define HP100_TX_ERROR 0x0002 /* 0:No, 1:Yes Tx pkt had error */
160:
161: /*
162: * TxMemoryFreeCountReg bits/masks.
163: */
164: #define HP100_AUTO_COMPARE 0x8000 /* Says at least 8k is available for Tx. */
165: /* NOTE: This mask is for the upper */
166: /* word of the register. */
167:
168: /*
169: * IRQChannelReg bits/masks.
170: */
171: #define HP100_ZERO_WAIT_EN 0x80 /* 0:No, 1:Yes assers NOWS signal */
172: #define HP100_LEVEL_IRQ 0x10 /* 0:Edge, 1:Level type interrupts. */
173: /* Only valid on EISA cards. */
174: #define HP100_IRQ_MASK 0x0F /* Isolate the IRQ bits */
175:
176: /*
177: * SRAMReg bits/masks.
178: */
179: #define HP100_RAM_SIZE_MASK 0xe0 /* AND to get SRAM size index */
180: #define HP100_RAM_SIZE_SHIFT 0x05 /* Shift count to put index in lower bits */
181:
182: /*
183: * BMReg bits/masks.
184: */
185: #define HP100_BM_SLAVE 0x04 /* 0:Slave, 1:BM mode */
186:
187: /*
188: * EEPROMControlReg bits/masks.
189: */
190: #define HP100_EEPROM_LOAD 0x0001 /* 0->1 loads the EEPROM into registers. */
191: /* When it goes back to 0, load is */
192: /* complete. This should take ~600us. */
193:
194: /*
195: * LANCntrCfg10Reg bits/masks.
196: */
197: #define HP100_SQU_ST 0x0100 /* 0:No, 1:Yes collision signal sent */
198: /* after Tx. Only used for AUI. */
199: #define HP100_MAC10_SEL 0x00c0 /* Get bits to indicate MAC */
200: #define HP100_AUI_SEL 0x0020 /* Status of AUI selection */
201: #define HP100_LOW_TH 0x0010 /* 0:No, 1:Yes allow better cabling */
202: #define HP100_LINK_BEAT_DIS 0x0008 /* 0:Enable, 1:Disable link beat */
203: #define HP100_LINK_BEAT_ST 0x0004 /* 0:No, 1:Yes link beat being Rx */
204: #define HP100_R_ROL_ST 0x0002 /* 0:No, 1:Yes Rx twisted pair has been */
205: /* reversed */
206: #define HP100_AUI_ST 0x0001 /* 0:No, 1:Yes use AUI on TP card */
207:
208: /* MAC Selection, use with MAC10_SEL bits */
209: #define HP100_AUTO_SEL_10 0x0 /* Auto select */
210: #define HP100_XCVR_LXT901_10 0x1 /* LXT901 10BaseT transceiver */
211: #define HP100_XCVR_7213 0x2 /* 7213 transceiver */
212: #define HP100_XCVR_82503 0x3 /* 82503 transceiver */
213:
214:
215: /*
216: * LANCntrCfgVGReg bits/masks.
217: */
218: #define HP100_FRAME_FORMAT 0x0800 /* 0:802.3, 1:802.5 frames */
219: #define HP100_BRIDGE 0x0400 /* 0:No, 1:Yes tell hub it's a bridge */
220: #define HP100_PROM_MODE 0x0200 /* 0:No, 1:Yes tell hub card is */
221: /* promiscuous */
222: #define HP100_REPEATER 0x0100 /* 0:No, 1:Yes tell hub MAC wants to be */
223: /* a cascaded repeater */
224: #define HP100_MAC100_SEL 0x0080 /* 0:No, 1:Yes use 100 Mbit MAC */
225: #define HP100_LINK_UP_ST 0x0040 /* 0:No, 1:Yes endnode logged in */
226: #define HP100_LINK_CABLE_ST 0x0020 /* 0:No, 1:Yes cable can hear tones from */
227: /* hub */
228: #define HP100_LOAD_ADDR 0x0010 /* 0->1 card addr will be sent to hub. */
229: /* 100ms later the link status bits are */
230: /* valid */
231: #define HP100_LINK_CMD 0x0008 /* 0->1 link will attempt to log in. */
232: /* 100ms later the link status bits are */
233: /* valid */
234: #define HP100_LINK_GOOD_ST 0x0002 /* 0:No, 1:Yes cable passed training */
235: #define HP100_VG_RESET 0x0001 /* 0:Yes, 1:No reset the 100VG MAC */
236:
237:
238: /*
239: * MACConfiguration1Reg bits/masks.
240: */
241: #define HP100_RX_IDLE 0x80 /* 0:Yes, 1:No currently receiving pkts */
242: #define HP100_TX_IDLE 0x40 /* 0:Yes, 1:No currently Txing pkts */
243: #define HP100_RX_EN 0x20 /* 0:No, 1:Yes allow receiving of pkts */
244: #define HP100_TX_EN 0x10 /* 0:No, 1:Yes allow transmiting of pkts */
245: #define HP100_ACC_ERRORED 0x08 /* 0:No, 1:Yes allow Rx of errored pkts */
246: #define HP100_ACC_MC 0x04 /* 0:No, 1:Yes allow Rx of multicast pkts */
247: #define HP100_ACC_BC 0x02 /* 0:No, 1:Yes allow Rx of broadcast pkts */
248: #define HP100_ACC_PHY 0x01 /* 0:No, 1:Yes allow Rx of ALL physical pkts */
249:
250: #define HP100_MAC1MODEMASK 0xf0 /* Hide ACC bits */
251: #define HP100_MAC1MODE1 0x00 /* Receive nothing, must also disable RX */
252: #define HP100_MAC1MODE2 0x00
253: #define HP100_MAC1MODE3 HP100_MAC1MODE2 | HP100_ACC_BC
254: #define HP100_MAC1MODE4 HP100_MAC1MODE3 | HP100_ACC_MC
255: #define HP100_MAC1MODE5 HP100_MAC1MODE4 /* set mc hash to all ones also */
256: #define HP100_MAC1MODE6 HP100_MAC1MODE5 | HP100_ACC_PHY /* Promiscuous */
257:
258: /* Note MODE6 will receive all GOOD packets on the LAN. This really needs
259: a mode 7 defined to be LAN Analyzer mode, which will receive errored and
260: runt packets, and keep the CRC bytes. */
261:
262: #define HP100_MAC1MODE7 MAC1MODE6 OR ACC_ERRORED
263:
264: /*
265: * MACConfiguration2Reg bits/masks.
266: */
267: #define HP100_TR_MODE 0x80 /* 0:No, 1:Yes support Token Ring formats */
268: #define HP100_TX_SAME 0x40 /* 0:No, 1:Yes Tx same packet continuous */
269: #define HP100_LBK_XCVR 0x20 /* 0:No, 1:Yes loopback through MAC & */
270: /* transceiver */
271: #define HP100_LBK_MAC 0x10 /* 0:No, 1:Yes loopback through MAC */
272: #define HP100_CRC_I 0x08 /* 0:No, 1:Yes inhibit CRC on Tx packets */
273: #define HP100_KEEP_CRC 0x02 /* 0:No, 1:Yes keep CRC on Rx packets. */
274: /* The length will reflect this. */
275:
276: #define HP100_MAC2MODEMASK 0x02
277: #define HP100_MAC2MODE1 0x00
278: #define HP100_MAC2MODE2 0x00
279: #define HP100_MAC2MODE3 0x00
280: #define HP100_MAC2MODE4 0x00
281: #define HP100_MAC2MODE5 0x00
282: #define HP100_MAC2MODE6 0x00
283: #define HP100_MAC2MODE7 KEEP_CRC
284:
285: /*
286: * Set/Reset bits
287: */
288: #define HP100_SET_HB 0x0100 /* 0:Set fields to 0 whose mask is 1 */
289: #define HP100_SET_LB 0x0001 /* HB sets upper byte, LB sets lower byte */
290: #define HP100_RESET_HB 0x0000 /* For readability when resetting bits */
291: #define HP100_RESET_LB 0x0000 /* For readability when resetting bits */
292:
293: /*
294: * Misc. Constants
295: */
296: #define HP100_LAN_100 100 /* lan_type value for VG */
297: #define HP100_LAN_10 10 /* lan_type value for 10BaseT */
298: #define HP100_LAN_ERR (-1) /* lan_type value for link down */
299:
300: /*
301: * Receive Header Definition.
302: */
303:
304: struct hp100_rx_header {
305: u_short rx_length; /* Pkt length is bits 12:0 */
306: u_short rx_status; /* status of the packet */
307: };
308:
309: #define HP100_PKT_LEN_MASK 0x1FFF /* AND with RxLength to get length bits */
310:
311: /* Receive Packet Status. Note, the error bits are only valid if ACC_ERRORED
312: bit in the MAC Configuration Register 1 is set. */
313:
314: #define HP100_RX_PRI 0x8000 /* 0:No, 1:Yes packet is priority */
315: #define HP100_SDF_ERR 0x4000 /* 0:No, 1:Yes start of frame error */
316: #define HP100_SKEW_ERR 0x2000 /* 0:No, 1:Yes skew out of range */
317: #define HP100_BAD_SYMBOL_ERR 0x1000 /* 0:No, 1:Yes invalid symbol received */
318: #define HP100_RCV_IPM_ERR 0x0800 /* 0:No, 1:Yes pkt had an invalid packet */
319: /* marker */
320: #define HP100_SYMBOL_BAL_ERR 0x0400 /* 0:No, 1:Yes symbol balance error */
321: #define HP100_VG_ALN_ERR 0x0200 /* 0:No, 1:Yes non-octet received */
322: #define HP100_TRUNC_ERR 0x0100 /* 0:No, 1:Yes the packet was truncated */
323: #define HP100_RUNT_ERR 0x0040 /* 0:No, 1:Yes pkt length < Min Pkt */
324: /* Length Reg. */
325: #define HP100_ALN_ERR 0x0010 /* 0:No, 1:Yes align error. */
326: #define HP100_CRC_ERR 0x0008 /* 0:No, 1:Yes CRC occurred. */
327:
328: /* The last three bits indicate the type of destination address */
329:
330: #define HP100_MULTI_ADDR_HASH 0x0006 /* 110: Addr multicast, matched hash */
331: #define HP100_BROADCAST_ADDR 0x0003 /* x11: Addr broadcast */
332: #define HP100_MULTI_ADDR_NO_HASH 0x0002 /* 010: Addr multicast, didn't match hash */
333: #define HP100_PHYS_ADDR_MATCH 0x0001 /* x01: Addr was physical and mine */
334: #define HP100_PHYS_ADDR_NO_MATCH 0x0000 /* x00: Addr was physical but not mine */
335:
336: /*
337: * macros
338: */
339:
340: #define hp100_inb( reg ) \
341: inb( ioaddr + HP100_REG_##reg )
342: #define hp100_inw( reg ) \
343: inw( ioaddr + HP100_REG_##reg )
344: #define hp100_inl( reg ) \
345: inl( ioaddr + HP100_REG_##reg )
346: #define hp100_outb( data, reg ) \
347: outb( data, ioaddr + HP100_REG_##reg )
348: #define hp100_outw( data, reg ) \
349: outw( data, ioaddr + HP100_REG_##reg )
350: #define hp100_outl( data, reg ) \
351: outl( data, ioaddr + HP100_REG_##reg )
352: #define hp100_orb( data, reg ) \
353: outb( inb( ioaddr + HP100_REG_##reg ) | (data), ioaddr + HP100_REG_##reg )
354: #define hp100_orw( data, reg ) \
355: outw( inw( ioaddr + HP100_REG_##reg ) | (data), ioaddr + HP100_REG_##reg )
356: #define hp100_andb( data, reg ) \
357: outb( inb( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )
358: #define hp100_andw( data, reg ) \
359: outw( inw( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )
360:
361: #define hp100_page( page ) \
362: outw( HP100_PAGE_##page, ioaddr + HP100_REG_PAGING )
363: #define hp100_ints_off() \
364: outw( HP100_INT_EN | HP100_RESET_LB, ioaddr + HP100_REG_OPTION_LSW )
365: #define hp100_ints_on() \
366: outw( HP100_INT_EN | HP100_SET_LB, ioaddr + HP100_REG_OPTION_LSW )
367: #define hp100_mem_map_enable() \
368: outw( HP100_MMAP_DIS | HP100_RESET_HB, ioaddr + HP100_REG_OPTION_LSW )
369: #define hp100_mem_map_disable() \
370: outw( HP100_MMAP_DIS | HP100_SET_HB, ioaddr + HP100_REG_OPTION_LSW )
371: #define hp100_reset_card() \
372: outw( HP100_HW_RST | HP100_RESET_LB, ioaddr + HP100_REG_OPTION_LSW )
373: #define hp100_unreset_card() \
374: outw( HP100_HW_RST | HP100_SET_LB, ioaddr + HP100_REG_OPTION_LSW )
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.