Return to sk_g16.h CVS log

Up to [GnuMach] / Gnu-Mach / i386 / i386at / gpl / linux / net

Annotation of Gnu-Mach/i386/i386at/gpl/linux/net/sk_g16.h, revision 1.1

1.1     ! root        1: /*-
        !             2:  *
        !             3:  * This software may be used and distributed according to the terms
        !             4:  * of the GNU Public License, incorporated herein by reference.
        !             5:  *
        !             6:  * Module         : sk_g16.h
        !             7:  * Version        : $Revision: 1.1.1.1 $  
        !             8:  *
        !             9:  * Author         : M.Hipp ([email protected])
        !            10:  * changes by     : Patrick J.D. Weichmann
        !            11:  *
        !            12:  * Date Created   : 94/05/25
        !            13:  *
        !            14:  * Description    : In here are all necessary definitions of  
        !            15:  *                  the am7990 (LANCE) chip used for writing a
        !            16:  *                  network device driver which uses this chip 
        !            17:  *
        !            18:  * $Log: sk_g16.h,v $
        !            19:  * Revision 1.1.1.1  1997/02/25 21:27:39  thomas
        !            20:  * Initial source
        !            21:  *
        !            22:  * Revision 1.1.1.1  1996/10/30 01:39:56  thomas
        !            23:  * Imported from UK22
        !            24:  *
        !            25:  * Revision 1.3  1996/03/25  20:24:35  goel
        !            26:  * Linux driver merge.
        !            27:  *
        !            28: -*/
        !            29: 
        !            30: #ifndef SK_G16_H
        !            31: 
        !            32: #define SK_G16_H
        !            33: 
        !            34: 
        !            35: /*
        !            36:  *     Control and Status Register 0 (CSR0) bit definitions
        !            37:  *
        !            38:  * (R=Readable) (W=Writeable) (S=Set on write) (C-Clear on write)
        !            39:  *
        !            40:  */
        !            41: 
        !            42: #define CSR0_ERR       0x8000  /* Error summary (R) */
        !            43: #define CSR0_BABL      0x4000  /* Babble transmitter timeout error (RC) */
        !            44: #define CSR0_CERR      0x2000  /* Collision Error (RC) */
        !            45: #define CSR0_MISS      0x1000  /* Missed packet (RC) */
        !            46: #define CSR0_MERR      0x0800  /* Memory Error  (RC) */ 
        !            47: #define CSR0_RINT      0x0400  /* Receiver Interrupt (RC) */
        !            48: #define CSR0_TINT       0x0200 /* Transmit Interrupt (RC) */ 
        !            49: #define CSR0_IDON      0x0100  /* Initialization Done (RC) */
        !            50: #define CSR0_INTR      0x0080  /* Interrupt Flag (R) */
        !            51: #define CSR0_INEA      0x0040  /* Interrupt Enable (RW) */
        !            52: #define CSR0_RXON      0x0020  /* Receiver on (R) */
        !            53: #define CSR0_TXON      0x0010  /* Transmitter on (R) */
        !            54: #define CSR0_TDMD      0x0008  /* Transmit Demand (RS) */
        !            55: #define CSR0_STOP      0x0004  /* Stop (RS) */
        !            56: #define CSR0_STRT      0x0002  /* Start (RS) */
        !            57: #define CSR0_INIT      0x0001  /* Initialize (RS) */
        !            58: 
        !            59: #define CSR0_CLRALL     0x7f00  /* mask for all clearable bits */
        !            60: 
        !            61: /*
        !            62:  *    Control and Status Register 3 (CSR3) bit definitions
        !            63:  *
        !            64:  */
        !            65: 
        !            66: #define CSR3_BSWAP     0x0004  /* Byte Swap (RW) */
        !            67: #define CSR3_ACON      0x0002  /* ALE Control (RW) */
        !            68: #define CSR3_BCON      0x0001  /* Byte Control (RW) */
        !            69: 
        !            70: /*
        !            71:  *     Initialization Block Mode operation Bit Definitions.
        !            72:  */
        !            73: 
        !            74: #define MODE_PROM      0x8000  /* Promiscuous Mode */
        !            75: #define MODE_INTL      0x0040  /* Internal Loopback */
        !            76: #define MODE_DRTY      0x0020  /* Disable Retry */ 
        !            77: #define MODE_COLL      0x0010  /* Force Collision */
        !            78: #define MODE_DTCR      0x0008  /* Disable Transmit CRC) */
        !            79: #define MODE_LOOP      0x0004  /* Loopback */
        !            80: #define MODE_DTX       0x0002  /* Disable the Transmitter */ 
        !            81: #define MODE_DRX       0x0001  /* Disable the Receiver */
        !            82: 
        !            83: #define MODE_NORMAL    0x0000  /* Normal operation mode */
        !            84: 
        !            85: /*
        !            86:  *     Receive message descriptor status bit definitions.
        !            87:  */
        !            88: 
        !            89: #define RX_OWN         0x80    /* Owner bit 0 = host, 1 = lance */
        !            90: #define RX_ERR         0x40    /* Error Summary */
        !            91: #define RX_FRAM                0x20    /* Framing Error */
        !            92: #define RX_OFLO                0x10    /* Overflow Error */
        !            93: #define RX_CRC         0x08    /* CRC Error */ 
        !            94: #define RX_BUFF                0x04    /* Buffer Error */
        !            95: #define RX_STP         0x02    /* Start of Packet */
        !            96: #define RX_ENP         0x01    /* End of Packet */
        !            97: 
        !            98: 
        !            99: /*
        !           100:  *     Transmit message descriptor status bit definitions.
        !           101:  */
        !           102: 
        !           103: #define TX_OWN         0x80    /* Owner bit 0 = host, 1 = lance */
        !           104: #define TX_ERR         0x40    /* Error Summary */
        !           105: #define TX_MORE                0x10    /* More the 1 retry needed to Xmit */
        !           106: #define TX_ONE         0x08    /* One retry needed to Xmit */
        !           107: #define TX_DEF         0x04    /* Deferred */
        !           108: #define TX_STP                 0x02    /* Start of Packet */
        !           109: #define TX_ENP         0x01    /* End of Packet */
        !           110: 
        !           111: /*
        !           112:  *      Transmit status (2) (valid if TX_ERR == 1)
        !           113:  */
        !           114: 
        !           115: #define TX_BUFF        0x8000  /* Buffering error (no ENP) */
        !           116: #define TX_UFLO        0x4000  /* Underflow (late memory) */
        !           117: #define TX_LCOL        0x1000  /* Late collision */
        !           118: #define TX_LCAR        0x0400  /* Loss of Carrier */
        !           119: #define TX_RTRY        0x0200  /* Failed after 16 retransmissions  */
        !           120: #define TX_TDR          0x003f  /* Time-domain-reflectometer-value */
        !           121: 
        !           122: 
        !           123: /* 
        !           124:  * Structures used for Communication with the LANCE 
        !           125:  */
        !           126: 
        !           127: /* LANCE Initialize Block */
        !           128: 
        !           129: struct init_block 
        !           130: {
        !           131:   unsigned short mode;     /* Mode Register */
        !           132:   unsigned char  paddr[6]; /* Physical Address (MAC) */
        !           133:   unsigned char  laddr[8]; /* Logical Filter Address (not used) */
        !           134:   unsigned int   rdrp;     /* Receive Descriptor Ring pointer */
        !           135:   unsigned int   tdrp;     /* Transmit Descriptor Ring pointer */
        !           136: };
        !           137: 
        !           138: 
        !           139: /* Receive Message Descriptor Entry */
        !           140: 
        !           141: struct rmd 
        !           142: { 
        !           143:   union
        !           144:   {
        !           145:     unsigned long buffer;     /* Address of buffer */
        !           146:     struct 
        !           147:     {
        !           148:       unsigned char unused[3]; 
        !           149:       unsigned volatile char status;   /* Status Bits */
        !           150:     } s;
        !           151:   } u;
        !           152:   volatile short blen;        /* Buffer Length (two's complement) */
        !           153:   unsigned short mlen;        /* Message Byte Count */
        !           154: };
        !           155: 
        !           156: 
        !           157: /* Transmit Message Descriptor Entry */
        !           158: 
        !           159: struct tmd   
        !           160: {
        !           161:   union 
        !           162:   {
        !           163:     unsigned long  buffer;    /* Address of buffer */
        !           164:     struct 
        !           165:     {
        !           166:       unsigned char unused[3];
        !           167:       unsigned volatile char status;   /* Status Bits */
        !           168:     } s;
        !           169:   } u;
        !           170:   unsigned short blen;             /* Buffer Length (two's complement) */
        !           171:   unsigned volatile short status2; /* Error Status Bits */
        !           172: };
        !           173: 
        !           174: #endif /* End of SK_G16_H */

This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.