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1.1 root 1: /*+M*************************************************************************
2: * Adaptec AIC7xxx device driver for Linux.
3: *
4: * Copyright (c) 1994 John Aycock
5: * The University of Calgary Department of Computer Science.
6: *
7: * This program is free software; you can redistribute it and/or modify
8: * it under the terms of the GNU General Public License as published by
9: * the Free Software Foundation; either version 2, or (at your option)
10: * any later version.
11: *
12: * This program is distributed in the hope that it will be useful,
13: * but WITHOUT ANY WARRANTY; without even the implied warranty of
14: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: * GNU General Public License for more details.
16: *
17: * You should have received a copy of the GNU General Public License
18: * along with this program; see the file COPYING. If not, write to
19: * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20: *
21: * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F
22: * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA
23: * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide,
24: * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux,
25: * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file
26: * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual,
27: * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the
28: * ANSI SCSI-2 specification (draft 10c), ...
29: *
30: * ----------------------------------------------------------------
31: * Modified to include support for wide and twin bus adapters,
32: * DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes,
33: * and other rework of the code.
34: *
35: * Parts of this driver are based on the FreeBSD driver by Justin
36: * T. Gibbs.
37: *
38: * A Boot time option was also added for not resetting the scsi bus.
39: *
40: * Form: aic7xxx=extended,no_reset
41: *
42: * -- Daniel M. Eischen, [email protected], 04/03/95
43: *
44: * $Id: aic7xxx.c,v 1.1.1.1 1997/02/25 21:27:46 thomas Exp $
45: *-M*************************************************************************/
46:
47: #ifdef MODULE
48: #include <linux/module.h>
49: #endif
50:
51: #include <stdarg.h>
52: #include <asm/io.h>
53: #include <linux/string.h>
54: #include <linux/errno.h>
55: #include <linux/kernel.h>
56: #include <linux/ioport.h>
57: #include <linux/bios32.h>
58: #include <linux/delay.h>
59: #include <linux/sched.h>
60: #include <linux/pci.h>
61: #include <linux/proc_fs.h>
62: #include <linux/blk.h>
63: #include "sd.h"
64: #include "scsi.h"
65: #include "hosts.h"
66: #include "aic7xxx.h"
67: #include "aic7xxx_reg.h"
68: #include <linux/stat.h>
69:
70: #include <linux/config.h> /* for CONFIG_PCI */
71:
72: struct proc_dir_entry proc_scsi_aic7xxx = {
73: PROC_SCSI_AIC7XXX, 7, "aic7xxx",
74: S_IFDIR | S_IRUGO | S_IXUGO, 2
75: };
76:
77: #define AIC7XXX_C_VERSION "$Revision: 1.1.1.1 $"
78:
79: #define NUMBER(arr) (sizeof(arr) / sizeof(arr[0]))
80: #define MIN(a,b) ((a < b) ? a : b)
81: #define ALL_TARGETS -1
82: #ifndef TRUE
83: # define TRUE 1
84: #endif
85: #ifndef FALSE
86: # define FALSE 0
87: #endif
88:
89: /*
90: * Defines for PCI bus support, testing twin bus support, DMAing of
91: * SCBs, tagged queueing, commands (SCBs) per lun, and SCSI bus reset
92: * delay time.
93: *
94: * o PCI bus support - this has been implemented and working since
95: * the December 1, 1994 release of this driver. If you don't have
96: * a PCI bus, then you can configure your kernel without PCI
97: * support because all PCI dependent code is bracketed with
98: * "#ifdef CONFIG_PCI ... #endif CONFIG_PCI".
99: *
100: * o Twin bus support - this has been tested and does work.
101: *
102: * o DMAing of SCBs - thanks to Kai Makisara, this now works.
103: * This define is now taken out and DMAing of SCBs is always
104: * performed (8/12/95 - DE).
105: *
106: * o Tagged queueing - this driver is capable of tagged queueing
107: * but I am unsure as to how well the higher level driver implements
108: * tagged queueing. Therefore, the maximum commands per lun is
109: * set to 2. If you want to implement tagged queueing, ensure
110: * this define is not commented out.
111: *
112: * o Sharing IRQs - allowed for sharing of IRQs. This will allow
113: * for multiple aic7xxx host adapters sharing the same IRQ, but
114: * not for sharing IRQs with other devices. The higher level
115: * PCI code and interrupt handling needs to be modified to
116: * support this.
117: *
118: * o Commands per lun - If tagged queueing is enabled, then you
119: * may want to try increasing AIC7XXX_CMDS_PER_LUN to more
120: * than 2. By default, we limit the SCBs per lun to 2 with
121: * or without tagged queueing enabled. If tagged queueing is
122: * disabled, the sequencer will keep the 2nd SCB in the input
123: * queue until the first one completes - so it is OK to to have
124: * more than 1 SCB queued. If tagged queueing is enabled, then
125: * the sequencer will attempt to send the 2nd SCB to the device
126: * while the first SCB is executing and the device is disconnected.
127: * For adapters limited to 4 SCBs, you may want to actually
128: * decrease the commands per lun to 1, if you often have more
129: * than 2 devices active at the same time. This will allocate
130: * 1 SCB for each device and ensure that there will always be
131: * a free SCB for up to 4 devices active at the same time.
132: *
133: * o 3985 support - The 3985 adapter is much like the 3940, but
134: * has three 7870 controllers as opposed to two for the 3940.
135: * It will get probed and recognized as three different adapters,
136: * but all three controllers share the same bank of 255 SCBs
137: * instead of each controller having their own bank (like the
138: * controllers on the 3940). For this reason, it is important
139: * that all devices be resident on just one channel of the 3985.
140: * In the near future, we'll modify the driver to reserve 1/3
141: * of the SCBs for each controller.
142: *
143: * Daniel M. Eischen, [email protected], 01/11/96
144: */
145:
146: /* Uncomment this for testing twin bus support. */
147: #define AIC7XXX_TWIN_SUPPORT
148:
149: /* Uncomment this for tagged queueing. */
150: /* #define AIC7XXX_TAGGED_QUEUEING */
151:
152: /* Uncomment this for allowing sharing of IRQs. */
153: #define AIC7XXX_SHARE_IRQS
154:
155: /*
156: * You can try raising me if tagged queueing is enabled, or lowering
157: * me if you only have 4 SCBs.
158: */
159: #define AIC7XXX_CMDS_PER_LUN 2
160:
161: /* Set this to the delay in seconds after SCSI bus reset. */
162: #define AIC7XXX_RESET_DELAY 15
163:
164: /*
165: * Uncomment the following define for collection of SCSI transfer statistics
166: * for the /proc filesystem.
167: *
168: * NOTE: This does affect performance since it has to maintain statistics.
169: */
170: /* #define AIC7XXX_PROC_STATS */
171:
172: /*
173: * For debugging the abort/reset code.
174: */
175: /* #define AIC7XXX_DEBUG_ABORT */
176:
177: /*
178: * For general debug messages
179: */
180: #define AIC7XXX_DEBUG
181:
182: /*
183: * Controller type and options
184: */
185: typedef enum {
186: AIC_NONE,
187: AIC_7770, /* EISA aic7770 on motherboard */
188: AIC_7771, /* EISA aic7771 on 274x */
189: AIC_284x, /* VLB aic7770 on 284x */
190: AIC_7850, /* PCI aic7850 */
191: AIC_7870, /* PCI aic7870 on motherboard */
192: AIC_7871, /* PCI aic7871 on 294x */
193: AIC_7872, /* PCI aic7872 on 3940 */
194: AIC_7873, /* PCI aic7873 on 3985 */
195: AIC_7874, /* PCI aic7874 on 294x Differential */
196: AIC_7880, /* PCI aic7880 on motherboard */
197: AIC_7881, /* PCI aic7881 on 294x Ultra */
198: AIC_7882, /* PCI aic7882 on 3940 Ultra */
199: AIC_7883, /* PCI aic7883 on 3985 Ultra */
200: AIC_7884 /* PCI aic7884 on 294x Ultra Differential */
201: } aha_type;
202:
203: typedef enum {
204: AIC_777x, /* AIC-7770 based */
205: AIC_785x, /* AIC-7850 based */
206: AIC_787x, /* AIC-7870 based */
207: AIC_788x /* AIC-7880 based */
208: } aha_chip_type;
209:
210: typedef enum {
211: AIC_SINGLE, /* Single Channel */
212: AIC_TWIN, /* Twin Channel */
213: AIC_WIDE /* Wide Channel */
214: } aha_bus_type;
215:
216: typedef enum {
217: AIC_UNKNOWN,
218: AIC_ENABLED,
219: AIC_DISABLED
220: } aha_status_type;
221:
222: typedef enum {
223: LIST_HEAD,
224: LIST_SECOND
225: } insert_type;
226:
227: typedef enum {
228: ABORT_RESET_INACTIVE,
229: ABORT_RESET_PENDING,
230: ABORT_RESET_SUCCESS
231: } aha_abort_reset_type;
232:
233: /*
234: * Define an array of board names that can be indexed by aha_type.
235: * Don't forget to change this when changing the types!
236: */
237: static const char * board_names[] = {
238: "<AIC-7xxx Unknown>", /* AIC_NONE */
239: "AIC-7770", /* AIC_7770 */
240: "AHA-2740", /* AIC_7771 */
241: "AHA-2840", /* AIC_284x */
242: "AIC-7850", /* AIC_7850 */
243: "AIC-7870", /* AIC_7870 */
244: "AHA-2940", /* AIC_7871 */
245: "AHA-3940", /* AIC_7872 */
246: "AHA-3985", /* AIC_7873 */
247: "AHA-2940 Differential", /* AIC_7874 */
248: "AIC-7880 Ultra", /* AIC_7880 */
249: "AHA-2940 Ultra", /* AIC_7881 */
250: "AHA-3940 Ultra", /* AIC_7882 */
251: "AHA-3985 Ultra", /* AIC_7883 */
252: "AHA-2940 Ultra Differential" /* AIC_7884 */
253: };
254:
255: /*
256: * There should be a specific return value for this in scsi.h, but
257: * it seems that most drivers ignore it.
258: */
259: #define DID_UNDERFLOW DID_ERROR
260:
261: /*
262: * What we want to do is have the higher level scsi driver requeue
263: * the command to us. There is no specific driver status for this
264: * condition, but the higher level scsi driver will requeue the
265: * command on a DID_BUS_BUSY error.
266: */
267: #define DID_RETRY_COMMAND DID_BUS_BUSY
268:
269: /*
270: * EISA/VL-bus stuff
271: */
272: #define MINSLOT 1
273: #define MAXSLOT 15
274: #define SLOTBASE(x) ((x) << 12)
275: #define MAXIRQ 15
276:
277: /*
278: * Standard EISA Host ID regs (Offset from slot base)
279: */
280: #define HID0 0x80 /* 0,1: msb of ID2, 2-7: ID1 */
281: #define HID1 0x81 /* 0-4: ID3, 5-7: LSB ID2 */
282: #define HID2 0x82 /* product */
283: #define HID3 0x83 /* firmware revision */
284:
285: /*
286: * AIC-7770 I/O range to reserve for a card
287: */
288: #define MINREG 0xC00
289: #define MAXREG 0xCBF
290:
291: #define INTDEF 0x5C /* Interrupt Definition Register */
292:
293: /*
294: * Some defines for the HCNTRL register.
295: */
296: #define REQ_PAUSE IRQMS | INTEN | PAUSE
297: #define UNPAUSE_274X IRQMS | INTEN
298: #define UNPAUSE_284X INTEN
299: #define UNPAUSE_294X IRQMS | INTEN
300:
301: /*
302: * AIC-78X0 PCI registers
303: */
304: #define CLASS_PROGIF_REVID 0x08
305: #define DEVREVID 0x000000FFul
306: #define PROGINFC 0x0000FF00ul
307: #define SUBCLASS 0x00FF0000ul
308: #define BASECLASS 0xFF000000ul
309:
310: #define CSIZE_LATTIME 0x0C
311: #define CACHESIZE 0x0000003Ful /* only 5 bits */
312: #define LATTIME 0x0000FF00ul
313:
314: #define DEVCONFIG 0x40
315: #define MPORTMODE 0x00000400ul /* aic7870 only */
316: #define RAMPSM 0x00000200ul /* aic7870 only */
317: #define VOLSENSE 0x00000100ul
318: #define SCBRAMSEL 0x00000080ul
319: #define MRDCEN 0x00000040ul
320: #define EXTSCBTIME 0x00000020ul /* aic7870 only */
321: #define EXTSCBPEN 0x00000010ul /* aic7870 only */
322: #define BERREN 0x00000008ul
323: #define DACEN 0x00000004ul
324: #define STPWLEVEL 0x00000002ul
325: #define DIFACTNEGEN 0x00000001ul /* aic7870 only */
326:
327: /*
328: *
329: * Define the format of the SEEPROM registers (16 bits).
330: *
331: */
332: struct seeprom_config {
333:
334: /*
335: * SCSI ID Configuration Flags
336: */
337: #define CFXFER 0x0007 /* synchronous transfer rate */
338: #define CFSYNCH 0x0008 /* enable synchronous transfer */
339: #define CFDISC 0x0010 /* enable disconnection */
340: #define CFWIDEB 0x0020 /* wide bus device (wide card) */
341: /* UNUSED 0x00C0 */
342: #define CFSTART 0x0100 /* send start unit SCSI command */
343: #define CFINCBIOS 0x0200 /* include in BIOS scan */
344: #define CFRNFOUND 0x0400 /* report even if not found */
345: /* UNUSED 0xF800 */
346: unsigned short device_flags[16]; /* words 0-15 */
347:
348: /*
349: * BIOS Control Bits
350: */
351: #define CFSUPREM 0x0001 /* support all removeable drives */
352: #define CFSUPREMB 0x0002 /* support removeable drives for boot only */
353: #define CFBIOSEN 0x0004 /* BIOS enabled */
354: /* UNUSED 0x0008 */
355: #define CFSM2DRV 0x0010 /* support more than two drives */
356: #define CF284XEXTEND 0x0020 /* extended translation (284x cards) */
357: /* UNUSED 0x0040 */
358: #define CFEXTEND 0x0080 /* extended translation enabled */
359: /* UNUSED 0xFF00 */
360: unsigned short bios_control; /* word 16 */
361:
362: /*
363: * Host Adapter Control Bits
364: */
365: /* UNUSED 0x0001 */
366: #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */
367: #define CF284XSELTO 0x0003 /* Selection timeout (284x cards) */
368: #define CF284XFIFO 0x000C /* FIFO Threshold (284x cards) */
369: #define CFSTERM 0x0004 /* SCSI low byte termination (non-wide cards) */
370: #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */
371: #define CFSPARITY 0x0010 /* SCSI parity */
372: #define CF284XSTERM 0x0020 /* SCSI low byte termination (284x cards) */
373: #define CFRESETB 0x0040 /* reset SCSI bus at IC initialization */
374: /* UNUSED 0xFF80 */
375: unsigned short adapter_control; /* word 17 */
376:
377: /*
378: * Bus Release, Host Adapter ID
379: */
380: #define CFSCSIID 0x000F /* host adapter SCSI ID */
381: /* UNUSED 0x00F0 */
382: #define CFBRTIME 0xFF00 /* bus release time */
383: unsigned short brtime_id; /* word 18 */
384:
385: /*
386: * Maximum targets
387: */
388: #define CFMAXTARG 0x00FF /* maximum targets */
389: /* UNUSED 0xFF00 */
390: unsigned short max_targets; /* word 19 */
391:
392: unsigned short res_1[11]; /* words 20-30 */
393: unsigned short checksum; /* word 31 */
394: };
395:
396: /*
397: * Pause the sequencer and wait for it to actually stop - this
398: * is important since the sequencer can disable pausing for critical
399: * sections.
400: */
401: #define PAUSE_SEQUENCER(p) \
402: outb(p->pause, HCNTRL + p->base); \
403: while ((inb(HCNTRL + p->base) & PAUSE) == 0) \
404: ; \
405:
406: /*
407: * Unpause the sequencer. Unremarkable, yet done often enough to
408: * warrant an easy way to do it.
409: */
410: #define UNPAUSE_SEQUENCER(p) \
411: outb(p->unpause, HCNTRL + p->base)
412:
413: /*
414: * Restart the sequencer program from address zero
415: */
416: #define RESTART_SEQUENCER(p) \
417: do { \
418: outb(SEQRESET | FASTMODE, SEQCTL + p->base); \
419: } while (inb(SEQADDR0 + p->base) != 0 && \
420: inb(SEQADDR1 + p->base) != 0); \
421: UNPAUSE_SEQUENCER(p);
422:
423: /*
424: * If an error occurs during a data transfer phase, run the comand
425: * to completion - it's easier that way - making a note of the error
426: * condition in this location. This then will modify a DID_OK status
427: * into an appropriate error for the higher-level SCSI code.
428: */
429: #define aic7xxx_error(cmd) ((cmd)->SCp.Status)
430:
431: /*
432: * Keep track of the targets returned status.
433: */
434: #define aic7xxx_status(cmd) ((cmd)->SCp.sent_command)
435:
436: /*
437: * The position of the SCSI commands scb within the scb array.
438: */
439: #define aic7xxx_position(cmd) ((cmd)->SCp.have_data_in)
440:
441: /*
442: * Since the sequencer code DMAs the scatter-gather structures
443: * directly from memory, we use this macro to assert that the
444: * kernel structure hasn't changed.
445: */
446: #define SG_STRUCT_CHECK(sg) \
447: ((char *) &(sg).address - (char *) &(sg) != 0 || \
448: (char *) &(sg).length - (char *) &(sg) != 8 || \
449: sizeof((sg).address) != 4 || \
450: sizeof((sg).length) != 4 || \
451: sizeof(sg) != 12)
452:
453: /*
454: * "Static" structures. Note that these are NOT initialized
455: * to zero inside the kernel - we have to initialize them all
456: * explicitly.
457: *
458: * We support multiple adapter cards per interrupt, but keep a
459: * linked list of Scsi_Host structures for each IRQ. On an interrupt,
460: * use the IRQ as an index into aic7xxx_boards[] to locate the card
461: * information.
462: */
463: static struct Scsi_Host *aic7xxx_boards[MAXIRQ + 1];
464:
465: /*
466: * When we detect and register the card, it is possible to
467: * have the card raise a spurious interrupt. Because we need
468: * to support multiple cards, we cannot tell which card caused
469: * the spurious interrupt. And, we might not even have added
470: * the card info to the linked list at the time the spurious
471: * interrupt gets raised. This variable is suppose to keep track
472: * of when we are registering a card and how many spurious
473: * interrupts we have encountered.
474: *
475: * 0 - do not allow spurious interrupts.
476: * 1 - allow 1 spurious interrupt
477: * 2 - have 1 spurious interrupt, do not allow any more.
478: *
479: * I've made it an integer instead of a boolean in case we
480: * want to allow more than one spurious interrupt for debugging
481: * purposes. Otherwise, it could just go from true to false to
482: * true (or something like that).
483: *
484: * When the driver detects the cards, we'll set the count to 1
485: * for each card detection and registration. After the registration
486: * of a card completes, we'll set the count back to 0. So far, it
487: * seems to be enough to allow a spurious interrupt only during
488: * card registration; if a spurious interrupt is going to occur,
489: * this is where it happens.
490: *
491: * We should be able to find a way to avoid getting the spurious
492: * interrupt. But until we do, we have to keep this ugly code.
493: */
494: static int aic7xxx_spurious_count;
495:
496: /*
497: * The driver keeps up to four scb structures per card in memory. Only the
498: * first 25 bytes of the structure are valid for the hardware, the rest used
499: * for driver level bookkeeping.
500: */
501:
502: struct aic7xxx_scb {
503: /* ------------ Begin hardware supported fields ---------------- */
504: /* 0*/ unsigned char control;
505: /* 1*/ unsigned char target_channel_lun; /* 4/1/3 bits */
506: /* 2*/ unsigned char target_status;
507: /* 3*/ unsigned char SG_segment_count;
508: /* 4*/ unsigned char SG_list_pointer[4] __attribute__ ((packed));
509: /* 8*/ unsigned char residual_SG_segment_count;
510: /* 9*/ unsigned char residual_data_count[3];
511: /*12*/ unsigned char data_pointer[4] __attribute__ ((packed));
512: /*16*/ unsigned long data_count;
513: /*20*/ unsigned char SCSI_cmd_pointer[4] __attribute__ ((packed));
514: /*24*/ unsigned char SCSI_cmd_length;
515: #define SCB_PIO_TRANSFER_SIZE 25 /*
516: * amount we need to upload/download
517: * via rep in/outsb to perform
518: * a request sense. The second
519: * RESERVED byte is initialized to
520: * 0 in getscb().
521: */
522: /*25*/ u_char next_waiting; /* Used to thread SCBs awaiting selection. */
523: /*-----------------end of hardware supported fields----------------*/
524: struct aic7xxx_scb *next; /* next ptr when in free list */
525: Scsi_Cmnd *cmd; /* Scsi_Cmnd for this scb */
526: #define SCB_FREE 0x00
527: #define SCB_ACTIVE 0x01
528: #define SCB_ABORTED 0x02
529: #define SCB_DEVICE_RESET 0x04
530: #define SCB_IMMED 0x08
531: #define SCB_SENSE 0x10
532: int state; /* current state of scb */
533: unsigned int position; /* Position in scb array */
534: struct scatterlist sg;
535: struct scatterlist sense_sg;
536: unsigned char sense_cmd[6]; /* Allocate 6 characters for sense command */
537: };
538:
539: static struct {
540: unsigned char errno;
541: const char *errmesg;
542: } hard_error[] = {
543: { ILLHADDR, "Illegal Host Access" },
544: { ILLSADDR, "Illegal Sequencer Address referrenced" },
545: { ILLOPCODE, "Illegal Opcode in sequencer program" },
546: { PARERR, "Sequencer Ram Parity Error" }
547: };
548:
549: static unsigned char
550: generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 };
551:
552: /*
553: * The maximum number of SCBs we could have for ANY type
554: * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE
555: * SEQUENCER CODE IF THIS IS MODIFIED!
556: */
557: #define AIC7XXX_MAXSCB 255
558:
559: /*
560: * Define a structure used for each host adapter, only one per IRQ.
561: */
562: struct aic7xxx_host {
563: int base; /* card base address */
564: int maxscb; /* hardware SCBs */
565: int numscb; /* current number of scbs */
566: int extended; /* extended xlate? */
567: aha_type type; /* card type */
568: aha_chip_type chip_type; /* chip base type */
569: int ultra_enabled; /* Ultra SCSI speed enabled */
570: int chan_num; /* for 3940/3985, channel number */
571: aha_bus_type bus_type; /* normal/twin/wide bus */
572: unsigned char a_scanned; /* 0 not scanned, 1 scanned */
573: unsigned char b_scanned; /* 0 not scanned, 1 scanned */
574: unsigned int isr_count; /* Interrupt count */
575: volatile unsigned char unpause; /* unpause value for HCNTRL */
576: volatile unsigned char pause; /* pause value for HCNTRL */
577: volatile unsigned short needsdtr_copy; /* default config */
578: volatile unsigned short needsdtr;
579: volatile unsigned short sdtr_pending;
580: volatile unsigned short needwdtr_copy; /* default config */
581: volatile unsigned short needwdtr;
582: volatile unsigned short wdtr_pending;
583: volatile unsigned short discenable; /* Targets allowed to disconnect */
584: struct seeprom_config seeprom;
585: int have_seeprom;
586: struct Scsi_Host *next; /* allow for multiple IRQs */
587: struct aic7xxx_scb scb_array[AIC7XXX_MAXSCB]; /* active commands */
588: struct aic7xxx_scb *free_scb; /* list of free SCBs */
589: #ifdef AIC7XXX_PROC_STATS
590: /*
591: * Statistics Kept:
592: *
593: * Total Xfers (count for each command that has a data xfer),
594: * broken down further by reads && writes.
595: *
596: * Binned sizes, writes && reads:
597: * < 512, 512, 1-2K, 2-4K, 4-8K, 8-16K, 16-32K, 32-64K, 64K-128K, > 128K
598: *
599: * Total amounts read/written above 512 bytes (amts under ignored)
600: */
601: struct aic7xxx_xferstats {
602: long xfers; /* total xfer count */
603: long w_total; /* total writes */
604: long w_total512; /* 512 byte blocks written */
605: long w_bins[10]; /* binned write */
606: long r_total; /* total reads */
607: long r_total512; /* 512 byte blocks read */
608: long r_bins[10]; /* binned reads */
609: } stats[2][16][8]; /* channel, target, lun */
610: #endif /* AIC7XXX_PROC_STATS */
611: };
612:
613: struct aic7xxx_host_config {
614: int irq; /* IRQ number */
615: int base; /* I/O base */
616: int maxscb; /* hardware SCBs */
617: int unpause; /* unpause value for HCNTRL */
618: int pause; /* pause value for HCNTRL */
619: int scsi_id; /* host SCSI ID */
620: int scsi_id_b; /* host SCSI ID B channel for twin cards */
621: int extended; /* extended xlate? */
622: int busrtime; /* bus release time */
623: int walk_scbs; /* external SCB RAM detected; walk the scb array */
624: aha_type type; /* card type */
625: aha_chip_type chip_type; /* chip base type */
626: int ultra_enabled; /* Ultra SCSI speed enabled */
627: int chan_num; /* for 3940/3985, channel number */
628: aha_bus_type bus_type; /* normal/twin/wide bus */
629: aha_status_type parity; /* bus parity enabled/disabled */
630: aha_status_type low_term; /* bus termination low byte */
631: aha_status_type high_term; /* bus termination high byte (wide cards only) */
632: };
633:
634: /*
635: * Valid SCSIRATE values. (p. 3-17)
636: * Provides a mapping of tranfer periods in ns to the proper value to
637: * stick in the scsiscfr reg to use that transfer rate.
638: */
639: static struct {
640: short period;
641: /* Rates in Ultra mode have bit 8 of sxfr set */
642: #define ULTRA_SXFR 0x100
643: short rate;
644: const char *english;
645: } aic7xxx_syncrates[] = {
646: { 50, 0x100, "20.0" },
647: { 62, 0x110, "16.0" },
648: { 75, 0x120, "13.4" },
649: { 100, 0x140, "10.0" },
650: { 100, 0x000, "10.0" },
651: { 125, 0x010, "8.0" },
652: { 150, 0x020, "6.67" },
653: { 175, 0x030, "5.7" },
654: { 200, 0x040, "5.0" },
655: { 225, 0x050, "4.4" },
656: { 250, 0x060, "4.0" },
657: { 275, 0x070, "3.6" }
658: };
659:
660: static int num_aic7xxx_syncrates =
661: sizeof(aic7xxx_syncrates) / sizeof(aic7xxx_syncrates[0]);
662:
663: #ifdef CONFIG_PCI
664: static int number_of_39xxs = 0;
665: #endif CONFIG_PCI
666:
667: #ifdef AIC7XXX_DEBUG
668: static void
669: debug(const char *fmt, ...)
670: {
671: va_list ap;
672: char buf[256];
673:
674: va_start(ap, fmt);
675: vsprintf(buf, fmt, ap);
676: printk(buf);
677: va_end(ap);
678: }
679:
680: static void
681: debug_config(struct aic7xxx_host_config *p)
682: {
683: int host_conf, scsi_conf;
684: unsigned char brelease;
685: unsigned char dfthresh;
686:
687: static int DFT[] = { 0, 50, 75, 100 };
688: static int SST[] = { 256, 128, 64, 32 };
689: static const char *BUSW[] = { "", "-TWIN", "-WIDE" };
690:
691: host_conf = inb(HOSTCONF + p->base);
692: scsi_conf = inb(SCSICONF + p->base);
693:
694: /*
695: * The 7870 gets the bus release time and data FIFO threshold
696: * from the serial EEPROM (stored in the config structure) and
697: * scsi_conf register respectively. The 7770 gets the bus
698: * release time and data FIFO threshold from the scsi_conf and
699: * host_conf registers respectively.
700: */
701: if (p->chip_type == AIC_777x)
702: {
703: dfthresh = (host_conf >> 6);
704: }
705: else
706: {
707: dfthresh = (scsi_conf >> 6);
708: }
709:
710: brelease = p->busrtime;
711: if (brelease == 0)
712: {
713: brelease = 2;
714: }
715:
716: switch (p->type)
717: {
718: case AIC_7770:
719: case AIC_7771:
720: printk("%s%s AT EISA SLOT %d:\n", board_names[p->type], BUSW[p->bus_type],
721: p->base >> 12);
722: break;
723:
724: case AIC_284x:
725: printk("%s%s AT VLB SLOT %d:\n", board_names[p->type], BUSW[p->bus_type],
726: p->base >> 12);
727: break;
728:
729: case AIC_7850:
730: case AIC_7870:
731: case AIC_7871:
732: case AIC_7872:
733: case AIC_7873:
734: case AIC_7874:
735: case AIC_7880:
736: case AIC_7881:
737: case AIC_7882:
738: case AIC_7883:
739: case AIC_7884:
740: printk("%s%s (PCI-bus):\n", board_names[p->type], BUSW[p->bus_type]);
741: break;
742:
743: default:
744: panic("aic7xxx: (debug_config) internal error.\n");
745: }
746:
747: printk(" irq %d\n"
748: " bus release time %d bclks\n"
749: " data fifo threshold %d%%\n",
750: p->irq,
751: brelease,
752: DFT[dfthresh]);
753:
754: printk(" SCSI CHANNEL A:\n"
755: " scsi id %d\n"
756: " scsi selection timeout %d ms\n"
757: " scsi bus reset at power-on %sabled\n",
758: scsi_conf & 0x07,
759: SST[(scsi_conf >> 3) & 0x03],
760: (scsi_conf & 0x40) ? "en" : "dis");
761:
762: if ((p->chip_type == AIC_777x) && (p->parity == AIC_UNKNOWN))
763: {
764: /*
765: * Set the parity for 7770 based cards.
766: */
767: p->parity = (scsi_conf & 0x20) ? AIC_ENABLED : AIC_DISABLED;
768: }
769: if (p->parity != AIC_UNKNOWN)
770: {
771: printk(" scsi bus parity %sabled\n",
772: (p->parity == AIC_ENABLED) ? "en" : "dis");
773: }
774:
775: if ((p->type == AIC_7770) || (p->type == AIC_7771))
776: {
777: p->low_term = (scsi_conf & 0x80) ? AIC_ENABLED : AIC_DISABLED;
778: }
779: if (p->low_term != AIC_UNKNOWN)
780: {
781: printk(" scsi bus termination (low byte) %sabled\n",
782: (p->low_term == AIC_ENABLED) ? "en" : "dis");
783: }
784: if ((p->bus_type == AIC_WIDE) && (p->high_term != AIC_UNKNOWN))
785: {
786: printk(" scsi bus termination (high byte) %sabled\n",
787: (p->high_term == AIC_ENABLED) ? "en" : "dis");
788: }
789: }
790:
791: #if 0
792: static void
793: debug_scb(struct aic7xxx_scb *scb)
794: {
795: printk("control 0x%x, tcl 0x%x, sg_count %d, sg_ptr 0x%x, cmdp 0x%x, cmdlen %d\n",
796: scb->control, scb->target_channel_lun, scb->SG_segment_count,
797: (scb->SG_list_pointer[3] << 24) | (scb->SG_list_pointer[2] << 16) |
798: (scb->SG_list_pointer[1] << 8) | scb->SG_list_pointer[0],
799: (scb->SCSI_cmd_pointer[3] << 24) | (scb->SCSI_cmd_pointer[2] << 16) |
800: (scb->SCSI_cmd_pointer[1] << 8) | scb->SCSI_cmd_pointer[0],
801: scb->SCSI_cmd_length);
802: printk("reserved 0x%x, target status 0x%x, resid SG count %d, resid data count %d\n",
803: (scb->RESERVED[1] << 8) | scb->RESERVED[0], scb->target_status,
804: scb->residual_SG_segment_count, scb->residual_data_count);
805: printk("data ptr 0x%x, data count %d, next waiting %d\n",
806: (scb->data_pointer[3] << 24) | (scb->data_pointer[2] << 16) |
807: (scb->data_pointer[1] << 8) | scb->data_pointer[0],
808: scb->data_count, scb->next_waiting);
809: printk("next ptr 0x%lx, Scsi Cmnd 0x%lx, state 0x%x, position %d\n",
810: (unsigned long) scb->next, (unsigned long) scb->cmd, scb->state,
811: scb->position);
812: }
813: #endif
814:
815: #else
816: # define debug(fmt, args...)
817: # define debug_config(x)
818: # define debug_scb(x)
819: #endif AIC7XXX_DEBUG
820:
821: /*
822: * XXX - these options apply unilaterally to _all_ 274x/284x/294x
823: * cards in the system. This should be fixed, but then,
824: * does anyone really have more than one in a machine?
825: */
826: static unsigned int aic7xxx_extended = 0; /* extended translation on? */
827: static unsigned int aic7xxx_no_reset = 0; /* no resetting of SCSI bus */
828:
829: /*+F*************************************************************************
830: * Function:
831: * aic7xxx_setup
832: *
833: * Description:
834: * Handle Linux boot parameters. This routine allows for assigning a value
835: * to a parameter with a ':' between the parameter and the value.
836: * ie. aic7xxx=unpause:0x0A,extended
837: *-F*************************************************************************/
838: void
839: aic7xxx_setup(char *s, int *dummy)
840: {
841: int i, n;
842: char *p;
843:
844: static struct {
845: const char *name;
846: unsigned int *flag;
847: } options[] = {
848: { "extended", &aic7xxx_extended },
849: { "no_reset", &aic7xxx_no_reset },
850: { NULL, NULL }
851: };
852:
853: for (p = strtok(s, ","); p; p = strtok(NULL, ","))
854: {
855: for (i = 0; options[i].name; i++)
856: {
857: n = strlen(options[i].name);
858: if (!strncmp(options[i].name, p, n))
859: {
860: if (p[n] == ':')
861: {
862: *(options[i].flag) = simple_strtoul(p + n + 1, NULL, 0);
863: }
864: else
865: {
866: *(options[i].flag) = !0;
867: }
868: }
869: }
870: }
871: }
872:
873: /*+F*************************************************************************
874: * Function:
875: * aic7xxx_loadseq
876: *
877: * Description:
878: * Load the sequencer code into the controller memory.
879: *-F*************************************************************************/
880: static void
881: aic7xxx_loadseq(int base)
882: {
883: static unsigned char seqprog[] = {
884: /*
885: * Each sequencer instruction is 29 bits
886: * long (fill in the excess with zeroes)
887: * and has to be loaded from least -> most
888: * significant byte, so this table has the
889: * byte ordering reversed.
890: */
891: # include "aic7xxx_seq.h"
892: };
893:
894: /*
895: * When the AIC-7770 is paused (as on chip reset), the
896: * sequencer address can be altered and a sequencer
897: * program can be loaded by writing it, byte by byte, to
898: * the sequencer RAM port - the Adaptec documentation
899: * recommends using REP OUTSB to do this, hence the inline
900: * assembly. Since the address autoincrements as we load
901: * the program, reset it back to zero afterward. Disable
902: * sequencer RAM parity error detection while loading, and
903: * make sure the LOADRAM bit is enabled for loading.
904: */
905: outb(PERRORDIS | SEQRESET | LOADRAM, SEQCTL + base);
906:
907: outsb(SEQRAM + base, seqprog, sizeof(seqprog));
908:
909: /*
910: * WARNING! This is a magic sequence! After extensive
911: * experimentation, it seems that you MUST turn off the
912: * LOADRAM bit before you play with SEQADDR again, else
913: * you will end up with parity errors being flagged on
914: * your sequencer program. (You would also think that
915: * turning off LOADRAM and setting SEQRESET to reset the
916: * address to zero would work, but you need to do it twice
917: * for it to take effect on the address. Timing problem?)
918: */
919: do {
920: /*
921: * Actually, reset it until
922: * the address shows up as
923: * zero just to be safe..
924: */
925: outb(SEQRESET | FASTMODE, SEQCTL + base);
926: } while ((inb(SEQADDR0 + base) != 0) && (inb(SEQADDR1 + base) != 0));
927: }
928:
929: /*+F*************************************************************************
930: * Function:
931: * aic7xxx_delay
932: *
933: * Description:
934: * Delay for specified amount of time.
935: *-F*************************************************************************/
936: static void
937: aic7xxx_delay(int seconds)
938: {
939: unsigned long i;
940:
941: i = jiffies + (seconds * HZ); /* compute time to stop */
942:
943: while (jiffies < i)
944: {
945: ; /* Do nothing! */
946: }
947: }
948:
949: /*+F*************************************************************************
950: * Function:
951: * rcs_version
952: *
953: * Description:
954: * Return a string containing just the RCS version number from either
955: * an Id or Revison RCS clause.
956: *-F*************************************************************************/
957: const char *
958: rcs_version(const char *version_info)
959: {
960: static char buf[10];
961: char *bp, *ep;
962:
963: bp = NULL;
964: strcpy(buf, "????");
965: if (!strncmp(version_info, "$Id: ", 5))
966: {
967: if ((bp = strchr(version_info, ' ')) != NULL)
968: {
969: bp++;
970: if ((bp = strchr(bp, ' ')) != NULL)
971: {
972: bp++;
973: }
974: }
975: }
976: else
977: {
978: if (!strncmp(version_info, "$Revision: ", 11))
979: {
980: if ((bp = strchr(version_info, ' ')) != NULL)
981: {
982: bp++;
983: }
984: }
985: }
986:
987: if (bp != NULL)
988: {
989: if ((ep = strchr(bp, ' ')) != NULL)
990: {
991: register int len = ep - bp;
992:
993: strncpy(buf, bp, len);
994: buf[len] = '\0';
995: }
996: }
997:
998: return buf;
999: }
1000:
1001: /*+F*************************************************************************
1002: * Function:
1003: * aic7xxx_info
1004: *
1005: * Description:
1006: * Return a string describing the driver.
1007: *-F*************************************************************************/
1008: const char *
1009: aic7xxx_info(struct Scsi_Host *notused)
1010: {
1011: static char buffer[128];
1012:
1013: strcpy(buffer, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) ");
1014: strcat(buffer, rcs_version(AIC7XXX_C_VERSION));
1015: strcat(buffer, "/");
1016: strcat(buffer, rcs_version(AIC7XXX_H_VERSION));
1017: strcat(buffer, "/");
1018: strcat(buffer, rcs_version(AIC7XXX_SEQ_VER));
1019:
1020: return buffer;
1021: }
1022:
1023: /*+F*************************************************************************
1024: * Function:
1025: * aic7xxx_length
1026: *
1027: * Description:
1028: * How much data should be transferred for this SCSI command? Stop
1029: * at segment sg_last if it's a scatter-gather command so we can
1030: * compute underflow easily.
1031: *-F*************************************************************************/
1032: static unsigned
1033: aic7xxx_length(Scsi_Cmnd *cmd, int sg_last)
1034: {
1035: int i, segments;
1036: unsigned length;
1037: struct scatterlist *sg;
1038:
1039: segments = cmd->use_sg - sg_last;
1040: sg = (struct scatterlist *) cmd->buffer;
1041:
1042: if (cmd->use_sg)
1043: {
1044: for (i = length = 0; (i < cmd->use_sg) && (i < segments); i++)
1045: {
1046: length += sg[i].length;
1047: }
1048: }
1049: else
1050: {
1051: length = cmd->request_bufflen;
1052: }
1053:
1054: return (length);
1055: }
1056:
1057: /*+F*************************************************************************
1058: * Function:
1059: * aic7xxx_scsirate
1060: *
1061: * Description:
1062: * Look up the valid period to SCSIRATE conversion in our table
1063: *-F*************************************************************************/
1064: static void
1065: aic7xxx_scsirate(struct aic7xxx_host *p, unsigned char *scsirate,
1066: short period, unsigned char offset,
1067: int target, char channel)
1068: {
1069: int i;
1070:
1071: for (i = 0; i < num_aic7xxx_syncrates; i++)
1072: {
1073: if ((aic7xxx_syncrates[i].period - period) >= 0)
1074: {
1075: /*
1076: * Watch out for Ultra speeds when ultra is not enabled and
1077: * vice-versa.
1078: */
1079: if (p->ultra_enabled)
1080: {
1081: if (!(aic7xxx_syncrates[i].rate & ULTRA_SXFR))
1082: {
1083: printk ("aic7xxx: Target %d, channel %c, requests %sMHz transfers, "
1084: "but adapter in Ultra mode can only sync at 10MHz or "
1085: "above.\n", target, channel, aic7xxx_syncrates[i].english);
1086: break; /* Use asynchronous transfers. */
1087: }
1088: }
1089: else
1090: {
1091: /*
1092: * Check for an Ultra device trying to negotiate an Ultra rate
1093: * on an adapter with Ultra mode disabled.
1094: */
1095: if (aic7xxx_syncrates[i].rate & ULTRA_SXFR)
1096: {
1097: /*
1098: * This should only happen if the driver is the first to negotiate
1099: * and chooses a high rate. We'll just move down the table until
1100: * we hit a non Ultra speed.
1101: */
1102: continue;
1103: }
1104: }
1105: *scsirate = (aic7xxx_syncrates[i].rate) | (offset & 0x0F);
1106: printk("aic7xxx: Target %d, channel %c, now synchronous at %sMHz, "
1107: "offset(0x%x).\n",
1108: target, channel, aic7xxx_syncrates[i].english, offset);
1109: return;
1110: }
1111: }
1112:
1113: /*
1114: * Default to asynchronous transfer
1115: */
1116: *scsirate = 0;
1117: printk("aic7xxx: Target %d, channel %c, using asynchronous transfers.\n",
1118: target, channel);
1119: }
1120:
1121: /*+F*************************************************************************
1122: * Function:
1123: * aic7xxx_putscb
1124: *
1125: * Description:
1126: * Transfer a SCB to the controller.
1127: *-F*************************************************************************/
1128: static inline void
1129: aic7xxx_putscb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
1130: {
1131: unsigned char curscb;
1132: int base = p->base;
1133:
1134: curscb = inb(SCBPTR + base);
1135: outb(scb->position, SCBPTR + base);
1136: outb(SCBAUTO, SCBCNT + base);
1137:
1138: /*
1139: * By turning on the SCB auto increment, any reference
1140: * to the SCB I/O space postincrements the SCB address
1141: * we're looking at. So turn this on and dump the relevant
1142: * portion of the SCB to the card.
1143: *
1144: * We can do 16bit transfers on all but 284x.
1145: */
1146: if (p->type == AIC_284x)
1147: {
1148: outsb(SCBARRAY + base, scb, SCB_PIO_TRANSFER_SIZE);
1149: }
1150: else
1151: {
1152: outsl(SCBARRAY + base, scb, (SCB_PIO_TRANSFER_SIZE + 3) / 4);
1153: }
1154:
1155: outb(0, SCBCNT + base);
1156: outb(curscb, SCBPTR + base);
1157: }
1158:
1159: /*+F*************************************************************************
1160: * Function:
1161: * aic7xxx_getscb
1162: *
1163: * Description:
1164: * Get a SCB from the controller.
1165: *-F*************************************************************************/
1166: static inline void
1167: aic7xxx_getscb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
1168: {
1169: int base = p->base;
1170:
1171: /*
1172: * This is almost identical to aic7xxx_putscb().
1173: */
1174: outb(SCBAUTO, SCBCNT + base);
1175: insb(SCBARRAY + base, scb, SCB_PIO_TRANSFER_SIZE);
1176: outb(0, SCBCNT + base);
1177: }
1178:
1179: /*+F*************************************************************************
1180: * Function:
1181: * aic7xxx_match_scb
1182: *
1183: * Description:
1184: * Checks to see if an scb matches the target/channel as specified.
1185: * If target is ALL_TARGETS (-1), then we're looking for any device
1186: * on the specified channel; this happens when a channel is going
1187: * to be reset and all devices on that channel must be aborted.
1188: *-F*************************************************************************/
1189: static int
1190: aic7xxx_match_scb(struct aic7xxx_scb *scb, int target, char channel)
1191: {
1192: int targ = (scb->target_channel_lun >> 4) & 0x0F;
1193: char chan = (scb->target_channel_lun & SELBUSB) ? 'B' : 'A';
1194:
1195: #ifdef AIC7XXX_DEBUG_ABORT
1196: printk ("aic7xxx: (match_scb) comparing target/channel %d/%c to scb %d/%c\n",
1197: target, channel, targ, chan);
1198: #endif
1199: if (target == ALL_TARGETS)
1200: {
1201: return (chan == channel);
1202: }
1203: else
1204: {
1205: return ((chan == channel) && (targ == target));
1206: }
1207: }
1208:
1209: /*+F*************************************************************************
1210: * Function:
1211: * aic7xxx_busy_target
1212: *
1213: * Description:
1214: * Set the specified target active.
1215: *-F*************************************************************************/
1216: static void
1217: aic7xxx_busy_target(unsigned char target, char channel, int base)
1218: {
1219: unsigned char active;
1220: unsigned long active_port = ACTIVE_A + base;
1221:
1222: if ((target > 0x07) || (channel == 'B'))
1223: {
1224: /*
1225: * targets on the Second channel or above id 7 store info in byte two
1226: * of ACTIVE
1227: */
1228: active_port++;
1229: }
1230: active = inb(active_port);
1231: active |= (0x01 << (target & 0x07));
1232: outb(active, active_port);
1233: }
1234:
1235: /*+F*************************************************************************
1236: * Function:
1237: * aic7xxx_unbusy_target
1238: *
1239: * Description:
1240: * Set the specified target inactive.
1241: *-F*************************************************************************/
1242: static void
1243: aic7xxx_unbusy_target(unsigned char target, char channel, int base)
1244: {
1245: unsigned char active;
1246: unsigned long active_port = ACTIVE_A + base;
1247:
1248: #ifdef 0
1249: printk ("aic7xxx: (unbusy_target) target/channel %d/%c\n",
1250: target, channel);
1251: #endif
1252: if ((target > 0x07) || (channel == 'B'))
1253: {
1254: /*
1255: * targets on the Second channel or above id 7 store info in byte two
1256: * of ACTIVE
1257: */
1258: active_port++;
1259: }
1260: active = inb(active_port);
1261: active &= ~(0x01 << (target & 0x07));
1262: outb(active, active_port);
1263: }
1264:
1265: /*+F*************************************************************************
1266: * Function:
1267: * aic7xxx_done
1268: *
1269: * Description:
1270: * Calls the higher level scsi done function and frees the scb.
1271: *-F*************************************************************************/
1272: static void
1273: aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
1274: {
1275: long flags;
1276: Scsi_Cmnd *cmd = scb->cmd;
1277:
1278: #ifdef 0
1279: printk ("aic7xxx: (done) target/channel %d/%d\n",
1280: cmd->target, cmd->channel);
1281: #endif
1282: /*
1283: * This is a critical section, since we don't want the
1284: * queue routine mucking with the host data.
1285: */
1286: save_flags(flags);
1287: cli();
1288:
1289: /*
1290: * Process the command after marking the scb as free
1291: * and adding it to the free list.
1292: */
1293: scb->state = SCB_FREE;
1294: scb->next = p->free_scb;
1295: p->free_scb = scb;
1296: scb->cmd = NULL;
1297:
1298: restore_flags(flags);
1299:
1300: cmd->scsi_done(cmd);
1301: }
1302:
1303: /*+F*************************************************************************
1304: * Function:
1305: * aic7xxx_add_waiting_scb
1306: *
1307: * Description:
1308: * Add this SCB to the "waiting for selection" list.
1309: *-F*************************************************************************/
1310: static void
1311: aic7xxx_add_waiting_scb(u_long base,
1312: struct aic7xxx_scb *scb,
1313: insert_type where)
1314: {
1315: unsigned char head;
1316: unsigned char curscb;
1317:
1318: curscb = inb(SCBPTR + base);
1319: head = inb(WAITING_SCBH + base);
1320: if (head == SCB_LIST_NULL)
1321: {
1322: /*
1323: * List was empty
1324: */
1325: head = scb->position;
1326: }
1327: else
1328: {
1329: if (where == LIST_HEAD)
1330: {
1331: outb(scb->position, SCBPTR + base);
1332: outb(head, SCB_NEXT_WAITING + base);
1333: head = scb->position;
1334: }
1335: else
1336: {
1337: /* where == LIST_SECOND */
1338: unsigned char third_scb;
1339:
1340: outb(head, SCBPTR + base);
1341: third_scb = inb(SCB_NEXT_WAITING + base);
1342: outb(scb->position, SCB_NEXT_WAITING + base);
1343: outb(scb->position, SCBPTR + base);
1344: outb(third_scb, SCB_NEXT_WAITING + base);
1345: }
1346: }
1347: outb(head, WAITING_SCBH + base);
1348: outb(curscb, SCBPTR + base);
1349: }
1350:
1351: /*+F*************************************************************************
1352: * Function:
1353: * aic7xxx_abort_waiting_scb
1354: *
1355: * Description:
1356: * Manipulate the waiting for selection list and return the
1357: * scb that follows the one that we remove.
1358: *-F*************************************************************************/
1359: static unsigned char
1360: aic7xxx_abort_waiting_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
1361: unsigned char prev, unsigned char timedout_scb)
1362: {
1363: unsigned char curscb, next;
1364: int target = (scb->target_channel_lun >> 4) & 0x0F;
1365: char channel = (scb->target_channel_lun & SELBUSB) ? 'B' : 'A';
1366: int base = p->base;
1367:
1368: /*
1369: * Select the SCB we want to abort and
1370: * pull the next pointer out of it.
1371: */
1372: curscb = inb(SCBPTR + base);
1373: outb(scb->position, SCBPTR + base);
1374: next = inb(SCB_NEXT_WAITING + base);
1375:
1376: /*
1377: * Clear the necessary fields
1378: */
1379: outb(0, SCBARRAY + base);
1380: outb(SCB_LIST_NULL, SCB_NEXT_WAITING + base);
1381: aic7xxx_unbusy_target(target, channel, base);
1382:
1383: /*
1384: * Update the waiting list
1385: */
1386: if (prev == SCB_LIST_NULL)
1387: {
1388: /*
1389: * First in the list
1390: */
1391: outb(next, WAITING_SCBH + base);
1392: }
1393: else
1394: {
1395: /*
1396: * Select the scb that pointed to us and update its next pointer.
1397: */
1398: outb(prev, SCBPTR + base);
1399: outb(next, SCB_NEXT_WAITING + base);
1400: }
1401: /*
1402: * Update the tail pointer
1403: */
1404: if (inb(WAITING_SCBT + base) == scb->position)
1405: {
1406: outb(prev, WAITING_SCBT + base);
1407: }
1408:
1409: /*
1410: * Point us back at the original scb position
1411: * and inform the SCSI system that the command
1412: * has been aborted.
1413: */
1414: outb(curscb, SCBPTR + base);
1415: scb->state |= SCB_ABORTED;
1416: scb->cmd->result = (DID_RESET << 16);
1417: aic7xxx_done(p, scb);
1418:
1419: #ifdef AIC7XXX_DEBUG_ABORT
1420: printk ("aic7xxx: (abort_waiting_scb) target/channel %d/%c, prev %d, "
1421: "to_scb %d, next %d\n", target, channel, prev, timedout_scb, next);
1422: #endif
1423: return (next);
1424: }
1425:
1426: /*+F*************************************************************************
1427: * Function:
1428: * aic7xxx_reset_device
1429: *
1430: * Description:
1431: * The device at the given target/channel has been reset. Abort
1432: * all active and queued scbs for that target/channel.
1433: *-F*************************************************************************/
1434: static int
1435: aic7xxx_reset_device(struct aic7xxx_host *p, int target, char channel,
1436: unsigned char timedout_scb)
1437: {
1438: int base = p->base;
1439: struct aic7xxx_scb *scb;
1440: unsigned char active_scb;
1441: int i = 0;
1442: int found = 0;
1443:
1444: /*
1445: * Restore this when we're done
1446: */
1447: active_scb = inb(SCBPTR + base);
1448:
1449: #ifdef AIC7XXX_DEBUG_ABORT
1450: printk ("aic7xxx: (reset_device) target/channel %d/%c, to_scb %d, "
1451: "active_scb %d\n", target, channel, timedout_scb, active_scb);
1452: #endif
1453: /*
1454: * Search the QINFIFO.
1455: */
1456: {
1457: int saved_queue[AIC7XXX_MAXSCB];
1458: int queued = inb(QINCNT + base);
1459:
1460: for (i = 0; i < (queued - found); i++)
1461: {
1462: saved_queue[i] = inb(QINFIFO + base);
1463: scb = &(p->scb_array[saved_queue[i]]);
1464: if (aic7xxx_match_scb(scb, target, channel))
1465: {
1466: /*
1467: * We found an scb that needs to be aborted.
1468: */
1469: scb->state |= SCB_ABORTED;
1470: scb->cmd->result = (DID_RESET << 16);
1471: aic7xxx_done(p, scb);
1472: outb(scb->position, SCBPTR + base);
1473: outb(0, SCBARRAY + base);
1474: i--;
1475: found++;
1476: }
1477: }
1478: /*
1479: * Now put the saved scbs back.
1480: */
1481: for (queued = 0; queued < i; queued++)
1482: {
1483: outb(saved_queue[queued], QINFIFO + base);
1484: }
1485: }
1486:
1487: /*
1488: * Search waiting for selection list.
1489: */
1490: {
1491: unsigned char next, prev;
1492:
1493: next = inb(WAITING_SCBH + base); /* Start at head of list. */
1494: prev = SCB_LIST_NULL;
1495:
1496: while (next != SCB_LIST_NULL)
1497: {
1498: scb = &(p->scb_array[next]);
1499: /*
1500: * Select the SCB.
1501: */
1502: if (aic7xxx_match_scb(scb, target, channel))
1503: {
1504: next = aic7xxx_abort_waiting_scb(p, scb, prev, timedout_scb);
1505: found++;
1506: }
1507: else
1508: {
1509: outb(scb->position, SCBPTR + base);
1510: prev = next;
1511: next = inb(SCB_NEXT_WAITING + base);
1512: }
1513: }
1514: }
1515:
1516: /*
1517: * Go through the entire SCB array now and look for
1518: * commands for this target that are active. These
1519: * are other (most likely tagged) commands that
1520: * were disconnected when the reset occured.
1521: */
1522: for (i = 0; i < p->numscb; i++)
1523: {
1524: scb = &(p->scb_array[i]);
1525: if ((scb->state & SCB_ACTIVE) && aic7xxx_match_scb(scb, target, channel))
1526: {
1527: /*
1528: * Ensure the target is "free"
1529: */
1530: aic7xxx_unbusy_target(target, channel, base);
1531: outb(scb->position, SCBPTR + base);
1532: outb(0, SCBARRAY + base);
1533: scb->state |= SCB_ABORTED;
1534: scb->cmd->result = (DID_RESET << 16);
1535: aic7xxx_done(p, scb);
1536: found++;
1537: }
1538: }
1539:
1540: outb(active_scb, SCBPTR + base);
1541: return (found);
1542: }
1543:
1544: /*+F*************************************************************************
1545: * Function:
1546: * aic7xxx_reset_current_bus
1547: *
1548: * Description:
1549: * Reset the current SCSI bus.
1550: *-F*************************************************************************/
1551: static void
1552: aic7xxx_reset_current_bus(int base)
1553: {
1554: #ifdef AIC7XXX_DEBUG_ABORT
1555: printk ("aic7xxx: (reset_current_bus)\n");
1556: #endif
1557: outb(SCSIRSTO, SCSISEQ + base);
1558: udelay(1000);
1559: outb(0, SCSISEQ + base);
1560: }
1561:
1562: /*+F*************************************************************************
1563: * Function:
1564: * aic7xxx_reset_channel
1565: *
1566: * Description:
1567: * Reset the channel.
1568: *-F*************************************************************************/
1569: static int
1570: aic7xxx_reset_channel(struct aic7xxx_host *p, char channel,
1571: unsigned char timedout_scb)
1572: {
1573: int base = p->base;
1574: unsigned char sblkctl;
1575: char cur_channel;
1576: unsigned long offset, offset_max;
1577: int found;
1578:
1579: #ifdef AIC7XXX_DEBUG_ABORT
1580: printk ("aic7xxx: (reset_channel) channel %c, to_scb %d\n",
1581: channel, timedout_scb);
1582: #endif
1583: /*
1584: * Clean up all the state information for the
1585: * pending transactions on this bus.
1586: */
1587: found = aic7xxx_reset_device(p, ALL_TARGETS, channel, timedout_scb);
1588:
1589: if (channel == 'B')
1590: {
1591: p->needsdtr |= (p->needsdtr_copy & 0xFF00);
1592: p->sdtr_pending &= 0x00FF;
1593: outb(0, ACTIVE_B + base);
1594: offset = TARG_SCRATCH + base + 8;
1595: offset_max = TARG_SCRATCH + base + 16;
1596: }
1597: else
1598: {
1599: if (p->bus_type == AIC_WIDE)
1600: {
1601: p->needsdtr = p->needsdtr_copy;
1602: p->needwdtr = p->needwdtr_copy;
1603: p->sdtr_pending = 0x0;
1604: p->wdtr_pending = 0x0;
1605: outb(0, ACTIVE_A + base);
1606: outb(0, ACTIVE_B + base);
1607: offset = TARG_SCRATCH + base;
1608: offset_max = TARG_SCRATCH + base + 16;
1609: }
1610: else
1611: {
1612: p->needsdtr |= (p->needsdtr_copy & 0x00FF);
1613: p->sdtr_pending &= 0xFF00;
1614: outb(0, ACTIVE_A + base);
1615: offset = TARG_SCRATCH + base;
1616: offset_max = TARG_SCRATCH + base + 8;
1617: }
1618: }
1619: while (offset < offset_max)
1620: {
1621: /*
1622: * Revert to async/narrow transfers
1623: * until we renegotiate.
1624: */
1625: u_char targ_scratch;
1626: targ_scratch = inb(offset);
1627: targ_scratch &= SXFR;
1628: outb(targ_scratch, offset);
1629: offset++;
1630: }
1631:
1632: /*
1633: * Reset the bus and unpause/restart the controller
1634: */
1635:
1636: /*
1637: * Case 1: Command for another bus is active
1638: */
1639: sblkctl = inb(SBLKCTL + base);
1640: cur_channel = (sblkctl & SELBUSB) ? 'B' : 'A';
1641: if (cur_channel != channel)
1642: {
1643: #ifdef AIC7XXX_DEBUG_ABORT
1644: printk ("aic7xxx: (reset_channel) Stealthily resetting channel %c\n",
1645: channel);
1646: #endif
1647: /*
1648: * Stealthily reset the other bus without upsetting the current bus
1649: */
1650: outb(sblkctl ^ SELBUSB, SBLKCTL + base);
1651: aic7xxx_reset_current_bus(base);
1652: outb(sblkctl, SBLKCTL + base);
1653:
1654: UNPAUSE_SEQUENCER(p);
1655: }
1656: /*
1657: * Case 2: A command from this bus is active or we're idle
1658: */
1659: else
1660: {
1661: #ifdef AIC7XXX_DEBUG_ABORT
1662: printk ("aic7xxx: (reset_channel) Resetting current channel %c\n",
1663: channel);
1664: #endif
1665: aic7xxx_reset_current_bus(base);
1666: RESTART_SEQUENCER(p);
1667: }
1668:
1669: return found;
1670: }
1671:
1672: /*+F*************************************************************************
1673: * Function:
1674: * aic7xxx_isr
1675: *
1676: * Description:
1677: * SCSI controller interrupt handler.
1678: *
1679: * NOTE: Since we declared this using SA_INTERRUPT, interrupts should
1680: * be disabled all through this function unless we say otherwise.
1681: *-F*************************************************************************/
1682: static void
1683: aic7xxx_isr(int irq, struct pt_regs * regs)
1684: {
1685: int base, intstat;
1686: struct aic7xxx_host *p;
1687: struct aic7xxx_scb *scb;
1688: unsigned char ha_flags;
1689: short transfer;
1690: unsigned char scsi_id, bus_width;
1691: unsigned char offset, rate, scratch, scratch_offset;
1692: unsigned char max_offset, rej_byte;
1693: unsigned short target_mask;
1694: char channel;
1695: void *addr;
1696: int actual;
1697: int scb_index;
1698: Scsi_Cmnd *cmd;
1699:
1700: p = (struct aic7xxx_host *) aic7xxx_boards[irq]->hostdata;
1701:
1702: /*
1703: * Search for the host with a pending interrupt. If we can't find
1704: * one, then we've encountered a spurious interrupt.
1705: */
1706: while ((p != NULL) && !(inb(INTSTAT + p->base) & INT_PEND))
1707: {
1708: if (p->next == NULL)
1709: {
1710: p = NULL;
1711: }
1712: else
1713: {
1714: p = (struct aic7xxx_host *) p->next->hostdata;
1715: }
1716: }
1717:
1718: if (p == NULL)
1719: {
1720: if (aic7xxx_spurious_count == 1)
1721: {
1722: aic7xxx_spurious_count = 2;
1723: printk("aic7xxx: (aic7xxx_isr) Encountered spurious interrupt.\n");
1724: return;
1725: }
1726: else
1727: {
1728: /*
1729: * The best we can do is to set p back to head of list and process
1730: * the erroneous interrupt - most likely a BRKADRINT.
1731: */
1732: p = (struct aic7xxx_host *) aic7xxx_boards[irq]->hostdata;
1733: }
1734: }
1735:
1736: /*
1737: * Keep track of interrupts for /proc/scsi
1738: */
1739: p->isr_count++;
1740:
1741: if (!p->a_scanned && (p->isr_count == 1))
1742: {
1743: /*
1744: * We must only have one card at this IRQ and it must have been
1745: * added to the board data before the spurious interrupt occurred.
1746: * It is sufficient that we check isr_count and not the spurious
1747: * interrupt count.
1748: */
1749: printk("aic7xxx: (aic7xxx_isr) Encountered spurious interrupt.\n");
1750: return;
1751: }
1752:
1753: base = p->base;
1754: /*
1755: * Handle all the interrupt sources - especially for SCSI
1756: * interrupts, we won't get a second chance at them.
1757: */
1758: intstat = inb(INTSTAT + base);
1759:
1760: if (intstat & BRKADRINT)
1761: {
1762: int i;
1763: unsigned char errno = inb(ERROR + base);
1764:
1765: printk("aic7xxx: (aic7xxx_isr) BRKADRINT error(0x%x):\n", errno);
1766: for (i = 0; i < NUMBER(hard_error); i++)
1767: {
1768: if (errno & hard_error[i].errno)
1769: {
1770: printk(" %s\n", hard_error[i].errmesg);
1771: }
1772: }
1773:
1774: panic("aic7xxx: (aic7xxx_isr) BRKADRINT, error(0x%x) seqaddr(0x%x).\n",
1775: inb(ERROR + base), (inb(SEQADDR1 + base) << 8) | inb(SEQADDR0 + base));
1776: }
1777:
1778: if (intstat & SEQINT)
1779: {
1780: /*
1781: * Although the sequencer is paused immediately on
1782: * a SEQINT, an interrupt for a SCSIINT condition will
1783: * unpaused the sequencer before this point.
1784: */
1785: PAUSE_SEQUENCER(p);
1786:
1787: scsi_id = (inb(SCSIID + base) >> 4) & 0x0F;
1788: scratch_offset = scsi_id;
1789: channel = 'A';
1790: if (inb(SBLKCTL + base) & SELBUSB)
1791: {
1792: channel = 'B';
1793: scratch_offset += 8;
1794: }
1795: target_mask = (0x01 << scratch_offset);
1796:
1797: switch (intstat & SEQINT_MASK)
1798: {
1799: case BAD_PHASE:
1800: panic("aic7xxx: (aic7xxx_isr) Unknown scsi bus phase.\n");
1801: break;
1802:
1803: case SEND_REJECT:
1804: rej_byte = inb(REJBYTE + base);
1805: if ((rej_byte & 0xF0) == 0x20)
1806: {
1807: scb_index = inb(SCBPTR + base);
1808: scb = &(p->scb_array[scb_index]);
1809: printk("aic7xxx: Warning - Tagged message received without identify."
1810: "Disabling tagged commands for target %d channel %c.\n",
1811: scsi_id, channel);
1812: scb->cmd->device->tagged_supported = 0;
1813: scb->cmd->device->tagged_queue = 0;
1814: }
1815: else
1816: {
1817: debug("aic7xxx: Warning - Rejecting unknown message (0x%x) received "
1818: "from target %d channel %c.\n", rej_byte, scsi_id, channel);
1819: }
1820: break;
1821:
1822: case NO_IDENT:
1823: panic("aic7xxx: Target %d, channel %c, did not send an IDENTIFY "
1824: "message. SAVED_TCL(0x%x).\n",
1825: scsi_id, channel, inb(SAVED_TCL + base));
1826: break;
1827:
1828: case NO_MATCH:
1829: printk("aic7xxx: No active SCB for reconnecting target %d, "
1830: "channel %c - Issuing ABORT. SAVED_TCL(0x%x).\n",
1831: scsi_id, channel, inb(SAVED_TCL + base));
1832: aic7xxx_unbusy_target(scsi_id, channel, base);
1833: outb(0, SCBARRAY + base);
1834: outb(CLRSELTIMEO, CLRSINT1 + base);
1835: RESTART_SEQUENCER(p);
1836: break;
1837:
1838: case SDTR_MSG:
1839: /*
1840: * Help the sequencer to translate the negotiated
1841: * transfer rate. Transfer is 1/4 the period
1842: * in ns as is returned by the sync negotiation
1843: * message. So, we must multiply by four.
1844: */
1845: transfer = (inb(ARG_1 + base) << 2);
1846: offset = inb(ACCUM + base);
1847: scratch = inb(TARG_SCRATCH + base + scratch_offset);
1848: /*
1849: * The maximum offset for a wide device is 0x08; for a
1850: * 8-bit bus device the maximum offset is 0x0F.
1851: */
1852: if (scratch & WIDEXFER)
1853: {
1854: max_offset = 0x08;
1855: }
1856: else
1857: {
1858: max_offset = 0x0F;
1859: }
1860: aic7xxx_scsirate(p, &rate, transfer, MIN(offset, max_offset),
1861: scsi_id, channel);
1862: /*
1863: * Preserve the wide transfer flag.
1864: */
1865: scratch = rate | (scratch & WIDEXFER);
1866: outb(scratch, TARG_SCRATCH + base + scratch_offset);
1867: outb(scratch, SCSIRATE + base);
1868: if ((scratch & 0x0F) == 0)
1869: { /*
1870: * The requested rate was so low that asynchronous transfers
1871: * are faster (not to mention the controller won't support
1872: * them), so we issue a reject to ensure we go to asynchronous
1873: * transfers.
1874: */
1875: outb(SEND_REJ, RETURN_1 + base);
1876: }
1877: else
1878: {
1879: /*
1880: * See if we initiated Sync Negotiation
1881: */
1882: if (p->sdtr_pending & target_mask)
1883: {
1884: /*
1885: * Don't send an SDTR back to the target.
1886: */
1887: outb(0, RETURN_1 + base);
1888: }
1889: else
1890: {
1891: /*
1892: * Send our own SDTR in reply.
1893: */
1894: printk("aic7xxx: Sending SDTR!!\n");
1895: outb(SEND_SDTR, RETURN_1 + base);
1896: }
1897: }
1898: /*
1899: * Clear the flags.
1900: */
1901: p->needsdtr &= ~target_mask;
1902: p->sdtr_pending &= ~target_mask;
1903: break;
1904:
1905: case WDTR_MSG:
1906: {
1907: bus_width = inb(ARG_1 + base);
1908: printk("aic7xxx: Received MSG_WDTR, Target %d, channel %c "
1909: "needwdtr(0x%x).\n", scsi_id, channel, p->needwdtr);
1910: scratch = inb(TARG_SCRATCH + base + scratch_offset);
1911:
1912: if (p->wdtr_pending & target_mask)
1913: {
1914: /*
1915: * Don't send an WDTR back to the target, since we asked first.
1916: */
1917: outb(0, RETURN_1 + base);
1918: switch (bus_width)
1919: {
1920: case BUS_8_BIT:
1921: scratch &= 0x7F;
1922: break;
1923:
1924: case BUS_16_BIT:
1925: printk("aic7xxx: Target %d, channel %c, using 16 bit "
1926: "transfers.\n", scsi_id, channel);
1927: scratch |= 0x80;
1928: break;
1929:
1930: case BUS_32_BIT:
1931: outb(SEND_REJ, RETURN_1 + base);
1932: printk("aic7xxx: Target %d, channel %c, requesting 32 bit "
1933: "transfers, rejecting...\n", scsi_id, channel);
1934: break;
1935: }
1936: }
1937: else
1938: {
1939: /*
1940: * Send our own WDTR in reply.
1941: */
1942: printk("aic7xxx: Will send WDTR!!\n");
1943: switch (bus_width)
1944: {
1945: case BUS_8_BIT:
1946: scratch &= 0x7F;
1947: break;
1948:
1949: case BUS_32_BIT:
1950: /*
1951: * Negotiate 16 bits.
1952: */
1953: bus_width = BUS_16_BIT;
1954: /* Yes, we mean to fall thru here. */
1955:
1956: case BUS_16_BIT:
1957: printk("aic7xxx: Target %d, channel %c, using 16 bit "
1958: "transfers.\n", scsi_id, channel);
1959: scratch |= 0x80;
1960: break;
1961: }
1962: outb(bus_width | SEND_WDTR, RETURN_1 + base);
1963: }
1964: p->needwdtr &= ~target_mask;
1965: p->wdtr_pending &= ~target_mask;
1966: outb(scratch, TARG_SCRATCH + base + scratch_offset);
1967: outb(scratch, SCSIRATE + base);
1968: break;
1969: }
1970:
1971: case REJECT_MSG:
1972: {
1973: /*
1974: * What we care about here is if we had an
1975: * outstanding SDTR or WDTR message for this
1976: * target. If we did, this is a signal that
1977: * the target is refusing negotiation.
1978: */
1979:
1980: scratch = inb(TARG_SCRATCH + base + scratch_offset);
1981:
1982: if (p->wdtr_pending & target_mask)
1983: {
1984: /*
1985: * note 8bit xfers and clear flag
1986: */
1987: scratch &= 0x7F;
1988: p->needwdtr &= ~target_mask;
1989: p->wdtr_pending &= ~target_mask;
1990: printk("aic7xxx: Target %d, channel %c, refusing WIDE negotiation. "
1991: "Using 8 bit transfers.\n", scsi_id, channel);
1992: }
1993: else
1994: {
1995: if (p->sdtr_pending & target_mask)
1996: {
1997: /*
1998: * note asynch xfers and clear flag
1999: */
2000: scratch &= 0xF0;
2001: p->needsdtr &= ~target_mask;
2002: p->sdtr_pending &= ~target_mask;
2003: printk("aic7xxx: Target %d, channel %c, refusing synchronous "
2004: "negotiation. Using asynchronous transfers.\n",
2005: scsi_id, channel);
2006: }
2007: /*
2008: * Otherwise, we ignore it.
2009: */
2010: }
2011: outb(scratch, TARG_SCRATCH + base + scratch_offset);
2012: outb(scratch, SCSIRATE + base);
2013: break;
2014: }
2015:
2016: case BAD_STATUS:
2017: scb_index = inb(SCBPTR + base);
2018: scb = &(p->scb_array[scb_index]);
2019: outb(0, RETURN_1 + base); /* CHECK_CONDITION may change this */
2020: if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2021: {
2022: printk("aic7xxx: Referenced SCB not valid during SEQINT(0x%x) "
2023: "scb(%d) state(0x%x) cmd(0x%x).\n",
2024: intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2025: }
2026: else
2027: {
2028: cmd = scb->cmd;
2029: aic7xxx_getscb(p, scb);
2030: aic7xxx_status(cmd) = scb->target_status;
2031:
2032: cmd->result |= scb->target_status;
2033:
2034: switch (status_byte(scb->target_status))
2035: {
2036: case GOOD:
2037: printk("aic7xxx: Interrupted for status of GOOD???\n");
2038: break;
2039:
2040: case CHECK_CONDITION:
2041: if ((aic7xxx_error(cmd) == 0) && !(cmd->flags & WAS_SENSE))
2042: {
2043: unsigned char tcl;
2044: unsigned char control;
2045: void *req_buf;
2046:
2047: tcl = scb->target_channel_lun;
2048:
2049: /*
2050: * Send a sense command to the requesting target.
2051: */
2052: cmd->flags |= WAS_SENSE;
2053: memcpy((void *) scb->sense_cmd, (void *) generic_sense,
2054: sizeof(generic_sense));
2055:
2056: scb->sense_cmd[1] = (cmd->lun << 5);
2057: scb->sense_cmd[4] = sizeof(cmd->sense_buffer);
2058:
2059: scb->sense_sg.address = (char *) &cmd->sense_buffer;
2060: scb->sense_sg.length = sizeof(cmd->sense_buffer);
2061: req_buf = &scb->sense_sg;
2062: cmd->cmd_len = COMMAND_SIZE(cmd->cmnd[0]);
2063: control = scb->control;
2064:
2065: memset(scb, 0, SCB_PIO_TRANSFER_SIZE);
2066: scb->control = control & DISCENB;
2067: scb->target_channel_lun = tcl;
2068: addr = scb->sense_cmd;
2069: scb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]);
2070: memcpy(scb->SCSI_cmd_pointer, &addr,
2071: sizeof(scb->SCSI_cmd_pointer));
2072: scb->SG_segment_count = 1;
2073: memcpy(scb->SG_list_pointer, &req_buf,
2074: sizeof(scb->SG_list_pointer));
2075: scb->data_count = scb->sense_sg.length;
2076: memcpy(scb->data_pointer, &(scb->sense_sg.address), 4);
2077:
2078: aic7xxx_putscb(p, scb);
2079: outb(SCB_LIST_NULL, SCB_NEXT_WAITING + base);
2080: /*
2081: * Ensure that the target is "BUSY" so we don't get overlapping
2082: * commands if we happen to be doing tagged I/O.
2083: */
2084: aic7xxx_busy_target(scsi_id, channel, base);
2085:
2086: aic7xxx_add_waiting_scb(base, scb, LIST_HEAD);
2087: outb(SEND_SENSE, RETURN_1 + base);
2088: } /* first time sense, no errors */
2089:
2090: cmd->flags &= ~ASKED_FOR_SENSE;
2091: if (aic7xxx_error(cmd) == 0)
2092: {
2093: aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2094: }
2095: break;
2096:
2097: case BUSY:
2098: printk("aic7xxx: Target busy.\n");
2099: if (!aic7xxx_error(cmd))
2100: {
2101: aic7xxx_error(cmd) = DID_BUS_BUSY;
2102: }
2103: break;
2104:
2105: case QUEUE_FULL:
2106: printk("aic7xxx: Queue full.\n");
2107: if (!aic7xxx_error(cmd))
2108: {
2109: aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2110: }
2111: break;
2112:
2113: default:
2114: printk("aic7xxx: Unexpected target status(0x%x).\n",
2115: scb->target_status);
2116: if (!aic7xxx_error(cmd))
2117: {
2118: aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2119: }
2120: break;
2121: } /* end switch */
2122: } /* end else of */
2123: break;
2124:
2125: case RESIDUAL:
2126: scb_index = inb(SCBPTR + base);
2127: scb = &(p->scb_array[scb_index]);
2128: if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2129: {
2130: printk("aic7xxx: Referenced SCB not valid during SEQINT(0x%x) "
2131: "scb(%d) state(0x%x) cmd(0x%x).\n",
2132: intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2133: }
2134: else
2135: {
2136: cmd = scb->cmd;
2137: /*
2138: * Don't destroy valid residual information with
2139: * residual coming from a check sense operation.
2140: */
2141: if (!(cmd->flags & WAS_SENSE))
2142: {
2143: /*
2144: * We had an underflow. At this time, there's only
2145: * one other driver that bothers to check for this,
2146: * and cmd->underflow seems to be set rather half-
2147: * heartedly in the higher-level SCSI code.
2148: */
2149: actual = aic7xxx_length(cmd, scb->residual_SG_segment_count);
2150:
2151: actual -= (inb(SCB_RESID_DCNT2 + base) << 16) |
2152: (inb(SCB_RESID_DCNT1 + base) << 8) |
2153: inb(SCB_RESID_DCNT0 + base);
2154:
2155: if (actual < cmd->underflow)
2156: {
2157: printk("aic7xxx: Target %d underflow - "
2158: "Wanted (at least) (%u) got(%u) count(%d).\n",
2159: cmd->target, cmd->underflow, actual,
2160: inb(SCB_RESID_SGCNT + base));
2161: aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2162: aic7xxx_status(cmd) = scb->target_status;
2163: }
2164: }
2165: }
2166: break;
2167:
2168: case ABORT_TAG:
2169: scb_index = inb(SCBPTR + base);
2170: scb = &(p->scb_array[scb_index]);
2171: if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2172: {
2173: printk("aic7xxx: Referenced SCB not valid during SEQINT(0x%x) "
2174: "scb(%d) state(0x%x) cmd(0x%x)\n",
2175: intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2176: }
2177: else
2178: {
2179: cmd = scb->cmd;
2180: /*
2181: * We didn't receive a valid tag back from the target
2182: * on a reconnect.
2183: */
2184: printk("aic7xxx: Invalid tag received on target %d, channel %c, "
2185: "lun %d - Sending ABORT_TAG.\n",
2186: scsi_id, channel, cmd->lun & 0x07);
2187:
2188: cmd->result = (DID_RETRY_COMMAND << 16);
2189: aic7xxx_done(p, scb);
2190: }
2191: break;
2192:
2193: case AWAITING_MSG:
2194: scb_index = inb(SCBPTR + base);
2195: scb = &(p->scb_array[scb_index]);
2196: if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2197: {
2198: printk("aic7xxx: Referenced SCB not valid during SEQINT(0x%x) "
2199: "scb(%d) state(0x%x) cmd(0x%x).\n",
2200: intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2201: }
2202: else
2203: {
2204: /*
2205: * This SCB had a zero length command, informing the sequencer
2206: * that we wanted to send a special message to this target.
2207: * We only do this for BUS_DEVICE_RESET messages currently.
2208: */
2209: if (scb->state & SCB_DEVICE_RESET)
2210: {
2211: #ifdef AIC7XXX_DEBUG_ABORT
2212: printk ("aic7xxx: (isr) sending bus device reset to target %d\n",
2213: scsi_id);
2214: #endif
2215: outb(MSG_BUS_DEVICE_RESET, MSG0 + base);
2216: outb(1, MSG_LEN + base);
2217: }
2218: else
2219: {
2220: panic("aic7xxx: AWAITING_SCB for an SCB that does "
2221: "not have a waiting message.\n");
2222: }
2223: }
2224: break;
2225:
2226: case IMMEDDONE:
2227: scb_index = inb(SCBPTR + base);
2228: scb = &(p->scb_array[scb_index]);
2229: #ifdef AIC7XXX_DEBUG_ABORT
2230: printk ("aic7xxx: (isr) received IMMEDDONE for target %d, scb %d, state %d\n",
2231: scsi_id, scb_index, scb->state);
2232: #endif
2233: if (scb->state & SCB_DEVICE_RESET)
2234: {
2235: int found;
2236:
2237: /*
2238: * Go back to async/narrow transfers and renogiate.
2239: */
2240: aic7xxx_unbusy_target(scsi_id, channel, base);
2241: p->needsdtr |= (p->needsdtr_copy & target_mask);
2242: p->needwdtr |= (p->needwdtr_copy & target_mask);
2243: p->sdtr_pending &= ~target_mask;
2244: p->wdtr_pending &= ~target_mask;
2245: scratch = inb(TARG_SCRATCH + base + scratch_offset);
2246: scratch &= SXFR;
2247: outb(scratch, TARG_SCRATCH + base + scratch_offset);
2248: found = aic7xxx_reset_device(p, (int) scsi_id, channel, SCB_LIST_NULL);
2249: }
2250: else
2251: {
2252: panic("aic7xxx: Immediate complete for unknown operation.\n");
2253: }
2254: break;
2255:
2256: #if AIC7XXX_NOT_YET
2257: /* XXX Fill these in later */
2258: case MESG_BUFFER_BUSY:
2259: break;
2260: case MSGIN_PHASEMIS:
2261: break;
2262: #endif
2263:
2264: case PARITY_ERROR:
2265: {
2266: scb_index = inb(SCBPTR + base);
2267: scb = &(p->scb_array[scb_index]);
2268: if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2269: {
2270: printk("aic7xxx: Referenced SCB not valid during SEQINT(0x%x) "
2271: "scb(%d) state(0x%x) cmd(0x%x).\n",
2272: intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2273: }
2274: else
2275: {
2276: char *phase;
2277: unsigned char mesg_out = MSG_NOP;
2278: unsigned char lastphase = inb(LASTPHASE + base);
2279:
2280: cmd = scb->cmd;
2281: switch (lastphase)
2282: {
2283: case P_DATAOUT:
2284: phase = "Data-Out";
2285: break;
2286: case P_DATAIN:
2287: phase = "Data-In";
2288: mesg_out = MSG_INITIATOR_DET_ERROR;
2289: break;
2290: case P_COMMAND:
2291: phase = "Command";
2292: break;
2293: case P_MESGOUT:
2294: phase = "Message-Out";
2295: break;
2296: case P_STATUS:
2297: phase = "Status";
2298: mesg_out = MSG_INITIATOR_DET_ERROR;
2299: break;
2300: case P_MESGIN:
2301: phase = "Message-In";
2302: mesg_out = MSG_MSG_PARITY_ERROR;
2303: break;
2304: default:
2305: phase = "unknown";
2306: break;
2307: }
2308:
2309: /*
2310: * A parity error has occurred during a data
2311: * transfer phase. Flag it and continue.
2312: */
2313: printk("aic7xxx: Parity error during phase %s on target %d, "
2314: "channel %d, lun %d.\n", phase,
2315: cmd->target, cmd->channel & 0x01, cmd->lun & 0x07);
2316:
2317: /*
2318: * We've set the hardware to assert ATN if we get a parity
2319: * error on "in" phases, so all we need to do is stuff the
2320: * message buffer with the appropriate message. In phases
2321: * have set mesg_out to something other than MSG_NOP.
2322: */
2323: if (mesg_out != MSG_NOP)
2324: {
2325: outb(mesg_out, MSG0 + base);
2326: outb(1, MSG_LEN + base);
2327: aic7xxx_error(cmd) = DID_PARITY;
2328: }
2329: else
2330: {
2331: /*
2332: * Should we allow the target to make this decision for us?
2333: */
2334: aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2335: }
2336: }
2337: break;
2338: }
2339: default: /* unknown */
2340: debug("aic7xxx: SEQINT, INTSTAT(0x%x) SCSISIGI(0x%x).\n",
2341: intstat, inb(SCSISIGI + base));
2342: break;
2343: }
2344:
2345: outb(CLRSEQINT, CLRINT + base);
2346: UNPAUSE_SEQUENCER(p);
2347: }
2348:
2349: if (intstat & SCSIINT)
2350: {
2351: int status = inb(SSTAT1 + base);
2352: scsi_id = (inb(SCSIID + base) >> 4) & 0x0F;
2353: channel = 'A';
2354: if (inb(SBLKCTL + base) & SELBUSB)
2355: {
2356: channel = 'B';
2357: }
2358:
2359: scb_index = inb(SCBPTR + base);
2360: scb = &(p->scb_array[scb_index]);
2361: if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2362: {
2363: printk("aic7xxx: No command for SCB (SCSIINT).\n");
2364: /*
2365: * Turn off the interrupt and set status
2366: * to zero, so that it falls through the
2367: * reset of the SCSIINT code.
2368: */
2369: outb(status, CLRSINT1 + base);
2370: UNPAUSE_SEQUENCER(p);
2371: outb(CLRSCSIINT, CLRINT + base);
2372: scb = NULL;
2373: }
2374: else
2375: {
2376: cmd = scb->cmd;
2377:
2378: /*
2379: * Only the SCSI Status 1 register has information
2380: * about exceptional conditions that we'd have a
2381: * SCSIINT about; anything in SSTAT0 will be handled
2382: * by the sequencer. Note that there can be multiple
2383: * bits set.
2384: */
2385: if (status & SELTO)
2386: {
2387: unsigned char waiting;
2388:
2389: /*
2390: * Hardware selection timer has expired. Turn
2391: * off SCSI selection sequence.
2392: */
2393: outb(ENRSELI, SCSISEQ + base);
2394: cmd->result = (DID_TIME_OUT << 16);
2395: /*
2396: * Clear an pending messages for the timed out
2397: * target and mark the target as free.
2398: */
2399: ha_flags = inb(FLAGS + base);
2400: outb(0, MSG_LEN + base);
2401: aic7xxx_unbusy_target(scsi_id, channel, base);
2402:
2403: outb(0, SCBARRAY + base);
2404:
2405: /*
2406: * Shut off the offending interrupt sources, reset
2407: * the sequencer address to zero and unpause it,
2408: * then call the high-level SCSI completion routine.
2409: *
2410: * WARNING! This is a magic sequence! After many
2411: * hours of guesswork, turning off the SCSI interrupts
2412: * in CLRSINT? does NOT clear the SCSIINT bit in
2413: * INTSTAT. By writing to the (undocumented, unused
2414: * according to the AIC-7770 manual) third bit of
2415: * CLRINT, you can clear INTSTAT. But, if you do it
2416: * while the sequencer is paused, you get a BRKADRINT
2417: * with an Illegal Host Address status, so the
2418: * sequencer has to be restarted first.
2419: */
2420: outb(CLRSELTIMEO, CLRSINT1 + base);
2421:
2422: outb(CLRSCSIINT, CLRINT + base);
2423:
2424: /*
2425: * Shift the waiting for selection queue forward
2426: */
2427: waiting = inb(WAITING_SCBH + base);
2428: outb(waiting, SCBPTR + base);
2429: waiting = inb(SCB_NEXT_WAITING + base);
2430: outb(waiting, WAITING_SCBH + base);
2431:
2432: RESTART_SEQUENCER(p);
2433: aic7xxx_done(p, scb);
2434: #if 0
2435: printk("aic7xxx: SELTO SCB(%d) state(0x%x) cmd(0x%x).\n",
2436: scb->position, scb->state, (unsigned int) scb->cmd);
2437: #endif
2438: }
2439: else
2440: {
2441: if (!(status & BUSFREE))
2442: {
2443: /*
2444: * We don't know what's going on. Turn off the
2445: * interrupt source and try to continue.
2446: */
2447: printk("aic7xxx: SSTAT1(0x%x).\n", status);
2448: outb(status, CLRSINT1 + base);
2449: UNPAUSE_SEQUENCER(p);
2450: outb(CLRSCSIINT, CLRINT + base);
2451: }
2452: }
2453: } /* else */
2454: }
2455:
2456: if (intstat & CMDCMPLT)
2457: {
2458: int complete;
2459:
2460: /*
2461: * The sequencer will continue running when it
2462: * issues this interrupt. There may be >1 commands
2463: * finished, so loop until we've processed them all.
2464: */
2465: do {
2466: complete = inb(QOUTFIFO + base);
2467:
2468: scb = &(p->scb_array[complete]);
2469: if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2470: {
2471: printk("aic7xxx: Warning - No command for SCB %d (CMDCMPLT).\n"
2472: " QOUTCNT(%d) SCB state(0x%x) cmd(0x%x) pos(%d).\n",
2473: complete, inb(QOUTFIFO + base),
2474: scb->state, (unsigned int) scb->cmd, scb->position);
2475: outb(CLRCMDINT, CLRINT + base);
2476: continue;
2477: }
2478: cmd = scb->cmd;
2479:
2480: if ((cmd->flags & WAS_SENSE) && !(cmd->flags & ASKED_FOR_SENSE))
2481: {
2482: /*
2483: * Got sense information.
2484: */
2485: cmd->flags &= ASKED_FOR_SENSE;
2486: }
2487: #if 0
2488: printk("aic7xxx: (complete) State(%d) cmd(0x%x) free(0x%x).\n",
2489: scb->state, (unsigned int) scb->cmd, (unsigned int) p->free_scb);
2490: #endif
2491:
2492: /*
2493: * Clear interrupt status before checking
2494: * the output queue again. This eliminates
2495: * a race condition whereby a command could
2496: * complete between the queue poll and the
2497: * interrupt clearing, so notification of the
2498: * command being complete never made it back
2499: * up to the kernel.
2500: */
2501: outb(CLRCMDINT, CLRINT + base);
2502: aic7xxx_done(p, scb);
2503: #if 0
2504: if (scb != &p->scb_array[scb->position])
2505: {
2506: printk("aic7xxx: (complete) Address mismatch, pos(%d).\n", scb->position);
2507: }
2508: printk("aic7xxx: (complete) State(%d) cmd(0x%x) free(0x%x).\n",
2509: scb->state, (unsigned int) scb->cmd, (unsigned int) p->free_scb);
2510: #endif
2511:
2512: #ifdef AIC7XXX_PROC_STATS
2513: /*
2514: * XXX: we should actually know how much actually transferred
2515: * XXX: for each command, but apparently that's too difficult.
2516: */
2517: actual = aic7xxx_length(cmd, 0);
2518: if (!(cmd->flags & WAS_SENSE) && (actual > 0))
2519: {
2520: struct aic7xxx_xferstats *sp;
2521: long *ptr;
2522: int x;
2523:
2524: sp = &p->stats[cmd->channel & 0x01][cmd->target & 0x0F][cmd->lun & 0x07];
2525: sp->xfers++;
2526:
2527: if (cmd->request.cmd == WRITE)
2528: {
2529: sp->w_total++;
2530: sp->w_total512 += (actual >> 9);
2531: ptr = sp->w_bins;
2532: }
2533: else
2534: {
2535: sp->r_total++;
2536: sp->r_total512 += (actual >> 9);
2537: ptr = sp->r_bins;
2538: }
2539: for (x = 9; x <= 17; x++)
2540: {
2541: if (actual < (1 << x))
2542: {
2543: ptr[x - 9]++;
2544: break;
2545: }
2546: }
2547: if (x > 17)
2548: {
2549: ptr[x - 9]++;
2550: }
2551: }
2552: #endif /* AIC7XXX_PROC_STATS */
2553:
2554: } while (inb(QOUTCNT + base));
2555: }
2556: }
2557:
2558: /*+F*************************************************************************
2559: * Function:
2560: * aic7xxx_probe
2561: *
2562: * Description:
2563: * Probing for EISA boards: it looks like the first two bytes
2564: * are a manufacturer code - three characters, five bits each:
2565: *
2566: * BYTE 0 BYTE 1 BYTE 2 BYTE 3
2567: * ?1111122 22233333 PPPPPPPP RRRRRRRR
2568: *
2569: * The characters are baselined off ASCII '@', so add that value
2570: * to each to get the real ASCII code for it. The next two bytes
2571: * appear to be a product and revision number, probably vendor-
2572: * specific. This is what is being searched for at each port,
2573: * and what should probably correspond to the ID= field in the
2574: * ECU's .cfg file for the card - if your card is not detected,
2575: * make sure your signature is listed in the array.
2576: *
2577: * The fourth byte's lowest bit seems to be an enabled/disabled
2578: * flag (rest of the bits are reserved?).
2579: *-F*************************************************************************/
2580: static aha_type
2581: aic7xxx_probe(int slot, int base)
2582: {
2583: int i;
2584: unsigned char buf[4];
2585:
2586: static struct {
2587: int n;
2588: unsigned char signature[sizeof(buf)];
2589: aha_type type;
2590: } AIC7xxx[] = {
2591: { 4, { 0x04, 0x90, 0x77, 0x71 }, AIC_7771 }, /* host adapter 274x */
2592: { 4, { 0x04, 0x90, 0x77, 0x70 }, AIC_7770 }, /* motherboard 7770 */
2593: { 4, { 0x04, 0x90, 0x77, 0x56 }, AIC_284x }, /* 284x, BIOS enabled */
2594: { 4, { 0x04, 0x90, 0x77, 0x57 }, AIC_284x } /* 284x, BIOS disabled */
2595: };
2596:
2597: /*
2598: * The VL-bus cards need to be primed by
2599: * writing before a signature check.
2600: */
2601: for (i = 0; i < sizeof(buf); i++)
2602: {
2603: outb(0x80 + i, base);
2604: buf[i] = inb(base + i);
2605: }
2606:
2607: for (i = 0; i < NUMBER(AIC7xxx); i++)
2608: {
2609: /*
2610: * Signature match on enabled card?
2611: */
2612: if (!memcmp(buf, AIC7xxx[i].signature, AIC7xxx[i].n))
2613: {
2614: if (inb(base + 4) & 1)
2615: {
2616: return (AIC7xxx[i].type);
2617: }
2618:
2619: printk("aic7xxx: Disabled at slot %d, ignored.\n", slot);
2620: }
2621: }
2622:
2623: return (AIC_NONE);
2624: }
2625:
2626: /*+F*************************************************************************
2627: * Function:
2628: * read_2840_seeprom
2629: *
2630: * Description:
2631: * Reads the 2840 serial EEPROM and returns 1 if successful and 0 if
2632: * not successful.
2633: *
2634: * See read_seeprom (for the 2940) for the instruction set of the 93C46
2635: * chip.
2636: *
2637: * The 2840 interface to the 93C46 serial EEPROM is through the
2638: * STATUS_2840 and SEECTL_2840 registers. The CS_2840, CK_2840, and
2639: * DO_2840 bits of the SEECTL_2840 register are connected to the chip
2640: * select, clock, and data out lines respectively of the serial EEPROM.
2641: * The DI_2840 bit of the STATUS_2840 is connected to the data in line
2642: * of the serial EEPROM. The EEPROM_TF bit of STATUS_2840 register is
2643: * useful in that it gives us an 800 nsec timer. After a read from the
2644: * SEECTL_2840 register the timing flag is cleard and goes high 800 nsec
2645: * later.
2646: *
2647: *-F*************************************************************************/
2648: static int
2649: read_2840_seeprom(int base, struct seeprom_config *sc)
2650: {
2651: int i = 0, k = 0;
2652: unsigned char temp;
2653: unsigned short checksum = 0;
2654: unsigned short *seeprom = (unsigned short *) sc;
2655: struct seeprom_cmd {
2656: unsigned char len;
2657: unsigned char bits[3];
2658: };
2659: struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
2660:
2661: #define CLOCK_PULSE(p) \
2662: while ((inb(STATUS_2840 + base) & EEPROM_TF) == 0) \
2663: { \
2664: ; /* Do nothing */ \
2665: } \
2666: (void) inb(SEECTL_2840 + base);
2667:
2668: /*
2669: * Read the first 32 registers of the seeprom. For the 2840,
2670: * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers
2671: * but only the first 32 are used by Adaptec BIOS. The loop
2672: * will range from 0 to 31.
2673: */
2674: for (k = 0; k < (sizeof(*sc) / 2); k++)
2675: {
2676: /*
2677: * Send chip select for one clock cycle.
2678: */
2679: outb(CK_2840 | CS_2840, SEECTL_2840 + base);
2680: CLOCK_PULSE(base);
2681:
2682: /*
2683: * Now we're ready to send the read command followed by the
2684: * address of the 16-bit register we want to read.
2685: */
2686: for (i = 0; i < seeprom_read.len; i++)
2687: {
2688: temp = CS_2840 | seeprom_read.bits[i];
2689: outb(temp, SEECTL_2840 + base);
2690: CLOCK_PULSE(base);
2691: temp = temp ^ CK_2840;
2692: outb(temp, SEECTL_2840 + base);
2693: CLOCK_PULSE(base);
2694: }
2695: /*
2696: * Send the 6 bit address (MSB first, LSB last).
2697: */
2698: for (i = 5; i >= 0; i--)
2699: {
2700: temp = k;
2701: temp = (temp >> i) & 1; /* Mask out all but lower bit. */
2702: temp = CS_2840 | temp;
2703: outb(temp, SEECTL_2840 + base);
2704: CLOCK_PULSE(base);
2705: temp = temp ^ CK_2840;
2706: outb(temp, SEECTL_2840 + base);
2707: CLOCK_PULSE(base);
2708: }
2709:
2710: /*
2711: * Now read the 16 bit register. An initial 0 precedes the
2712: * register contents which begins with bit 15 (MSB) and ends
2713: * with bit 0 (LSB). The initial 0 will be shifted off the
2714: * top of our word as we let the loop run from 0 to 16.
2715: */
2716: for (i = 0; i <= 16; i++)
2717: {
2718: temp = CS_2840;
2719: outb(temp, SEECTL_2840 + base);
2720: CLOCK_PULSE(base);
2721: temp = temp ^ CK_2840;
2722: seeprom[k] = (seeprom[k] << 1) | (inb(STATUS_2840 + base) & DI_2840);
2723: outb(temp, SEECTL_2840 + base);
2724: CLOCK_PULSE(base);
2725: }
2726: /*
2727: * The serial EEPROM has a checksum in the last word. Keep a
2728: * running checksum for all words read except for the last
2729: * word. We'll verify the checksum after all words have been
2730: * read.
2731: */
2732: if (k < (sizeof(*sc) / 2) - 1)
2733: {
2734: checksum = checksum + seeprom[k];
2735: }
2736:
2737: /*
2738: * Reset the chip select for the next command cycle.
2739: */
2740: outb(0, SEECTL_2840 + base);
2741: CLOCK_PULSE(base);
2742: outb(CK_2840, SEECTL_2840 + base);
2743: CLOCK_PULSE(base);
2744: outb(0, SEECTL_2840 + base);
2745: CLOCK_PULSE(base);
2746: }
2747:
2748: #if 0
2749: printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum);
2750: printk("Serial EEPROM:");
2751: for (k = 0; k < (sizeof(*sc) / 2); k++)
2752: {
2753: if (((k % 8) == 0) && (k != 0))
2754: {
2755: printk("\n ");
2756: }
2757: printk(" 0x%x", seeprom[k]);
2758: }
2759: printk("\n");
2760: #endif
2761:
2762: if (checksum != sc->checksum)
2763: {
2764: printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n");
2765: return (0);
2766: }
2767:
2768: return (1);
2769: #undef CLOCK_PULSE
2770: }
2771:
2772: /*+F*************************************************************************
2773: * Function:
2774: * read_seeprom
2775: *
2776: * Description:
2777: * Reads the serial EEPROM and returns 1 if successful and 0 if
2778: * not successful.
2779: *
2780: * The instruction set of the 93C46 chip is as follows:
2781: *
2782: * Start OP
2783: * Function Bit Code Address Data Description
2784: * -------------------------------------------------------------------
2785: * READ 1 10 A5 - A0 Reads data stored in memory,
2786: * starting at specified address
2787: * EWEN 1 00 11XXXX Write enable must preceed
2788: * all programming modes
2789: * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0
2790: * WRITE 1 01 A5 - A0 D15 - D0 Writes register
2791: * ERAL 1 00 10XXXX Erase all registers
2792: * WRAL 1 00 01XXXX D15 - D0 Writes to all registers
2793: * EWDS 1 00 00XXXX Disables all programming
2794: * instructions
2795: * *Note: A value of X for address is a don't care condition.
2796: *
2797: * The 93C46 has a four wire interface: clock, chip select, data in, and
2798: * data out. In order to perform one of the above functions, you need
2799: * to enable the chip select for a clock period (typically a minimum of
2800: * 1 usec, with the clock high and low a minimum of 750 and 250 nsec
2801: * respectively. While the chip select remains high, you can clock in
2802: * the instructions (above) starting with the start bit, followed by the
2803: * OP code, Address, and Data (if needed). For the READ instruction, the
2804: * requested 16-bit register contents is read from the data out line but
2805: * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
2806: * first). The clock cycling from low to high initiates the next data
2807: * bit to be sent from the chip.
2808: *
2809: * The 7870 interface to the 93C46 serial EEPROM is through the SEECTL
2810: * register. After successful arbitration for the memory port, the
2811: * SEECS bit of the SEECTL register is connected to the chip select.
2812: * The SEECK, SEEDO, and SEEDI are connected to the clock, data out,
2813: * and data in lines respectively. The SEERDY bit of SEECTL is useful
2814: * in that it gives us an 800 nsec timer. After a write to the SEECTL
2815: * register, the SEERDY goes high 800 nsec later. The one exception
2816: * to this is when we first request access to the memory port. The
2817: * SEERDY goes high to signify that access has been granted and, for
2818: * this case, has no implied timing.
2819: *
2820: *-F*************************************************************************/
2821: static int
2822: read_seeprom(int base, int offset, struct seeprom_config *sc)
2823: {
2824: int i = 0, k;
2825: unsigned long timeout;
2826: unsigned char temp;
2827: unsigned short checksum = 0;
2828: unsigned short *seeprom = (unsigned short *) sc;
2829: struct seeprom_cmd {
2830: unsigned char len;
2831: unsigned char bits[3];
2832: };
2833: struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
2834:
2835: #define CLOCK_PULSE(p) \
2836: while ((inb(SEECTL + base) & SEERDY) == 0) \
2837: { \
2838: ; /* Do nothing */ \
2839: }
2840:
2841: /*
2842: * Request access of the memory port. When access is
2843: * granted, SEERDY will go high. We use a 1 second
2844: * timeout which should be near 1 second more than
2845: * is needed. Reason: after the 7870 chip reset, there
2846: * should be no contention.
2847: */
2848: outb(SEEMS, SEECTL + base);
2849: timeout = jiffies + 100; /* 1 second timeout */
2850: while ((jiffies < timeout) && ((inb(SEECTL + base) & SEERDY) == 0))
2851: {
2852: ; /* Do nothing! Wait for access to be granted. */
2853: }
2854: if ((inb(SEECTL + base) & SEERDY) == 0)
2855: {
2856: outb(0, SEECTL + base);
2857: return (0);
2858: }
2859:
2860: /*
2861: * Read the first 32 registers of the seeprom. For the 7870,
2862: * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers
2863: * but only the first 32 are used by Adaptec BIOS. The loop
2864: * will range from 0 to 31.
2865: */
2866: for (k = 0; k < (sizeof(*sc) / 2); k++)
2867: {
2868: /*
2869: * Send chip select for one clock cycle.
2870: */
2871: outb(SEEMS | SEECK | SEECS, SEECTL + base);
2872: CLOCK_PULSE(base);
2873:
2874: /*
2875: * Now we're ready to send the read command followed by the
2876: * address of the 16-bit register we want to read.
2877: */
2878: for (i = 0; i < seeprom_read.len; i++)
2879: {
2880: temp = SEEMS | SEECS | (seeprom_read.bits[i] << 1);
2881: outb(temp, SEECTL + base);
2882: CLOCK_PULSE(base);
2883: temp = temp ^ SEECK;
2884: outb(temp, SEECTL + base);
2885: CLOCK_PULSE(base);
2886: }
2887: /*
2888: * Send the 6 bit address (MSB first, LSB last).
2889: */
2890: for (i = 5; i >= 0; i--)
2891: {
2892: temp = k + offset;
2893: temp = (temp >> i) & 1; /* Mask out all but lower bit. */
2894: temp = SEEMS | SEECS | (temp << 1);
2895: outb(temp, SEECTL + base);
2896: CLOCK_PULSE(base);
2897: temp = temp ^ SEECK;
2898: outb(temp, SEECTL + base);
2899: CLOCK_PULSE(base);
2900: }
2901:
2902: /*
2903: * Now read the 16 bit register. An initial 0 precedes the
2904: * register contents which begins with bit 15 (MSB) and ends
2905: * with bit 0 (LSB). The initial 0 will be shifted off the
2906: * top of our word as we let the loop run from 0 to 16.
2907: */
2908: for (i = 0; i <= 16; i++)
2909: {
2910: temp = SEEMS | SEECS;
2911: outb(temp, SEECTL + base);
2912: CLOCK_PULSE(base);
2913: temp = temp ^ SEECK;
2914: seeprom[k] = (seeprom[k] << 1) | (inb(SEECTL + base) & SEEDI);
2915: outb(temp, SEECTL + base);
2916: CLOCK_PULSE(base);
2917: }
2918:
2919: /*
2920: * The serial EEPROM has a checksum in the last word. Keep a
2921: * running checksum for all words read except for the last
2922: * word. We'll verify the checksum after all words have been
2923: * read.
2924: */
2925: if (k < (sizeof(*sc) / 2) - 1)
2926: {
2927: checksum = checksum + seeprom[k];
2928: }
2929:
2930: /*
2931: * Reset the chip select for the next command cycle.
2932: */
2933: outb(SEEMS, SEECTL + base);
2934: CLOCK_PULSE(base);
2935: outb(SEEMS | SEECK, SEECTL + base);
2936: CLOCK_PULSE(base);
2937: outb(SEEMS, SEECTL + base);
2938: CLOCK_PULSE(base);
2939: }
2940:
2941: /*
2942: * Release access to the memory port and the serial EEPROM.
2943: */
2944: outb(0, SEECTL + base);
2945:
2946: #if 0
2947: printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum);
2948: printk("Serial EEPROM:");
2949: for (k = 0; k < (sizeof(*sc) / 2); k++)
2950: {
2951: if (((k % 8) == 0) && (k != 0))
2952: {
2953: printk("\n ");
2954: }
2955: printk(" 0x%x", seeprom[k]);
2956: }
2957: printk("\n");
2958: #endif
2959:
2960: if (checksum != sc->checksum)
2961: {
2962: printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n");
2963: return (0);
2964: }
2965:
2966: return (1);
2967: #undef CLOCK_PULSE
2968: }
2969:
2970: /*+F*************************************************************************
2971: * Function:
2972: * detect_maxscb
2973: *
2974: * Description:
2975: * Return the maximum number of SCB's allowed for a given controller.
2976: *-F*************************************************************************/
2977: static int
2978: detect_maxscb(aha_type type, int base, int walk_scbs)
2979: {
2980: unsigned char sblkctl_reg, scb_byte;
2981: int maxscb = 0, i;
2982:
2983: switch (type)
2984: {
2985: case AIC_7770:
2986: case AIC_7771:
2987: case AIC_284x:
2988: /*
2989: * Check for Rev C or E boards. Rev E boards can supposedly have
2990: * more than 4 SCBs, while the Rev C boards are limited to 4 SCBs.
2991: * Until we know how to access more than 4 SCBs for the Rev E chips,
2992: * we limit them, along with the Rev C chips, to 4 SCBs.
2993: *
2994: * The Rev E boards have a read/write autoflush bit in the
2995: * SBLKCTL register, while in the Rev C boards it is read only.
2996: */
2997: sblkctl_reg = inb(SBLKCTL + base) ^ AUTOFLUSHDIS;
2998: outb(sblkctl_reg, SBLKCTL + base);
2999: if (inb(SBLKCTL + base) == sblkctl_reg)
3000: {
3001: /*
3002: * We detected a Rev E board.
3003: */
3004: printk("aic7xxx: %s Rev E and subsequent.\n", board_names[type]);
3005: outb(sblkctl_reg ^ AUTOFLUSHDIS, SBLKCTL + base);
3006: maxscb = 4;
3007: }
3008: else
3009: {
3010: printk("aic7xxx: %s Rev C and previous.\n", board_names[type]);
3011: maxscb = 4;
3012: }
3013: break;
3014:
3015: case AIC_7850:
3016: maxscb = 3;
3017: break;
3018:
3019: case AIC_7870:
3020: case AIC_7871:
3021: case AIC_7874:
3022: case AIC_7880:
3023: case AIC_7881:
3024: case AIC_7884:
3025: maxscb = 16;
3026: break;
3027:
3028: case AIC_7872:
3029: case AIC_7873:
3030: case AIC_7882:
3031: case AIC_7883:
3032: /*
3033: * Is suppose to have 255 SCBs, but we'll walk the SCBs
3034: * looking for more if external RAM is detected.
3035: */
3036: maxscb = 16;
3037: break;
3038:
3039: case AIC_NONE:
3040: /*
3041: * This should never happen... But just in case.
3042: */
3043: break;
3044: }
3045:
3046: if (walk_scbs)
3047: {
3048: /*
3049: * This adapter has external SCB memory.
3050: * Walk the SCBs to determine how many there are.
3051: */
3052: i = 0;
3053: while (i < AIC7XXX_MAXSCB)
3054: {
3055: outb(i, SCBPTR + base);
3056: scb_byte = ~(inb(SCBARRAY + base)); /* complement the byte */
3057: outb(scb_byte, SCBARRAY + base); /* write it back out */
3058: if (inb(SCBARRAY + base) != scb_byte)
3059: {
3060: break;
3061: }
3062: i++;
3063: }
3064: maxscb = i;
3065:
3066: printk("aic7xxx: Using %d SCB's after checking for SCB memory.\n", maxscb);
3067: }
3068: else
3069: {
3070: printk("aic7xxx: Using %d SCB's; No SCB memory check.\n", maxscb);
3071: }
3072:
3073: return (maxscb);
3074: }
3075:
3076: /*+F*************************************************************************
3077: * Function:
3078: * aic7xxx_register
3079: *
3080: * Description:
3081: * Register a Adaptec aic7xxx chip SCSI controller with the kernel.
3082: *-F*************************************************************************/
3083: static int
3084: aic7xxx_register(Scsi_Host_Template *template,
3085: struct aic7xxx_host_config *config)
3086: {
3087: int i;
3088: unsigned char sblkctl;
3089: int max_targets;
3090: int found = 1, base;
3091: int bios_disabled = FALSE;
3092: unsigned char target_settings;
3093: unsigned char scsi_conf, host_conf;
3094: int have_seeprom = FALSE;
3095: struct Scsi_Host *host;
3096: struct aic7xxx_host *p;
3097: struct seeprom_config sc;
3098:
3099: base = config->base;
3100:
3101: /*
3102: * Lock out other contenders for our i/o space.
3103: */
3104: request_region(MINREG + base, MAXREG - MINREG, "aic7xxx");
3105:
3106: switch (config->type)
3107: {
3108: case AIC_7770:
3109: case AIC_7771:
3110: /*
3111: * For some 274x boards, we must clear the CHIPRST bit
3112: * and pause the sequencer. For some reason, this makes
3113: * the driver work. For 284x boards, we give it a
3114: * CHIPRST just like the 294x boards.
3115: *
3116: * Use the BIOS settings to determine the interrupt
3117: * trigger type (level or edge) and use this value
3118: * for pausing and unpausing the sequencer.
3119: */
3120: config->unpause = (inb(HCNTRL + base) & IRQMS) | INTEN;
3121: config->pause = config->unpause | PAUSE;
3122: config->extended = aic7xxx_extended;
3123:
3124: outb(config->pause | CHIPRST, HCNTRL + base);
3125: aic7xxx_delay(1);
3126: if (inb(HCNTRL + base) & CHIPRST)
3127: {
3128: printk("aic7xxx: Chip reset not cleared; clearing manually.\n");
3129: }
3130: outb(config->pause, HCNTRL + base);
3131:
3132: /*
3133: * Just to be on the safe side with the 274x, we will re-read the irq
3134: * since there was some issue about resetting the board.
3135: */
3136: config->irq = inb(INTDEF + base) & 0x0F;
3137: if ((inb(HA_274_BIOSCTRL + base) & BIOSMODE) == BIOSDISABLED)
3138: {
3139: bios_disabled = TRUE;
3140: }
3141: host_conf = inb(HOSTCONF + base);
3142: config->busrtime = host_conf & 0x3C;
3143: /* XXX Is this valid for motherboard based controllers? */
3144: /* Setup the FIFO threshold and the bus off time */
3145: outb(host_conf & DFTHRSH, BUSSPD + base);
3146: outb((host_conf << 2) & BOFF, BUSTIME + base);
3147:
3148: /*
3149: * A reminder until this can be detected automatically.
3150: */
3151: printk("aic7xxx: Extended translation %sabled.\n",
3152: config->extended ? "en" : "dis");
3153: break;
3154:
3155: case AIC_284x:
3156: outb(CHIPRST, HCNTRL + base);
3157: config->unpause = UNPAUSE_284X;
3158: config->pause = REQ_PAUSE; /* DWG would like to be like the rest */
3159: aic7xxx_delay(1);
3160: outb(config->pause, HCNTRL + base);
3161:
3162: config->extended = aic7xxx_extended;
3163: config->irq = inb(INTDEF + base) & 0x0F;
3164: if ((inb(HA_274_BIOSCTRL + base) & BIOSMODE) == BIOSDISABLED)
3165: {
3166: bios_disabled = TRUE;
3167: }
3168: host_conf = inb(HOSTCONF + base);
3169:
3170: printk("aic7xxx: Reading SEEPROM...");
3171: have_seeprom = read_2840_seeprom(base, &sc);
3172: if (!have_seeprom)
3173: {
3174: printk("aic7xxx: Unable to read SEEPROM.\n");
3175: config->busrtime = host_conf & 0x3C;
3176: }
3177: else
3178: {
3179: printk("done.\n");
3180: config->extended = ((sc.bios_control & CF284XEXTEND) >> 5);
3181: config->scsi_id = (sc.brtime_id & CFSCSIID);
3182: config->parity = (sc.adapter_control & CFSPARITY) ?
3183: AIC_ENABLED : AIC_DISABLED;
3184: config->low_term = (sc.adapter_control & CF284XSTERM) ?
3185: AIC_ENABLED : AIC_DISABLED;
3186: /*
3187: * XXX - Adaptec *does* make 284x wide controllers, but the
3188: * documents do not say where the high byte termination
3189: * enable bit is located. For now, we'll just assume
3190: * that it's in the same place as for the 2940 card.
3191: */
3192: config->high_term = (sc.adapter_control & CFWSTERM) ?
3193: AIC_ENABLED : AIC_DISABLED;
3194: config->busrtime = ((sc.brtime_id & CFBRTIME) >> 8);
3195: }
3196: /* XXX Is this valid for motherboard based controllers? */
3197: /* Setup the FIFO threshold and the bus off time */
3198: outb(host_conf & DFTHRSH, BUSSPD + base);
3199: outb((host_conf << 2) & BOFF, BUSTIME + base);
3200:
3201: printk("aic7xxx: Extended translation %sabled.\n",
3202: config->extended ? "en" : "dis");
3203: break;
3204:
3205: case AIC_7850:
3206: case AIC_7870:
3207: case AIC_7871:
3208: case AIC_7872:
3209: case AIC_7873:
3210: case AIC_7874:
3211: case AIC_7880:
3212: case AIC_7881:
3213: case AIC_7882:
3214: case AIC_7883:
3215: case AIC_7884:
3216: outb(CHIPRST, HCNTRL + base);
3217: config->unpause = UNPAUSE_294X;
3218: config->pause = config->unpause | PAUSE;
3219: aic7xxx_delay(1);
3220: outb(config->pause, HCNTRL + base);
3221:
3222: config->extended = aic7xxx_extended;
3223: config->scsi_id = 7;
3224:
3225: printk("aic7xxx: Reading SEEPROM...");
3226: have_seeprom = read_seeprom(base, config->chan_num * (sizeof(sc) / 2), &sc);
3227: if (!have_seeprom)
3228: {
3229: printk("aic7xxx: Unable to read SEEPROM.\n");
3230: }
3231: else
3232: {
3233: printk("done.\n");
3234: config->extended = ((sc.bios_control & CFEXTEND) >> 7);
3235: config->scsi_id = (sc.brtime_id & CFSCSIID);
3236: config->parity = (sc.adapter_control & CFSPARITY) ?
3237: AIC_ENABLED : AIC_DISABLED;
3238: config->low_term = (sc.adapter_control & CFSTERM) ?
3239: AIC_ENABLED : AIC_DISABLED;
3240: config->high_term = (sc.adapter_control & CFWSTERM) ?
3241: AIC_ENABLED : AIC_DISABLED;
3242: config->busrtime = ((sc.brtime_id & CFBRTIME) >> 8);
3243: if (((config->type == AIC_7880) || (config->type == AIC_7882) ||
3244: (config->type == AIC_7883) || (config->type == AIC_7884)) &&
3245: (sc.adapter_control & CFULTRAEN))
3246: {
3247: printk ("aic7xxx: Enabling support for Ultra SCSI speed.\n");
3248: config->ultra_enabled = TRUE;
3249: }
3250: }
3251:
3252: /*
3253: * XXX - force data fifo threshold to 100%. Why does this
3254: * need to be done?
3255: *
3256: * We don't know where this is set in the SEEPROM or by the BIOS,
3257: * so we default it to 100%.
3258: */
3259: outb(config->scsi_id | DFTHRSH_100, SCSICONF + base);
3260: outb(DFTHRSH_100, DSPCISTATUS + base);
3261:
3262: /*
3263: * In case we are a wide card, place scsi ID in second conf byte.
3264: */
3265: outb(config->scsi_id, (SCSICONF + base + 1));
3266:
3267: printk("aic7xxx: Extended translation %sabled.\n",
3268: config->extended ? "en" : "dis");
3269: break;
3270:
3271: default:
3272: panic("aic7xxx: (aic7xxx_register) Internal error.\n");
3273: }
3274:
3275: config->maxscb = detect_maxscb(config->type, base, config->walk_scbs);
3276:
3277: if (config->chip_type == AIC_777x)
3278: {
3279: if (config->pause & IRQMS)
3280: {
3281: printk("aic7xxx: Using level sensitive interrupts.\n");
3282: }
3283: else
3284: {
3285: printk("aic7xxx: Using edge triggered interrupts.\n");
3286: }
3287: }
3288:
3289: /*
3290: * Read the bus type from the SBLKCTL register. Set the FLAGS
3291: * register in the sequencer for twin and wide bus cards.
3292: */
3293: sblkctl = inb(SBLKCTL + base);
3294: switch (sblkctl & SELBUS_MASK)
3295: {
3296: case SELNARROW: /* narrow/normal bus */
3297: config->scsi_id = inb(SCSICONF + base) & 0x07;
3298: config->bus_type = AIC_SINGLE;
3299: outb(SINGLE_BUS, FLAGS + base);
3300: break;
3301:
3302: case SELWIDE: /* Wide bus */
3303: config->scsi_id = inb(SCSICONF + base + 1) & 0x0F;
3304: config->bus_type = AIC_WIDE;
3305: printk("aic7xxx: Enabling wide channel of %s-Wide.\n",
3306: board_names[config->type]);
3307: outb(WIDE_BUS, FLAGS + base);
3308: break;
3309:
3310: case SELBUSB: /* Twin bus */
3311: config->scsi_id = inb(SCSICONF + base) & 0x07;
3312: #ifdef AIC7XXX_TWIN_SUPPORT
3313: config->scsi_id_b = inb(SCSICONF + base + 1) & 0x07;
3314: config->bus_type = AIC_TWIN;
3315: printk("aic7xxx: Enabled channel B of %s-Twin.\n",
3316: board_names[config->type]);
3317: outb(TWIN_BUS, FLAGS + base);
3318: #else
3319: config->bus_type = AIC_SINGLE;
3320: printk("aic7xxx: Channel B of %s-Twin will be ignored.\n",
3321: board_names[config->type]);
3322: outb(0, FLAGS + base);
3323: #endif
3324: break;
3325:
3326: default:
3327: printk("aic7xxx: Unsupported type 0x%x, please "
3328: "mail [email protected]\n", inb(SBLKCTL + base));
3329: outb(0, FLAGS + base);
3330: return (0);
3331: }
3332:
3333: /*
3334: * For the 294x cards, clearing DIAGLEDEN and DIAGLEDON, will
3335: * take the card out of diagnostic mode and make the host adatper
3336: * LED follow bus activity (will not always be on).
3337: */
3338: outb(sblkctl & ~(DIAGLEDEN | DIAGLEDON), SBLKCTL + base);
3339:
3340: /*
3341: * The IRQ level in i/o port 4 maps directly onto the real
3342: * IRQ number. If it's ok, register it with the kernel.
3343: *
3344: * NB. the Adaptec documentation says the IRQ number is only
3345: * in the lower four bits; the ECU information shows the
3346: * high bit being used as well. Which is correct?
3347: *
3348: * The PCI cards get their interrupt from PCI BIOS.
3349: */
3350: if ((config->chip_type == AIC_777x) && ((config->irq < 9) || (config->irq > 15)))
3351: {
3352: printk("aic7xxx: Host adapter uses unsupported IRQ level, ignoring.\n");
3353: return (0);
3354: }
3355:
3356: /*
3357: * Check the IRQ to see if it is shared by another aic7xxx
3358: * controller. If it is and sharing of IRQs is not defined,
3359: * then return 0 hosts found. If sharing of IRQs is allowed
3360: * or the IRQ is not shared by another host adapter, then
3361: * proceed.
3362: */
3363: #ifndef AIC7XXX_SHARE_IRQS
3364: if (aic7xxx_boards[config->irq] != NULL)
3365: {
3366: printk("aic7xxx: Sharing of IRQ's is not configured.\n");
3367: return (0);
3368: }
3369: #endif
3370:
3371: /*
3372: * Print out debugging information before re-enabling
3373: * the card - a lot of registers on it can't be read
3374: * when the sequencer is active.
3375: */
3376: debug_config(config);
3377:
3378: /*
3379: * Before registry, make sure that the offsets of the
3380: * struct scatterlist are what the sequencer will expect,
3381: * otherwise disable scatter-gather altogether until someone
3382: * can fix it. This is important since the sequencer will
3383: * DMA elements of the SG array in while executing commands.
3384: */
3385: if (template->sg_tablesize != SG_NONE)
3386: {
3387: struct scatterlist sg;
3388:
3389: if (SG_STRUCT_CHECK(sg))
3390: {
3391: printk("aic7xxx: Warning - Kernel scatter-gather structures changed, "
3392: "disabling it.\n");
3393: template->sg_tablesize = SG_NONE;
3394: }
3395: }
3396:
3397: /*
3398: * Register each "host" and fill in the returned Scsi_Host
3399: * structure as best we can. Some of the parameters aren't
3400: * really relevant for bus types beyond ISA, and none of the
3401: * high-level SCSI code looks at it anyway. Why are the fields
3402: * there? Also save the pointer so that we can find the
3403: * information when an IRQ is triggered.
3404: */
3405: host = scsi_register(template, sizeof(struct aic7xxx_host));
3406: host->can_queue = config->maxscb;
3407: host->cmd_per_lun = AIC7XXX_CMDS_PER_LUN;
3408: host->this_id = config->scsi_id;
3409: host->irq = config->irq;
3410: if (config->bus_type == AIC_WIDE)
3411: {
3412: host->max_id = 16;
3413: }
3414: if (config->bus_type == AIC_TWIN)
3415: {
3416: host->max_channel = 1;
3417: }
3418:
3419: p = (struct aic7xxx_host *) host->hostdata;
3420:
3421: /*
3422: * Initialize the scb array by setting the state to free.
3423: */
3424: for (i = 0; i < AIC7XXX_MAXSCB; i++)
3425: {
3426: p->scb_array[i].state = SCB_FREE;
3427: p->scb_array[i].next = NULL;
3428: p->scb_array[i].cmd = NULL;
3429: }
3430:
3431: p->isr_count = 0;
3432: p->a_scanned = FALSE;
3433: p->b_scanned = FALSE;
3434: p->base = base;
3435: p->maxscb = config->maxscb;
3436: p->numscb = 0;
3437: p->extended = config->extended;
3438: p->type = config->type;
3439: p->chip_type = config->chip_type;
3440: p->ultra_enabled = config->ultra_enabled;
3441: p->chan_num = config->chan_num;
3442: p->bus_type = config->bus_type;
3443: p->have_seeprom = have_seeprom;
3444: p->seeprom = sc;
3445: p->free_scb = NULL;
3446: p->next = NULL;
3447:
3448: p->unpause = config->unpause;
3449: p->pause = config->pause;
3450:
3451: if (aic7xxx_boards[config->irq] == NULL)
3452: {
3453: /*
3454: * Warning! This must be done before requesting the irq. It is
3455: * possible for some boards to raise an interrupt as soon as
3456: * they are enabled. So when we request the irq from the Linux
3457: * kernel, an interrupt is triggered immediately. Therefore, we
3458: * must ensure the board data is correctly set before the request.
3459: */
3460: aic7xxx_boards[config->irq] = host;
3461:
3462: /*
3463: * Register IRQ with the kernel.
3464: */
3465: if (request_irq(config->irq, aic7xxx_isr, SA_INTERRUPT, "aic7xxx"))
3466: {
3467: printk("aic7xxx: Couldn't register IRQ %d, ignoring.\n", config->irq);
3468: aic7xxx_boards[config->irq] = NULL;
3469: return (0);
3470: }
3471: }
3472: else
3473: {
3474: /*
3475: * We have found a host adapter sharing an IRQ of a previously
3476: * registered host adapter. Add this host adapter's Scsi_Host
3477: * to the beginning of the linked list of hosts at the same IRQ.
3478: */
3479: p->next = aic7xxx_boards[config->irq];
3480: aic7xxx_boards[config->irq] = host;
3481: }
3482:
3483: /*
3484: * Load the sequencer program, then re-enable the board -
3485: * resetting the AIC-7770 disables it, leaving the lights
3486: * on with nobody home. On the PCI bus you *may* be home,
3487: * but then your mailing address is dynamically assigned
3488: * so no one can find you anyway :-)
3489: */
3490: printk("aic7xxx: Downloading sequencer code...");
3491: aic7xxx_loadseq(base);
3492:
3493: /*
3494: * Set Fast Mode and Enable the board
3495: */
3496: outb(FASTMODE, SEQCTL + base);
3497:
3498: if (p->chip_type == AIC_777x)
3499: {
3500: outb(ENABLE, BCTL + base);
3501: }
3502:
3503: printk("done.\n");
3504:
3505: /*
3506: * Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels
3507: */
3508: if (p->bus_type == AIC_TWIN)
3509: {
3510: /*
3511: * Select Channel B.
3512: */
3513: outb((sblkctl & ~SELBUS_MASK) | SELBUSB, SBLKCTL + base);
3514:
3515: outb(config->scsi_id_b, SCSIID + base);
3516: scsi_conf = inb(SCSICONF + base + 1) & (ENSPCHK | STIMESEL);
3517: outb(scsi_conf | ENSTIMER | ACTNEGEN | STPWEN, SXFRCTL1 + base);
3518: outb(ENSELTIMO , SIMODE1 + base);
3519: if (p->ultra_enabled)
3520: {
3521: outb(DFON | SPIOEN | ULTRAEN, SXFRCTL0 + base);
3522: }
3523: else
3524: {
3525: outb(DFON | SPIOEN, SXFRCTL0 + base);
3526: }
3527:
3528: /*
3529: * Select Channel A
3530: */
3531: outb((sblkctl & ~SELBUS_MASK) | SELNARROW, SBLKCTL + base);
3532: }
3533: outb(config->scsi_id, SCSIID + base);
3534: scsi_conf = inb(SCSICONF + base) & (ENSPCHK | STIMESEL);
3535: outb(scsi_conf | ENSTIMER | ACTNEGEN | STPWEN, SXFRCTL1 + base);
3536: outb(ENSELTIMO , SIMODE1 + base);
3537: if (p->ultra_enabled)
3538: {
3539: outb(DFON | SPIOEN | ULTRAEN, SXFRCTL0 + base);
3540: }
3541: else
3542: {
3543: outb(DFON | SPIOEN, SXFRCTL0 + base);
3544: }
3545:
3546: /*
3547: * Look at the information that board initialization or the board
3548: * BIOS has left us. In the lower four bits of each target's
3549: * scratch space any value other than 0 indicates that we should
3550: * initiate synchronous transfers. If it's zero, the user or the
3551: * BIOS has decided to disable synchronous negotiation to that
3552: * target so we don't activate the needsdtr flag.
3553: */
3554: p->needsdtr_copy = 0x0;
3555: p->sdtr_pending = 0x0;
3556: p->needwdtr_copy = 0x0;
3557: p->wdtr_pending = 0x0;
3558: if (p->bus_type == AIC_SINGLE)
3559: {
3560: max_targets = 8;
3561: }
3562: else
3563: {
3564: max_targets = 16;
3565: }
3566:
3567: /*
3568: * Grab the disconnection disable table and invert it for our needs
3569: */
3570: if (have_seeprom)
3571: {
3572: p->discenable = 0x0;
3573: }
3574: else
3575: {
3576: if (bios_disabled)
3577: {
3578: printk("aic7xxx : Host adapter BIOS disabled. Using default SCSI "
3579: "device parameters.\n");
3580: p->discenable = 0xFFFF;
3581: }
3582: else
3583: {
3584: p->discenable = ~((inb(DISC_DSB + base + 1) << 8) |
3585: inb(DISC_DSB + base));
3586: }
3587: }
3588:
3589: for (i = 0; i < max_targets; i++)
3590: {
3591: if (have_seeprom)
3592: {
3593: target_settings = ((sc.device_flags[i] & CFXFER) << 4);
3594: if (sc.device_flags[i] & CFSYNCH)
3595: {
3596: p->needsdtr_copy |= (0x01 << i);
3597: }
3598: if (sc.device_flags[i] & CFWIDEB)
3599: {
3600: p->needwdtr_copy |= (0x01 << i);
3601: }
3602: if (sc.device_flags[i] & CFDISC)
3603: {
3604: p->discenable |= (0x01 << i);
3605: }
3606: }
3607: else
3608: {
3609: if (bios_disabled)
3610: {
3611: target_settings = 0; /* 10 MHz */
3612: p->needsdtr_copy |= (0x01 << i);
3613: p->needwdtr_copy |= (0x01 << i);
3614: }
3615: else
3616: {
3617: target_settings = inb(TARG_SCRATCH + base + i);
3618: if (target_settings & 0x0F)
3619: {
3620: p->needsdtr_copy |= (0x01 << i);
3621: /*
3622: * Default to asynchronous transfers (0 offset)
3623: */
3624: target_settings &= 0xF0;
3625: }
3626: if (target_settings & 0x80)
3627: {
3628: p->needwdtr_copy |= (0x01 << i);
3629: target_settings &= 0x7F;
3630: }
3631: }
3632: }
3633: outb(target_settings, (TARG_SCRATCH + base + i));
3634: }
3635:
3636: /*
3637: * If we are not wide, forget WDTR. This makes the driver
3638: * work on some cards that don't leave these fields cleared
3639: * when BIOS is not installed.
3640: */
3641: if (p->bus_type != AIC_WIDE)
3642: {
3643: p->needwdtr = 0;
3644: }
3645: p->needsdtr = p->needsdtr_copy;
3646: p->needwdtr = p->needwdtr_copy;
3647: #if 0
3648: printk("NeedSdtr = 0x%x, 0x%x\n", p->needsdtr_copy, p->needsdtr);
3649: printk("NeedWdtr = 0x%x, 0x%x\n", p->needwdtr_copy, p->needwdtr);
3650: #endif
3651:
3652: /*
3653: * Clear the control byte for every SCB so that the sequencer
3654: * doesn't get confused and think that one of them is valid
3655: */
3656: for (i = 0; i < config->maxscb; i++)
3657: {
3658: outb(i, SCBPTR + base);
3659: outb(0, SCBARRAY + base);
3660: }
3661:
3662: /*
3663: * For reconnecting targets, the sequencer code needs to
3664: * know how many SCBs it has to search through.
3665: */
3666: outb(config->maxscb, SCBCOUNT + base);
3667:
3668: /*
3669: * 2s compliment of SCBCOUNT
3670: */
3671: i = p->maxscb;
3672: outb(-i & 0xff, COMP_SCBCOUNT + base);
3673:
3674: /*
3675: * Clear the active flags - no targets are busy.
3676: */
3677: outb(0, ACTIVE_A + base);
3678: outb(0, ACTIVE_B + base);
3679:
3680: /*
3681: * We don't have any waiting selections
3682: */
3683: outb(SCB_LIST_NULL, WAITING_SCBH + base);
3684: outb(SCB_LIST_NULL, WAITING_SCBT + base);
3685:
3686: /*
3687: * Reset the SCSI bus. Is this necessary?
3688: * There may be problems for a warm boot without resetting
3689: * the SCSI bus. Either BIOS settings in scratch RAM
3690: * will not get reinitialized, or devices may stay at
3691: * previous negotiated settings (SDTR and WDTR) while
3692: * the driver will think that no negotiations have been
3693: * performed.
3694: *
3695: * Some devices need a long time to "settle" after a SCSI
3696: * bus reset.
3697: */
3698:
3699: if (!aic7xxx_no_reset)
3700: {
3701: printk("aic7xxx: Resetting the SCSI bus...");
3702: if (p->bus_type == AIC_TWIN)
3703: {
3704: /*
3705: * Select Channel B.
3706: */
3707: outb((sblkctl & ~SELBUS_MASK) | SELBUSB, SBLKCTL + base);
3708:
3709: outb(SCSIRSTO, SCSISEQ + base);
3710: udelay(1000);
3711: outb(0, SCSISEQ + base);
3712:
3713: /*
3714: * Select Channel A.
3715: */
3716: outb((sblkctl & ~SELBUS_MASK) | SELNARROW, SBLKCTL + base);
3717: }
3718:
3719: outb(SCSIRSTO, SCSISEQ + base);
3720: udelay(1000);
3721: outb(0, SCSISEQ + base);
3722:
3723: aic7xxx_delay(AIC7XXX_RESET_DELAY);
3724:
3725: printk("done.\n");
3726: }
3727:
3728: /*
3729: * Unpause the sequencer before returning and enable
3730: * interrupts - we shouldn't get any until the first
3731: * command is sent to us by the high-level SCSI code.
3732: */
3733: UNPAUSE_SEQUENCER(p);
3734: return (found);
3735: }
3736:
3737: /*+F*************************************************************************
3738: * Function:
3739: * aic7xxx_detect
3740: *
3741: * Description:
3742: * Try to detect and register an Adaptec 7770 or 7870 SCSI controller.
3743: *-F*************************************************************************/
3744: int
3745: aic7xxx_detect(Scsi_Host_Template *template)
3746: {
3747: int found = 0, slot, base;
3748: unsigned char irq = 0;
3749: int i;
3750: struct aic7xxx_host_config config;
3751:
3752: template->proc_dir = &proc_scsi_aic7xxx;
3753: config.chan_num = 0;
3754:
3755: /*
3756: * Since we may allow sharing of IRQs, it is imperative
3757: * that we "null-out" the aic7xxx_boards array. It is
3758: * not guaranteed to be initialized to 0 (NULL). We use
3759: * a NULL entry to indicate that no prior hosts have
3760: * been found/registered for that IRQ.
3761: */
3762: for (i = 0; i <= MAXIRQ; i++)
3763: {
3764: aic7xxx_boards[i] = NULL;
3765: }
3766:
3767: /*
3768: * Initialize the spurious count to 0.
3769: */
3770: aic7xxx_spurious_count = 0;
3771:
3772: /*
3773: * EISA/VL-bus card signature probe.
3774: */
3775: for (slot = MINSLOT; slot <= MAXSLOT; slot++)
3776: {
3777: base = SLOTBASE(slot) + MINREG;
3778:
3779: if (check_region(MINREG + base, MAXREG - MINREG))
3780: {
3781: /*
3782: * Some other driver has staked a
3783: * claim to this i/o region already.
3784: */
3785: continue;
3786: }
3787:
3788: config.type = aic7xxx_probe(slot, HID0 + base);
3789: if (config.type != AIC_NONE)
3790: {
3791: /*
3792: * We found a card, allow 1 spurious interrupt.
3793: */
3794: aic7xxx_spurious_count = 1;
3795:
3796: /*
3797: * We "find" a AIC-7770 if we locate the card
3798: * signature and we can set it up and register
3799: * it with the kernel without incident.
3800: */
3801: config.chip_type = AIC_777x;
3802: config.base = base;
3803: config.irq = irq;
3804: config.parity = AIC_UNKNOWN;
3805: config.low_term = AIC_UNKNOWN;
3806: config.high_term = AIC_UNKNOWN;
3807: config.busrtime = 0;
3808: config.walk_scbs = FALSE;
3809: config.ultra_enabled = FALSE;
3810: found += aic7xxx_register(template, &config);
3811:
3812: /*
3813: * Disallow spurious interrupts.
3814: */
3815: aic7xxx_spurious_count = 0;
3816: }
3817: }
3818:
3819: #ifdef CONFIG_PCI
3820: /*
3821: * PCI-bus probe.
3822: */
3823: if (pcibios_present())
3824: {
3825: struct
3826: {
3827: unsigned short vendor_id;
3828: unsigned short device_id;
3829: aha_type card_type;
3830: aha_chip_type chip_type;
3831: } const aic7xxx_pci_devices[] = {
3832: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7850, AIC_7850, AIC_785x},
3833: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7870, AIC_7870, AIC_787x},
3834: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7871, AIC_7871, AIC_787x},
3835: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7872, AIC_7872, AIC_787x},
3836: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7873, AIC_7873, AIC_787x},
3837: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7874, AIC_7874, AIC_787x},
3838: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7880, AIC_7880, AIC_788x},
3839: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7881, AIC_7881, AIC_788x},
3840: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7882, AIC_7882, AIC_788x},
3841: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7883, AIC_7883, AIC_788x},
3842: {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7884, AIC_7884, AIC_788x}
3843: };
3844:
3845: int error;
3846: int done = 0;
3847: unsigned int io_port;
3848: unsigned short index = 0;
3849: unsigned char pci_bus, pci_device_fn;
3850: unsigned int csize_lattime;
3851: unsigned int class_revid;
3852: unsigned int devconfig;
3853: char rev_id[] = {'B', 'C', 'D'};
3854:
3855: for (i = 0; i < NUMBER(aic7xxx_pci_devices); i++)
3856: {
3857: done = FALSE;
3858: while (!done)
3859: {
3860: if (pcibios_find_device(aic7xxx_pci_devices[i].vendor_id,
3861: aic7xxx_pci_devices[i].device_id,
3862: index, &pci_bus, &pci_device_fn))
3863: {
3864: done = TRUE;
3865: }
3866: else /* Found an Adaptec PCI device. */
3867: {
3868: config.type = aic7xxx_pci_devices[i].card_type;
3869: config.chip_type = aic7xxx_pci_devices[i].chip_type;
3870: config.chan_num = 0;
3871: config.walk_scbs = FALSE;
3872: switch (config.type)
3873: {
3874: case AIC_7872: /* 3940 */
3875: case AIC_7882: /* 3940-Ultra */
3876: config.walk_scbs = TRUE;
3877: config.chan_num = number_of_39xxs & 0x1; /* Has 2 controllers */
3878: number_of_39xxs++;
3879: if (number_of_39xxs == 2)
3880: {
3881: number_of_39xxs = 0; /* To be consistent with 3985. */
3882: }
3883: break;
3884:
3885: case AIC_7873: /* 3985 */
3886: case AIC_7883: /* 3985-Ultra */
3887: config.chan_num = number_of_39xxs & 0x3; /* Has 3 controllers */
3888: number_of_39xxs++;
3889: if (number_of_39xxs == 3)
3890: {
3891: number_of_39xxs = 0;
3892: }
3893: break;
3894:
3895: default:
3896: break;
3897: }
3898:
3899: /*
3900: * Read esundry information from PCI BIOS.
3901: */
3902: error = pcibios_read_config_dword(pci_bus, pci_device_fn,
3903: PCI_BASE_ADDRESS_0, &io_port);
3904: error += pcibios_read_config_byte(pci_bus, pci_device_fn,
3905: PCI_INTERRUPT_LINE, &irq);
3906:
3907: /*
3908: * Ensure that we are using good values for the PCI burst size
3909: * and latency timer.
3910: */
3911: error += pcibios_read_config_dword(pci_bus, pci_device_fn,
3912: CSIZE_LATTIME, &csize_lattime);
3913: if ((csize_lattime & CACHESIZE) == 0)
3914: {
3915: /* Default to 8DWDs - what's the PCI define for this? */
3916: csize_lattime |= 8;
3917: }
3918: if((csize_lattime & LATTIME) == 0)
3919: {
3920: /* Default to 64 PCLKS (is this a good value?) */
3921: /* This may also be availble in the SEEPROM?? */
3922: csize_lattime |= (64 << 8);
3923: }
3924: pcibios_write_config_dword(pci_bus, pci_device_fn,
3925: CSIZE_LATTIME, csize_lattime);
3926: printk("aic7xxx: BurstLen = %d DWDs, Latency Timer = %d PCLKS\n",
3927: (int) (csize_lattime & CACHESIZE),
3928: (csize_lattime >> 8) & 0x000000ff);
3929:
3930: error += pcibios_read_config_dword(pci_bus, pci_device_fn,
3931: CLASS_PROGIF_REVID, &class_revid);
3932: if ((class_revid & DEVREVID) < 3)
3933: {
3934: printk("aic7xxx: %s Rev %c.\n", board_names[config.type],
3935: rev_id[class_revid & DEVREVID]);
3936: }
3937:
3938: error += pcibios_read_config_dword(pci_bus, pci_device_fn,
3939: DEVCONFIG, &devconfig);
3940: if (error)
3941: {
3942: panic("aic7xxx: (aic7xxx_detect) Error %d reading PCI registers.\n",
3943: error);
3944: }
3945:
3946: printk("aic7xxx: devconfig = 0x%x.\n", devconfig);
3947:
3948: /*
3949: * The first bit of PCI_BASE_ADDRESS_0 is always set, so
3950: * we mask it off.
3951: */
3952: base = io_port & 0xfffffffe;
3953:
3954: /*
3955: * I don't think we need to bother with allowing
3956: * spurious interrupts for the 787x/7850, but what
3957: * the hey.
3958: */
3959: aic7xxx_spurious_count = 1;
3960:
3961: config.base = base;
3962: config.irq = irq;
3963: config.parity = AIC_UNKNOWN;
3964: config.low_term = AIC_UNKNOWN;
3965: config.high_term = AIC_UNKNOWN;
3966: config.busrtime = 0;
3967: config.ultra_enabled = FALSE;
3968: if (devconfig & RAMPSM)
3969: {
3970: /*
3971: * External SRAM present. Have the probe walk the SCBs to see
3972: * how much SRAM we have and set the number of SCBs accordingly.
3973: * We have to turn off SCBRAMSEL to access the external SCB
3974: * SRAM.
3975: *
3976: * It seems that early versions of the aic7870 didn't use these
3977: * bits, hence the hack for the 3940 above. I would guess that
3978: * recent 3940s using later aic7870 or aic7880 chips do actually
3979: * set RAMPSM.
3980: *
3981: * The documentation isn't clear, but it sounds like the value
3982: * written to devconfig must not have RAMPSM set. The second
3983: * sixteen bits of the register are R/O anyway, so it shouldn't
3984: * affect RAMPSM either way.
3985: */
3986: printk ("aic7xxx: External RAM detected. Enabling RAM access.\n");
3987: devconfig &= ~(RAMPSM | SCBRAMSEL);
3988: pcibios_write_config_dword(pci_bus, pci_device_fn,
3989: DEVCONFIG, devconfig);
3990: config.walk_scbs = TRUE;
3991: }
3992: found += aic7xxx_register(template, &config);
3993:
3994: /*
3995: * Disable spurious interrupts.
3996: */
3997: aic7xxx_spurious_count = 0;
3998:
3999: index++;
4000: } /* Found an Adaptec PCI device. */
4001: }
4002: }
4003: }
4004: #endif CONFIG_PCI
4005:
4006: template->name = aic7xxx_info(NULL);
4007: return (found);
4008: }
4009:
4010:
4011: /*+F*************************************************************************
4012: * Function:
4013: * aic7xxx_buildscb
4014: *
4015: * Description:
4016: * Build a SCB.
4017: *-F*************************************************************************/
4018: static void
4019: aic7xxx_buildscb(struct aic7xxx_host *p,
4020: Scsi_Cmnd *cmd,
4021: struct aic7xxx_scb *scb)
4022: {
4023: void *addr;
4024: unsigned short mask;
4025: struct scatterlist *sg;
4026:
4027: /*
4028: * Setup the control byte if we need negotiation and have not
4029: * already requested it.
4030: */
4031: #ifdef AIC7XXX_TAGGED_QUEUEING
4032: if (cmd->device->tagged_supported)
4033: {
4034: if (cmd->device->tagged_queue == 0)
4035: {
4036: printk("aic7xxx: Enabling tagged queuing for target %d, "
4037: "channel %d.\n", cmd->target, cmd->channel);
4038: cmd->device->tagged_queue = 1;
4039: cmd->device->current_tag = 1; /* enable tagging */
4040: }
4041: cmd->tag = cmd->device->current_tag;
4042: cmd->device->current_tag++;
4043: scb->control |= TAG_ENB;
4044: }
4045: #endif
4046: mask = (0x01 << (cmd->target | (cmd->channel << 3)));
4047: if (p->discenable & mask)
4048: {
4049: scb->control |= DISCENB;
4050: }
4051: if ((p->needwdtr & mask) && !(p->wdtr_pending & mask))
4052: {
4053: p->wdtr_pending |= mask;
4054: scb->control |= NEEDWDTR;
4055: #if 0
4056: printk("aic7xxx: Sending WDTR request to target %d.\n", cmd->target);
4057: #endif
4058: }
4059: else
4060: {
4061: if ((p->needsdtr & mask) && !(p->sdtr_pending & mask))
4062: {
4063: p->sdtr_pending |= mask;
4064: scb->control |= NEEDSDTR;
4065: #if 0
4066: printk("aic7xxx: Sending SDTR request to target %d.\n", cmd->target);
4067: #endif
4068: }
4069: }
4070:
4071: #if 0
4072: printk("aic7xxx: (build_scb) Target %d, cmd(0x%x) size(%u) wdtr(0x%x) "
4073: "mask(0x%x).\n",
4074: cmd->target, cmd->cmnd[0], cmd->cmd_len, p->needwdtr, mask);
4075: #endif
4076: scb->target_channel_lun = ((cmd->target << 4) & 0xF0) |
4077: ((cmd->channel & 0x01) << 3) | (cmd->lun & 0x07);
4078:
4079: /*
4080: * The interpretation of request_buffer and request_bufflen
4081: * changes depending on whether or not use_sg is zero; a
4082: * non-zero use_sg indicates the number of elements in the
4083: * scatter-gather array.
4084: */
4085:
4086: /*
4087: * XXX - this relies on the host data being stored in a
4088: * little-endian format.
4089: */
4090: addr = cmd->cmnd;
4091: scb->SCSI_cmd_length = cmd->cmd_len;
4092: memcpy(scb->SCSI_cmd_pointer, &addr, sizeof(scb->SCSI_cmd_pointer));
4093:
4094: if (cmd->use_sg)
4095: {
4096: scb->SG_segment_count = cmd->use_sg;
4097: memcpy(scb->SG_list_pointer, &cmd->request_buffer,
4098: sizeof(scb->SG_list_pointer));
4099: memcpy(&sg, &cmd->request_buffer, sizeof(sg));
4100: memcpy(scb->data_pointer, &(sg[0].address), sizeof(scb->data_pointer));
4101: scb->data_count = sg[0].length;
4102: #if 0
4103: debug("aic7xxx: (build_scb) SG segs(%d), length(%u), sg[0].length(%d).\n",
4104: cmd->use_sg, aic7xxx_length(cmd, 0), scb->data_count);
4105: #endif
4106: }
4107: else
4108: {
4109: #if 0
4110: debug("aic7xxx: (build_scb) Creating scatterlist, addr(0x%lx) length(%d).\n",
4111: (unsigned long) cmd->request_buffer, cmd->request_bufflen);
4112: #endif
4113: if (cmd->request_bufflen == 0)
4114: {
4115: /*
4116: * In case the higher level SCSI code ever tries to send a zero
4117: * length command, ensure the SCB indicates no data. The driver
4118: * will interpret a zero length command as a Bus Device Reset.
4119: */
4120: scb->SG_segment_count = 0;
4121: memset(scb->SG_list_pointer, 0, sizeof(scb->SG_list_pointer));
4122: memset(scb->data_pointer, 0, sizeof(scb->data_pointer));
4123: scb->data_count = 0;
4124: }
4125: else
4126: {
4127: scb->SG_segment_count = 1;
4128: scb->sg.address = (char *) cmd->request_buffer;
4129: scb->sg.length = cmd->request_bufflen;
4130: addr = &scb->sg;
4131: memcpy(scb->SG_list_pointer, &addr, sizeof(scb->SG_list_pointer));
4132: scb->data_count = scb->sg.length;
4133: memcpy(scb->data_pointer, &cmd->request_buffer, sizeof(scb->data_pointer));
4134: }
4135: }
4136: }
4137:
4138: /*+F*************************************************************************
4139: * Function:
4140: * aic7xxx_queue
4141: *
4142: * Description:
4143: * Queue a SCB to the controller.
4144: *-F*************************************************************************/
4145: int
4146: aic7xxx_queue(Scsi_Cmnd *cmd, void (*fn)(Scsi_Cmnd *))
4147: {
4148: long flags;
4149: struct aic7xxx_host *p;
4150: struct aic7xxx_scb *scb;
4151:
4152: p = (struct aic7xxx_host *) cmd->host->hostdata;
4153:
4154: /*
4155: * Check to see if channel was scanned.
4156: */
4157: if (!p->a_scanned && (cmd->channel == 0))
4158: {
4159: printk("aic7xxx: Scanning channel A for devices.\n");
4160: p->a_scanned = TRUE;
4161: }
4162: else
4163: {
4164: if (!p->b_scanned && (cmd->channel == 1))
4165: {
4166: printk("aic7xxx: Scanning channel B for devices.\n");
4167: p->b_scanned = TRUE;
4168: }
4169: }
4170:
4171: #if 0
4172: debug("aic7xxx: (queue) cmd(0x%x) size(%u), target %d, channel %d, lun %d.\n",
4173: cmd->cmnd[0], cmd->cmd_len, cmd->target, cmd->channel,
4174: cmd->lun & 0x07);
4175: #endif
4176:
4177: /*
4178: * This is a critical section, since we don't want the
4179: * interrupt routine mucking with the host data or the
4180: * card. Since the kernel documentation is vague on
4181: * whether or not we are in a cli/sti pair already, save
4182: * the flags to be on the safe side.
4183: */
4184: save_flags(flags);
4185: cli();
4186:
4187: /*
4188: * Find a free slot in the SCB array to load this command
4189: * into. Since can_queue is set to the maximum number of
4190: * SCBs for the card, we should always find one.
4191: *
4192: * First try to find an scb in the free list. If there are
4193: * none in the free list, then check the current number of
4194: * of scbs and take an unused one from the scb array.
4195: */
4196: scb = p->free_scb;
4197: if (scb != NULL)
4198: { /* found one in the free list */
4199: p->free_scb = scb->next; /* remove and update head of list */
4200: /*
4201: * Warning! For some unknown reason, the scb at the head
4202: * of the free list is not the same address that it should
4203: * be. That's why we set the scb pointer taken by the
4204: * position in the array. The scb at the head of the list
4205: * should match this address, but it doesn't.
4206: */
4207: scb = &(p->scb_array[scb->position]);
4208: scb->control = 0;
4209: scb->state = SCB_ACTIVE;
4210: }
4211: else
4212: {
4213: if (p->numscb >= p->maxscb)
4214: {
4215: panic("aic7xxx: (aic7xxx_queue) Couldn't find a free SCB.\n");
4216: }
4217: else
4218: {
4219: /*
4220: * Initialize the scb within the scb array. The
4221: * position within the array is the position on
4222: * the board that it will be loaded.
4223: */
4224: scb = &(p->scb_array[p->numscb]);
4225: memset(scb, 0, sizeof(*scb));
4226:
4227: scb->position = p->numscb;
4228: p->numscb++;
4229: scb->state = SCB_ACTIVE;
4230: }
4231: }
4232:
4233: scb->cmd = cmd;
4234: aic7xxx_position(cmd) = scb->position;
4235: #if 0
4236: debug_scb(scb);
4237: #endif;
4238:
4239: /*
4240: * Construct the SCB beforehand, so the sequencer is
4241: * paused a minimal amount of time.
4242: */
4243: aic7xxx_buildscb(p, cmd, scb);
4244:
4245: #if 0
4246: if (scb != &p->scb_array[scb->position])
4247: {
4248: printk("aic7xxx: (queue) Address of SCB by position does not match SCB "
4249: "address.\n");
4250: }
4251: printk("aic7xxx: (queue) SCB pos(%d) cmdptr(0x%x) state(%d) freescb(0x%x)\n",
4252: scb->position, (unsigned int) scb->cmd,
4253: scb->state, (unsigned int) p->free_scb);
4254: #endif
4255: /*
4256: * Pause the sequencer so we can play with its registers -
4257: * wait for it to acknowledge the pause.
4258: *
4259: * XXX - should the interrupts be left on while doing this?
4260: */
4261: PAUSE_SEQUENCER(p);
4262:
4263: /*
4264: * Save the SCB pointer and put our own pointer in - this
4265: * selects one of the four banks of SCB registers. Load
4266: * the SCB, then write its pointer into the queue in FIFO
4267: * and restore the saved SCB pointer.
4268: */
4269: aic7xxx_putscb(p, scb);
4270: outb(scb->position, QINFIFO + p->base);
4271:
4272: /*
4273: * Make sure the Scsi_Cmnd pointer is saved, the struct it
4274: * points to is set up properly, and the parity error flag
4275: * is reset, then unpause the sequencer and watch the fun
4276: * begin.
4277: */
4278: cmd->scsi_done = fn;
4279: aic7xxx_error(cmd) = DID_OK;
4280: aic7xxx_status(cmd) = 0;
4281: cmd->result = 0;
4282: memset(&cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
4283:
4284: UNPAUSE_SEQUENCER(p);
4285: #if 0
4286: printk("aic7xxx: (queue) After - cmd(0x%lx) scb->cmd(0x%lx) pos(%d).\n",
4287: (long) cmd, (long) scb->cmd, scb->position);
4288: #endif;
4289: restore_flags(flags);
4290: return (0);
4291: }
4292:
4293: /*+F*************************************************************************
4294: * Function:
4295: * aic7xxx_abort_scb
4296: *
4297: * Description:
4298: * Abort an scb. If the scb has not previously been aborted, then
4299: * we attempt to send a BUS_DEVICE_RESET message to the target. If
4300: * the scb has previously been unsuccessfully aborted, then we will
4301: * reset the channel and have all devices renegotiate. Returns an
4302: * enumerated type that indicates the status of the operation.
4303: *-F*************************************************************************/
4304: static aha_abort_reset_type
4305: aic7xxx_abort_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
4306: unsigned char errcode)
4307: {
4308: int base = p->base;
4309: int found = FALSE;
4310: aha_abort_reset_type scb_status = ABORT_RESET_SUCCESS;
4311: char channel = scb->target_channel_lun & SELBUSB ? 'B': 'A';
4312:
4313: /*
4314: * Ensure that the card doesn't do anything
4315: * behind our back.
4316: */
4317: PAUSE_SEQUENCER(p);
4318:
4319: #ifdef AIC7XXX_DEBUG_ABORT
4320: printk ("aic7xxx: (abort_scb) scb %d, scb_aborted 0x%x\n",
4321: scb->position, (scb->state & SCB_ABORTED));
4322: #endif
4323: /*
4324: * First, determine if we want to do a bus reset or simply a bus device
4325: * reset. If this is the first time that a transaction has timed out,
4326: * just schedule a bus device reset. Otherwise, we reset the bus and
4327: * abort all pending I/Os on that bus.
4328: */
4329: if (scb->state & SCB_ABORTED)
4330: {
4331: /*
4332: * Been down this road before. Do a full bus reset.
4333: */
4334: found = aic7xxx_reset_channel(p, channel, scb->position);
4335: }
4336: else
4337: {
4338: unsigned char active_scb, control;
4339: struct aic7xxx_scb *active_scbp;
4340:
4341: /*
4342: * Send a Bus Device Reset Message:
4343: * The target we select to send the message to may be entirely
4344: * different than the target pointed to by the scb that timed
4345: * out. If the command is in the QINFIFO or the waiting for
4346: * selection list, its not tying up the bus and isn't responsible
4347: * for the delay so we pick off the active command which should
4348: * be the SCB selected by SCBPTR. If its disconnected or active,
4349: * we device reset the target scbp points to. Although it may
4350: * be that this target is not responsible for the delay, it may
4351: * may also be that we're timing out on a command that just takes
4352: * too much time, so we try the bus device reset there first.
4353: */
4354: active_scb = inb(SCBPTR + base);
4355: active_scbp = &(p->scb_array[active_scb]);
4356: control = inb(SCBARRAY + base);
4357:
4358: /*
4359: * Test to see if scbp is disconnected
4360: */
4361: outb(scb->position, SCBPTR + base);
4362: if (inb(SCBARRAY + base) & DISCONNECTED)
4363: {
4364: #ifdef AIC7XXX_DEBUG_ABORT
4365: printk ("aic7xxx: (abort_scb) scb %d is disconnected.\n", scb->position);
4366: #endif
4367: scb->state |= (SCB_DEVICE_RESET | SCB_ABORTED);
4368: scb->SG_segment_count = 0;
4369: memset(scb->SG_list_pointer, 0, sizeof(scb->SG_list_pointer));
4370: memset(scb->data_pointer, 0, sizeof(scb->data_pointer));
4371: scb->data_count = 0;
4372: aic7xxx_putscb(p, scb);
4373: aic7xxx_error(scb->cmd) = errcode;
4374: scb_status = ABORT_RESET_PENDING;
4375: aic7xxx_add_waiting_scb(base, scb, LIST_SECOND);
4376: UNPAUSE_SEQUENCER(p);
4377: }
4378: else
4379: {
4380: /*
4381: * Is the active SCB really active?
4382: */
4383: if (active_scbp->state & SCB_ACTIVE)
4384: {
4385: unsigned char msg_len = inb(MSG_LEN + base);
4386: if (msg_len != 0)
4387: {
4388: #ifdef AIC7XXX_DEBUG_ABORT
4389: printk ("aic7xxx: (abort_scb) scb is active, needs DMA, "
4390: "msg_len is non-zero.\n");
4391: #endif
4392: /*
4393: * If we're in a message phase, tacking on another message
4394: * may confuse the target totally. The bus is probably wedged,
4395: * so reset the channel.
4396: */
4397: channel = (active_scbp->target_channel_lun & SELBUSB) ? 'B': 'A';
4398: aic7xxx_reset_channel(p, channel, scb->position);
4399: }
4400: else
4401: {
4402: #ifdef AIC7XXX_DEBUG_ABORT
4403: printk ("aic7xxx: (abort_scb) scb is active, needs DMA, "
4404: "msg_len is zero.\n");
4405: #endif
4406: /*
4407: * Load the message buffer and assert attention.
4408: */
4409: active_scbp->state |= (SCB_DEVICE_RESET | SCB_ABORTED);
4410: outb(1, MSG_LEN + base);
4411: outb(MSG_BUS_DEVICE_RESET, MSG0 + base);
4412: if (active_scbp->target_channel_lun != scb->target_channel_lun)
4413: {
4414: /*
4415: * XXX - We would like to increment the timeout on scb, but
4416: * access to that routine is denied because it is hidden
4417: * in scsi.c. If we were able to do this, it would give
4418: * scb a new lease on life.
4419: */
4420: ;
4421: }
4422: aic7xxx_error(scb->cmd) = errcode;
4423: scb_status = ABORT_RESET_PENDING;
4424: UNPAUSE_SEQUENCER(p);
4425: }
4426: }
4427: else
4428: {
4429: #ifdef AIC7XXX_DEBUG_ABORT
4430: printk ("aic7xxx: (abort_scb) no active command.\n");
4431: #endif
4432: /*
4433: * No active command to single out, so reset
4434: * the bus for the timed out target.
4435: */
4436: aic7xxx_reset_channel(p, channel, scb->position);
4437: }
4438: }
4439: }
4440: return (scb_status);
4441: }
4442:
4443: /*+F*************************************************************************
4444: * Function:
4445: * aic7xxx_abort_reset
4446: *
4447: * Description:
4448: * Abort or reset the current SCSI command(s). Returns an enumerated
4449: * type that indicates the status of the operation.
4450: *-F*************************************************************************/
4451: static aha_abort_reset_type
4452: aic7xxx_abort_reset(Scsi_Cmnd *cmd, unsigned char errcode)
4453: {
4454: struct aic7xxx_scb *scb;
4455: struct aic7xxx_host *p;
4456: long flags;
4457: aha_abort_reset_type scb_status = ABORT_RESET_SUCCESS;
4458:
4459: p = (struct aic7xxx_host *) cmd->host->hostdata;
4460: scb = &(p->scb_array[aic7xxx_position(cmd)]);
4461:
4462: save_flags(flags);
4463: cli();
4464:
4465: #ifdef AIC7XXX_DEBUG_ABORT
4466: printk ("aic7xxx: (abort_reset) scb state 0x%x\n", scb->state);
4467: #endif
4468:
4469: if (scb->state & SCB_ACTIVE)
4470: {
4471: if (scb->state & SCB_IMMED)
4472: {
4473: /*
4474: * Don't know how set the number of retries to 0.
4475: */
4476: /* cmd->retries = 0; */
4477: aic7xxx_error(cmd) = errcode;
4478: aic7xxx_done(p, scb);
4479: }
4480: else
4481: {
4482: /*
4483: * Abort the operation.
4484: */
4485: scb_status = aic7xxx_abort_scb(p, scb, errcode);
4486: }
4487: }
4488: else
4489: {
4490: /*
4491: * The scb is not active and must have completed after the timeout
4492: * check in scsi.c and before we check the scb state above. For
4493: * this case we return SCSI_ABORT_NOT_RUNNING (if abort was called)
4494: * or SCSI_RESET_SUCCESS (if reset was called).
4495: */
4496: #ifdef AIC7XXX_DEBUG_ABORT
4497: printk ("aic7xxx: (abort_reset) called with no active scb, errcode 0x%x\n",
4498: errcode);
4499: #endif
4500: scb_status = ABORT_RESET_INACTIVE;
4501: /*
4502: * According to the comments in scsi.h and Michael Neuffer, if we do not
4503: * have an active command for abort or reset, we should not call the
4504: * command done function. Unfortunately, this hangs the system for me
4505: * unless we *do* call the done function.
4506: *
4507: * XXX - Revisit this sometime!
4508: */
4509: cmd->result = errcode << 16;
4510: cmd->scsi_done(cmd);
4511: }
4512: restore_flags(flags);
4513: return (scb_status);
4514: }
4515:
4516:
4517: /*+F*************************************************************************
4518: * Function:
4519: * aic7xxx_abort
4520: *
4521: * Description:
4522: * Abort the current SCSI command(s).
4523: *-F*************************************************************************/
4524: int
4525: aic7xxx_abort(Scsi_Cmnd *cmd)
4526: {
4527: #ifdef AIC7XXX_DEBUG_ABORT
4528: printk ("aic7xxx: (abort) target/channel %d/%d\n", cmd->target, cmd->channel);
4529: #endif
4530:
4531: switch (aic7xxx_abort_reset(cmd, DID_ABORT))
4532: {
4533: case ABORT_RESET_INACTIVE:
4534: return (SCSI_ABORT_NOT_RUNNING);
4535: break;
4536: case ABORT_RESET_PENDING:
4537: return (SCSI_ABORT_PENDING);
4538: break;
4539: case ABORT_RESET_SUCCESS:
4540: default:
4541: return (SCSI_ABORT_SUCCESS);
4542: break;
4543: }
4544: }
4545:
4546: /*+F*************************************************************************
4547: * Function:
4548: * aic7xxx_reset
4549: *
4550: * Description:
4551: * Resetting the bus always succeeds - is has to, otherwise the
4552: * kernel will panic! Try a surgical technique - sending a BUS
4553: * DEVICE RESET message - on the offending target before pulling
4554: * the SCSI bus reset line.
4555: *-F*************************************************************************/
4556: int
4557: aic7xxx_reset(Scsi_Cmnd *cmd)
4558: {
4559: #ifdef AIC7XXX_DEBUG_ABORT
4560: printk ("aic7xxx: (reset) target/channel %d/%d\n", cmd->target, cmd->channel);
4561: #endif
4562:
4563: switch (aic7xxx_abort_reset(cmd, DID_RESET))
4564: {
4565: case ABORT_RESET_PENDING:
4566: return (SCSI_RESET_PENDING);
4567: break;
4568: case ABORT_RESET_INACTIVE:
4569: case ABORT_RESET_SUCCESS:
4570: default:
4571: return (SCSI_RESET_SUCCESS);
4572: break;
4573: }
4574: }
4575:
4576: /*+F*************************************************************************
4577: * Function:
4578: * aic7xxx_biosparam
4579: *
4580: * Description:
4581: * Return the disk geometry for the given SCSI device.
4582: *-F*************************************************************************/
4583: int
4584: aic7xxx_biosparam(Disk *disk, kdev_t dev, int geom[])
4585: {
4586: int heads, sectors, cylinders;
4587: struct aic7xxx_host *p;
4588:
4589: p = (struct aic7xxx_host *) disk->device->host->hostdata;
4590:
4591: /*
4592: * XXX - if I could portably find the card's configuration
4593: * information, then this could be autodetected instead
4594: * of left to a boot-time switch.
4595: */
4596: heads = 64;
4597: sectors = 32;
4598: cylinders = disk->capacity / (heads * sectors);
4599:
4600: if (p->extended && cylinders > 1024)
4601: {
4602: heads = 255;
4603: sectors = 63;
4604: cylinders = disk->capacity / (255 * 63);
4605: }
4606:
4607: geom[0] = heads;
4608: geom[1] = sectors;
4609: geom[2] = cylinders;
4610:
4611: return (0);
4612: }
4613:
4614: #ifdef MACH
4615: #include "aic7xxx_proc.src"
4616: #else
4617: #include "aic7xxx_proc.c"
4618: #endif
4619:
4620: #ifdef MODULE
4621: /* Eventually this will go into an include file, but this will be later */
4622: Scsi_Host_Template driver_template = AIC7XXX;
4623:
4624: #include "scsi_module.c"
4625: #endif
4626:
4627: /*
4628: * Overrides for Emacs so that we almost follow Linus's tabbing style.
4629: * Emacs will notice this stuff at the end of the file and automatically
4630: * adjust the settings for this buffer only. This must remain at the end
4631: * of the file.
4632: * ---------------------------------------------------------------------------
4633: * Local variables:
4634: * c-indent-level: 2
4635: * c-brace-imaginary-offset: 0
4636: * c-brace-offset: -2
4637: * c-argdecl-indent: 2
4638: * c-label-offset: -2
4639: * c-continued-statement-offset: 2
4640: * c-continued-brace-offset: 0
4641: * indent-tabs-mode: nil
4642: * tab-width: 8
4643: * End:
4644: */
4645:
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