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1.1 ! root 1: /* ! 2: * Trantor T128/T128F/T228 defines ! 3: * Note : architecturally, the T100 and T128 are different and won't work ! 4: * ! 5: * Copyright 1993, Drew Eckhardt ! 6: * Visionary Computing ! 7: * (Unix and Linux consulting and custom programming) ! 8: * [email protected] ! 9: * +1 (303) 440-4894 ! 10: * ! 11: * DISTRIBUTION RELEASE 3. ! 12: * ! 13: * For more information, please consult ! 14: * ! 15: * Trantor Systems, Ltd. ! 16: * T128/T128F/T228 SCSI Host Adapter ! 17: * Hardware Specifications ! 18: * ! 19: * Trantor Systems, Ltd. ! 20: * 5415 Randall Place ! 21: * Fremont, CA 94538 ! 22: * 1+ (415) 770-1400, FAX 1+ (415) 770-9910 ! 23: * ! 24: * and ! 25: * ! 26: * NCR 5380 Family ! 27: * SCSI Protocol Controller ! 28: * Databook ! 29: * ! 30: * NCR Microelectronics ! 31: * 1635 Aeroplaza Drive ! 32: * Colorado Springs, CO 80916 ! 33: * 1+ (719) 578-3400 ! 34: * 1+ (800) 334-5454 ! 35: */ ! 36: ! 37: /* ! 38: * $Log: t128.h,v $ ! 39: * Revision 1.1.1.1 1997/02/25 21:27:53 thomas ! 40: * Initial source ! 41: * ! 42: * Revision 1.1.1.1 1996/10/30 01:40:07 thomas ! 43: * Imported from UK22 ! 44: * ! 45: * Revision 1.1 1996/03/25 20:25:52 goel ! 46: * Linux driver merge. ! 47: * ! 48: */ ! 49: ! 50: #ifndef T128_H ! 51: #define T128_H ! 52: ! 53: #define T128_PUBLIC_RELEASE 3 ! 54: ! 55: #define TDEBUG_INIT 0x1 ! 56: #define TDEBUG_TRANSFER 0x2 ! 57: ! 58: /* ! 59: * The trantor boards are memory mapped. They use an NCR5380 or ! 60: * equivalent (my sample board had part second sourced from ZILOG). ! 61: * NCR's recommended "Pseudo-DMA" architecture is used, where ! 62: * a PAL drives the DMA signals on the 5380 allowing fast, blind ! 63: * transfers with proper handshaking. ! 64: */ ! 65: ! 66: /* ! 67: * Note : a boot switch is provided for the purpose of informing the ! 68: * firmware to boot or not boot from attached SCSI devices. So, I imagine ! 69: * there are fewer people who've yanked the ROM like they do on the Seagate ! 70: * to make bootup faster, and I'll probably use this for autodetection. ! 71: */ ! 72: #define T_ROM_OFFSET 0 ! 73: ! 74: /* ! 75: * Note : my sample board *WAS NOT* populated with the SRAM, so this ! 76: * can't be used for autodetection without a ROM present. ! 77: */ ! 78: #define T_RAM_OFFSET 0x1800 ! 79: ! 80: /* ! 81: * All of the registers are allocated 32 bytes of address space, except ! 82: * for the data register (read/write to/from the 5380 in pseudo-DMA mode) ! 83: */ ! 84: #define T_CONTROL_REG_OFFSET 0x1c00 /* rw */ ! 85: #define T_CR_INT 0x10 /* Enable interrupts */ ! 86: #define T_CR_CT 0x02 /* Reset watchdog timer */ ! 87: ! 88: #define T_STATUS_REG_OFFSET 0x1c20 /* ro */ ! 89: #define T_ST_BOOT 0x80 /* Boot switch */ ! 90: #define T_ST_S3 0x40 /* User settable switches, */ ! 91: #define T_ST_S2 0x20 /* read 0 when switch is on, 1 off */ ! 92: #define T_ST_S1 0x10 ! 93: #define T_ST_PS2 0x08 /* Set for Microchannel 228 */ ! 94: #define T_ST_RDY 0x04 /* 5380 DRQ */ ! 95: #define T_ST_TIM 0x02 /* indicates 40us watchdog timer fired */ ! 96: #define T_ST_ZERO 0x01 /* Always zero */ ! 97: ! 98: #define T_5380_OFFSET 0x1d00 /* 8 registers here, see NCR5380.h */ ! 99: ! 100: #define T_DATA_REG_OFFSET 0x1e00 /* rw 512 bytes long */ ! 101: ! 102: #ifndef ASM ! 103: int t128_abort(Scsi_Cmnd *); ! 104: int t128_biosparam(Disk *, kdev_t, int*); ! 105: int t128_detect(Scsi_Host_Template *); ! 106: int t128_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); ! 107: int t128_reset(Scsi_Cmnd *); ! 108: ! 109: #ifndef NULL ! 110: #define NULL 0 ! 111: #endif ! 112: ! 113: #ifndef CMD_PER_LUN ! 114: #define CMD_PER_LUN 2 ! 115: #endif ! 116: ! 117: #ifndef CAN_QUEUE ! 118: #define CAN_QUEUE 32 ! 119: #endif ! 120: ! 121: /* ! 122: * I hadn't thought of this with the earlier drivers - but to prevent ! 123: * macro definition conflicts, we shouldn't define all of the internal ! 124: * macros when this is being used solely for the host stub. ! 125: */ ! 126: ! 127: #if defined(HOSTS_C) || defined(MODULE) ! 128: ! 129: #define TRANTOR_T128 {NULL, NULL, NULL, NULL, \ ! 130: "Trantor T128/T128F/T228", t128_detect, NULL, \ ! 131: NULL, \ ! 132: NULL, t128_queue_command, t128_abort, t128_reset, NULL, \ ! 133: t128_biosparam, \ ! 134: /* can queue */ CAN_QUEUE, /* id */ 7, SG_ALL, \ ! 135: /* cmd per lun */ CMD_PER_LUN , 0, 0, DISABLE_CLUSTERING} ! 136: ! 137: #endif ! 138: ! 139: #ifndef(HOSTS_C) ! 140: ! 141: #define NCR5380_implementation_fields \ ! 142: volatile unsigned char *base ! 143: ! 144: #define NCR5380_local_declare() \ ! 145: volatile unsigned char *base ! 146: ! 147: #define NCR5380_setup(instance) \ ! 148: base = (volatile unsigned char *) (instance)->base ! 149: ! 150: #define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20)) ! 151: ! 152: #if !(TDEBUG & TDEBUG_TRANSFER) ! 153: #define NCR5380_read(reg) (*(T128_address(reg))) ! 154: #define NCR5380_write(reg, value) (*(T128_address(reg)) = (value)) ! 155: #else ! 156: #define NCR5380_read(reg) \ ! 157: (((unsigned char) printk("scsi%d : read register %d at address %08x\n"\ ! 158: , instance->hostno, (reg), T128_address(reg))), *(T128_address(reg))) ! 159: ! 160: #define NCR5380_write(reg, value) { \ ! 161: printk("scsi%d : write %02x to register %d at address %08x\n", \ ! 162: instance->hostno, (value), (reg), T128_address(reg)); \ ! 163: *(T128_address(reg)) = (value); \ ! 164: } ! 165: #endif ! 166: ! 167: #define NCR5380_intr t128_intr ! 168: #define NCR5380_queue_command t128_queue_command ! 169: #define NCR5380_abort t128_abort ! 170: #define NCR5380_reset t128_reset ! 171: ! 172: /* 15 14 12 10 7 5 3 ! 173: 1101 0100 1010 1000 */ ! 174: ! 175: #define T128_IRQS 0xc4a8 ! 176: ! 177: #endif /* else def HOSTS_C */ ! 178: #endif /* ndef ASM */ ! 179: #endif /* T128_H */
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